SuccessChanges

Summary

  1. [lldb/Debugger] Rename ExecuteIOHandlers to RunIOHandlers (NFC) (details)
  2. Add testing for DW_OP_piece and fix a bug with small Scalar values. (details)
  3. Fix a buffer-size bug when the first DW_OP_piece is undefined (details)
  4. [modules] Do not cache invalid state for modules that we attempted to (details)
  5. Add back more link components. (details)
  6. Revert "[RISCV] Support ABI checking with per function target-features" (details)
  7. Add extra test file forgotten in 45d7080. (details)
  8. [NFC][PowerPC] Remove unnecessary link components. (details)
  9. [mlir][spirv] Add implied capabilities and availability for capabilities (details)
  10. [mlir][spirv] Use symbolize functions in enum attribute predicates (details)
  11. [mlir][spirv] Fix SPV_MM_Vulkan extension reqirements (details)
  12. Avoid creating an immutable map in the Automaton class. (details)
  13. AMDGPU: Add register classes to MUBUF load patterns (details)
  14. Don't dump IR output from this test to stdout. (details)
Commit 2671df9bd675d4a1a07457dce748f4fe939e95fb by Jonas Devlieghere
[lldb/Debugger] Rename ExecuteIOHandlers to RunIOHandlers (NFC)
This improves consistency among the related methods.
The file was modifiedlldb/include/lldb/Core/Debugger.h
The file was modifiedlldb/source/Core/Debugger.cpp
The file was modifiedlldb/source/Interpreter/CommandInterpreter.cpp
Commit 7b0d58e339b271e3b1d9dc14b781b57fa0262e3a by Adrian Prantl
Add testing for DW_OP_piece and fix a bug with small Scalar values.
By switching to Scalars that are backed by explicitly-sized APInts we
can avoid a bug that increases the buffer reserved for a small piece to
the next-largest host integer type.
This manifests as "DW_OP_piece for offset foo but top of stack is of
size bar".
Differential Revision: https://reviews.llvm.org/D72879
The file was modifiedlldb/source/Expression/DWARFExpression.cpp
The file was modifiedlldb/unittests/Expression/DWARFExpressionTest.cpp
Commit f55ab6f90b7317a6bb85303a6102702bdae1199e by Adrian Prantl
Fix a buffer-size bug when the first DW_OP_piece is undefined
and document the shortcomings of LLDB's partially defined DW_OP_piece
handling.
This would manifest as "DW_OP_piece for offset foo but top of stack is
of size bar".
rdar://problem/46262998
Differential Revision: https://reviews.llvm.org/D72880
The file was modifiedlldb/source/Expression/DWARFExpression.cpp
The file was modifiedlldb/unittests/Expression/DWARFExpressionTest.cpp
Commit 83f4c3af021cd5322ea10fd1c4e839874c1dae49 by vsapsai
[modules] Do not cache invalid state for modules that we attempted to
load.
Partially reverts 0a2be46cfdb698fefcc860a56b47dde0884d5335 as it turned
out to cause redundant module rebuilds in multi-process incremental
builds. When a module was getting out of date, all compilation processes
started at the same time were marking it as `ToBuild`. So each process
was building the same module instead of checking if it was built by
someone else and using that result. In addition to the work duplication,
contention on the same .pcm file wasn't making builds faster.
Note that for a single-process build this change would cause redundant
module reads and validations. But reading a module is faster than
building it and multi-process builds are more common than
single-process. So I'm willing to make such a trade-off.
rdar://problem/54395127
Reviewed By: dexonsmith
Differential Revision: https://reviews.llvm.org/D72860
The file was removedclang/test/Modules/Inputs/implicit-invalidate-chain/module.modulemap
The file was modifiedclang/lib/Serialization/ModuleManager.cpp
The file was modifiedclang/lib/Serialization/InMemoryModuleCache.cpp
The file was removedclang/test/Modules/implicit-invalidate-chain.c
The file was removedclang/test/Modules/Inputs/implicit-invalidate-chain/B.h
The file was removedclang/test/Modules/Inputs/implicit-invalidate-chain/A.h
The file was modifiedclang/unittests/Serialization/InMemoryModuleCacheTest.cpp
The file was modifiedclang/include/clang/Serialization/InMemoryModuleCache.h
The file was removedclang/test/Modules/Inputs/implicit-invalidate-chain/C.h
The file was modifiedclang/unittests/Frontend/FrontendActionTest.cpp
The file was modifiedclang/lib/Serialization/ASTReader.cpp
The file was modifiedclang/lib/Serialization/ASTWriter.cpp
Commit 6c26d8968ad8efd19e29b94f5f0a2b4c87904ae1 by wanyu9511
Add back more link components.
Add all previous link components back to unblock bots for the moment. In
the meantime, I'm investigating the BUILD_SHARED_LIBS=ON build to find
out the minimal list of components needed.
The file was modifiedllvm/unittests/Target/PowerPC/CMakeLists.txt
Commit cef838e65f9a2aeecf5e19431077bc16b01a79fb by zakk.chen
Revert "[RISCV] Support ABI checking with per function target-features"
This reverts commit 7bc58a779aaa1de56fad8b1bc8e46932d2f2f1e4. It breaks
EXPENSIVE_CHECKS on Windows
The file was modifiedllvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
The file was modifiedllvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll
Commit b78e8e0d79c47a6698a0abc10a37b8a253cb6064 by richard
Add extra test file forgotten in 45d7080.
The file was addedclang/test/Parser/explicit-bool.cpp
Commit ad83bed2411fdc9f9ef691a320d5d35b65ab4bae by wanyu9511
[NFC][PowerPC] Remove unnecessary link components.
Remove unused link components for PowerPC target unittest according to
post commit comments. This is a redo for a previous commit
"fc4e43ad618b" that removed a few components that are necessary when
libraries are to be built shared (i.e., BUILD_SHARED_LIBS=ON).
The file was modifiedllvm/unittests/Target/PowerPC/CMakeLists.txt
Commit 6a970135904d234039a15616481a909363b77739 by antiagainst
[mlir][spirv] Add implied capabilities and availability for capabilities
Certain SPIR-V capabilities are only available in certain SPIR-V
versions or extensions. Also a SPIR-V capability may implicitly declares
other capabilities.
This commit updates gen_spirv_dialect.py to support generating such
information into SPIRVBase.td. It requires us to topologically sort all
capabilities because now a capability can refer to another one.
This commits also registers a few extensions because their symbols are
used by capability availability.
Note that this commit hasn't updated SPIRVConversionTarget to take into
consideration such relationship yet. That will be done in a following-up
commit.
Differential Revision: https://reviews.llvm.org/D72760
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVBase.td
The file was modifiedmlir/utils/spirv/gen_spirv_dialect.py
Commit ccedb918bb33d2190e81688186946d00aa908e44 by antiagainst
[mlir][spirv] Use symbolize functions in enum attribute predicates
By default, for an enum attribute, we will generate a list of equality
comparisons for all supported cases inside it's predicate. This list can
be fairly large for certain SPIR-V enum attributes. Instead, we already
have such a list generated by EnumsGen in the symbolize functions.
Leverage that to simplify the generated C++ code.
Differential Revision: https://reviews.llvm.org/D72763
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVBase.td
The file was modifiedmlir/utils/spirv/gen_spirv_dialect.py
Commit 961174f8787b0b7f6d9c699e71dd278b66b16c38 by antiagainst
[mlir][spirv] Fix SPV_MM_Vulkan extension reqirements
SPV_MM_Vulkan can be enabled by the SPV_KHR_vulkan_memory_model
extension.
Differential Revision: https://reviews.llvm.org/D72764
The file was modifiedmlir/test/Dialect/SPIRV/availability.mlir
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVBase.td
Commit 051d330314cb1f175025ca37da8e5e1d851e1790 by hayarms
Avoid creating an immutable map in the Automaton class.
Summary: In the DFAPacketizer we copy the Transitions array into a map
in order to later access the transitions based on a "Current
State/Action" pair as a key. This map lives in the Automaton object used
by the DFAPacketizer. It is never changed during the life of the object
after having been created during the creation of the Automaton itself.
This map creation can make the creation of a DFAPacketizer quite
expensive if the target contains a considerable amount of transition
states.
Considering that TableGen already generates a sorted list of transitions
by State/Action pairs we could just use that directly in our Automaton
and search entries with std::lower_bound instead of copying it in a map
and paying the execution time and memory cost.
Reviewers: jmolloy, ThomasRaoux
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72682
The file was modifiedllvm/utils/TableGen/DFAEmitter.cpp
The file was modifiedllvm/include/llvm/Support/Automaton.h
Commit 117d4f1900c0f02774226869d42de4b585dae66c by arsenm2
AMDGPU: Add register classes to MUBUF load patterns
The file was modifiedllvm/lib/Target/AMDGPU/BUFInstructions.td
Commit 01a6cd471f019cfeda057c3b1b6fc6213575217c by richard
Don't dump IR output from this test to stdout.
The file was modifiedclang/test/CodeGenHIP/printf-aggregate.cpp