SuccessChanges

Summary

  1. Fix gcc9 "moving a local object in a return statement prevents copy (details)
  2. Fix gcc9 "moving a local object in a return statement prevents copy (details)
  3. Revert rGff3fe145fe48 "Fix gcc9 "moving a local object in a return (details)
  4. Revert rGb6437b352db9 - "Fix gcc9 "moving a local object in a return (details)
  5. AMDGPU: Don't assert on a16 images on targets without FeatureR128A16 (details)
  6. [DataFlow] Factor two worklist implementations out (details)
  7. Renamed traverseDecl to TraverseDecl in a test (details)
  8. [AArch64] Make AArch64 specific assembly directives case insensitive (details)
  9. [lldb] Try to fix writing outside temp dir from (details)
  10. [mlir][spirv] Add `const` qualifier for static arrays (details)
  11. [InstCombine] Add test for -expensive-combines option; NFC (details)
  12. [InstCombine] Support disabling expensive combines in opt (details)
  13. [InstCombine] Split assume test in expensive and not; NFC (details)
  14. [InstCombine] Fix worklist management in return combine (details)
  15. [mlir] Improve documentation in ModuleTranslation MLIR to LLVM IR (details)
  16. [mlir][spirv] Add lowering from `loop.if` to `spv.selection` (details)
  17. [VectorOps] Update vector transfer read op comments. (details)
  18. [InstCombine] Fix worklist management in DSE (PR44552) (details)
  19. [libTooling] Fix bug in Stencil handling of macro ranges (details)
  20. [mlir] Generator converting LLVM intrinsics defs to MLIR ODS (details)
  21. [SeparateConstOffsetFromGEP] Fix: sext(a) + sext(b) -> sext(a + b) (details)
  22. [llvm-nm] Don't report "no symbols" error for files that contain symbols (details)
  23. [mlir][spirv] Explicitly set the size of static arrays (details)
  24. Rename DW_AT_LLVM_isysroot to DW_AT_LLVM_sysroot (details)
  25. [perf-training] Ignore ' (in-process)' prefix from -### (details)
Commit b6437b352db9d96ceb5bd7243e1cf0200e4bae6d by llvm-dev
Fix gcc9 "moving a local object in a return statement prevents copy
elision" Wpessimizing-move warnings.
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/RPC/RPCUtils.h
Commit ff3fe145fe48646d24371d3fe438fd03b0a6413f by llvm-dev
Fix gcc9 "moving a local object in a return statement prevents copy
elision" Wpessimizing-move warning.
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/CompileOnDemandLayer.h
Commit 88cdeaa5313a399f13e7cb5bd8e2a9505436ef8b by llvm-dev
Revert rGff3fe145fe48 "Fix gcc9 "moving a local object in a return
statement prevents copy elision" Wpessimizing-move warning."
Fix buildbots
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/CompileOnDemandLayer.h
Commit d1b32f328e4a363a0883cdc9ca92d0df3ce3fbf3 by llvm-dev
Revert rGb6437b352db9 - "Fix gcc9 "moving a local object in a return
statement prevents copy elision" Wpessimizing-move warnings."
Fix buildbots
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/RPC/RPCUtils.h
Commit 886f9071c63848e90fe0c2f3ad98a0a71aeffcd4 by arsenm2
AMDGPU: Don't assert on a16 images on targets without FeatureR128A16
Currently the lowering for i16 image coordinates asserts on gfx10. I'm
somewhat confused by this though. The feature is missing from the gfx10
feature lists, but the a16 bit appears to be present in the manual for
MIMG instructions.
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was addedllvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
Commit 05c7dc66480999574a599ac34d99a4c192d51ba7 by xazax
[DataFlow] Factor two worklist implementations out
Right now every dataflow algorithm uses its own worklist implementation.
This is a first step to reduce this duplication. Some upcoming
algorithms such as the lifetime analysis is going to use the factored
out implementations.
Differential Revision: https://reviews.llvm.org/D72380
The file was addedclang/include/clang/Analysis/FlowSensitive/DataflowWorklist.h
The file was modifiedclang/lib/Analysis/UninitializedValues.cpp
The file was modifiedclang/unittests/Analysis/CFGBuildResult.h
The file was modifiedclang/unittests/Analysis/CFGTest.cpp
The file was modifiedclang/include/clang/Analysis/FlowSensitive/DataflowValues.h
The file was modifiedclang/lib/Analysis/LiveVariables.cpp
Commit 0406b4fab94658381ea58db890b07c1a30ff0ae4 by gribozavr
Renamed traverseDecl to TraverseDecl in a test
RecursiveASTVisitor expects TraverseDecl to be implemented by
subclasses.
The file was modifiedclang/unittests/Tooling/QualTypeNamesTest.cpp
Commit 398dc06ad015627465be434fcd5ee2d55399f2bd by david.spickett
[AArch64] Make AArch64 specific assembly directives case insensitive
Differential Revision: https://reviews.llvm.org/D72923
The file was modifiedllvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
The file was addedllvm/test/MC/AArch64/directives-case_insensitive.s
Commit d035c832c3f9d29eb1d29b6d22cd8d018a6462c6 by sam.mccall
[lldb] Try to fix writing outside temp dir from
4bafceced6a7641be7b090229c6ccef22cf55bff
The file was modifiedlldb/test/Shell/ObjectFile/wasm/unified-debug-sections.yaml
Commit 8bcf976841f563514d4174f494cd682da50279f2 by antiagainst
[mlir][spirv] Add `const` qualifier for static arrays
This makes the local variable `implies` to have the correct type to
satisfy ArrayRef's constructor:
  /*implicit*/ constexpr ArrayRef(const T (&Arr)[N])
Hopefully this should please GCC 5.
Differential Revision: https://reviews.llvm.org/D72924
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVLowering.cpp
The file was modifiedmlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
Commit 2d0d4235a282e0f900d31ac1054aafc0c526245c by nikita.ppv
[InstCombine] Add test for -expensive-combines option; NFC
This shows that -expensive-combines=0 is ignored.
The file was addedllvm/test/Transforms/InstCombine/expensive-combines.ll
Commit 2ca092f3209579fde7a38ade511c1bbcef213c36 by nikita.ppv
[InstCombine] Support disabling expensive combines in opt
Currently, there is no way to disable ExpensiveCombines when doing a
standalone opt -instcombine run, as that's the default, and the opt
option can currently only be used to force enable, not to force disable.
The only way to disable expensive combines is via -O1 or -O2, but that
of course also runs the rest of the kitchen sink...
This patch allows using opt -instcombine -expensive-combines=0 to run
InstCombine without ExpensiveCombines.
Differential Revision: https://reviews.llvm.org/D72861
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/test/Transforms/InstCombine/expensive-combines.ll
Commit 10d0e2882bbed5865e9716f6a091dd39facb02d9 by nikita.ppv
[InstCombine] Split assume test in expensive and not; NFC
The IR difference in @icmp1 serves as a test for D72864.
The file was modifiedllvm/test/Transforms/InstCombine/assume.ll
Commit 77befe54f7d72e79f94a3255ae10d529d3b19733 by nikita.ppv
[InstCombine] Fix worklist management in return combine
There are two related bugs here: First, we don't add the operand we're
replacing to the worklist, which means it may not get DCEd
(see test change). Second, usually this would just get picked up in the
next iteration, but we also do not report the instruction as changed.
This means that we do not get that extra instcombine iteration, and more
importantly, may break the pass pipeline, as the function is not marked
as changed.
Differential Revision: https://reviews.llvm.org/D72864
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/test/Transforms/InstCombine/assume.ll
Commit a922e23101b882e22fc14ffb78b5857954dc86f3 by zinenko
[mlir] Improve documentation in ModuleTranslation MLIR to LLVM IR
Several functions were missing documentation.
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
Commit 29779894af42649044df61a8d8b3ff04b59b7b70 by antiagainst
[mlir][spirv] Add lowering from `loop.if` to `spv.selection`
When lowering `loop.if` to `spv.selection` we explicitly create a
selection header block before the control flow diverges and a merge
block where control flow subsequently converges.
Differential Revision: https://reviews.llvm.org/D72836
The file was addedmlir/test/Conversion/GPUToSPIRV/if.mlir
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp
Commit 78f82e162ec0d916b5d45943d2b28376b0224dee by ntv
[VectorOps] Update vector transfer read op comments.
Summary: Update vector transfer read op comments.
Reviewers: nicolasvasilache, aartbik
Reviewed By: nicolasvasilache, aartbik
Subscribers: merge_guards_bot, mehdi_amini, rriddle, jpienaar, burmako,
shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72731
The file was modifiedmlir/include/mlir/Dialect/VectorOps/VectorOps.td
Commit 522c030aa9b1dd1881feb5a0d0fa2639b4a5feb7 by nikita.ppv
[InstCombine] Fix worklist management in DSE (PR44552)
Fixes https://bugs.llvm.org/show_bug.cgi?id=44552. We need to make sure
that the store is reprocessed, because performing DSE may expose more
DSE opportunities.
There is a slight caveat here though: We need to make sure that we add
back the store the worklist first, because that means it will be
processed after the operands of the removed store have been processed.
This is a general bug in InstCombine worklist management that I hope to
address at some point, but for now it means we need to do this manually
rather than just returning the instruction as changed.
Differential Revision: https://reviews.llvm.org/D72807
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
The file was addedllvm/test/Transforms/InstCombine/pr44552.ll
Commit b9d2bf38e86e6dd8a2f188d9a24f546aa67de8af by yitzhakm
[libTooling] Fix bug in Stencil handling of macro ranges
Summary: Currently, an attempt to rewrite source code inside a macro
expansion succeeds, but results in empty text, rather than failing with
an error.  This patch restructures to the code to explicitly validate
ranges before attempting to edit them.
Reviewers: gribozavr
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72274
The file was modifiedclang/unittests/Tooling/SourceCodeTest.cpp
The file was modifiedclang/unittests/Tooling/StencilTest.cpp
The file was modifiedclang/lib/Tooling/Transformer/Stencil.cpp
The file was modifiedclang/lib/Tooling/Transformer/SourceCode.cpp
The file was modifiedclang/include/clang/Tooling/Transformer/SourceCode.h
Commit f343544b813891387add8ef01406d36b82ed0a7e by zinenko
[mlir] Generator converting LLVM intrinsics defs to MLIR ODS
Introduce a new generator for MLIR tablegen driver that consumes LLVM IR
intrinsic definitions and produces MLIR ODS definitions. This is useful
to bulk-generate MLIR operations equivalent to existing LLVM IR
intrinsics, such as additional arithmetic instructions or NVVM.
A test exercising the generation is also added. It reads the main LLVM
intrinsics file and produces ODS to make sure the TableGen model remains
in sync with what is used in LLVM.
Differential Revision: https://reviews.llvm.org/D72926
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
The file was addedmlir/test/mlir-tblgen/llvm-intrinsics.td
The file was addedmlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
The file was modifiedmlir/tools/mlir-tblgen/CMakeLists.txt
Commit 0bcfafc5e71d4f636d456317a3a2e6fd903d4755 by kevin.neal
[SeparateConstOffsetFromGEP] Fix: sext(a) + sext(b) -> sext(a + b)
matches add and sub instructions with one another
During the SeparateConstOffsetFromGEP pass, signed extensions are
distributed to the values that feed into them and then later recombined.
The recombination stage is somewhat problematic- it doesn't differ add
and sub instructions from another when matching the sext(a) +/- sext(b)
-> sext(a +/- b) pattern in some instances.
An example- the IR contains:
%unextendedA
%unextendedB
%subuAuB = unextendedA - unextendedB
%extA = extend A
%extB = extend B
%addeAeB = extA + extB
The problematic optimization will transform that into:
%unextendedA
%unextendedB
%subuAuB = unextendedA - unextendedB
%extA = extend A
%extB = extend B
%addeAeB = extend subuAuB ; Obviously not semantically equivalent to the
IR input.
This patch fixes that.
Patch by Drew Wock <drew.wock@sas.com> Differential Revision:
https://reviews.llvm.org/D65967
The file was addedllvm/test/Transforms/SeparateConstOffsetFromGEP/test-add-sub-separation.ll
The file was modifiedllvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
Commit ab974161ba699534f3e30b1f4b036eec9c33053c by sbc
[llvm-nm] Don't report "no symbols" error for files that contain symbols
Previously we were reporting this error if we were list no symbols which
is not the same thing as the file containing no symbols.
Also, always report the filename when printing errors.
This matches the GNU nm behaviour.
This a followup to https://reviews.llvm.org/D52810
Differential Revision: https://reviews.llvm.org/D72658
The file was modifiedllvm/test/tools/llvm-nm/X86/nm-no-symbols.test
The file was modifiedllvm/tools/llvm-nm/llvm-nm.cpp
The file was modifiedllvm/test/ThinLTO/X86/strong_non_prevailing.ll
The file was modifiedllvm/test/ThinLTO/X86/empty-module.ll
The file was addedllvm/test/tools/llvm-nm/X86/nm-no-symbols-local-only.yaml
Commit 859e379ffbbb40302926940b8c87fb7a99931612 by antiagainst
[mlir][spirv] Explicitly set the size of static arrays
The file was modifiedmlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
Commit 12e479475a896f664fb721f98c2d6805185ac352 by Adrian Prantl
Rename DW_AT_LLVM_isysroot to DW_AT_LLVM_sysroot
This is a purely cosmetic change that is NFC in terms of the binary
output. I bugs me that I called the attribute DW_AT_LLVM_isysroot since
the "i" is an artifact of GCC command line option syntax
(-isysroot is in the category of -i options) and doesn't carry any
useful information otherwise.
This attribute only appears in Clang module debug info.
Differential Revision: https://reviews.llvm.org/D71722
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was addedllvm/test/DebugInfo/X86/split-dwarf-sysroot.ll
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
The file was modifiedllvm/lib/IR/LLVMContextImpl.h
The file was modifiedllvm/test/Bindings/llvm-c/debug_info.ll
The file was modifiedllvm/bindings/go/llvm/dibuilder.go
The file was modifiedllvm/test/Assembler/dimodule.ll
The file was modifiedllvm/test/CodeGen/X86/load-combine-dbg.ll
The file was modifiedclang/test/CodeGen/debug-nvptx.c
The file was addedclang/test/CodeGen/debug-info-sysroot.c
The file was modifiedllvm/test/Assembler/dicompileunit.ll
The file was modifiedllvm/include/llvm/IR/DebugInfoMetadata.h
The file was modifiedllvm/lib/IR/DebugInfo.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
The file was modifiedllvm/lib/AsmParser/LLParser.cpp
The file was modifiedllvm/include/llvm-c/DebugInfo.h
The file was modifiedllvm/tools/llvm-c-test/debuginfo.c
The file was modifiedclang/test/Modules/debug-info-moduleimport.m
The file was modifiedllvm/test/DebugInfo/X86/DIModuleContext.ll
The file was modifiedllvm/lib/Bitcode/Reader/MetadataLoader.cpp
The file was modifiedllvm/unittests/IR/MetadataTest.cpp
The file was modifiedllvm/test/DebugInfo/X86/DIModule.ll
The file was modifiedllvm/test/DebugInfo/X86/clang-module.ll
The file was modifiedllvm/lib/IR/AsmWriter.cpp
The file was modifiedllvm/lib/IR/DebugInfoMetadata.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
The file was modifiedllvm/include/llvm/IR/DIBuilder.h
The file was modifiedllvm/lib/IR/DIBuilder.cpp
Commit 03689fe97f2377a3b19864de98b5c14b7fbd85ab by francisvm
[perf-training] Ignore ' (in-process)' prefix from -###
After D69825, the output of clang -### when running in process can be
prefixed by ' (in-process)'. Skip it.
The file was modifiedclang/utils/perf-training/perf-helper.py