Changes

Summary

[lldb] Fix NSDate test after Scalar change (details)
[CodeGen] Fix up warnings in visitEXTRACT_SUBVECTOR (details)
Implement AVX ABI Warning/error (details)
[cmake][Windows] Add libpath to CMAKE_MODULE_LINKER_FLAGS too (details)
[Alignment][NFC] Migrate TargetTransformInfo::CreateVariableSizedObject to Align (details)
[Alignment][NFC] Transition and simplify calls to DL::getABITypeAlignment (details)
[Alignment] TargetLowering::hasPairedLoad must use Align for RequiredAlignment (details)
Limit x86 test to require target to fix buildbot (from 2831a317b) (details)
[RISCV] Temporarily move riscv-expand-pseudo pass to PreEmitPass2 (details)
[clangd] Fix race in FileIndex that sometimes temporarily lost updates. (details)
[VE] Support symbol with offset value (details)
[lldb] Attempt to fix TestLimitDebugInfo on windows (details)
Revert "[RISCV] Temporarily move riscv-expand-pseudo pass to PreEmitPass2" (details)
[lldb] Replace StringConvert with llvm::to_integer when parsing integer values in CommandObjects (details)
[RISCV] Temporarily move riscv-expand-pseudo pass to PreEmitPass2 (details)
[RISCV] Add mcountinhibit CSR (details)

Commit f3b5bf3eb7029238cead637be2e285b443b2e141 by Raphael Isemann [lldb] Fix NSDate test after Scalar change The formatter was requesting an unsigned integer from the ValueObject, but CFAbsoluteTime is a signed double, so in the NSDate test the formatter actually just printed the 'error value' date which is the Cocoa epoch. This started failing after the recent Scalar changes. This patch just changes the logic to use a signed value which fits to the data we try to read and avoids this issue.
	lldb/source/Plugins/Language/ObjC/CF.cpp
Commit 97a7a9abb25d86fd831b403a1d13de6d62e7a8b5 by david.sherwood [CodeGen] Fix up warnings in visitEXTRACT_SUBVECTOR It's perfectly valid to do certain DAG combines where we extract subvectors from a concat vector when we have scalable vector types. However, we can do this in a way that avoids generating compiler warnings by replacing calls to getVectorNumElements() with getVectorMinNumElements(). Due to the way subvector extracts are designed to work with scalable vector types this is ok. This eliminates some warnings from existing tests in this file: llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll Differential Revision: https://reviews.llvm.org/D82655
	llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit 2831a317b689c7f005a29f008a8e4c24485c0711 by erich.keane Implement AVX ABI Warning/error The x86-64 "avx" feature changes how >128 bit vector types are passed, instead of being passed in separate 128 bit registers, they can be passed in 256 bit registers. "avx512f" does the same thing, except it switches from 256 bit registers to 512 bit registers. The result of both of these is an ABI incompatibility between functions compiled with and without these features. This patch implements a warning/error pair upon an attempt to call a function that would run afoul of this. First, if a function is called that would have its ABI changed, we issue a warning. Second, if said call is made in a situation where the caller and callee are known to have different calling conventions (such as the case of 'target'), we instead issue an error. Differential Revision: https://reviews.llvm.org/D82562
	clang/test/CodeGen/target-avx-abi-diag.c
	clang/lib/CodeGen/TargetInfo.cpp
	clang/lib/CodeGen/TargetInfo.h
	clang/test/CodeGen/target-builtin-noerror.c
	clang/test/CodeGen/target-builtin-error-3.c
	clang/include/clang/Basic/DiagnosticFrontendKinds.td
	clang/lib/CodeGen/CGCall.cpp
Commit 63eddb679ad0bbb49cc9a3ff7f9f063c5ba16833 by rojamd [cmake][Windows] Add libpath to CMAKE_MODULE_LINKER_FLAGS too Followup to b8000c0ce845, the library path needs to go in CMAKE_MODULE_LINKER_FLAGS too, for the sake of a few files like LLVMHello.dll. Reviewed By: hans Differential Revision: https://reviews.llvm.org/D82888
	llvm/cmake/modules/HandleLLVMOptions.cmake
Commit 27bbc8ede127fb1ea8b6a853a5d2fe70f206408b by gchatelet [Alignment][NFC] Migrate TargetTransformInfo::CreateVariableSizedObject to Align This patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Differential Revision: https://reviews.llvm.org/D82939
	llvm/include/llvm/CodeGen/MachineFrameInfo.h
	llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
Commit d3085c25012aceef3755abf9921a0368c64f40c6 by gchatelet [Alignment][NFC] Transition and simplify calls to DL::getABITypeAlignment This patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Differential Revision: https://reviews.llvm.org/D82956
	llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
	llvm/lib/Target/Target.cpp
	llvm/lib/Target/ARM/ARMISelLowering.cpp
	llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
	llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
	llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
	llvm/lib/Target/ARM/ARMCallLowering.cpp
	llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
	llvm/lib/CodeGen/LowerEmuTLS.cpp
	llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
	llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
	llvm/lib/Transforms/IPO/LowerTypeTests.cpp
	llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
	llvm/lib/Transforms/IPO/GlobalOpt.cpp
	llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h
	llvm/lib/Target/ARM/ARMFastISel.cpp
	llvm/lib/Analysis/ValueTracking.cpp
	llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
	llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
	llvm/lib/IR/DataLayout.cpp
Commit ef36f5143d83897cc6f59ff918769d29ad5a0612 by gchatelet [Alignment] TargetLowering::hasPairedLoad must use Align for RequiredAlignment As per documentation of `hasPairLoad`: "`RequiredAlignment` gives the minimal alignment constraints that must be met to be able to select this paired load." In this sense, `0` is strictly equivalent to `1`. We make this obvious by using `Align` instead of unsigned. There is only one implementor of this interface. Differential Revision: https://reviews.llvm.org/D82958
	llvm/lib/Target/AArch64/AArch64ISelLowering.h
	llvm/include/llvm/CodeGen/TargetLowering.h
	llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
	llvm/lib/Analysis/Lint.cpp
	llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit 19c35526d98699db6917cf2a6f0dd3fe7da68926 by erich.keane Limit x86 test to require target to fix buildbot (from 2831a317b) The modification of the features apparently requires the backend to be instantiated, so make sure this is required to fix the ARM build bots.
	clang/test/CodeGen/target-avx-abi-diag.c
Commit 05a20a9e9aba301a828bcbd72b0ed724755752d1 by luismarques [RISCV] Temporarily move riscv-expand-pseudo pass to PreEmitPass2 The pass to split atomic and non-atomic RISC-V pseudo-instructions was itself split into two passes in D79635 / commit rG2cb0644f90b7, with the splitting of non-atomic instructions being moved to the PreSched2 phase. A comment was added to D79635 detailing a case where this caused problems, so this commit moves the non-atomic split pass back to the PreEmitPass2 phase. This allows the bulk of the changes from D79635 to remain committed, while addressing the the reported problem (the pass split is now almost NFC). Once the root problem is fixed we can move the (non-atomic) instruction splitting pass back to earlier in the pipeline.
	llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
Commit c5263a4e84cc7fb7135a7e9e0cf000af264b72c5 by sam.mccall [clangd] Fix race in FileIndex that sometimes temporarily lost updates. Summary: FileIndex was built out of threadsafe components, so update() didn't have data races, but wasn't actually correct. Reviewers: kadircet Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D82891
	clang-tools-extra/clangd/index/Symbol.h
	clang-tools-extra/clangd/unittests/FileIndexTests.cpp
	clang-tools-extra/clangd/index/FileIndex.cpp
	clang-tools-extra/clangd/index/FileIndex.h
Commit 195205589208934b8c3b64dd84ccb355729b5b67 by marukawa [VE] Support symbol with offset value Summary: Support symbol with offset value as a VEMCExpr. Reviewers: simoll, k-ishizaka Reviewed By: simoll Subscribers: hiraditya, llvm-commits Tags: #llvm, #ve Differential Revision: https://reviews.llvm.org/D82734
	llvm/test/CodeGen/VE/load_off.ll
	llvm/lib/Target/VE/VEMCInstLower.cpp
Commit 1276855f2b4485ec312b379c1b8eaf5510d9b157 by pavel [lldb] Attempt to fix TestLimitDebugInfo on windows The test fails due to link errors. I believe this change should fix that.
	lldb/test/API/functionalities/limit-debug-info/Makefile
	lldb/test/API/functionalities/limit-debug-info/onetwo.h
Commit a61fa1a4b9d247e34ea5541422f7040a37baf6e7 by luismarques Revert "[RISCV] Temporarily move riscv-expand-pseudo pass to PreEmitPass2" This reverts commit 05a20a9e9aba301a828bcbd72b0ed724755752d1.
	llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
Commit 9010cef2af0affdef774a721f6adb52a40041da5 by Raphael Isemann [lldb] Replace StringConvert with llvm::to_integer when parsing integer values in CommandObjects Summary: This replaces the current use of LLDB's own `StringConvert` with LLVM's `to_integer` which has a less error-prone API and doesn't use special 'error values' to designate parsing problems. Where needed I also added missing error handling code that prints a parsing error instead of continuing with the error value returned from `StringConvert` (which either gave a cryptic error message or just took the error value performed an incorrect action with it. For example, `frame recognizer delete -1` just deleted the frame recognizer at index 0). Reviewers: #lldb, labath Reviewed By: labath Subscribers: labath, abidh, JDevlieghere Differential Revision: https://reviews.llvm.org/D82297
	lldb/test/API/commands/target/stop-hook/enable/TestTargetStopHookEnable.py
	lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
	lldb/source/Commands/CommandObjectThread.cpp
	lldb/test/API/commands/thread/select/TestThreadSelect.py
	lldb/test/API/commands/target/select/TestTargetSelect.py
	lldb/test/API/commands/process/signal/main.cpp
	lldb/test/API/commands/target/stop-hook/delete/TestTargetStopHookDelete.py
	lldb/source/Commands/CommandObjectFrame.cpp
	lldb/test/API/commands/platform/file/read/TestPlatformFileRead.py
	lldb/test/API/commands/process/signal/Makefile
	lldb/test/API/commands/process/signal/TestProcessSignal.py
	lldb/test/API/commands/target/modules/search-paths/insert/Makefile
	lldb/test/API/commands/target/modules/search-paths/insert/main.cpp
	lldb/source/Commands/CommandObjectProcess.cpp
	lldb/test/API/commands/platform/file/close/TestPlatformFileClose.py
	lldb/test/API/commands/thread/select/Makefile
	lldb/source/Commands/CommandObjectPlatform.cpp
	lldb/test/API/commands/thread/select/main.cpp
	lldb/test/API/commands/target/stop-hook/disable/TestTargetStopHookDisable.py
	lldb/source/Commands/CommandObjectTarget.cpp
	lldb/test/API/commands/target/modules/search-paths/insert/TestTargetModulesSearchpathsInsert.py
Commit b2aa546b0747418b0784b291b9104a4e3bf1e0c9 by luismarques [RISCV] Temporarily move riscv-expand-pseudo pass to PreEmitPass2 The pass to split atomic and non-atomic RISC-V pseudo-instructions was itself split into two passes in D79635 / commit rG2cb0644f90b7, with the splitting of non-atomic instructions being moved to the PreSched2 phase. A comment was added to D79635 detailing a case where this caused problems, so this commit moves the non-atomic split pass back to the PreEmitPass2 phase. This allows the bulk of the changes from D79635 to remain committed, while addressing the the reported problem (the pass split is now almost NFC). Once the root problem is fixed we can move the (non-atomic) instruction splitting pass back to earlier in the pipeline.
	llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
	llvm/test/CodeGen/RISCV/codemodel-lowering.ll
Commit d36f2c6a6c4bb3c1cd213f3ed08a7a090fee54d2 by pzheng [RISCV] Add mcountinhibit CSR Summary: The mcountinhibit CSR is defined in the ratified 1.11 version of the privileged spec. Reviewers: apazos, asb, lenary, luismarques Reviewed By: asb Subscribers: hiraditya, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, sameer.abuasal, evandro, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D82913
	llvm/test/MC/RISCV/machine-csr-names.s
	llvm/lib/Target/RISCV/RISCVSystemOperands.td