SuccessChanges

Summary

  1. [X86] Fix stack alignment on 32-bit Solaris/x86 (details)
  2. [lldb] Don't send invalid region addresses to lldb server (details)
  3. [clang][aarch64] ACLE: Support implicit casts between GNU and SVE vectors (details)
  4. [mlir][Linalg] Convolution tiling added to ConvOp vectorization pass (details)
Commit a9cbe5cf30e386a4f44981f5bf9e1862ad36574d by ro
[X86] Fix stack alignment on 32-bit Solaris/x86

On Solaris/x86, several hundred 32-bit tests `FAIL`, all in the same way:

  env ASAN_OPTIONS=halt_on_error=false ./halt_on_error_suppress_equal_pcs.cpp.tmp
  Segmentation Fault (core dumped)

They segfault during startup:

  Thread 2 received signal SIGSEGV, Segmentation fault.
  [Switching to Thread 1 (LWP 1)]
  0x080f21f0 in __sanitizer::internal_mmap(void*, unsigned long, int, int, int, unsigned long long) () at /vol/llvm/src/llvm-project/dist/compiler-rt/lib/sanitizer_common/sanitizer_solaris.cpp:65
  65                              int prot, int flags, int fd, OFF_T offset) {
  1: x/i $pc
  => 0x80f21f0 <_ZN11__sanitizer13internal_mmapEPvmiiiy+16>: movaps 0x30(%esp),%xmm0
  (gdb) p/x $esp
  $3 = 0xfeffd488

The problem is that `movaps` expects 16-byte alignment, while 32-bit Solaris/x86
only guarantees 4-byte alignment following the i386 psABI.

This patch updates `X86Subtarget::initSubtargetFeatures` accordingly,
handles Solaris/x86 in the corresponding testcase, and allows for some
variation in address alignment in
`compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp`.

Tested on `amd64-pc-solaris2.11` and `x86_64-pc-linux-gnu`.

Differential Revision: https://reviews.llvm.org/D87615
The file was modifiedllvm/test/CodeGen/X86/stack-align2.ll (diff)
The file was modifiedllvm/lib/Target/X86/X86Subtarget.cpp (diff)
The file was modifiedcompiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp (diff)
Commit c687af0c30b4dbdc9f614d5e061c888238e0f9c5 by david.spickett
[lldb] Don't send invalid region addresses to lldb server

Previously when <addr> in "memory region <addr>" didn't
parse correctly, we'd print an error then also ask lldb-server
for a region containing LLDB_INVALID_ADDRESS.

(lldb) memory region not_an_address
error: invalid address argument "not_an_address"...
error: Server returned invalid range

Only send the command to lldb-server if the address
parsed correctly.

(lldb) memory region not_an_address
error: invalid address argument "not_an_address"...

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D87694
The file was modifiedlldb/source/Commands/CommandObjectMemory.cpp (diff)
The file was modifiedlldb/test/API/functionalities/memory-region/TestMemoryRegion.py (diff)
Commit 9218f9283802b2d1ff33c490761fdb925b1e56d9 by cullen.rhodes
[clang][aarch64] ACLE: Support implicit casts between GNU and SVE vectors

This patch adds support for implicit casting between GNU vectors and SVE
vectors when `__ARM_FEATURE_SVE_BITS==N`, as defined by the Arm C
Language Extensions (ACLE, version 00bet5, section 3.7.3.3) for SVE [1].

This behavior makes it possible to use GNU vectors with ACLE functions
that operate on VLAT. For example:

  typedef int8_t vec __attribute__((vector_size(32)));
  vec f(vec x) { return svasrd_x(svptrue_b8(), x, 1); }

Tests are also added for implicit casting between GNU and fixed-length
SVE vectors created by the 'arm_sve_vector_bits' attribute. This
behavior makes it possible to use VLST with existing interfaces that
operate on GNUT. For example:

  typedef int8_t vec1 __attribute__((vector_size(32)));
  void f(vec1);
  #if __ARM_FEATURE_SVE_BITS==256 && __ARM_FEATURE_SVE_VECTOR_OPERATORS
  typedef svint8_t vec2 __attribute__((arm_sve_vector_bits(256)));
  void g(vec2 x) { f(x); } // OK
  #endif

The `__ARM_FEATURE_SVE_VECTOR_OPERATORS` feature macro indicates
interoperability with the GNU vector extension. This is the first patch
providing support for this feature, which once complete will be enabled
by the `-msve-vector-bits` flag, as the `__ARM_FEATURE_SVE_BITS` feature
currently is.

[1] https://developer.arm.com/documentation/100987/latest

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D87607
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-cast.c (diff)
The file was modifiedclang/test/SemaCXX/attr-arm-sve-vector-bits.cpp (diff)
The file was modifiedclang/lib/AST/ASTContext.cpp (diff)
The file was modifiedclang/test/Sema/attr-arm-sve-vector-bits.c (diff)
Commit 347d59b16c71194d7a9372dd69d3e41ebeca3113 by limo
[mlir][Linalg] Convolution tiling added to ConvOp vectorization pass

ConvOp vectorization supports now only convolutions of static shapes with dimensions
of size either 3(vectorized) or 1(not) as underlying vectors have to be of static
shape as well. In this commit we add support for convolutions of any size as well as
dynamic shapes by leveraging existing matmul infrastructure for tiling of both input
and kernel to sizes accepted by the previous version of ConvOp vectorization.
In the future this pass can be extended to take "tiling mask" as a user input which
will enable vectorization of user specified dimensions.

Differential Revision: https://reviews.llvm.org/D87676
The file was modifiedmlir/integration_test/Dialect/Linalg/CPU/test-conv-2d-nhwc-call.mlir (diff)
The file was modifiedmlir/integration_test/Dialect/Linalg/CPU/test-conv-2d-nchw-call.mlir (diff)
The file was modifiedmlir/test/Conversion/LinalgToVector/linalg-to-vector.mlir (diff)
The file was modifiedmlir/test/lib/Transforms/TestConvVectorization.cpp (diff)
The file was modifiedmlir/integration_test/Dialect/Linalg/CPU/test-conv-1d-call.mlir (diff)
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp (diff)
The file was modifiedmlir/integration_test/Dialect/Linalg/CPU/test-conv-3d-ndhwc-call.mlir (diff)
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h (diff)
The file was modifiedmlir/integration_test/Dialect/Linalg/CPU/test-conv-1d-nwc-call.mlir (diff)
The file was modifiedmlir/integration_test/Dialect/Linalg/CPU/test-conv-3d-ncdhw-call.mlir (diff)
The file was modifiedmlir/integration_test/Dialect/Linalg/CPU/test-conv-3d-call.mlir (diff)
The file was modifiedmlir/integration_test/Dialect/Linalg/CPU/test-conv-1d-ncw-call.mlir (diff)
The file was modifiedmlir/integration_test/Dialect/Linalg/CPU/test-conv-2d-call.mlir (diff)