FailedChanges

Summary

  1. [compiler-rt] [scudo] Fix typo in function attribute (details)
  2. [ARM] Sink splats to MVE intrinsics (details)
  3. [amdgpu] Lower SGPR-to-VGPR copy in the final phase of ISel. (details)
  4. [libc++] Remove some workarounds for missing variadic templates (details)
  5. [Coroutine] Fix a bug where Coroutine incorrectly spills phi and invoke defs before CoroBegin (details)
  6. [OpenMP 5.0] Fix user-defined mapper privatization in tasks (details)
  7. [DFSan] Add bcmp wrapper. (details)
  8. Precommit test updates (details)
  9. [AArch64] Match pairwise add/fadd pattern (details)
  10. [CUDA][HIP] Defer overloading resolution diagnostics for host device functions (details)
  11. [ARM] Add more MVE postinc distribution tests. NFC (details)
Commit 7b2dd58eb09d3ead649bdd0a67f69d8776a636ff by n54
[compiler-rt] [scudo] Fix typo in function attribute

Fixes the build after landing https://reviews.llvm.org/D87562
The file was modifiedcompiler-rt/lib/scudo/scudo_allocator.cpp (diff)
Commit 34b27b9441d27ef886ea22b3bb75b357a5ec707b by david.green
[ARM] Sink splats to MVE intrinsics

The predicated MVE intrinsics are generated as, for example,
llvm.arm.mve.add.predicated(x, splat(y). p). We need to sink the splat
value back into the loop, like we do for other instructions, so we can
re-select qr variants.

Differential Revision: https://reviews.llvm.org/D87693
The file was modifiedllvm/test/CodeGen/Thumb2/mve-postinc-lsr.ll (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-operand.ll (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/mve-qrintr.ll (diff)
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp (diff)
Commit c3492a1aa1b98c8d81b0969d52cea7681f0624c2 by michael.hliao
[amdgpu] Lower SGPR-to-VGPR copy in the final phase of ISel.

- Need to lower COPY from SGPR to VGPR to a real instruction as the
  standard COPY is used where the source and destination are from the
  same register bank so that we potentially coalesc them together and
  save one COPY. Considering that, backend optimizations, such as CSE,
  won't handle them. However, the copy from SGPR to VGPR always needs
  materializing to a native instruction, it should be lowered into a
  real one before other backend optimizations.

Differential Revision: https://reviews.llvm.org/D87556
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp (diff)
The file was addedllvm/test/CodeGen/AMDGPU/sgpr-copy-cse.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fabs.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/wqm.ll (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/waitcnt-vscnt.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/fneg-fabs.ll (diff)
Commit a3c28ccd49391931acd8b3b27dc98d7c606051e0 by Louis Dionne
[libc++] Remove some workarounds for missing variadic templates

We don't support GCC in C++03 mode, and Clang provides variadic templates
even in C++03 mode. So there's effectively no supported compiler that
doesn't support variadic templates.

This effectively gets rid of all uses of _LIBCPP_HAS_NO_VARIADICS, but
some workarounds for the lack of variadics remain.
The file was modifiedlibcxx/include/__config (diff)
The file was modifiedlibcxx/include/future (diff)
The file was modifiedlibcxx/include/memory (diff)
The file was modifiedlibcxx/include/type_traits (diff)
The file was removedlibcxx/test/std/utilities/meta/meta.unary/meta.unary.cat/member_function_pointer_no_variadics.pass.cpp
Commit 5b533d6cdeed21369dee4572b5485b1fd5d5dcf5 by xun
[Coroutine] Fix a bug where Coroutine incorrectly spills phi and invoke defs before CoroBegin

When a spill definition is before CoroBegin, we cannot spill it to the frame immediately after the definition. We have to spill it after the frame is ready.
The current implementation handles it properly for any other kinds of instructions except for PhINode and InvokeInst, which could also be defined before CoroBegin.
This patch fixes it by moving the CoroBegin dominance check earlier, so that it covers all cases.
Added a test.

Differential Revision: https://reviews.llvm.org/D87810
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp (diff)
The file was addedllvm/test/Transforms/Coroutines/coro-spill-defs-before-corobegin.ll
Commit d5ce8233bfcfdeb66c715a1def8e0b34d236d48a by a.bataev
[OpenMP 5.0] Fix user-defined mapper privatization in tasks

This patch fixes the problem that user-defined mapper array is not correctly privatized inside a task. This problem causes openmp/libomptarget/test/offloading/target_depend_nowait.cpp fails.

Differential Revision: https://reviews.llvm.org/D84470
The file was modifiedclang/test/OpenMP/target_depend_codegen.cpp (diff)
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp (diff)
Commit 559f9198125392bfa8e7d462aa8e87fcf5030185 by mascasa
[DFSan] Add bcmp wrapper.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D87801
The file was modifiedcompiler-rt/test/dfsan/custom.cpp (diff)
The file was modifiedcompiler-rt/lib/dfsan/done_abilist.txt (diff)
The file was modifiedcompiler-rt/lib/dfsan/dfsan_custom.cpp (diff)
Commit 3ee87a976d52a2379d007046f9a1ad4a07f440c0 by Sanne.Wouda
Precommit test updates
The file was modifiedllvm/test/CodeGen/AArch64/vecreduce-fadd.ll (diff)
The file was addedllvm/test/CodeGen/AArch64/faddp-half.ll
The file was addedllvm/test/CodeGen/AArch64/faddp.ll
Commit d5fd3d9b903ef6d96c6b3b82434dd0461faaba55 by Sanne.Wouda
[AArch64] Match pairwise add/fadd pattern

D75689 turns the faddp pattern into a shuffle with vector add.

Match this new pattern in target-specific DAG combine, rather than ISel,
because legalization (for v2f32) turns it into a bit of a mess.

- extended to cover f16, f32, f64 and i64
The file was modifiedllvm/test/CodeGen/AArch64/faddp-half.ll (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td (diff)
The file was modifiedllvm/test/CodeGen/AArch64/vecreduce-fadd.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/faddp.ll (diff)
Commit 40df06cdafc010002fc9cfe1dda73d689b7d27a6 by Yaxun.Liu
[CUDA][HIP] Defer overloading resolution diagnostics for host device functions

In CUDA/HIP a function may become implicit host device function by
pragma or constexpr. A host device function is checked in both
host and device compilation. However it may be emitted only
on host or device side, therefore the diagnostics should be
deferred until it is known to be emitted.

Currently clang is only able to defer certain diagnostics. This causes
false alarms and limits the usefulness of host device functions.

This patch lets clang defer all overloading resolution diagnostics for host device functions.

An option -fgpu-defer-diag is added to control this behavior. By default
it is off.

It is NFC for other languages.

Differential Revision: https://reviews.llvm.org/D84364
The file was modifiedclang/include/clang/Basic/Diagnostic.td (diff)
The file was modifiedclang/lib/Sema/SemaSYCL.cpp (diff)
The file was modifiedclang/lib/Sema/SemaStmtAsm.cpp (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticAnalysis.h (diff)
The file was modifiedclang/lib/Sema/SemaExprObjC.cpp (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticRefactoring.h (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticSema.h (diff)
The file was modifiedclang/lib/Sema/SemaCUDA.cpp (diff)
The file was modifiedclang/include/clang/Driver/Options.td (diff)
The file was modifiedclang/include/clang/Basic/LangOptions.def (diff)
The file was addedclang/test/SemaCUDA/deferred-oeverload.cu
The file was modifiedclang/include/clang/Basic/DiagnosticParse.h (diff)
The file was modifiedclang/lib/Driver/ToolChains/HIP.cpp (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticDriver.h (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticAST.h (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticSerialization.h (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticFrontend.h (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td (diff)
The file was modifiedclang/lib/Basic/DiagnosticIDs.cpp (diff)
The file was modifiedclang/lib/Driver/ToolChains/Cuda.cpp (diff)
The file was modifiedclang/utils/TableGen/ClangDiagnosticsEmitter.cpp (diff)
The file was addedclang/test/TableGen/deferred-diag.td
The file was modifiedclang/lib/Sema/SemaType.cpp (diff)
The file was modifiedclang/lib/Sema/Sema.cpp (diff)
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticIDs.h (diff)
The file was modifiedclang/lib/Sema/SemaAttr.cpp (diff)
The file was modifiedclang/lib/Sema/SemaOverload.cpp (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticLex.h (diff)
The file was modifiedclang/lib/Sema/SemaTemplateInstantiate.cpp (diff)
The file was modifiedclang/lib/Sema/SemaDecl.cpp (diff)
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp (diff)
The file was modifiedclang/lib/Sema/SemaStmt.cpp (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticComment.h (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticCrossTU.h (diff)
The file was modifiedclang/lib/Sema/SemaTemplateVariadic.cpp (diff)
The file was modifiedclang/include/clang/Sema/Sema.h (diff)
The file was modifiedclang/lib/Sema/AnalysisBasedWarnings.cpp (diff)
The file was modifiedclang/test/TableGen/DiagnosticBase.inc (diff)
The file was modifiedclang/tools/diagtool/DiagnosticNames.cpp (diff)
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp (diff)
Commit 72a4a478fe12f3052d1f73c5e5b4a905c8dfcf1b by david.green
[ARM] Add more MVE postinc distribution tests. NFC
The file was modifiedllvm/test/CodeGen/Thumb2/mve-postinc-distribute.mir (diff)