FailedChanges

Summary

  1. [libunwind] Support for leaf function unwinding. (details)
  2. [InstSimplify] add another test for NaN propagation; NFC (details)
  3. [AMDGPU] Set DS alignment requirements to be more strict (details)
  4. [SLP] Allow reordering of vectorization trees with reused instructions. (details)
Commit 22b615a96593f13109a27cabfd1764ec4f558c7a by daniel.kiss
[libunwind] Support for leaf function unwinding.

Unwinding leaf function is useful in cases when the backtrace finds a
leaf function for example when it caused a signal.
This patch also add the support for the DW_CFA_undefined because it marks
the end of the frames.

Ryan Prichard provided code for the tests.

Reviewed By: #libunwind, mstorsjo

Differential Revision: https://reviews.llvm.org/D83573

Reland with limit the test to the x86_64-linux target.
The file was modifiedlibunwind/test/lit.site.cfg.in (diff)
The file was modifiedlibunwind/src/DwarfParser.hpp (diff)
The file was modifiedlibunwind/src/DwarfInstructions.hpp (diff)
The file was addedlibunwind/test/unwind_leaffunction.pass.cpp
The file was addedlibunwind/test/signal_unwind.pass.cpp
Commit 6690de098e43ac5741297e435aece71b971b5bd2 by spatel
[InstSimplify] add another test for NaN propagation; NFC
The file was modifiedllvm/test/Transforms/InstSimplify/ConstProp/cast.ll (diff)
Commit ae36c02ad0cb0a618c8715404dcfab4cf49c6612 by Mirko.Brkusanin
[AMDGPU] Set DS alignment requirements to be more strict

Alignment requirements for ds_read/write_b96/b128 for gfx9 and onward are
now the same as for other GCN subtargets. This way we can avoid any
unintentional use of these instructions on systems that do not support dword
alignment and instead require natural alignment.
This also makes 'SH_MEM_CONFIG.alignment_mode == STRICT' the default.

Differential Revision: https://reviews.llvm.org/D87821
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/store-local.128.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/store-local.96.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/load-local.96.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/load-local.128.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/ds_write2.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/store-local.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/ds_read2.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/lds-misaligned-bug.ll (diff)
Commit 455ca0ebb69210046928fedffe292420a30f89ad by a.bataev
[SLP] Allow reordering of vectorization trees with reused instructions.

If some leaves have the same instructions to be vectorized, we may
incorrectly evaluate the best order for the root node (it is built for the
vector of instructions without repeated instructions and, thus, has less
elements than the root node). In this case we just can not try to reorder
the tree + we may calculate the wrong number of nodes that requre the
same reordering.
For example, if the root node is \<a+b, a+c, a+d, f+e\>, then the leaves
are \<a, a, a, f\> and \<b, c, d, e\>. When we try to vectorize the first
leaf, it will be shrink to \<a, b\>. If instructions in this leaf should
be reordered, the best order will be \<1, 0\>. We need to extend this
order for the root node. For the root node this order should look like
\<3, 0, 1, 2\>. This patch allows extension of the orders of the nodes
with the reused instructions.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D45263
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/jumbled_store_crash.ll (diff)
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/reorder_repeated_ops.ll (diff)
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/vectorize-reorder-reuse.ll (diff)
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp (diff)