SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [PowerPC] Prevent legalization loop from promoting SELECT_CC from v4i32 to v4i32 (details)
  2. Make explicit -fno-semantic-interposition (in -fpic mode) infer dso_local (details)
  3. [clang][test] fix tests for external assemblers (details)
  4. [clangd] Make use of SourceOrder to find first initializer in DefineOutline (details)
  5. [clangd] Change PreambleOnlyAction with content truncation (details)
  6. [NFC][PowerPC] Add a new case to test two-address verification (details)
  7. [FPEnv] Small fixes to implementation of flt.rounds (details)
  8. [AsmPrinter] Don't generate .Lfoo$local for -fno-PIC and -fPIE (details)
  9. [lldb] s/dyn_cast/isa (details)
  10. [CostModel] Check for free intrinsics in BasicTTI (details)
  11. [AArch64] Set i32 ISD::MULHU/S to Expand instead of Legal. (details)
  12. [clangd] Don't traverse the AST within uninteresting files during indexing (details)
  13. [NFC][ARM] Add intrinsic code size runs (details)
  14. [CostModel] Unify Intrinsic Costs. (details)
  15. [Clang][AArch64] Capturing proper pointer alignment for Neon vld1 intrinsicts (details)
  16. [DebugInfo] - Fix multiple issues in DWARFDebugFrame::parse(). (details)
  17. [AMDGPU] Fix wait counts in the presence of 16bit subregisters (details)
  18. [NFC][ARM] Add code size analysis tests (details)
  19. [yaml2obj] - Map section names to chunks for each ELFYAML::ProgramHeader early. NFCI. (details)
  20. [ObjectYAML][DWARF] Use .empty() to indicate if the DWARF sections are empty. (details)
  21. [ObjectYAML][DWARF] Make variable names consistent. (details)
  22. [NFC][ARM] Fix for previous commit (details)
  23. [DebugInfo/llvm-objdump] - Print "ZERO terminator" for terminator entries when dumping .eh_frame. (details)
  24. [X86][AVX] Add some initial movmsk combine tests (details)
  25. [X86] Fix fshr comment copy+paste typo. NFC. (details)
  26. [AMDGPU/MemOpsCluster] Code clean-up around mem ops clustering logic (details)
  27. [build] Add LLVM_LOCAL_RPATH which can set an rpath on just unit test binaries (details)
  28. Add support for binary operators in Syntax Trees (details)
  29. [CostModel] Unify getCastInstrCost (details)
  30. [analyzer][RetainCount] Remove the CheckOSObject option (details)
  31. [CostModel] getUserCost for intrinsic throughput (details)
  32. MachineInstr.h - remove unnecessary MachineMemOperand forward declaration. NFC. (details)
  33. [libc][NFC] Simplify memcpy implementation (details)
  34. [Transforms] Check validity of profile reader before invoking it (details)
  35. [DAGCombiner] try to move splat after binop with splat constant (details)
  36. [FPEnv] Intrinsic llvm.roundeven (details)
  37. [Sema] Diagnose more cases of static data members in local or unnamed classes (details)
  38. [ARM] MVE VMINV/VMAXV test additions. NFC (details)
  39. [libTooling] In Transformer, allow atomic changes to span multiple files. (details)
  40. Update DialectConversion.md (details)
  41. [mlir][Vector] Add vector contraction to outerproduct lowering (details)
  42. [NFC][ARM][AArch64] More code size tests (details)
  43. [MLIR] Helper class referencing MemRefType to unify runner implementations. (details)
  44. AMDGPU/GlobalISel: Don't select boolean phi by default (details)
  45. [PowerPC] Unaligned FP default should apply to scalars only (details)
  46. Use configure depends to trigger reconfiguration when LLVMBuild files change (details)
  47. GlobalISel: Merge G_PTR_MASK with llvm.ptrmask intrinsic (details)
  48. Debug Info: Mark os_log helper functions as artificial (details)
  49. Add missing forward decl to unbreak the modular build (details)
  50. AMDGPU/GlobalISel: Fix assert on 16-bit G_EXTRACT results (details)
  51. Fix MemoryLocation.h use without Instructions.h (details)
  52. [PowerPC][AIX] Spill CSRs to the ABI specified stack offsets. (details)
  53. [ELF][PPC64] Synthesize _savegpr[01]_{14..31} and _restgpr[01]_{14..31} (details)
  54. [dsymutil] Escape CFBundleIdentifier in plist. (details)
  55. [AMDGPU] NFC target dependent requiresUniformRegister refactored out (details)
  56. Revert "[AMDGPU] NFC target dependent requiresUniformRegister refactored out" (details)
  57. [InstCombine] reassociate fsub+fadd with FMF to increase adds and throughput (details)
  58. [PGO] Add memcmp/bcmp size value profiling. (details)
  59. [PowerPC][NFC] Add colon to TODO's and fix indentation. (details)
  60. [MSSA][Doc] Clobbers, more info on Defs / Def chain (details)
  61. [clang-format] Fix an ObjC regression introduced with new [[likely]][[unlikely]] support in if/else clauses (details)
  62. [Analyzer][NFC] Remove the SubEngine interface (details)
  63. [gn build] Port d70ec366c91 (details)
  64. [YAMLTraits] Remove char trait and serialize as uint8_t in lldb. (details)
  65. [ELF] Allow misaligned SHT_GNU_verneed (details)
  66. ResourcePriorityQueue.h - reduce unnecessary includes to forward declarations. NFC. (details)
  67. ObjCARCAnalysisUtils.h - remove unused includes. NFC. (details)
  68. [lldb/Reproducers] Skip remaining failing test in python_api subdir (details)
  69. [StaticAnalyzer] Fix non-virtual destructor warning (details)
  70. [fuzzer][afl] Fix build with GCC (details)
  71. [PowerPC][NFC] Update test to prevent DCE from causing failures (details)
  72. [Analyzer] Fix buildbot failure of commit rGd70ec366c91b (details)
  73. [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm (details)
  74. [InstCombine] add tests for reassociative sub/add expressions; NFC (details)
  75. [LoopVectorize] regenerate full test checks; NFC (details)
  76. [InstCombine] reassociate sub+add to increase adds and throughput (details)
  77. Be more specific about auto * vs auto for po alias. (details)
  78. Roll variables into an LLVM_DEBUG block to address -Wunused-but-set-variable (details)
Commit 793cc518b9428a0b7a40c59d4ecd5939a7bc84f7 by nemanjai
[PowerPC] Prevent legalization loop from promoting SELECT_CC from v4i32 to v4i32

As reported in https://bugs.llvm.org/show_bug.cgi?id=45709 we can hit an
infinite loop in legalization since we set the legalization action for
ISD::SELECT_CC for all fixed length vector types to Promote. Without some
different legalization action for the type being promoted to, the legalizer
simply loops. Since we don't have patterns to match the node, the right
legalization action should be Expand.

Differential revision: https://reviews.llvm.org/D79854
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was addedllvm/test/CodeGen/PowerPC/pr45709.ll
Commit 9d55e4ee1367b440bb8402ce3a33d5a8b99aee06 by maskray
Make explicit -fno-semantic-interposition (in -fpic mode) infer dso_local

-fno-semantic-interposition is currently the CC1 default. (The opposite
disables some interprocedural optimizations.) However, it does not infer
dso_local: on most targets accesses to ExternalLinkage functions/variables
defined in the current module still need PLT/GOT.

This patch makes explicit -fno-semantic-interposition infer dso_local,
so that PLT/GOT can be eliminated if targets implement local aliases
for AsmPrinter::getSymbolPreferLocal (currently only x86).

Currently we check whether the module flag "SemanticInterposition" is 0.
If yes, infer dso_local. In the future, we can infer dso_local unless
"SemanticInterposition" is 1: frontends other than clang will also
benefit from the optimization if they don't bother setting the flag.
(There will be risks if they do want ELF interposition: they need to set
"SemanticInterposition" to 1.)
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedllvm/lib/IR/Module.cpp
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was addedllvm/test/CodeGen/X86/semantic-interposition-infer-dsolocal.ll
The file was modifiedclang/include/clang/Basic/LangOptions.def
The file was modifiedclang/test/CodeGen/semantic-interposition.c
The file was modifiedllvm/include/llvm/IR/GlobalValue.h
The file was modifiedllvm/lib/IR/Globals.cpp
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedllvm/lib/Target/TargetMachine.cpp
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/test/Driver/fsemantic-interposition.c
The file was modifiedllvm/include/llvm/IR/Module.h
Commit d8e0ad9620c6e626d753a3ae0da6c712e4d400d3 by Yuanfang Chen
[clang][test] fix tests for external assemblers

The test depends on using the integrated assembler. Make it
explicit by specifying -fintegrated-as.
The file was modifiedclang/test/Driver/modules-ts.cpp
Commit eeedbd033612e105755156023bdeec2fba4eca21 by kadircet
[clangd] Make use of SourceOrder to find first initializer in DefineOutline

Summary:
Constructors can have implicit initializers, this was crashing define
outline. Make sure we find the first "written" ctor initializer to figure out
`:` location.

Fixes https://github.com/clangd/clangd/issues/400

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80521
The file was modifiedclang-tools-extra/clangd/unittests/TweakTests.cpp
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/DefineOutline.cpp
Commit 34e39eb2adc2b3f16c2c2c0607a904ee55705c01 by kadircet
[clangd] Change PreambleOnlyAction with content truncation

Summary:
Lexing until the token location is past preamble bound could be wrong
in some cases as preprocessor lexer can lex multiple tokens in a single call.

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79426
The file was modifiedclang-tools-extra/clangd/unittests/PreambleTests.cpp
The file was modifiedclang-tools-extra/clangd/Preamble.cpp
Commit e6e89875b04ea521a9dbf3e6a82d81b23f9f77d7 by shkzhang
[NFC][PowerPC] Add a new case to test two-address verification
The file was addedllvm/test/CodeGen/PowerPC/two-address-crash.mir
Commit 61f72dd8ace7c4bea1ae74d9734d2b02946b4898 by sepavloff
[FPEnv] Small fixes to implementation of flt.rounds

This change makes minor correction to the implementation of intrinsic
`llvm.flt.rounds`:
- Added documentation entry in LangRef,
- Attributes of the intrinsic changed to be in line with other functions
  dependent of floating-point environment.

Differential Revision: https://reviews.llvm.org/D79322
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedclang/include/clang/Basic/Builtins.def
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
Commit 872c5fb1432493c0a09b6f210765c0d94ce9b5d0 by maskray
[AsmPrinter] Don't generate .Lfoo$local for -fno-PIC and -fPIE

-fno-PIC and -fPIE code generally cannot be linked in -shared mode and there is no benefit accessing via local aliases.

Actually, a .Lfoo$local reference will be converted to a STT_SECTION (if no section relaxation) reference which will cause the section symbol (sizeof(Elf64_Sym)=24) to be generated.
The file was modifiedllvm/test/CodeGen/X86/code-model-elf.ll
The file was modifiedllvm/test/CodeGen/X86/lifetime-alias.ll
The file was modifiedllvm/test/CodeGen/X86/semantic-interposition-comdat.ll
The file was modifiedllvm/test/CodeGen/X86/tls.ll
The file was modifiedllvm/test/CodeGen/X86/indirect-branch-tracking-eh2.ll
The file was modifiedllvm/test/CodeGen/X86/linux-preemption.ll
The file was modifiedllvm/test/CodeGen/X86/emutls.ll
The file was modifiedllvm/test/CodeGen/AArch64/fp16_intrinsic_lane.ll
The file was modifiedllvm/test/CodeGen/X86/oddsubvector.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/test/CodeGen/X86/pr38795.ll
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.ll
Commit c34936dae734085c4bc01703da0f5b7456e1bf51 by pavel
[lldb] s/dyn_cast/isa

The cast result is unused and produces a warning with gcc.
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Commit 1f72d5880e332dfbd36c22388d2b72bd2bd70411 by sam.parker
[CostModel] Check for free intrinsics in BasicTTI

Recommitting part of "[CostModel] Unify Intrinsic Costs."
de71def3f59dc9f12f67141b5040d8e15c84d08a

Now that the 'free' intrinsic information has been sunk to the lowest
level, query the base implementation in BasicTTI before doing
anything else. I suspect this is the change that was causing the main
changes, particularly the large effects on debug builds.

Differential Revision: https://reviews.llvm.org/D80012
The file was addedllvm/test/Analysis/CostModel/X86/free-intrinsics.ll
The file was addedllvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was addedllvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
Commit 80cc43b420a8ab8648f44fbb554b483a2998712d by craig.topper
[AArch64] Set i32 ISD::MULHU/S to Expand instead of Legal.

Looks like there are no isel patterns for these. A DAG combine
turns it into i64 multiply and a shift which hides this.

Extracted from D80485
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit 1abb883a048153c83a4e11070219d23f362e7377 by sam.mccall
[clangd] Don't traverse the AST within uninteresting files during indexing

Summary:
We already skip function bodies from these files while parsing, and drop symbols
found in them. However, traversing their ASTs still takes a substantial amount
of time.

Non-scientific benchmark on my machine:
  background-indexing llvm-project (llvm+clang+clang-tools-extra), wall time
  before: 7:46
  after: 5:13
  change: -33%

Indexer.cpp libclang should be updated too, I'm less familiar with that code,
and it's doing tricky things with the ShouldSkipFunctionBody callback, so it
needs to be done separately.

Reviewers: kadircet

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80296
The file was modifiedclang/lib/Index/IndexingAction.cpp
The file was modifiedclang-tools-extra/clangd/index/IndexAction.cpp
The file was modifiedclang/include/clang/Index/IndexingAction.h
The file was modifiedclang-tools-extra/clangd/unittests/IndexActionTests.cpp
The file was modifiedclang/lib/Index/IndexDecl.cpp
The file was modifiedclang/include/clang/Index/IndexingOptions.h
Commit 64cfb8a864cf98dcd762a26d03cba95145b9aa41 by sam.parker
[NFC][ARM] Add intrinsic code size runs

Add code size analysis of arithmetic intrinsics.
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith-overflow.ll
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith-ssat.ll
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith-usat.ll
The file was modifiedllvm/test/Analysis/CostModel/ARM/reduce-add.ll
Commit 871556a494552c0f503eec17055f075bcd859937 by sam.parker
[CostModel] Unify Intrinsic Costs.

Recommitting most of the remaining changes from
259eb619ff6dcd5b6111d1686e18559b9ca004d4, but excluding the call to
getUserCost from getInstructionThroughput. Though there's still no
test changes, I doubt that this is an NFC...

With the two getIntrinsicInstrCosts folded into one, now fold in the
scalar/code-size orientated getIntrinsicCost. The remaining scalar
intrinsics were memcpy, cttz and ctlz which now have special handling
in the BasicTTI implementation.

This had required a change in the AMDGPU backend for fabs as it
should always be 'free'. I've also changed the X86 backend to return
the BaseT implementation when the CostKind isn't RecipThroughput.

Differential Revision: https://reviews.llvm.org/D80012
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
Commit 98cad555e29187a03e2bc3db5780762981913902 by lucas.prates
[Clang][AArch64] Capturing proper pointer alignment for Neon vld1 intrinsicts

Summary:
During CodeGen for AArch64 Neon intrinsics, Clang was incorrectly
assuming all the pointers from which loads were being generated for vld1
intrinsics were aligned according to the intrinsics result type, causing
alignment faults on the code generated by the backend.

This patch updates vld1 intrinsics' CodeGen to properly capture the
correct load alignment based on the type of the pointer provided as
input for the intrinsic.

Reviewers: t.p.northover, ostannard, pcc

Reviewed By: ostannard

Subscribers: kristof.beyls, danielkiss, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79721
The file was modifiedclang/test/CodeGen/aarch64-neon-intrinsics.c
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
Commit 2569787e44595d31942da2bb5558931351929e57 by grimar
[DebugInfo] - Fix multiple issues in DWARFDebugFrame::parse().

I've noticed an issue with "Data.getRelocatedValue(...)" call.

it might silently ignore an error when a content is truncated.
That leads to an infinite loop in the code (e.g. llvm-readobj hangs).

After fixing the issue I've found that actually we always tried
to read past the end of a section, even when a content was valid.
It happened because the terminator CIE (a CIE with the length == 0)
was never handled. At first I've tried just to stop adding the terminator
entry (and return), but it does not seem to be correct, because tools like
llvm-objdump might want to print something for such entries
(see comments in the code and test cases).

This patch fixes issues mentioned, provides new test cases for
both llvm-readobj and lib/DebugInfo and adds FIXMEs to existent
test cases related.

Differential revision: https://reviews.llvm.org/D80299
The file was addedllvm/test/DebugInfo/X86/eh-frame-truncated.s
The file was modifiedllvm/test/tools/llvm-readobj/ELF/unwind.test
The file was modifiedllvm/test/tools/llvm-objdump/eh_frame_zero_cie.test
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
The file was modifiedllvm/test/tools/llvm-objdump/eh_frame-mipsel.test
Commit 92f3828dc5675f9917d909eb75c29ba1e14920ad by vpykhtin
[AMDGPU] Fix wait counts in the presence of 16bit subregisters

Differential Revision: https://reviews.llvm.org/D80033
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/waitcnt.mir
Commit 48cdbd081c9111e2ffe41ac3022bdfc65df46655 by sam.parker
[NFC][ARM] Add code size analysis tests

Add code size runs for the cast costs.
The file was modifiedllvm/test/Analysis/CostModel/ARM/cast.ll
Commit 3d4c873a14fe2ffb5cd6ac329354857eef245196 by grimar
[yaml2obj] - Map section names to chunks for each ELFYAML::ProgramHeader early. NFCI.

Each `ELFYAML::ProgramHeader` currently contains a list of section names
included. We are trying to map them to Fill/Sections very late,
though we can create such mapping early, in `initProgramHeaders`.

The benefit is that with such change it is possible to access mapped
chunks earlier (for example during writing section content) and have
simpler code.

Differential revision: https://reviews.llvm.org/D80520
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp
The file was modifiedllvm/include/llvm/ObjectYAML/ELFYAML.h
Commit 590f3a72c243b888ab10c4f9e71bf7f8eca99717 by Xing
[ObjectYAML][DWARF] Use .empty() to indicate if the DWARF sections are empty.
The file was modifiedllvm/lib/ObjectYAML/DWARFYAML.cpp
Commit 2c04b8aacd070e88e64f08998dc583319e994d18 by Xing
[ObjectYAML][DWARF] Make variable names consistent.
The file was modifiedllvm/lib/ObjectYAML/DWARFYAML.cpp
The file was modifiedllvm/include/llvm/ObjectYAML/DWARFYAML.h
Commit c5bbc8dd6d686175788e6c1a5fc0339814a5adfc by sam.parker
[NFC][ARM] Fix for previous commit

Actually analyse code-size for the size runs...
The file was modifiedllvm/test/Analysis/CostModel/ARM/cast.ll
Commit 2e365ca2f7ce7a1f4a3938d79b894324b383ce5c by grimar
[DebugInfo/llvm-objdump] - Print "ZERO terminator" for terminator entries when dumping .eh_frame.

A CIE with the Length == 0 is a terminator:
https://refspecs.linuxfoundation.org/LSB_5.0.0/LSB-Core-generic/LSB-Core-generic/ehframechpt.html

And GNU objdump recognizes them and prints the following for such entries:

"00000000 ZERO terminator"

This patch teaches llvm-objdump to do the same. I had to update tests to use
"CHECK-NEXT" too.

(Note: it looks perhaps not right that printing is done inside the DebugInfo library,
I'd expect to see the change in the llvm-objdump's code somewhere instead,
but that is how it done atm).

Differential revision: https://reviews.llvm.org/D80476
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
The file was modifiedllvm/test/tools/llvm-objdump/eh_frame-mipsel.test
The file was modifiedllvm/test/tools/llvm-objdump/eh_frame_zero_cie.test
Commit 8b4639d0a0e0e65f23e0315f7ade83b9126472af by llvm-dev
[X86][AVX] Add some initial movmsk combine tests

Show failure to reduce the signbit extraction for 256-bit integer vectors on AVX1 targets where the pcmpgt/ashr has to be done with split 128-bit vectors.
The file was addedllvm/test/CodeGen/X86/combine-movmsk-avx.ll
Commit 6f802ec4333cc1227bb37e258a81e9a588f964dc by llvm-dev
[X86] Fix fshr comment copy+paste typo. NFC.

Noticed by @foad on D80466.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 09f7dcb64e1b2a3568ddb6ab327dd2f4a4d3d0fe by mahesha.comp
[AMDGPU/MemOpsCluster] Code clean-up around mem ops clustering logic

Summary:
Clean-up code around mem ops clustering logic. This patch cleans up code within
the function clusterNeighboringMemOps(). It is WIP, and this patch is a first cut.

Reviewers: foad, rampitec, arsenm, vpykhtin, javedabsar

Reviewed By: foad

Subscribers: MatzeB, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, javed.absar, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80119
The file was modifiedllvm/lib/CodeGen/MachineScheduler.cpp
Commit 5229dd1366ab1423d66d3d16dddff6fbaee049d8 by thakis
[build] Add LLVM_LOCAL_RPATH which can set an rpath on just unit test binaries

After D80096, bots that build clang for distribution and that can't use
system gcc / libstdc++ need to pass a working rpath so that unit test
binaries can run. The method suggested in GettingStarted.rst works fine
for local development, but it results in an absolute local rpath ending
up even in distributed binaries like clang, which is both ugly and
unnecessary.

Add an explicit toggle that can be used to add an rpath only for the
non-distributed binaries that need it.

Differential Revision: https://reviews.llvm.org/D80534
The file was modifiedllvm/cmake/modules/AddLLVM.cmake
The file was modifiedllvm/CMakeLists.txt
The file was modifiedllvm/docs/GettingStarted.rst
Commit 3785eb83af4161bd52ed993ef3a2184c998071e6 by gribozavr
Add support for binary operators in Syntax Trees

Reviewers: gribozavr2

Reviewed By: gribozavr2

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80540
The file was modifiedclang/lib/Tooling/Syntax/BuildTree.cpp
The file was modifiedclang/include/clang/Tooling/Syntax/Nodes.h
The file was modifiedclang/lib/Tooling/Syntax/Nodes.cpp
The file was modifiedclang/unittests/Tooling/Syntax/TreeTest.cpp
Commit 8aaabadeced32a1cd959a5b1524b9c927e82bcc0 by sam.parker
[CostModel] Unify getCastInstrCost

Add the remaining cast instruction opcodes to the base implementation
of getUserCost and directly return the result. This allows
getInstructionThroughput to return getUserCost for the casts. This
has required changes to PPC and SystemZ because they implement
getUserCost and/or getCastInstrCost with adjustments for vector
operations. Adjusts have also been made in the remaining backends
that implement the method so that they still produce a cost of zero
or one for cost kinds other than throughput.

Differential Revision: https://reviews.llvm.org/D79848
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
Commit 6f5431846bbf3270d8fc605324e8843c5aaf579b by dkszelethus
[analyzer][RetainCount] Remove the CheckOSObject option

As per http://lists.llvm.org/pipermail/cfe-dev/2019-August/063215.html, lets get rid of this option.

It presents 2 issues that have bugged me for years now:

* OSObject is NOT a boolean option. It in fact has 3 states:
  * osx.OSObjectRetainCount is enabled but OSObject it set to false: RetainCount
    regards the option as disabled.
  * sx.OSObjectRetainCount is enabled and OSObject it set to true: RetainCount
    regards the option as enabled.
  * osx.OSObjectRetainCount is disabled: RetainCount regards the option as
    disabled.
* The hack involves directly modifying AnalyzerOptions::ConfigTable, which
  shouldn't even be public in the first place.

This still isn't really ideal, because it would be better to preserve the option
and remove the checker (we want visible checkers to be associated with
diagnostics, and hidden options like this one to be associated with changing how
the modeling is done), but backwards compatibility is an issue.

Differential Revision: https://reviews.llvm.org/D78097
The file was modifiedclang/test/Analysis/test-separate-retaincount.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.cpp
The file was modifiedclang/test/Analysis/analyzer-config.c
The file was modifiedclang/include/clang/StaticAnalyzer/Checkers/Checkers.td
Commit bd9dce8f9acd710ed62bab44ad3563209503cd72 by sam.parker
[CostModel] getUserCost for intrinsic throughput

Last part of recommitting 'Unify Intrinsic Costs'
259eb619ff6dcd5b6111d1686e18559b9ca004d4. This patch now uses
getUserCost from getInstructionThroughput.

Differential Revision: https://reviews.llvm.org/D80012
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
Commit 4b7812116d513a66fb5fb3c83e7d8be08c1efc65 by llvm-dev
MachineInstr.h - remove unnecessary MachineMemOperand forward declaration. NFC.

We already have to include MachineMemOperand.h
The file was modifiedllvm/include/llvm/CodeGen/MachineInstr.h
Commit 0d52a7d038e189770984594a6ca71bea50fee4d9 by gchatelet
[libc][NFC] Simplify memcpy implementation

Summary: This is a NFC, it aims at simplifying both the code and build files.

Reviewers: abrachet, sivachandra

Subscribers: mgorny, tschuett, ecnelises, libc-commits, courbet

Tags: #libc-project

Differential Revision: https://reviews.llvm.org/D80291
The file was removedlibc/src/string/memcpy.cpp
The file was removedlibc/src/string/x86/memcpy_arch_specific.h.inc
The file was modifiedlibc/src/string/memory_utils/memcpy_utils.h
The file was addedlibc/src/string/x86/memcpy.cpp
The file was modifiedlibc/src/string/CMakeLists.txt
The file was removedlibc/src/string/memcpy_arch_specific.h.def
The file was modifiedlibc/test/src/string/memory_utils/memcpy_utils_test.cpp
Commit c1c9eb0ab7d20e61f0fb345a60694bda0487c0da by yikong
[Transforms] Check validity of profile reader before invoking it

Although an invalid sampling profile would fail the compilation anyway,
this avoids crashing the compiler.
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
Commit f368040c14f4bdac718798db28299a68adc42695 by spatel
[DAGCombiner] try to move splat after binop with splat constant

binop (splat X), (splat C) --> splat (binop X, C)
binop (splat C), (splat X) --> splat (binop C, X)

We do this in IR, and there's a similar fold for the case with 2
non-constant operands just above the code diff in this patch.

This was discussed in D79718, and the extra shuffle in the test
(llvm/test/CodeGen/X86/vector-fshl-128.ll::sink_splatvar) where it
was noticed disappears because demanded elements analysis is no
longer blocked. The large majority of the test diffs seem to be
benign code scheduling changes, but I do see another type of win:
moving the splat later allows binop narrowing in some cases.

Regressions were avoided on x86 and ARM with the INSERT_VECTOR_ELT
restriction.

Differential Revision: https://reviews.llvm.org/D79886
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-512.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-128.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-512.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-lshr-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-ashr-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-128.ll
Commit 4d20e31f736c76785e03367c036183474459ef9a by sepavloff
[FPEnv] Intrinsic llvm.roundeven

This intrinsic implements IEEE-754 operation roundToIntegralTiesToEven,
and performs rounding to the nearest integer value, rounding halfway
cases to even. The intrinsic represents the missed case of IEEE-754
rounding operations and now llvm provides full support of the rounding
operations defined by the standard.

Differential Revision: https://reviews.llvm.org/D75670
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/lib/Analysis/VectorUtils.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedllvm/include/llvm/CodeGen/ISDOpcodes.h
The file was modifiedllvm/unittests/IR/IRBuilderTest.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/lib/Analysis/TargetLibraryInfo.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/test/Transforms/LICM/hoist-round.ll
The file was modifiedllvm/unittests/Analysis/TargetLibraryInfoTest.cpp
The file was modifiedllvm/test/Transforms/InstSimplify/known-never-nan.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedllvm/test/Transforms/InstCombine/float-shrink-compare.ll
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
The file was modifiedllvm/lib/Analysis/ConstantFolding.cpp
The file was modifiedllvm/include/llvm/IR/RuntimeLibcalls.def
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
The file was modifiedllvm/test/ExecutionEngine/Interpreter/intrinsics.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was addedllvm/test/CodeGen/Generic/fpoperations.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/intrinsic.ll
The file was modifiedllvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
The file was modifiedllvm/test/Transforms/InstCombine/double-float-shrink-2.ll
The file was modifiedllvm/include/llvm/IR/ConstrainedOps.def
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedllvm/test/Transforms/InstSimplify/round-intrinsics.ll
The file was modifiedllvm/include/llvm/Analysis/TargetLibraryInfo.def
The file was modifiedllvm/lib/CodeGen/IntrinsicLowering.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
Commit 6c906f7785dad3a1dea5357cfde0762952c2a2bd by john.brawn
[Sema] Diagnose more cases of static data members in local or unnamed classes

We currently diagnose static data members directly contained in unnamed classes,
but we should also diagnose when they're in a class that is nested (directly or
indirectly) in an unnamed class. Do this by iterating up the list of parent
DeclContexts and checking if any is an unnamed class.

Similarly also check for function or method DeclContexts (which includes things
like blocks and openmp captured statements) as then the class is considered to
be a local class, which means static data members aren't allowed.

Differential Revision: https://reviews.llvm.org/D80295
The file was modifiedclang/test/OpenMP/for_loop_messages.cpp
The file was modifiedclang/lib/Sema/SemaDecl.cpp
The file was modifiedclang/test/SemaCXX/anonymous-struct.cpp
The file was modifiedclang/test/SemaCXX/blocks.cpp
Commit 049c16ba93fa77df7984353b1a0124ed64fc0439 by david.green
[ARM] MVE VMINV/VMAXV test additions. NFC
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmaxv.ll
Commit ff2743bf047deac7ef6cc6c3efd30ff05e55b2ad by yitzhakm
[libTooling] In Transformer, allow atomic changes to span multiple files.

Summary:
Currently, all changes returned by a single application of a rule must fit in
one atomic change and therefore must apply to one file. However, there are
patterns in which a single rule will want to modify multiple files; for example,
a header and implementation to change a declaration and its definition. This
patch relaxes Transformer, libTooling's interpreter of RewriteRules, to support
multiple changes.

Reviewers: gribozavr

Subscribers: mgrang, jfb, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80239
The file was modifiedclang/lib/Tooling/Transformer/Transformer.cpp
The file was modifiedclang/unittests/Tooling/TransformerTest.cpp
Commit a3b5ccddcc3512432fc386b9197e6f103e190894 by sguelton
Update DialectConversion.md

line 164: typo? baz.add should be bar.add.
`bar.add` -> `foo.add`
The file was modifiedmlir/docs/DialectConversion.md
Commit 9578a54f5007e8a02cef449dd151da27837b388e by ntv
[mlir][Vector] Add vector contraction to outerproduct lowering

This revision adds the additional lowering and exposes the patterns at a finer granularity for better programmatic reuse. The unit test makes use of the finer grained pattern for simpler checks.

As the ContractionOpLowering is exposed programmatically, cleanup opportunities appear and static class methods are turned into free functions with static visibility.

Differential Revision: https://reviews.llvm.org/D80375
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.h
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.td
The file was modifiedmlir/test/lib/Transforms/TestVectorTransforms.cpp
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorTransforms.h
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp
The file was modifiedmlir/test/Dialect/Vector/vector-contract-transforms.mlir
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
Commit 792575ff323b714d03215951c6fff105f1074aac by sam.parker
[NFC][ARM][AArch64] More code size tests

Add analysis runs for icmp, fcmp and select instructions.
The file was modifiedllvm/test/Analysis/CostModel/ARM/select.ll
The file was addedllvm/test/Analysis/CostModel/AArch64/cmp.ll
The file was removedllvm/test/Analysis/CostModel/ARM/icmps.ll
The file was modifiedllvm/test/Analysis/CostModel/AArch64/select.ll
The file was addedllvm/test/Analysis/CostModel/ARM/cmps.ll
Commit 222e0e58a87649623b3d16ce3fef56a6a0555be3 by csigg
[MLIR] Helper class referencing MemRefType to unify runner implementations.

Summary:
Add DynamicMemRefType which can reference one of the statically ranked StridedMemRefType or a UnrankedMemRefType so that runner utils only need to be implemented once.

There is definitely room for more clean up and unification, but I will keep that for follow-ups.

Reviewers: nicolasvasilache

Reviewed By: nicolasvasilache

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, stephenneuendorffer, Joonsoo, grosul1, frgossen, Kayjukh, jurahul, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80513
The file was modifiedmlir/test/mlir-cpu-runner/utils.mlir
The file was modifiedmlir/lib/ExecutionEngine/RunnerUtils.cpp
The file was modifiedmlir/test/mlir-cpu-runner/unranked_memref.mlir
The file was modifiedmlir/include/mlir/ExecutionEngine/CRunnerUtils.h
The file was modifiedmlir/tools/mlir-cuda-runner/cuda-runtime-wrappers.cpp
The file was modifiedmlir/include/mlir/ExecutionEngine/RunnerUtils.h
Commit 2dd7714b8d264f6436b56582e4448f6a003a61fc by Matthew.Arsenault
AMDGPU/GlobalISel: Don't select boolean phi by default

This is currently missing most of the hard parts to lower correctly,
so disable it for now. This fixes at least one OpenCL conformance test
and allows it to pass with fallback. Hide this behind an option for
now.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
Commit 099a875f28d0131a6ae85af91b9eb8627917fbbe by nemanja.i.ibm
[PowerPC] Unaligned FP default should apply to scalars only

As reported in PR45186, we could be in a situation where we don't
want to handle unaligned memory accesses for FP scalars but still
have VSX (which allows unaligned access for vectors). Change the
default to only apply to scalars.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=45186
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was addedllvm/test/CodeGen/PowerPC/pr45186.ll
Commit e72cba975735c2202b254621d79fb9dbbed08d39 by David.Chisnall
Use configure depends to trigger reconfiguration when LLVMBuild files change

Summary:
The existing logic has a workaround where configure_file is used to write a single dummy file output many times.

CMake has a feature to more directly add the dependency and avoid the dummy file (it is available in the minimum version specified).

Reviewers: theraven

Reviewed By: theraven

Subscribers: theraven, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80218
The file was modifiedllvm/utils/llvm-build/llvmbuild/main.py
Commit 8bc03d2168241f7b12265e9cd7e4eb7655709f34 by Matthew.Arsenault
GlobalISel: Merge G_PTR_MASK with llvm.ptrmask intrinsic

Confusingly, these were unrelated and had different semantics. The
G_PTR_MASK instruction predates the llvm.ptrmask intrinsic, but has a
different format. G_PTR_MASK only allows clearing the low bits of a
pointer, and only a constant number of bits. The ptrmask intrinsic
allows an arbitrary mask. Replace G_PTR_MASK to match the intrinsic.

Only selects the cases that look like the old instruction. More work
is needed to select the general case. Also new legalization code is
still needed to deal with the case where the incoming mask size does
not match the pointer size, which has a specified behavior in the
langref.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was addedllvm/test/MachineVerifier/test_g_ptrmask.mir
The file was modifiedllvm/include/llvm/Support/TargetOpcodes.def
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrmask.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was removedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-mask.mir
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
The file was modifiedllvm/include/llvm/Target/GenericOpcodes.td
The file was modifiedllvm/docs/GlobalISel/GenericOpcode.rst
The file was modifiedllvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrmask.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-ptrmask.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir
Commit b59b3640bcbdfc6cf4b35ff3a6ad5f524a073b45 by Adrian Prantl
Debug Info: Mark os_log helper functions as artificial

The os_log helper functions are linkonce_odr and supposed to be
uniqued across TUs, so attachine a DW_AT_decl_line on it is highly
misleading. By setting the function decl to implicit, CGDebugInfo
properly marks the functions as artificial and uses a default file /
line 0 location for the function.

rdar://problem/63450824

Differential Revision: https://reviews.llvm.org/D80463
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was addedclang/test/CodeGen/debug-info-oslog.c
Commit 6b7d51ad4a16579b0a7d41c77715be4d9e266d8c by Adrian Prantl
Add missing forward decl to unbreak the modular build
The file was modifiedclang/include/clang/Index/IndexingOptions.h
Commit 50d4b22ca0dd8f25a2ab2cb53a04627b2504ecfe by Matthew.Arsenault
AMDGPU/GlobalISel: Fix assert on 16-bit G_EXTRACT results

I consider this to be a hack, since we probably should not mark any
16-bit extract as legal, and require all extracts to be done on
multiples of 32. There are quite a few more battles to fight in the
legalizer for sub-dword vectors, so just select this for now so we can
pass OpenCL conformance without crashing.

Also fix the same assert for G_INSERTs. Unlike G_EXTRACT there's not a
trivial way to select this so just fail on it.
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.xfail.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract.mir
Commit 5bd97eb28aff252a3a9e8b0ef00d563b557f5580 by Sanne.Wouda
Fix MemoryLocation.h use without Instructions.h

MemoryLocation.h was changed to only include Instruction.h.  However,
cast<> still needs the full definiton, so move MemoryLocation::getOrNone
to the cpp file.
The file was modifiedllvm/lib/Analysis/MemoryLocation.cpp
The file was modifiedllvm/include/llvm/Analysis/MemoryLocation.h
Commit d6c8736287371f1c9eba3629819209c5fb54e546 by sd.fertile
[PowerPC][AIX] Spill CSRs to the ABI specified stack offsets.

Extend the CSR save/restore insertion code to support both 32-bit and
64-bit AIX.

Differential Revision: https://reviews.llvm.org/D79252
The file was modifiedllvm/lib/Target/PowerPC/PPCFrameLowering.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/aix-cc-abi.ll
The file was addedllvm/test/CodeGen/PowerPC/aix-csr.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix32-crsave.mir
The file was modifiedllvm/test/CodeGen/PowerPC/ppc64-crsave.mir
The file was modifiedllvm/test/CodeGen/PowerPC/aix-calleesavedregs.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-cc-byval-mem.ll
Commit bae7cf674621b5892a036fabe77692a59e2b115b by maskray
[ELF][PPC64] Synthesize _savegpr[01]_{14..31} and _restgpr[01]_{14..31}

In the 64-bit ELF V2 API Specification: Power Architecture, 2.3.3.1. GPR
Save and Restore Functions defines some special functions which may be
referenced by GCC produced assembly (LLVM does not reference them).

With GCC -Os, when the number of call-saved registers exceeds a certain
threshold, GCC generates `_savegpr0_* _restgpr0_*` calls and expects the
linker to define them. See
https://sourceware.org/pipermail/binutils/2002-February/017444.html and
https://sourceware.org/pipermail/binutils/2004-August/036765.html . This
is weird because libgcc.a would be the natural place. However, the linker
generation approach has the advantage that the linker can generate
multiple copies to avoid long branch thunks. We don't consider the
advantage significant enough to complicate our trunk implementation, so
we take a simple approach.

* Check whether `_savegpr0_{14..31}` are used
* If yes, define needed symbols and add an InputSection with the code sequence.

`_savegpr1_*` `_restgpr0_*` and `_restgpr1_*` are similar.

Reviewed By: sfertile

Differential Revision: https://reviews.llvm.org/D79977
The file was addedlld/test/ELF/ppc64-savegpr0.s
The file was addedlld/test/ELF/ppc64-savegpr1.s
The file was modifiedlld/ELF/Target.h
The file was addedlld/test/ELF/ppc64-restgpr1.s
The file was modifiedlld/ELF/Writer.cpp
The file was addedlld/test/ELF/ppc64-restgpr0.s
The file was modifiedlld/ELF/Arch/PPC64.cpp
The file was addedlld/test/ELF/ppc64-saveres.s
Commit d4086213c6d76fcaa5fa620ad680eaaf886cc66e by Jonas Devlieghere
[dsymutil] Escape CFBundleIdentifier in plist.

Revision 333565 started escaping HTML special characters in the plist
written by dsymutil, but didn't include the updated CFBundleIdentifier.
The file was modifiedllvm/test/tools/dsymutil/Inputs/Info.plist
The file was modifiedllvm/tools/dsymutil/dsymutil.cpp
The file was modifiedllvm/test/tools/dsymutil/X86/darwin-bundle.test
Commit fb38b98338cc87442e3451665e82bf1c8ef9388f by Alexander Timofeev
[AMDGPU] NFC target dependent requiresUniformRegister refactored out

Summary: Target specific method encapsulated into the Target Lowering Info.

Reviewers: rampitec, vpykhtin

Reviewed By: rampitec

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70085
The file was modifiedllvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit 9786e7552d5564268484357866088d0a054bccaf by Matthew.Arsenault
Revert "[AMDGPU] NFC target dependent requiresUniformRegister refactored out"

This reverts commit fb38b98338cc87442e3451665e82bf1c8ef9388f.

This will regress compile time.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit a0ce2338a0838ccb04e10bd4f8e9ec9d7136e1d2 by spatel
[InstCombine] reassociate fsub+fadd with FMF to increase adds and throughput

The -reassociate pass tends to transform this kind of pattern into
something that is worse for vectorization and codegen. See PR43953:
https://bugs.llvm.org/show_bug.cgi?id=43953
The file was modifiedllvm/test/Transforms/InstCombine/fsub.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
Commit 106ec64fbc7fb5ef28d0368fb1dca18e67e75adf by yamauchi
[PGO] Add memcmp/bcmp size value profiling.

Summary: This adds support for memcmp/bcmp to the existing memcpy/memset value profiling.

Reviewers: davidxl

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79751
The file was modifiedllvm/lib/Transforms/Instrumentation/ValueProfileCollector.h
The file was modifiedllvm/lib/Transforms/Instrumentation/ValueProfilePlugins.inc
The file was modifiedllvm/test/Transforms/PGOProfile/memop_size_annotation.ll
The file was modifiedllvm/test/Transforms/PGOProfile/memop_size_opt.ll
The file was modifiedllvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/ValueProfileCollector.cpp
The file was modifiedllvm/test/Transforms/PGOProfile/Inputs/memop_size_annotation.proftext
Commit 3e62289f42d21e7e1f9a8b1d6f970740b22f5d47 by sd.fertile
[PowerPC][NFC] Add colon to TODO's and fix indentation.
The file was modifiedllvm/lib/Target/PowerPC/PPCFrameLowering.cpp
Commit 2c7d63257d8e33ff721af78045d2be6bac54da05 by sdi1600105
[MSSA][Doc] Clobbers, more info on Defs / Def chain

- Added more info about what we refer as a clobber in MSSA.
- Added more info about MemoryDefs and how there is a single Def chain.
- The doc portrayed MSSA as modeling the heap whileit is modeling
  the whole memory, so I changed the wording to not be heap-specific.

Differential Revision: https://reviews.llvm.org/D80000
The file was modifiedllvm/docs/MemorySSA.rst
Commit 8f1156a7d004d97e9f75484a00dc4278698fd8ea by mydeveloperday
[clang-format] Fix an ObjC regression introduced with new [[likely]][[unlikely]] support in if/else clauses

Summary:
{D80144} introduce an ObjC regression

Only parse the `[]` if what follows is really an attribute

Reviewers: krasimir, JakeMerdichAMD

Reviewed By: krasimir

Subscribers: rdwampler, aaron.ballman, curdeius, cfe-commits

Tags: #clang, #clang-format

Differential Revision: https://reviews.llvm.org/D80547
The file was modifiedclang/lib/Format/UnwrappedLineParser.cpp
The file was modifiedclang/lib/Format/UnwrappedLineParser.h
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was modifiedclang/unittests/Format/FormatTestObjC.cpp
Commit d70ec366c91b2a5fc6334e6f6ca9c4d9a6785c5e by adam.balogh
[Analyzer][NFC] Remove the SubEngine interface

The `SubEngine` interface is an interface with only one implementation
`EpxrEngine`. Adding other implementations are difficult and very
unlikely in the near future. Currently, if anything from `ExprEngine` is
to be exposed to other classes it is moved to `SubEngine` which
restricts the alternative implementations. The virtual methods are have
a slight perofrmance impact. Furthermore, instead of the `LLVM`-style
inheritance a native inheritance is used here, which renders `LLVM`
functions like e.g. `cast<T>()` unusable here. This patch removes this
interface and allows usage of `ExprEngine` directly.

Differential Revision: https://reviews.llvm.org/D80548
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
The file was removedclang/include/clang/StaticAnalyzer/Core/PathSensitive/SubEngine.h
The file was modifiedclang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp
The file was removedclang/lib/StaticAnalyzer/Core/SubEngine.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/CallEvent.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/ConstraintManager.h
The file was modifiedclang/lib/StaticAnalyzer/Core/ProgramState.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/SimpleConstraintManager.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConstraintManager.h
The file was modifiedclang/lib/StaticAnalyzer/Core/ExprEngine.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/RegionStore.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/CMakeLists.txt
The file was modifiedclang/lib/StaticAnalyzer/Core/SMTConstraintManager.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/RangedConstraintManager.h
The file was modifiedclang/lib/StaticAnalyzer/Core/CoreEngine.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/SimpleConstraintManager.h
The file was modifiedclang/lib/StaticAnalyzer/Core/SValBuilder.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
The file was modifiedclang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
Commit 10f0b18ed950545d10574f5b30d234bd3789d7b2 by llvmgnsyncbot
[gn build] Port d70ec366c91
The file was modifiedllvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Core/BUILD.gn
Commit d1f0a76b21975ba66ec2427c2d3ddb7ed1e63949 by Jonas Devlieghere
[YAMLTraits] Remove char trait and serialize as uint8_t in lldb.

As discussed in https://reviews.llvm.org/D79745
The file was modifiedllvm/unittests/Support/YAMLIOTest.cpp
The file was modifiedlldb/include/lldb/Utility/Args.h
The file was modifiedllvm/include/llvm/Support/YAMLTraits.h
The file was modifiedllvm/lib/Support/YAMLTraits.cpp
Commit b8a3c618d6c5df081cad69b5ffb386a7a7b0361f by maskray
[ELF] Allow misaligned SHT_GNU_verneed

Bazel created interface shared objects (.ifso) may be misaligned.  We use
llvm::support::detail::packed_endian_specific_integral under the hood
which allows reading of misaligned values, so there is not a need to
diagnose (in LLD we don't intend to support sophisticated parsing for
SHT_GNU_*).
The file was modifiedlld/ELF/InputFiles.cpp
The file was removedlld/test/ELF/invalid/verneed-shared.yaml
The file was addedlld/test/ELF/invalid/verneed-shared.test
Commit 50db8402fc6652559d9ba3dc97bb787c4160ef5b by llvm-dev
ResourcePriorityQueue.h - reduce unnecessary includes to forward declarations. NFC.

Move includes to ResourcePriorityQueue.cpp
The file was modifiedllvm/include/llvm/CodeGen/ResourcePriorityQueue.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp
Commit 0165cf701156db4d399cb31d31ecb154372e2562 by llvm-dev
ObjCARCAnalysisUtils.h - remove unused includes. NFC.

We just need to include Passes.h in ObjCARCAliasAnalysis.cpp to compensate
The file was modifiedllvm/lib/Analysis/ObjCARCAliasAnalysis.cpp
The file was modifiedllvm/include/llvm/Analysis/ObjCARCAnalysisUtils.h
Commit 8d31dd23ec2368d00b0668c3d01b1fd2ce4d621b by Jonas Devlieghere
[lldb/Reproducers] Skip remaining failing test in python_api subdir

Skip the remaining two failing test in the python_api subdirectory. See
inline comments for the reason why.
The file was modifiedlldb/test/API/python_api/hello_world/TestHelloWorld.py
The file was modifiedlldb/test/API/python_api/sbdata/TestSBData.py
Commit a94e08d2e840a0e7ce032f59e9344bc49b5a54a1 by Jonas Devlieghere
[StaticAnalyzer] Fix non-virtual destructor warning

Ficed warning: 'clang::ento::ExprEngine' has virtual functions but non-virtual destructor [-
Wnon-virtual-dtor]
  ~ExprEngine() = default;
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
Commit 2e824925402f011c2a4d3a0b51cce388b6d14d16 by kcc
[fuzzer][afl] Fix build with GCC

Summary:
Fixes this build error with GCC 9.3.0:

```
../lib/fuzzer/afl/afl_driver.cpp:114:30: error: expected unqualified-id before string constant
  114 | __attribute__((weak)) extern "C" void __sanitizer_set_report_fd(void *);
      |                              ^~~
```

Reviewers: metzman, kcc

Reviewed By: kcc

Subscribers: #sanitizers

Tags: #sanitizers

Differential Revision: https://reviews.llvm.org/D80479
The file was modifiedcompiler-rt/lib/fuzzer/afl/afl_driver.cpp
Commit 6e9223a2c65835444c5c1328d52daf9f85f9618c by nemanja.i.ibm
[PowerPC][NFC] Update test to prevent DCE from causing failures

The test case provided in PR45709 can be simplified by DCE to an
empty function. To prevent this from happening if DCE is run prior
to ISEL in the back end, just add optnone to the function. The
behaviour it is testing for is in the SDAG legalization and is
not sensitive to optnone so the test case still achieves its desired
objective.
The file was modifiedllvm/test/CodeGen/PowerPC/pr45709.ll
Commit 12dbdc2a6b68162f7370e9754bdb0e1edd65bf3c by adam.balogh
[Analyzer] Fix buildbot failure of commit rGd70ec366c91b
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
Commit 7eb666b1556b86503f2f386bf921186cdbb2d22a by lei
[PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

Summary:
This patch simply adds support for the new CPU in anticipation of
Power10. There isn't really any functionality added so there are no
associated test cases at this time.

Reviewers: stefanp, nemanjai, amyk, hfinkel, power-llvm-team, #powerpc

Reviewed By: stefanp, nemanjai, amyk, #powerpc

Subscribers: NeHuang, steven.zhang, hiraditya, llvm-commits, wuzish, shchenz, cfe-commits, kbarton, echristo

Tags: #clang, #powerpc, #llvm

Differential Revision: https://reviews.llvm.org/D80020
The file was modifiedclang/lib/Basic/Targets/PPC.cpp
The file was modifiedclang/test/Misc/target-invalid-cpu-note.c
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.h
The file was modifiedclang/lib/Basic/Targets/PPC.h
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
The file was modifiedclang/lib/Driver/ToolChains/Arch/PPC.cpp
The file was modifiedclang/test/Preprocessor/init-ppc64.c
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPC.td
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/lib/Support/Host.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/check-cpu.ll
Commit 0788392637f414c312a995f3202177a2919eba2f by spatel
[InstCombine] add tests for reassociative sub/add expressions; NFC
The file was modifiedllvm/test/Transforms/InstCombine/sub.ll
Commit f5cfcc4b0638eaca9194776309d16cd59c1f961b by spatel
[LoopVectorize] regenerate full test checks; NFC
The file was modifiedllvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
Commit 1a2bffaf8b4567663f3001bd9c7532322e89f990 by spatel
[InstCombine] reassociate sub+add to increase adds and throughput

The -reassociate pass tends to transform this kind of pattern into
something that is worse for vectorization and codegen. See PR43953:
https://bugs.llvm.org/show_bug.cgi?id=43953

Follows-up the FP version of the same transform:
rGa0ce2338a083
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
The file was modifiedllvm/test/Transforms/InstCombine/sub.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
Commit 713538b629e45e6236b5d60fd6b64d7b8669cd00 by echristo
Be more specific about auto * vs auto for po alias.
The file was modifiedlldb/source/Interpreter/CommandInterpreter.cpp
Commit fca76b79456c916fd2ce193ef76d6e795bd9c105 by dblaikie
Roll variables into an LLVM_DEBUG block to address -Wunused-but-set-variable
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp