Changes

[X86] Use some preprocessor macros to reduce the very similar repeated code in getVPTESTMOpc. NFCI

This function picks X86 opcode name based on type, masking,
and whether not a load or broadcast has been folded using multiple
switch statements. The contents of the switches mostly just vary in
a few characters in the instruction name. So use some macros to
build the instruction names to reduce the repetiveness.

split darwin-version-min-load-command.s into Arm64 subtest to avoid failures

Some buildbot configurations don't build the arm64 backend, so the test-cases
that need arm64 should go into the aarch64 subdirectory.

[PPC][NFC] Replace TM with Subtarget->getTargetMachine() in preparation for GlobalISel.

There are two uses of TM (instance of TargetMachine) when checking options.
These will not work once we enable GlobalISel. This patch replaces those uses of
TM with Subtarget->getTargetMachine().

[BasicAA] Replace -basicaa with -basic-aa in polly

Follow up to https://reviews.llvm.org/D82607.

[clangd] Run formatting operations asynchronously.

Summary:
They don't need ASTs or anything, so they should still run immediately.

These were sync for historical reasons (they predate clangd having a pervasive
threading model). This worked ok as they were "cheap".
Aside for consistency, there are a couple of reasons to make them async:
 - they do IO (finding .clang-format) so aren't trivially cheap
 - having TUScheduler involved in running these tasks means we can use it as
   an injection point for configuration.
   (TUScheduler::run will need to learn about which file is being operated on,
   but that's an easy change).
 - adding the config system adds more potential IO, too

Reviewers: kbobyrev

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82642

[mlir] Add support for defining Traits and Interfaces on Attributes/Types.

This revisions add mechanisms to Attribute/Type for attaching traits and interfaces. The mechanisms are modeled 1-1 after those for operations to keep the system consistent. AttrBase and TypeBase now accepts a trailing list of `Trait` types that will be attached to the object. These traits should inherit from AttributeTrait::TraitBase and TypeTrait::TraitBase respectively as necessary. A followup commit will refactor the interface gen mechanisms in ODS to support Attribute/Type interface generation and add tests for the mechanisms.

Differential Revision: https://reviews.llvm.org/D81883

[mlir] Refactor InterfaceGen to support generating interfaces for Attributes and Types.

This revision adds support to ODS for generating interfaces for attributes and types, in addition to operations. These interfaces can be specified using `AttrInterface` and `TypeInterface` in place of `OpInterface`. All of the features of `OpInterface` are supported except for the `verify` method, which does not have a matching representation in the Attribute/Type world. Generating these interface can be done using `gen-(attr|type)-interface-(defs|decls|docs)`.

Differential Revision: https://reviews.llvm.org/D81884

[mlir] Remove locking for dialect/operation registration.

Moving forward dialects should only be registered in a thread safe context. This matches the existing usage we have today, but it allows for removing quite a bit of expensive locking from the context.

This led to ~.5 a second compile time improvement when running one conversion pass on a very large .mlir file(hundreds of thousands of operations).

Differential Revision: https://reviews.llvm.org/D82595

[Docs][BasicAA] Rename -basicaa to -basic-aa in docs

Follow up to https://reviews.llvm.org/D82607.

[ModuloSchedule] Make PeelingModuloScheduleExpander inheritable.

Basically a NFC, but allows subclasses access to the entire PeelingModuloScheduleExpander
class. We are doing this to allow backends, particularly one that are not necessarily
upstreamed, to inherit from PeelingModuloScheduleExpander and access its basic structures.

Renames Info into LoopInfo for consistency in PeelingModuloScheduleExpander.

Differential Revision: https://reviews.llvm.org/D82673

[gn build] Update build for new OpenMP tablegen logic

Ports 1a70077b5a64189d9c04d1a2d7ea6ff0e49744d6 to gn from cmake.

Fix wrong title underline length

A constexpr virtual function is implicitly inline so should never be a
key function.

AMDGPU/GlobalISel: Remove some selection tests which should be invalid

These use undef generic virtual register operands, which should be
rejected by the verifier.

GlobalISel: Disallow undef generic virtual register uses

With an undef operand, it's possible for getVRegDef to fail and return
null. This is an edge case very little code bothered to
consider. Proper gMIR should use G_IMPLICIT_DEF instead.

I initially tried to apply this restriction to all SSA MIR, so then
getVRegDef would never fail anywhere. However, ProcessImplicitDefs
does technically run while the function is in SSA. ProcessImplicitDefs
and DetectDeadLanes would need to either move, or a new pseudo-SSA
type of function property would need to be introduced.

[gn build] (semi-manually) port ce6153a5282

[Sanitizers] Implement interceptors for msgsnd, msgrcv

Differential Revision: https://reviews.llvm.org/D82897

[Docs][BasicAA] Rename some more basicaa -> basic-aa

Follow up to https://reviews.llvm.org/D82607.

[llvm-install-name-tool] Tighten some path checks

Just having --implicit-check-not=/usr breaks when the LLVM checkout path
contains '/usr', since llvm-objdump prints out the path to the input
file in the first line. Tighten the checks by adding the 'name' prefix
that's used when printing load command payloads. An alternative would be
to redirect the input file into llvm-objdump, in which case it prints
out 'a.out' as the file name, but I'm not sure how reliable that
behavior is.

Fixup BDVER1 and ZNVER1 definitions that were accidentally changed in recent refactor.

- BDVER1
  - Duplicate FeatureLZCNT removed
- ZNVER1
  - Duplicate FeatureLZCNT removed
  - Removed unsupported FeatureLWP
  - Swapped FeatureMMX and FeatureMOVBE to be in alphabetical order

[c++20] consteval functions don't get vtable slots.

For the Itanium C++ ABI, this implements the rule added in
https://github.com/itanium-cxx-abi/cxx-abi/pull/83

For the MS C++ ABI, this implements the direction that seemed most
plausible based on personal correspondence with MSVC developers, but is
subject to change as they decide their ABI rule.

[DWARFYAML][test] Make the checker stricter. NFC.

Currently, DWARFYAML doesn't emit the 0 byte for terminating the abbrev
table for the given compilation unit. Before addressing this issue, we
have to make the test stricter.

[NewPM] Add explicit init value to -enable-new-pm

 So it's easier to test with it on by default.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D82922