Changes
Summary
- PowerPC: Fix register spilling for SPE registers Summary: Missed in the original commit, use the correct callee-saved register list for spilling, instead of the standard SVR432 list. This avoids needlessly spilling the SPE non-volatile registers when they're not used. As part of this, also add where missing, and sort, the spill opcode checks for SPE and SPE4 register classes. Reviewers: nemanjai, hfinkel, joerg Subscribers: kbarton, jsji, llvm-commits Differential Revision: https://reviews.llvm.org/D56703
- PowerPC/SPE: Fix load/store handling for SPE Summary: Pointed out in a comment for D49754, register spilling will currently spill SPE registers at almost any offset. However, the instructions `evstdd` and `evldd` require a) 8-byte alignment, and b) a limit of 256 (unsigned) bytes from the base register, as the offset must fix into a 5-bit offset, which ranges from 0-31 (indexed in double-words). The update to the register spill test is taken partially from the test case shown in D49754. Additionally, pointed out by Kei Thomsen, globals will currently use evldd/evstdd, though the offset isn't known at compile time, so may exceed the 8-bit (unsigned) offset permitted. This fixes that as well, by forcing it to always use evlddx/evstddx when accessing globals. Part of the patch contributed by Kei Thomsen. Reviewers: nemanjai, hfinkel, joerg Subscribers: kbarton, jsji, llvm-commits Differential Revision: https://reviews.llvm.org/D54409
- [MIPS GlobalISel] ClampScalar and select pointer G_ICMP Add narrowScalar to half of original size for G_ICMP. ClampScalar G_ICMP's operands 2 and 3 to to s32. Select G_ICMP for pointers for MIPS32. Pointer compare is same as for integers, it is enough to declare them as legal type. Differential Revision: https://reviews.llvm.org/D64856
Change Type | Path in Repository | Path in Workspace |
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![]() | /llvm/trunk/lib/Target/PowerPC/PPCCallingConv.td (diff) | llvm.src/lib/Target/PowerPC/PPCCallingConv.td |
![]() | /llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp (diff) | llvm.src/lib/Target/PowerPC/PPCInstrInfo.cpp |
![]() | /llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (diff) | llvm.src/lib/Target/PowerPC/PPCRegisterInfo.cpp |
Change Type | Path in Repository | Path in Workspace |
![]() | /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (diff) | llvm.src/lib/Target/PowerPC/PPCISelLowering.cpp |
![]() | /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h (diff) | llvm.src/lib/Target/PowerPC/PPCISelLowering.h |
![]() | /llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (diff) | llvm.src/lib/Target/PowerPC/PPCRegisterInfo.cpp |
![]() | /llvm/trunk/test/CodeGen/PowerPC/spe.ll (diff) | llvm.src/test/CodeGen/PowerPC/spe.ll |
Change Type | Path in Repository | Path in Workspace |
![]() | /llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (diff) | llvm.src/lib/CodeGen/GlobalISel/LegalizerHelper.cpp |
![]() | /llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp (diff) | llvm.src/lib/Target/Mips/MipsLegalizerInfo.cpp |
![]() | /llvm/trunk/test/CodeGen/Mips/GlobalISel/instruction-select/icmp.mir (diff) | llvm.src/test/CodeGen/Mips/GlobalISel/instruction-select/icmp.mir |
![]() | /llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/icmp.mir (diff) | llvm.src/test/CodeGen/Mips/GlobalISel/legalizer/icmp.mir |
![]() | /llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/icmp.ll (diff) | llvm.src/test/CodeGen/Mips/GlobalISel/llvm-ir/icmp.ll |
![]() | /llvm/trunk/test/CodeGen/Mips/GlobalISel/regbankselect/icmp.mir (diff) | llvm.src/test/CodeGen/Mips/GlobalISel/regbankselect/icmp.mir |