Changes

Summary

1. TableGen: Support physical register inputs > 255 This was truncating register value that didn't fit in unsigned char. Switch AMDGPU sendmsg intrinsics to using a tablegen pattern.
2. [NFC] Relaxed regression tests for PR42665 Following up on the buildbot failures, this commits relaxes some tests: instead of checking for specific IR output, it now ensures that the underlying issue (the crash), and only that, doesn't happen.
3. [ARM][LowOverheadLoops] Revert remaining pseudos ARMLowOverheadLoops would assert a failure if it did not find all the pseudo instructions that comprise the hardware loop. Instead of doing this, iterate through all the instructions of the function and revert any remaining pseudo instructions that haven't been converted. Differential Revision: https://reviews.llvm.org/D65080

Revision 366695 by arsenm: TableGen: Support physical register inputs > 255 This was truncating register value that didn't fit in unsigned char. Switch AMDGPU sendmsg intrinsics to using a tablegen pattern.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (diff)	llvm.src/include/llvm/CodeGen/SelectionDAGISel.h
	/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (diff)	llvm.src/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
	/llvm/trunk/utils/TableGen/DAGISelMatcher.h (diff)	llvm.src/utils/TableGen/DAGISelMatcher.h
	/llvm/trunk/utils/TableGen/DAGISelMatcherEmitter.cpp (diff)	llvm.src/utils/TableGen/DAGISelMatcherEmitter.cpp
	/llvm/trunk/utils/TableGen/DAGISelMatcherGen.cpp (diff)	llvm.src/utils/TableGen/DAGISelMatcherGen.cpp
Revision 366694 by mantognini: [NFC] Relaxed regression tests for PR42665 Following up on the buildbot failures, this commits relaxes some tests: instead of checking for specific IR output, it now ensures that the underlying issue (the crash), and only that, doesn't happen.
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/test/CodeGenCXX/PR42665.cpp (diff)	clang.src/test/CodeGenCXX/PR42665.cpp
Revision 366691 by sam_parker: [ARM][LowOverheadLoops] Revert remaining pseudos ARMLowOverheadLoops would assert a failure if it did not find all the pseudo instructions that comprise the hardware loop. Instead of doing this, iterate through all the instructions of the function and revert any remaining pseudo instructions that haven't been converted. Differential Revision: https://reviews.llvm.org/D65080
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/ARM/ARMLowOverheadLoops.cpp (diff)	llvm.src/lib/Target/ARM/ARMLowOverheadLoops.cpp
	/llvm/trunk/test/CodeGen/Thumb2/LowOverheadLoops/revert-non-loop.mir	llvm.src/test/CodeGen/Thumb2/LowOverheadLoops/revert-non-loop.mir