FailedChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [NFC] Minor cleanup for ValueHandle code. (details)
  2. [mlir] Add an interface for Cast-Like operations (details)
  3. [mlir] Add a new builtin `unrealized_conversion_cast` operation (details)
  4. [mlir] Make MLIRContext::getOrLoadDialect(StringRef, TypeID, ...) public (details)
  5. [mlir][OpFormatGen] Fix incorrect kind used for RegionsDirective (details)
  6. [DAGCombiner] Precommit test case for D95086 (details)
  7. [Clang][OpenMP] Use `clang_cc1` test for `declare_target_device_only_compilation.cpp` (details)
  8. [lld-macho] Add dependency on ObjCARC to fix shared build (details)
  9. Fix a bug with setting breakpoints on C++11 inline initialization statements. (details)
  10. [MSan] Move origins for overlapped memory transfer (details)
  11. Use CXX_SOURCES and point to the right source file. (details)
  12. [dsymutil] Compare object modification times using second precision (details)
  13. [RISCV] Use update_llc_test_checks.py to regenerate check lines in vleff-rv32.ll and vleff-rv64.ll. (details)
  14. [lldb] Upstream eCore_arm_arm64e enum value in ArchSpec (details)
  15. [RISCV] Implement vsseg intrinsics. (details)
  16. [RISCV] Implement vlsseg intrinsics. (details)
  17. [RISCV] Implement vssseg intrinsics. (details)
  18. [X86] Add experimental option to separately tune alignment of innermost loops (details)
  19. [llvm] Construct SmallVector with iterator ranges (NFC) (details)
  20. [Transforms] Use llvm::append_range (NFC) (details)
  21. [llvm] Use hasSingleElement (NFC) (details)
  22. [IndirectFunctions] Skip propagating attributes to address taken functions (details)
  23. [yaml2obj/obj2yaml] - Improve dumping/creating of ELF versioning sections. (details)
  24. [X86][AMX] Fix tile config register spill issue. (details)
  25. [llvm-nm][ELF] - Make -D display symbol versions. (details)
  26. MCDwarf: Delete uneeded parameter (details)
  27. [mlir] Remove complex ops from Standard dialect. (details)
  28. [LoopUnswitch] Implement first version of partial unswitching. (details)
  29. [clangd] Fix a missing override keyword, NFC. (details)
  30. Revert "[X86][AMX] Fix tile config register spill issue." (details)
Commit 87a89549c4b14a5e19097484562dd359b77a8770 by varun_gandhi
[NFC] Minor cleanup for ValueHandle code.

Based on feedback in https://reviews.llvm.org/D93433.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D94238
The file was modifiedllvm/include/llvm/IR/ValueHandle.h
Commit 6ccf2d62b4876c88427ae97d0cd3c9ed4330560a by riddleriver
[mlir] Add an interface for Cast-Like operations

A cast-like operation is one that converts from a set of input types to a set of output types. The arity of the inputs may be from 0-N, whereas the arity of the outputs may be anything from 1-N. Cast-like operations are removable in cases where they produce a "no-op", i.e when the input types and output types match 1-1.

Differential Revision: https://reviews.llvm.org/D94831
The file was modifiedmlir/examples/toy/Ch7/include/toy/Ops.td
The file was modifiedmlir/lib/Dialect/StandardOps/CMakeLists.txt
The file was modifiedmlir/examples/toy/Ch5/include/toy/Dialect.h
The file was modifiedmlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
The file was modifiedmlir/include/mlir/IR/OpDefinition.h
The file was modifiedmlir/docs/Tutorials/Toy/Ch-4.md
The file was modifiedmlir/examples/toy/Ch4/include/toy/Dialect.h
The file was modifiedmlir/examples/toy/Ch5/CMakeLists.txt
The file was modifiedmlir/include/mlir/IR/Diagnostics.h
The file was modifiedmlir/include/mlir/Dialect/Tensor/IR/Tensor.h
The file was modifiedmlir/examples/toy/Ch4/include/toy/Ops.td
The file was modifiedmlir/examples/toy/Ch4/CMakeLists.txt
The file was modifiedmlir/include/mlir/Interfaces/CMakeLists.txt
The file was modifiedmlir/lib/IR/Operation.cpp
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
The file was modifiedmlir/examples/toy/Ch5/mlir/ToyCombine.cpp
The file was modifiedmlir/lib/Interfaces/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
The file was modifiedmlir/lib/Dialect/Tensor/IR/CMakeLists.txt
The file was modifiedmlir/examples/toy/Ch6/mlir/Dialect.cpp
The file was modifiedmlir/examples/toy/Ch5/mlir/Dialect.cpp
The file was modifiedmlir/examples/toy/Ch4/mlir/ToyCombine.cpp
The file was modifiedmlir/examples/toy/Ch5/include/toy/Ops.td
The file was modifiedmlir/examples/toy/Ch4/mlir/Dialect.cpp
The file was modifiedmlir/examples/toy/Ch6/include/toy/Ops.td
The file was addedmlir/lib/Interfaces/CastInterfaces.cpp
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.h
The file was modifiedmlir/lib/Dialect/Shape/IR/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/Tensor/IR/TensorOps.cpp
The file was modifiedmlir/examples/toy/Ch7/include/toy/Dialect.h
The file was addedmlir/include/mlir/Interfaces/CastInterfaces.td
The file was modifiedmlir/examples/toy/Ch6/CMakeLists.txt
The file was modifiedmlir/examples/toy/Ch6/include/toy/Dialect.h
The file was modifiedmlir/examples/toy/Ch6/mlir/ToyCombine.cpp
The file was modifiedmlir/examples/toy/Ch7/mlir/ToyCombine.cpp
The file was modifiedmlir/examples/toy/Ch7/CMakeLists.txt
The file was modifiedmlir/examples/toy/Ch7/mlir/Dialect.cpp
The file was addedmlir/include/mlir/Interfaces/CastInterfaces.h
Commit c78219f644c7a6e352cd416f8ebb4374b745967e by riddleriver
[mlir] Add a new builtin `unrealized_conversion_cast` operation

An `unrealized_conversion_cast` operation represents an unrealized conversion
from one set of types to another, that is used to enable the inter-mixing of
different type systems. This operation should not be attributed any special
representational or execution semantics, and is generally only intended to be
used to satisfy the temporary intermixing of type systems during the conversion
of one type system to another.

This operation was discussed in the following RFC(and ODM):

https://llvm.discourse.group/t/open-meeting-1-14-dialect-conversion-and-type-conversion-the-question-of-cast-operations/

Differential Revision: https://reviews.llvm.org/D94832
The file was addedmlir/test/Dialect/Builtin/canonicalize.mlir
The file was modifiedmlir/lib/IR/CMakeLists.txt
The file was addedmlir/test/Dialect/Builtin/invalid.mlir
The file was modifiedmlir/lib/IR/BuiltinDialect.cpp
The file was modifiedmlir/include/mlir/IR/BuiltinOps.h
The file was modifiedmlir/include/mlir/IR/BuiltinOps.td
The file was addedmlir/test/Dialect/Builtin/ops.mlir
Commit 8a7ff7301a6ce50f2adf52959c04f37a00c5a631 by joker.eph
[mlir] Make MLIRContext::getOrLoadDialect(StringRef, TypeID, ...) public

Having this function in a public scope is helpful to register dialects that are
defined at runtime, and thus that need a runtime-defined TypeID.

Also, a similar function in DialectRegistry, insert(TypeID, StringRef, ...), has
a public scope.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D95091
The file was modifiedmlir/include/mlir/IR/MLIRContext.h
Commit 825c2b4a41c7df935dc12fdfab9879b98c744e1e by riddleriver
[mlir][OpFormatGen] Fix incorrect kind used for RegionsDirective

I attempted to write a test case for this, but the situations in which the kind is used for RegionDirective and ResultsDirective have zero overlap; meaning that there isn't a situation in which sharing the kind creates a conflict.

Differential Revision: https://reviews.llvm.org/D94988
The file was modifiedmlir/tools/mlir-tblgen/OpFormatGen.cpp
Commit 96296d9220ee5193f6ad7ff181d42c10d9f3c7e3 by carrot
[DAGCombiner] Precommit test case for D95086

This is the test case for D95086 with worse result.

Differential Revision: https://reviews.llvm.org/D95103
The file was addedllvm/test/CodeGen/X86/select-ext.ll
Commit 3809e5dac965e7c25f3c286884a7af6e48946865 by tianshilei1992
[Clang][OpenMP] Use `clang_cc1` test for `declare_target_device_only_compilation.cpp`

Use `clang_cc1` test for `declare_target_device_only_compilation.cpp`

Reviewed By: echristo

Differential Revision: https://reviews.llvm.org/D95089
The file was modifiedclang/test/OpenMP/declare_target_device_only_compilation.cpp
Commit 34e8fcf63f823ebc5a36166c12c01c3a49deea0b by jezng
[lld-macho] Add dependency on ObjCARC to fix shared build
The file was modifiedlld/MachO/CMakeLists.txt
Commit bff389120fa2368d123612449c938958cfd7f45e by jingham
Fix a bug with setting breakpoints on C++11 inline initialization statements.

If they occurred before the constructor that used them, we would refuse to
set the breakpoint because we thought they were crossing function boundaries.

Differential Revision: https://reviews.llvm.org/D94846
The file was addedlldb/test/API/lang/cpp/break-on-initializers/TestBreakOnCPP11Initializers.py
The file was addedlldb/test/API/lang/cpp/break-on-initializers/Makefile
The file was addedlldb/test/API/lang/cpp/break-on-initializers/main.cpp
The file was modifiedlldb/source/Breakpoint/BreakpointResolverFileLine.cpp
Commit f86db34defc323135106dc12e9fa888003cdcbd7 by jianzhouzh
[MSan] Move origins for overlapped memory transfer

Reviewed-by: eugenis

Differential Revision: https://reviews.llvm.org/D94572
The file was modifiedcompiler-rt/lib/msan/msan_poisoning.cpp
The file was addedcompiler-rt/test/msan/chained_origin_memmove.cpp
Commit 98feb08e449f179c3c5ccc6878c31cf16c160b06 by jingham
Use CXX_SOURCES and point to the right source file.

Copy paste error, but the test still built on macOS.  Weird.
It failed on debian linux with an error about -fno-limit-debug-info
not being a supported flag???  Not sure how this goof would cause
that error, but let's see if it did...
The file was modifiedlldb/test/API/lang/cpp/break-on-initializers/Makefile
Commit f354b87df23799ee0b6c718894140c846eafc82d by Jonas Devlieghere
[dsymutil] Compare object modification times using second precision

The modification time in the debug map is expressed using second
precision, while the modification time returned by the filesystem could
be more precise. Avoid spurious warnings about timestamp mismatches by
truncating the modification time reported by the system to seconds.
The file was modifiedllvm/tools/dsymutil/BinaryHolder.cpp
Commit 6cab3f88ee4dbc59c8c5abb70490fea3f3f6d46c by craig.topper
[RISCV] Use update_llc_test_checks.py to regenerate check lines in vleff-rv32.ll and vleff-rv64.ll.

This should minimize change in a future patch.
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll
Commit baf6c2987e576e319857c586120e98e917d8b47f by Jonas Devlieghere
[lldb] Upstream eCore_arm_arm64e enum value in ArchSpec

Upstream the eCore_arm_arm64e enum value in ArchSpec. All the other
arm64e triple changes already landed in LLVM.

Differential revision: https://reviews.llvm.org/D95110
The file was modifiedlldb/include/lldb/Utility/ArchSpec.h
The file was modifiedlldb/source/Utility/ArchSpec.cpp
Commit 47228f785460cdd8f642c42876d394198d6b90c3 by kai.wang
[RISCV] Implement vsseg intrinsics.

Define vsseg intrinsics and pseudo instructions. Lower vsseg intrinsics
to pseudo instructions in RISCVDAGToDAGISel.

Differential Revision: https://reviews.llvm.org/D94688
The file was addedllvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
The file was addedllvm/test/CodeGen/RISCV/rvv/vsseg-rv32.ll
Commit e5e329023bb119631e7a756b47598cb0ce9cea5f by kai.wang
[RISCV] Implement vlsseg intrinsics.

Define vlsseg intrinsics and pseudo instructions. Lower vlsseg intrinsics
to pseudo instructions in RISCVDAGToDAGISel.

Differential Revision: https://reviews.llvm.org/D94763
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
The file was addedllvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll
Commit a8b96eadfd93f1641c72c378e33af636f463ab02 by kai.wang
[RISCV] Implement vssseg intrinsics.

Define vlsseg intrinsics and pseudo instructions. Lower vlsseg
intrinsics to pseudo instructions in RISCVDAGToDAGISel.

Differential Revision: https://reviews.llvm.org/D94863
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
The file was addedllvm/test/CodeGen/RISCV/rvv/vssseg-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
The file was addedllvm/test/CodeGen/RISCV/rvv/vssseg-rv32.ll
Commit d6bb96e677759375b2bea00115918b2cb6552f5b by mkazantsev
[X86] Add experimental option to separately tune alignment of innermost loops

We already have an experimental option to tune loop alignment. Its impact
is very wide (and there is a suspicion that it's not always profitable). We want
to have something more narrow to play with. This patch adds similar option that
overrides preferred alignment for innermost loops. This is for experimental
purposes, default values do not change the existing behavior.

Differential Revision: https://reviews.llvm.org/D94895
Reviewed By: pengfei
The file was addedllvm/test/CodeGen/X86/innermost-loop-alignment.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.h
Commit 8f5da41c4d1f4468e39e97996421083542cb5915 by kazu
[llvm] Construct SmallVector with iterator ranges (NFC)
The file was modifiedllvm/lib/Transforms/Utils/CallPromotionUtils.cpp
The file was modifiedllvm/lib/Transforms/Utils/GuardUtils.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
The file was modifiedllvm/lib/Transforms/Scalar/NaryReassociate.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
The file was modifiedllvm/lib/Transforms/Utils/CodeExtractor.cpp
Commit e53472de688627c749330398063b9b7f7c8b6066 by kazu
[Transforms] Use llvm::append_range (NFC)
The file was modifiedllvm/lib/Transforms/Utils/FixIrreducible.cpp
The file was modifiedllvm/lib/Transforms/Scalar/GVNSink.cpp
The file was modifiedllvm/lib/Transforms/Utils/CloneFunction.cpp
The file was modifiedllvm/lib/Transforms/Utils/LoopSimplify.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
The file was modifiedllvm/lib/Transforms/Utils/SSAUpdater.cpp
The file was modifiedllvm/lib/Transforms/IPO/GlobalOpt.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
The file was modifiedllvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
The file was modifiedllvm/lib/Transforms/Scalar/GVN.cpp
The file was modifiedllvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
Commit 6de4865545da73687dd6d28d153cd345ed5e7918 by kazu
[llvm] Use hasSingleElement (NFC)
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAGNodes.h
The file was modifiedllvm/include/llvm/CodeGen/MachineRegisterInfo.h
The file was modifiedllvm/lib/CodeGen/MachineRegisterInfo.cpp
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFUnit.cpp
The file was modifiedllvm/include/llvm/IR/Value.h
Commit dd8ae42674b494e46ec40a22f40068db2b4a8b60 by Madhur.Amilkanthwar
[IndirectFunctions] Skip propagating attributes to address taken functions

In case of indirect calls or address taken functions,
skip propagating any attributes to them. We just
propagate features to such functions.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D94585
The file was addedllvm/test/CodeGen/AMDGPU/propagate-attributes-common-callees.ll
The file was addedllvm/test/CodeGen/AMDGPU/propagate-attributes-direct-indirect-common-callee.ll
The file was addedllvm/test/CodeGen/AMDGPU/propagate-attributes-indirect.ll
The file was addedllvm/test/CodeGen/AMDGPU/propagate-attributes-direct-indirect.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPropagateAttributes.cpp
Commit 51f4958057d6c246e85c3fbc65353bc0d7c1049b by grimar
[yaml2obj/obj2yaml] - Improve dumping/creating of ELF versioning sections.

This makes the following improvements.

For `SHT_GNU_versym`:
* yaml2obj: set `sh_link` to index of `.dynsym` section automatically.
For `SHT_GNU_verdef`:
* yaml2obj: set `sh_link` to index of `.dynstr` section automatically.
* yaml2obj: set `sh_info` field automatically.
* obj2yaml: don't dump the `Info` field when its value matches the number of version definitions.
For `SHT_GNU_verneed`:
* yaml2obj: set `sh_link` to index of `.dynstr` section automatically.
* yaml2obj: set `sh_info` field automatically.
* obj2yaml: don't dump the `Info` field when its value matches the number of version dependencies.

Also, simplifies few test cases.

Differential revision: https://reviews.llvm.org/D94956
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp
The file was modifiedllvm/test/tools/yaml2obj/ELF/versym-section.yaml
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was modifiedllvm/test/Object/invalid.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/versioninfo.test
The file was modifiedllvm/test/tools/llvm-objdump/ELF/verdef.test
The file was modifiedllvm/test/tools/llvm-objdump/ELF/verneed.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/hidden-versym.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/merged.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/versym-invalid.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/dyn-symbols.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/all.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/verdef-invalid.test
The file was modifiedllvm/test/tools/obj2yaml/ELF/verdef-section.yaml
The file was modifiedllvm/test/tools/llvm-readobj/ELF/section-types.test
The file was modifiedllvm/test/tools/yaml2obj/ELF/override-shname.yaml
The file was modifiedllvm/test/tools/llvm-readobj/ELF/verneed-flags.yaml
The file was modifiedlld/test/ELF/invalid/verneed-shared.test
The file was modifiedllvm/include/llvm/ObjectYAML/ELFYAML.h
The file was modifiedllvm/test/tools/yaml2obj/ELF/verneed-section.yaml
The file was modifiedllvm/test/tools/obj2yaml/ELF/verneed-section.yaml
The file was modifiedllvm/test/tools/yaml2obj/ELF/override-shsize.yaml
The file was modifiedllvm/test/tools/yaml2obj/ELF/verdef-section.yaml
The file was modifiedllvm/test/tools/yaml2obj/ELF/override-shoffset.yaml
The file was modifiedllvm/test/tools/llvm-readobj/ELF/reloc-symbol-with-versioning.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/verneed-invalid.test
The file was modifiedllvm/test/tools/yaml2obj/ELF/override-shtype.yaml
The file was modifiedllvm/tools/obj2yaml/elf2yaml.cpp
Commit 20013d02f3352a88d0838eed349abc9a2b0e9cc0 by yuanke.luo
[X86][AMX] Fix tile config register spill issue.

Previous code build the model that tile config register is the user of
each AMX instruction. There is a problem for the tile config register
spill. When across function, the ldtilecfg instruction may be inserted
on each AMX instruction which use tile config register. This cause all
tile data register clobber.
To fix this issue, we remove the model of tile config register. We
analyze the regmask of call instruction and insert ldtilecfg if there is
any tile data register live across the call. Inserting the sttilecfg
before the call is unneccessary, because the tile config doesn't change
and we can just reload the config.
Besides we also need check tile config register interference. Since we
don't model the config register we should check interference from the
ldtilecfg to each tile data register def.
             ldtilecfg
             /       \
            BB1      BB2
            /         \
           call       BB3
           /           \
       %1=tileload   %2=tilezero
We can start from the instruction of each tile def, and backward to
ldtilecfg. If there is any call instruction, and tile data register is
not preserved, we should insert ldtilecfg after the call instruction.

Differential Revision: https://reviews.llvm.org/D94155
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-across-func.ll
The file was modifiedllvm/lib/Target/X86/X86InstrAMX.td
The file was modifiedllvm/lib/CodeGen/LiveIntervals.cpp
The file was modifiedllvm/test/CodeGen/X86/opt-pipeline.ll
The file was modifiedllvm/lib/Target/X86/X86TileConfig.cpp
The file was modifiedllvm/include/llvm/CodeGen/LiveIntervals.h
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
The file was modifiedllvm/lib/Target/X86/X86ExpandPseudo.cpp
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86PreTileConfig.cpp
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/X86/X86RegisterInfo.td
The file was addedllvm/test/CodeGen/X86/AMX/amx-ldtilecfg-insert.ll
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-bf16-intrinsics.ll
Commit dd5c98280473a7f74c5e5a715839e4938b46a69c by grimar
[llvm-nm][ELF] - Make -D display symbol versions.

This fixes https://bugs.llvm.org/show_bug.cgi?id=48670.

Since binutils 2.35, nm -D displays symbol versions by default.
This patch teaches llvm-nm to do the same.

Differential revision: https://reviews.llvm.org/D94907
The file was modifiedllvm/tools/llvm-nm/llvm-nm.cpp
The file was modifiedllvm/test/tools/llvm-nm/dynamic.test
Commit 71635ea5ffd62a7de91c759c0dfb7bb40c16fd94 by i
MCDwarf: Delete uneeded parameter

And change signature
The file was modifiedllvm/include/llvm/MC/MCDwarf.h
The file was modifiedllvm/lib/MC/MCDwarf.cpp
The file was modifiedllvm/lib/MC/MCAssembler.cpp
Commit fc58bfd02f8d27e610500db53b268157cce0637b by pifon
[mlir] Remove complex ops from Standard dialect.

`complex` dialect should be used instead.
https://llvm.discourse.group/t/rfc-split-the-complex-dialect-from-std/2496/2

Differential Revision: https://reviews.llvm.org/D95077
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir
The file was modifiedmlir/test/IR/invalid-ops.mlir
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
The file was modifiedmlir/test/IR/core-ops.mlir
The file was modifiedmlir/include/mlir/Dialect/StandardOps/EDSC/Intrinsics.h
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
Commit bee486851c1a72899bd3c0f9b38249bbe5c38951 by flo
[LoopUnswitch] Implement first version of partial unswitching.

This patch applies the idea from D93734 to LoopUnswitch.

It adds support for unswitching on conditions that are only
invariant along certain paths through a loop.

In particular, it targets conditions in the loop header that
depend on values loaded from memory. If either path from
the true or false successor through the loop does not modify
memory, perform partial loop unswitching.

That is, duplicate the instructions feeding the condition in the pre-header.
Then unswitch on the duplicated condition. The condition is now known
in the unswitched version for the 'invariant' path through the original loop.

On caveat of this approach is that one of the loops created can be partially
unswitched again. To avoid this behavior, `llvm.loop.unswitch.partial.disable`
metadata is added to the unswitched loops, to avoid subsequent partial
unswitching.

If that's the approach to go, I can move the code handling the metadata kind
into separate functions.

This increases the cases we unswitch quite a bit in SPEC2006/SPEC2000 &
MultiSource. It also allows us to eliminate a dead loop in SPEC2017's omnetpp

```
Tests: 236
Same hash: 170 (filtered out)
Remaining: 66
Metric: loop-unswitch.NumBranches

Program                                        base   patch  diff
test-suite...000/255.vortex/255.vortex.test     2.00  23.00 1050.0%
test-suite...T2006/401.bzip2/401.bzip2.test     7.00  55.00 685.7%
test-suite :: External/Nurbs/nurbs.test         5.00  26.00 420.0%
test-suite...s-C/unix-smail/unix-smail.test     1.00   3.00 200.0%
test-suite.../Prolangs-C++/ocean/ocean.test     1.00   3.00 200.0%
test-suite...tions/lambda-0.1.3/lambda.test     1.00   3.00 200.0%
test-suite...yApps-C++/PENNANT/PENNANT.test     2.00   5.00 150.0%
test-suite...marks/Ptrdist/yacr2/yacr2.test     1.00   2.00 100.0%
test-suite...lications/viterbi/viterbi.test     1.00   2.00 100.0%
test-suite...plications/d/make_dparser.test    12.00  24.00 100.0%
test-suite...CFP2006/433.milc/433.milc.test    14.00  27.00 92.9%
test-suite.../Applications/lemon/lemon.test     7.00  12.00 71.4%
test-suite...ce/Applications/Burg/burg.test     6.00  10.00 66.7%
test-suite...T2006/473.astar/473.astar.test    16.00  26.00 62.5%
test-suite...marks/7zip/7zip-benchmark.test    78.00 121.00 55.1%
```

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D93764
The file was modifiedllvm/test/Transforms/LoopUnswitch/partial-unswitch.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopUnswitch.cpp
The file was addedllvm/test/Transforms/LoopUnswitch/partial-unswitch-mssa-threshold.ll
Commit facea4a2d4fa543da2241fb4268c34e9c019fca6 by hokein.wu
[clangd] Fix a missing override keyword, NFC.
The file was modifiedclang-tools-extra/clangd/index/remote/Client.cpp
Commit 64132f541edd82bffebbd5521e620219743a42eb by yuanke.luo
Revert "[X86][AMX] Fix tile config register spill issue."

This reverts commit 20013d02f3352a88d0838eed349abc9a2b0e9cc0.
The file was removedllvm/test/CodeGen/X86/AMX/amx-ldtilecfg-insert.ll
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86ExpandPseudo.cpp
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-bf16-intrinsics.ll
The file was modifiedllvm/test/CodeGen/X86/opt-pipeline.ll
The file was modifiedllvm/lib/Target/X86/X86TileConfig.cpp
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86InstrAMX.td
The file was modifiedllvm/lib/CodeGen/LiveIntervals.cpp
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
The file was modifiedllvm/lib/Target/X86/X86RegisterInfo.td
The file was modifiedllvm/include/llvm/CodeGen/LiveIntervals.h
The file was modifiedllvm/lib/Target/X86/X86PreTileConfig.cpp
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-across-func.ll