FailedChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [clangd] Add support for inline parameter hints (details)
  2. [gn build] Port cbc9c4ea90e1 (details)
  3. Revert "Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper  Differential Revision : https://reviews.llvm.org/D100115" (details)
  4. [LLD] Implement /guard:[no]ehcont (details)
  5. [NFC] Fix unused warning. (details)
  6. [clang] Fix copy constructor of CompilerInvocation (details)
  7. [clang-tidy] Add new check 'bugprone-unhandled-exception-at-new'. (details)
  8. [GreedyRA ORE] Separate Folder Reloads and Zero Cost Folder Reloads (details)
  9. [gn build] Port 530456caf908 (details)
  10. [mlir] Change verification order to prevent null dereference (details)
  11. [NFC] Fix unused variable warning. (details)
  12. [clang-tidy] Add exception flag to bugprone-unhandled-exception-at-new test. (details)
  13. [i386] Modify the alignment of __m128/__m256/__m512 vector type according i386 abi. (details)
  14. [lldb] Silence GCC warnings about control reaching the end of non-void functions. NFC. (details)
  15. [AArch64] [COFF] Properly produce cross-section relative relocations (details)
  16. [ARM] [COFF] Properly produce cross-section relative relocations (details)
  17. [lit] Always quote arguments containing '[' on windows (details)
  18. [PowerPC] Fix incorrect subreg typo from 0148bf53f0a0 (details)
  19. [X86][SSE] combineSetCCMOVMSK - allow comparison with upper (known zero) bits in MOVMSK(SHUFFLE(X,u)) -> MOVMSK(X) fold (details)
  20. [X86] Regenerate PR32284.ll test case prefixes. NFC. (details)
  21. [X86] Fold cmpeq/ne(trunc(x),0) --> cmpeq/ne(x,0) (details)
  22. [InstCombine] tmp alloca bypass: ensure that the replacement dominates all alloca uses (details)
  23. [Passes] Enable the relative lookup table converter pass on aarch64 (details)
  24. SDAG: constant fold bf16 -> i16 casts (details)
  25. [lldb][AArch64] Simplify MTE memory region test (details)
  26. [clang] [AArch64] Fix Windows va_arg handling for larger structs (details)
  27. [ValueTracking] add unit test for isKnownNonZero(); NFC (details)
  28. [lit] Remove unnecessary testcases from lit-quoting.txt that fail on macOS (details)
  29. [AIX] Allow safe for 32bit P8 VSX pattern matching (details)
  30. [Test] Account for possibility to free memory in loop load PRE test (details)
  31. [ValueTracking] reduce code duplication; NFC (details)
  32. [AMDGPU] Mark scavenged SGPR as used (details)
  33. [OpenMP] Fix printing routine for OMP_TOOL_VERBOSE_INIT (details)
  34. [OpenCL][Docs] Update OpenCL 3.0 implementation status (details)
  35. [ValueTracking] match negative-stepping non-zero recurrence (details)
  36. [InstSimplify] improve efficiency for detecting non-zero value (details)
  37. CPUDispatch- allow out of line member definitions (details)
  38. [llvm-symbolizer] remove unused variable (details)
  39. [SCCP] Create SCCP Solver (details)
  40. [gn build] Port bbab9f986c6d (details)
  41. [mlir][StandardToSPIRV] Add support for lowering memref<?xi1> to SPIR-V (details)
  42. [AArch64][v8.5A] Add BTI to all function starts (details)
  43. [SLP] createOp - fix null dereference warning. NFCI. (details)
  44. [X86][SSE] canonicalizeShuffleWithBinOps - check for more combos of merge-able binary shuffles. (details)
  45. [AMDGPU] Rename "LDS lowering" pass name. (details)
  46. [Instcombine] Disable memcpy of alloca bypass for instruction sources (details)
  47. [X86] Add PR49028 test case (details)
  48. Add flag for showing skipped headers in -H / --show-includes output (details)
  49. clang-format: [JS] merge import lines. (details)
  50. review comments (details)
  51. [mlir][linalg] update fusion to support linalg index operations. (details)
  52. [arm][compiler-rt] add armv8m.main and arv8.1m.main targets (details)
  53. [SCCP] Follow up of rGbbab9f986c6d. NFC. (details)
  54. [libc++] Make chars_format a bitmask type. (details)
  55. [WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops (details)
  56. [TTI] NFC: Change getCallInstrCost to return InstructionCost (details)
  57. [TTI] NFC: Change getCFInstrCost to return InstructionCost (details)
  58. [TTI] NFC: Change getShuffleCost to return InstructionCost (details)
  59. [TTI] NFC: Change getVectorInstrCost to return InstructionCost (details)
  60. [TTI] NFC: Change getFPOpCost to return InstructionCost (details)
  61. [TTI] NFC: Change getArithmeticInstrCost to return InstructionCost (details)
  62. [flang] Handle END= situations better in runtime input (details)
  63. [AMDGPU] Factor out SelectSAddrFI() (details)
  64. [ValueTracking] Add additional non-zero add recurrence test (NFC) (details)
  65. [ValueTracking] Don't require non-zero step for add nuw (details)
  66. Remove deprecated member functions (NFC) (details)
  67. [SLP]Added a tests for shuffled matched tree entries, NFC. (details)
  68. Refactor the architecture of mlir-reduce (details)
  69. [flang] Fix Boolean flag arguments (details)
Commit cbc9c4ea90e17980b7b65966f4bbdba26a395e45 by zeratul976
[clangd] Add support for inline parameter hints

Differential Revision: https://reviews.llvm.org/D98748
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.cpp
The file was modifiedclang-tools-extra/clangd/test/initialize-params.test
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp
The file was modifiedclang-tools-extra/clangd/Protocol.h
The file was addedclang-tools-extra/clangd/InlayHints.h
The file was addedclang-tools-extra/clangd/InlayHints.cpp
The file was addedclang-tools-extra/clangd/unittests/InlayHintTests.cpp
The file was modifiedclang-tools-extra/clangd/CMakeLists.txt
The file was modifiedclang-tools-extra/clangd/ClangdServer.h
The file was modifiedclang-tools-extra/clangd/XRefs.cpp
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.h
The file was modifiedclang-tools-extra/clangd/Protocol.cpp
The file was modifiedclang-tools-extra/clangd/unittests/CMakeLists.txt
Commit 905292067653cecf80475287a82ddb0cc36e03d9 by llvmgnsyncbot
[gn build] Port cbc9c4ea90e1
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
Commit e1e2c9d40460db6eb25e772839c08003a89d0a6c by harald
Revert "Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper  Differential Revision : https://reviews.llvm.org/D100115"

This reverts commit 4d9ccb18f50803a1aa9c0332dc72472bdfec8bc4.
The file was added.clang-format
Commit 184377da5c7ce624adf09341360c6cf8f31ebe8f by pengfei.wang
[LLD] Implement /guard:[no]ehcont

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D99078
The file was modifiedllvm/include/llvm/Object/COFF.h
The file was modifiedlld/COFF/DriverUtils.cpp
The file was modifiedlld/test/COFF/guardcf-lto.ll
The file was modifiedllvm/tools/llvm-readobj/COFFDumper.cpp
The file was modifiedlld/COFF/Driver.cpp
The file was modifiedlld/test/COFF/gfids-icf.s
The file was modifiedlld/test/COFF/gfids-corrupt.s
The file was modifiedlld/test/COFF/giats.s
The file was modifiedlld/test/COFF/guard-longjmp.s
The file was modifiedlld/COFF/Config.h
The file was modifiedlld/COFF/InputFiles.cpp
The file was modifiedlld/COFF/InputFiles.h
The file was modifiedlld/COFF/Chunks.cpp
The file was modifiedlld/COFF/Chunks.h
The file was modifiedlld/test/COFF/gfids-gc.s
The file was modifiedlld/COFF/Writer.cpp
The file was addedlld/test/COFF/guard-ehcont.s
The file was modifiedlld/test/COFF/gfids-fallback.s
Commit 0acf4e500529447ba34b8d9152630c8535d17949 by kadircet
[NFC] Fix unused warning.

Differential Revision: https://reviews.llvm.org/D100449
The file was modifiedllvm/lib/Target/X86/X86TileConfig.cpp
Commit 09d1f6e6b74c9330d80c0346a271a43efbe0384d by Jan Svoboda
[clang] Fix copy constructor of CompilerInvocation

The `CompilerInvocationBase` class factors out members of `CompilerInvocation` that need special handling (initialization or copy constructor), so that `CompilerInvocation` can be implemented as a simple value object.

Currently, the `AnalyzerOpts` member of `CompilerInvocation` violates that setup. This patch extracts the member to `CompilerInvocationBase` and handles it in the copy constructor the same way other it handles other members.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D99568
The file was modifiedclang/include/clang/Frontend/CompilerInvocation.h
The file was modifiedclang/unittests/Frontend/CompilerInvocationTest.cpp
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
Commit 530456caf9088b8eb237c0ab75086722ce0f2950 by 1.int32
[clang-tidy] Add new check 'bugprone-unhandled-exception-at-new'.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D97196
The file was modifiedclang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
The file was addedclang-tools-extra/clang-tidy/bugprone/UnhandledExceptionAtNewCheck.h
The file was addedclang-tools-extra/clang-tidy/bugprone/UnhandledExceptionAtNewCheck.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-unhandled-exception-at-new.cpp
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst
The file was addedclang-tools-extra/docs/clang-tidy/checks/bugprone-unhandled-exception-at-new.rst
The file was modifiedclang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
Commit cf0d3477aaf5c1d1b11685b852863006fb2d8d9d by serguei.katkov
[GreedyRA ORE] Separate Folder Reloads and Zero Cost Folder Reloads

Patchpoint instructions have operands which is actually zero cost
(or the same as register) to use the value from the stack.
In terms of statistic it makes same to separate them.

Move from computation instructions related to stack spill/reload to
number of stack slot referenced.

Reviewers: reames, MatzeB, anemet, thegameg
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D100016
The file was modifiedllvm/lib/CodeGen/RegAllocGreedy.cpp
The file was modifiedllvm/test/CodeGen/X86/statepoint-ra.ll
Commit 096857426e2f22a697f75bb787d08a047132507b by llvmgnsyncbot
[gn build] Port 530456caf908
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
Commit d80178f7c1122469b539f0be3c57c3ee60eaedde by tpopp
[mlir] Change verification order to prevent null dereference

Differential Revision: https://reviews.llvm.org/D100390
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
Commit 7975dd033cb950934b70bd56313fa11a9096e115 by kadircet
[NFC] Fix unused variable warning.

Differential Revision: https://reviews.llvm.org/D100451
The file was modifiedlld/COFF/Chunks.cpp
Commit bda20282cb94faa97b2e50cb592eff3dec94f6b0 by 1.int32
[clang-tidy] Add exception flag to bugprone-unhandled-exception-at-new test.
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/bugprone-unhandled-exception-at-new.cpp
Commit 1c4108ab661d43e21b1d1c804d8a403e5b0cf7d6 by chen3.liu
[i386] Modify the alignment of __m128/__m256/__m512 vector type according i386 abi.

According to i386 System V ABI:

1. when __m256 are required to be passed on the stack, the stack pointer must be aligned on a 0 mod 32 byte boundary at the time of the call.
2. when __m512 are required to be passed on the stack, the stack pointer must be aligned on a 0 mod 64 byte boundary at the time of the call.

The current method of clang passing __m512 parameter are as follow:

1. when target supports avx512, passing it with 64 byte alignment;
2. when target supports avx, passing it with 32 byte alignment;
3. Otherwise, passing it with 16 byte alignment.

Passing __m256 parameter are as follow:

1. when target supports avx or avx512, passing it with 32 byte alignment;
2. Otherwise, passing it with 16 byte alignment.

This pach will passing __m128/__m256/__m512 following i386 System V ABI and
apply it to Linux only since other System V OS (e.g Darwin, PS4 and FreeBSD) don't
want to spend any effort dealing with the ramifications of ABI breaks at present.

Differential Revision: https://reviews.llvm.org/D78564
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
The file was addedclang/test/CodeGen/x86_32-align-linux.c
Commit 127322ddebde9c3a0b1cd5cdc81b36870606b4f6 by martin
[lldb] Silence GCC warnings about control reaching the end of non-void functions. NFC.

Also remove a superfluous semicolon after the braces for a switch
statement (that wasn't warned about).

Differential Revision: https://reviews.llvm.org/D100447
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
Commit d5c5cf5ce8d921fc8c5e1b608c298a1ffa688d37 by martin
[AArch64] [COFF] Properly produce cross-section relative relocations

This fixes breakage on Windows/ARM64 after D94355.

Modelled after the corresponding code for X86; not entirely familiar
with those aspects of that layer otherwise.

Differential Revision: https://reviews.llvm.org/D99572
The file was modifiedllvm/test/MC/AArch64/coff-relocations.s
The file was modifiedllvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
The file was modifiedllvm/test/MC/AArch64/coff-relocations-diags.s
Commit 3b32dc4b84c8eaa0de337d6847c2c4cdbfcb4333 by martin
[ARM] [COFF] Properly produce cross-section relative relocations

Differential Revision: https://reviews.llvm.org/D99574
The file was modifiedllvm/test/MC/ARM/coff-relocations.s
The file was modifiedllvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp
Commit 37935405efbebc4bd9f1ffac9152571c6a8469dc by martin
[lit] Always quote arguments containing '[' on windows

This avoids breaking clang-tidy/infrastructure/validate-check-names.cpp
if 'not' is evaluated as a lit internal tool (making TestRunner
invoke 'grep' directly in that test, instead of invoking 'not', which
then invokes 'grep').

The quoting of arguments is still brittle if the executable is an
MSYS based tool though, as MSYS based tools incorrectly unescape
backslashes in quoted arguments (contrary to regular win32 argument
parsing rules), see D99406 and
https://github.com/msys2/msys2-runtime/issues/36 for more examples
of the issues.

Differential Revision: https://reviews.llvm.org/D99938
The file was modifiedllvm/utils/lit/lit/TestRunner.py
The file was modifiedllvm/test/Other/lit-quoting.txt
Commit 8be3181df6f13544d97c1e263a91aa376a760c99 by nemanja.i.ibm
[PowerPC] Fix incorrect subreg typo from 0148bf53f0a0
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrVSX.td
Commit 016ceb838231a717e889f7ceb38c56575e82aead by llvm-dev
[X86][SSE] combineSetCCMOVMSK - allow comparison with upper (known zero) bits in MOVMSK(SHUFFLE(X,u)) -> MOVMSK(X) fold

Extension to rG74f98391a7a4, we can also include any of the upper (known zero) bits in the comparison in the shuffle removal fold, just as long as we demand all the elements of the movmsk source vector.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 62af2af85daf79471c15a23f1b4f81a83a8bdd19 by llvm-dev
[X86] Regenerate PR32284.ll test case prefixes. NFC.

Use X64 for 64-bit targets and X86 for 32-bit targets
The file was modifiedllvm/test/CodeGen/X86/pr32284.ll
Commit 73737fe9900dae6a7e766043477d646b43d7f284 by llvm-dev
[X86] Fold cmpeq/ne(trunc(x),0) --> cmpeq/ne(x,0)

Relax the fold from rGbaadbe04bf75 to compare any op, not just logic ops, now that the movmsk regressions have been handled.
The file was modifiedllvm/test/CodeGen/X86/movmsk-cmp.ll
The file was modifiedllvm/test/CodeGen/X86/pr32284.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-compare-any_of.ll
The file was modifiedllvm/test/CodeGen/X86/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-or-bool.ll
The file was modifiedllvm/test/CodeGen/X86/setcc-lowering.ll
The file was modifiedllvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
The file was modifiedllvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
Commit 2fea5d5d4accf3490854b064a51d1db049b1de64 by lebedev.ri
[InstCombine] tmp alloca bypass: ensure that the replacement dominates all alloca uses

After 077bff39d46364035a5dcfa32fc69910ad0975d0,
isDereferenceableForAllocaSize() can recurse into selects,
which is causing a problem for the new test case,
reduced from https://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20210412/904154.html
because the replacement (the select) is defined after the first use
of an alloca, so we'd end up with a verifier error.

Now, this new check is too restrictive.
We likely can handle *some* cases, by trying to sink all uses of an alloca
to after the the def.
The file was addedllvm/test/Transforms/InstCombine/tmp-alloca-bypass.ll
The file was modifiedllvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
Commit 57b259a852a6383880f5d0875d848420bb3c2945 by martin
[Passes] Enable the relative lookup table converter pass on aarch64

After d5c5cf5ce8d921fc8c5e1b608c298a1ffa688d37, it should work fine
for aarch64 on COFF too. (It was disabled when the patch was
(re)applied in e96df3e531f506eea75da0f13d0f8aa9a267f975, pending
that fix.)
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
Commit 6401b78ab3cf18cb5f0821f9bd52063af0d7ce35 by Tim Northover
SDAG: constant fold bf16 -> i16 casts

This direction is particularly useful because i16 constants are much more
likely to be legal than bf16.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/test/CodeGen/AArch64/bf16.ll
Commit 6cdc2239dbabeb6fb8a9f933693f744a60d50a8c by david.spickett
[lldb][AArch64] Simplify MTE memory region test

By checking for cpu and toolchain features ahead
of time we don't need the custom return codes.

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D97684
The file was modifiedlldb/packages/Python/lldbsuite/test/decorators.py
The file was modifiedlldb/test/API/linux/aarch64/mte_memory_region/TestAArch64LinuxMTEMemoryRegion.py
The file was modifiedlldb/test/API/linux/aarch64/mte_memory_region/main.c
Commit 3637c5c8ec3d4dc0b87eb4e3ee9c9ae8816cade2 by martin
[clang] [AArch64] Fix Windows va_arg handling for larger structs

Aggregate types over 16 bytes are passed by reference.

Contrary to the x86_64 ABI, smaller structs with an odd (non power
of two) are padded and passed in registers.

Differential Revision: https://reviews.llvm.org/D100374
The file was modifiedclang/test/CodeGen/ms_abi_aarch64.c
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
Commit 989445f4386cdc1fce20eb4e418ed4b502819cc7 by spatel
[ValueTracking] add unit test for isKnownNonZero(); NFC

We call various value tracking APIs from within -instsimplify,
so I don't think this is visible in a larger test.
The file was modifiedllvm/unittests/Analysis/ValueTrackingTest.cpp
Commit 413d84fb5c6d18efc0c3f478071a11c7c3542fd0 by martin
[lit] Remove unnecessary testcases from lit-quoting.txt that fail on macOS

These were added in 37935405efbebc4bd9f1ffac9152571c6a8469dc,
but they fail on macOS (and on Windows with MSYS based tools, before
relanding D98859). Remove the tests that exercise "not not echo", as
the primary thing to test is the plain echo patterns above.
The file was modifiedllvm/test/Other/lit-quoting.txt
Commit 6b7838b68cc49621f3c92d8603f95e801d10f759 by zarko
[AIX] Allow safe for 32bit P8 VSX pattern matching

Pull some of the safe for 32bit pattern matching for Pwr8 and above.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D97909
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrVSX.td
The file was modifiedllvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
The file was modifiedllvm/test/CodeGen/PowerPC/cannonicalize-vector-shifts.ll
The file was addedllvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll
Commit d0920b201f7cb7494dff9334725e123283128c95 by mkazantsev
[Test] Account for possibility to free memory in loop load PRE test
The file was modifiedllvm/test/Transforms/GVN/PRE/pre-loop-load.ll
Commit 49193653974ae96b756b8ff13668d07d6252aa77 by spatel
[ValueTracking] reduce code duplication; NFC

The start value can't be null for something to be a non-zero
recurrence, so hoist that common check out of the switch.

Subsequent checks may be incomplete or over-specified as noted in:
D100408
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
Commit 929edd4375a40fcf264426ac4f2b3d8fa9c72970 by sebastian.neubauer
[AMDGPU] Mark scavenged SGPR as used

Otherwise it reuses the same register for storing the stack slot
offset if the stack slot offset is big.

Differential Revision: https://reviews.llvm.org/D100461
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sgpr-spill.mir
Commit 77dc7b465313345ab0a5929f6f0386dbcab6594c by hansang.bae
[OpenMP] Fix printing routine for OMP_TOOL_VERBOSE_INIT

Also fixed typo in the verbose message.

Differential Revision: https://reviews.llvm.org/D100414
The file was modifiedopenmp/runtime/src/ompt-general.cpp
The file was modifiedopenmp/runtime/test/ompt/loadtool/tool_available/tool_available.c
The file was modifiedopenmp/runtime/src/kmp_settings.cpp
Commit 856c49d79c0d717fb3e9ff6deebfe740a4f752e2 by sven.vanhaastregt
[OpenCL][Docs] Update OpenCL 3.0 implementation status

Reviewed-By: Anastasia Stulova
The file was modifiedclang/docs/OpenCLSupport.rst
Commit 5ae5d25e38efad1d59ed97d969a5e930b58a5e16 by spatel
[ValueTracking] match negative-stepping non-zero recurrence

This is pulled out of D100408.

This avoids a regression that would be exposed by making the
calling code from InstSimplify more efficient.
The file was modifiedllvm/unittests/Analysis/ValueTrackingTest.cpp
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
Commit 7ef2c68a3d24af0b0d540e748e8b564180f4e18a by spatel
[InstSimplify] improve efficiency for detecting non-zero value

Stepping through callstacks in the example from D99759 reveals
this potential compile-time improvement.

The savings come from avoiding ValueTracking's computing known
bits if we have already dealt with special-case patterns.

Further improvements in this direction seem possible.

This makes a degenerate test based on PR49785 about 40x faster
(25 sec -> 0.6 sec), but it does not address the larger question
of how to limit computeKnownBitsFromAssume(). Ie, the original
test there is still infinite-time for all practical purposes.

Differential Revision: https://reviews.llvm.org/D100408
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
Commit 92aba5ae49a6970c43bead0afd1e52c83fe44e6e by erich.keane
CPUDispatch- allow out of line member definitions

ICC permits this, and after some extensive testing it looks like we can
support this with very little trouble.  We intentionally don't choose to
do this with attribute-target (despite it likely working as well!)
  because GCC does not support that, and introducing said
  incompatibility doesn't seem worth it.
The file was modifiedclang/test/SemaCXX/attr-cpuspecific.cpp
The file was addedclang/test/CodeGenCXX/attr-cpuspecific-outoflinedefs.cpp
The file was modifiedclang/lib/Sema/SemaDecl.cpp
Commit 7a9cb801f3e71e8acca1598910c6dd19526942d8 by thakis
[llvm-symbolizer] remove unused variable

This should've been removed in D83530.

Differential Revision: https://reviews.llvm.org/D100434
The file was modifiedllvm/tools/llvm-symbolizer/llvm-symbolizer.cpp
Commit bbab9f986c6df8508eb64697923eb70ee17cb0f8 by sjoerd.meijer
[SCCP] Create SCCP Solver

This refactors SCCP and creates a SCCPSolver interface and class so that it can
be used by other passes and transformations. We will use this in D93838, which
adds a function specialisation pass.

This is based on an early version by Vinay Madhusudan.

Differential Revision: https://reviews.llvm.org/D93762
The file was addedllvm/include/llvm/Transforms/Utils/SCCPSolver.h
The file was modifiedllvm/lib/Transforms/Utils/CMakeLists.txt
The file was modifiedllvm/lib/Transforms/Scalar/SCCP.cpp
The file was modifiedllvm/include/llvm/Transforms/Scalar/SCCP.h
The file was addedllvm/lib/Transforms/Utils/SCCPSolver.cpp
Commit 34367dd2535c576d0fecbb803b38ada9918dc5e7 by llvmgnsyncbot
[gn build] Port bbab9f986c6d
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Commit 7c4de2e9b9b469b073e6f5f044977b23ac1b26c6 by hanchung
[mlir][StandardToSPIRV] Add support for lowering memref<?xi1> to SPIR-V

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D100452
The file was modifiedmlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
The file was modifiedmlir/test/Conversion/StandardToSPIRV/std-types-to-spirv.mlir
Commit cca40aa8d8aa732a226c8978e53cd47e7b7c76ec by pablo.barrio
[AArch64][v8.5A] Add BTI to all function starts

The existing BTI placement pass avoids inserting "BTI c" when the
function has local linkage and is only directly called. However,
even in this case, there is a (small) chance that the linker later
adds a hunk with an indirect call to the function, e.g. if the
function is placed in a separate section and moved far away from
its callers. Make sure to add BTI for these functions too.

Differential Revision: https://reviews.llvm.org/D99417
The file was modifiedllvm/lib/Target/AArch64/AArch64BranchTargets.cpp
The file was modifiedllvm/test/CodeGen/AArch64/branch-target-enforcement.mir
The file was modifiedllvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll
Commit b49c41afbaa212cc15343af68c3293ab929a2d34 by llvm-dev
[SLP] createOp - fix null dereference warning. NFCI.

Only attempt to propagateIRFlags if we have both SelectInst - afaict we shouldn't have matched a min/max reduction without both SelectInst, but static analyzer doesn't know that.
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 4fbe7615721863c57b4fd4334f361a5d4157e235 by llvm-dev
[X86][SSE] canonicalizeShuffleWithBinOps - check for more combos of merge-able binary shuffles.

In the fold SHUFFLE(BINOP(X,Y),BINOP(Z,W)) -> BINOP(SHUFFLE(X,Z),SHUFFLE(Y,W)), check if both X/Z AND Y/W have at least one merge-able shuffle in which case the total number of shuffle should still fall.

Helps with instruction count regressions we saw while fixing PR48823
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/haddsub-3.ll
Commit e3070db0f7049fdbd75955b3e68a3d2bc4936e48 by mahesha.comp
[AMDGPU] Rename "LDS lowering" pass name.

Rename the name of "LDS lowering" pass from `amdgpu-disable-lower-module-lds` to
`amdgpu-enable-lower-module-lds` as later is consistent and reads better.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D100441
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-non-entry-func.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/promote-alloca-to-lds-constantexpr-use.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-global-non-entry-func.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/addrspacecast-initializer-unsupported.ll
Commit cf4161673c7e7c7c57d8115468bfcc9988f43d36 by benny.kra
[Instcombine] Disable memcpy of alloca bypass for instruction sources

This transformation is fundamentally broken when it comes to dominance,
it just happened to work when the source of the memcpy can be moved into
the place of the alloca. The bug shows up a lot more often since
077bff39d46364035a5dcfa32fc69910ad0975d0 allows the source to be a
switch.

It would be possible to check dominance of the source and all its
operands, but that seems very heavy for instcombine.
The file was modifiedllvm/test/Transforms/InstCombine/tmp-alloca-bypass.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
Commit c4c9e4d6df3c492cf86728288b14a9bc718f6e2d by llvm-dev
[X86] Add PR49028 test case
The file was addedllvm/test/CodeGen/X86/pr49028.ll
Commit f29dcbdde10c86cfd89196fc2aa0e7f6ca3c9c4e by hans
Add flag for showing skipped headers in -H / --show-includes output

Consider the following set of files:

  a.cc:
  #include "a.h"

  a.h:
  #ifndef A_H
  #define A_H

  #include "b.h"
  #include "c.h"  // This gets "skipped".

  #endif

  b.h:
  #ifndef B_H
  #define B_H

  #include "c.h"

  #endif

  c.h:
  #ifndef C_H
  #define C_H

  void c();

  #endif

And the output of the -H option:

  $ clang -c -H a.cc
  . ./a.h
  .. ./b.h
  ... ./c.h

Note that the include of c.h in a.h is not shown in the output (GCC does the
same). This is because of the include guard optimization: clang knows c.h is
covered by an include guard which is already defined, so when it sees the
include in a.h, it skips it. The same would have happened if #pragma once were
used instead of include guards.

However, a.h *does* include c.h, and it may be useful to show that in the -H
output. This patch adds a flag for doing that.

Differential revision: https://reviews.llvm.org/D100480
The file was modifiedclang/include/clang/Frontend/DependencyOutputOptions.h
The file was modifiedclang/test/Frontend/Inputs/test.h
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/test/Frontend/Inputs/test2.h
The file was modifiedclang/lib/Frontend/HeaderIncludeGen.cpp
The file was modifiedclang/test/Frontend/print-header-includes.c
Commit d45df0d29f7005d3c25357f3982002eaf339f875 by martin
clang-format: [JS] merge import lines.

Multiple lines importing from the same URL can be merged:

    import {X} from 'a';
    import {Y} from 'a';

Merge to:

    import {X, Y} from 'a';

This change implements this merge operation. It takes care not to merge in
various corner case situations (default imports, star imports).

Differential Revision: https://reviews.llvm.org/D100466
The file was modifiedclang/lib/Format/SortJavaScriptImports.cpp
The file was modifiedclang/unittests/Format/SortImportsTestJS.cpp
Commit 4d195f1b4dd6e3978776d69f49840439933a2543 by martin
review comments

track symbol merge status in references to avoid excesive rewrites
The file was modifiedclang/lib/Format/SortJavaScriptImports.cpp
The file was modifiedclang/unittests/Format/SortImportsTestJS.cpp
Commit ce82843f72a7e3a40ebb3162a54de39c2b3ec2a4 by gysit
[mlir][linalg] update fusion to support linalg index operations.

The patch updates the linalg fusion pass to add the tile offsets to the indices.

Differential Revision: https://reviews.llvm.org/D100456
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
The file was modifiedmlir/test/Dialect/Linalg/fusion-indexed-generic.mlir
The file was modifiedmlir/test/lib/Transforms/TestLinalgFusionTransforms.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
Commit 3b9dc59dbfff913f4625ce3becebee11f3eb6e6f by ties.stuij
[arm][compiler-rt] add armv8m.main and arv8.1m.main targets

These changes were enough to compile compiler-rt builtins for armv8m.main and
armv8.1m.main.

Differential Revision: https://reviews.llvm.org/D99600
The file was modifiedcompiler-rt/cmake/builtin-config-ix.cmake
The file was modifiedcompiler-rt/lib/builtins/CMakeLists.txt
Commit 39d29817f37ed8f0969a9221f714711f2b390a50 by sjoerd.meijer
[SCCP] Follow up of rGbbab9f986c6d. NFC.

This addresses the linter messages, mainly the inconsistent capitalisation of
member functions.
The file was modifiedllvm/include/llvm/Transforms/Utils/SCCPSolver.h
The file was modifiedllvm/lib/Transforms/Scalar/SCCP.cpp
The file was modifiedllvm/lib/Transforms/Utils/SCCPSolver.cpp
Commit ac08e2bb98e6ecc6f56f553109b889abe3ee614e by koraq
[libc++] Make chars_format a bitmask type.

Some of Microsoft's unit tests in D70631 fail because libc++'s
implementation of std::chars_format isn't a proper bitmask type. Adding
the required functions to make std::chars_format a proper bitmask type.

Implements parts of P0067: Elementary string conversions

Differential Revision: https://reviews.llvm.org/D97115
The file was addedlibcxx/test/std/utilities/charconv/charconv.syn/chars_format.pass.cpp
The file was modifiedlibcxx/include/charconv
Commit af7ab81ce3104418b4971b2398c1e028238ed90f by tlively
[WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops

Now that these instructions are no longer prototypes, we do not need to be
careful about keeping them opt-in and can use the standard LLVM infrastructure
for them. This commit removes the bespoke intrinsics we were using to represent
these operations in favor of the corresponding target-independent intrinsics.
The clang builtins are preserved because there is no standard way to easily
represent these operations in C/C++.

For consistency with the scalar codegen in the Wasm backend, the intrinsic used
to represent {f32x4,f64x2}.nearest is @llvm.nearbyint even though
@llvm.roundeven better captures the semantics of the underlying Wasm
instruction. Replacing our use of @llvm.nearbyint with use of @llvm.roundeven is
left to a potential future patch.

Differential Revision: https://reviews.llvm.org/D100411
The file was modifiedclang/test/CodeGen/builtins-wasm.c
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-unsupported.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsWebAssembly.td
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
Commit 596f669cfbbf5d794442a60f84ae8b5f6ebf1f57 by sander.desmalen
[TTI] NFC: Change getCallInstrCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: c-rhodes

Differential Revision: https://reviews.llvm.org/D100312
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
Commit 14b934f8a6f2aeade5a512c5004ec88837f363f5 by sander.desmalen
[TTI] NFC: Change getCFInstrCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: samparker

Differential Revision: https://reviews.llvm.org/D100313
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
Commit 174e8f6c5e467d403272715c8649134f350ff2c7 by sander.desmalen
[TTI] NFC: Change getShuffleCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D100314
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
Commit 1af35e77f4b8c3314dc20a10d579b52f22c75a00 by sander.desmalen
[TTI] NFC: Change getVectorInstrCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D100315
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
Commit d84bd951a8d39436b0ca0cd3fa93cacef2f969f1 by sander.desmalen
[TTI] NFC: Change getFPOpCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: c-rhodes

Differential Revision: https://reviews.llvm.org/D100316
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
Commit 4f42d873c20291077f5a1ed37b102330d505f00d by sander.desmalen
[TTI] NFC: Change getArithmeticInstrCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D100317
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
The file was modifiedllvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/Lanai/LanaiTargetTransformInfo.h
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
Commit e81c96d6f8b1cc974f9dbdd47ed82be6be81ae0a by pklausler
[flang] Handle END= situations better in runtime input

Debug the input path for READ statements with END= labels;
don't emit errors when the program can handle them.
BeginReadingRecord() member functions have been made
"bool" for more convenient handling of error cases,
and some code in IoErrorHandler has been cleaned up.

Differential Revision: https://reviews.llvm.org/D100421
The file was modifiedflang/runtime/io-stmt.cpp
The file was modifiedflang/runtime/io-error.cpp
The file was modifiedflang/runtime/io-stmt.h
The file was modifiedflang/runtime/unit.cpp
The file was modifiedflang/runtime/io-error.h
The file was modifiedflang/runtime/descriptor-io.h
The file was modifiedflang/runtime/io-api.cpp
The file was modifiedflang/runtime/unit.h
Commit b7ebb25e53538002d6bccec58cc9ca8e80c042fe by Stanislav.Mekhanoshin
[AMDGPU] Factor out SelectSAddrFI()

This is a service function generally useful for selection
of a FI in an SADDR. NFC for now, needed for future patch.

Differential Revision: https://reviews.llvm.org/D100406
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
Commit f1bc1a82cf718a67d3271fc74c28f5845f0f1526 by nikita.ppv
[ValueTracking] Add additional non-zero add recurrence test (NFC)

Also drop a number of unused parameters from existing tests.
The file was modifiedllvm/test/Analysis/ValueTracking/monotonic-phi.ll
Commit 5c0fb026c93b33dd107f6ff50723d7eed911e1ce by nikita.ppv
[ValueTracking] Don't require non-zero step for add nuw

It's okay if the step is zero, we'll just stay at the same non-zero
value in that case. The valuable part of this is that the step
doesn't even need to be a constant anymore.
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
The file was modifiedllvm/test/Analysis/ValueTracking/monotonic-phi.ll
Commit a0124f4e4ded2694172aa1027cc1ea42e3ea3ac8 by momchil.velikov
Remove deprecated member functions (NFC)

Remove the member functions getByValAlign and getOrigAlign, there were
no users left.

Differential Revision: https://reviews.llvm.org/D99098
The file was modifiedllvm/include/llvm/CodeGen/TargetCallingConv.h
Commit 72142b909d635d17bdbe3cb4823d97afb96c1d9e by a.bataev
[SLP]Added a tests for shuffled matched tree entries, NFC.
The file was addedllvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll
Commit a32846b1d0147f30f6dde4bfec453cd681937005 by jpienaar
Refactor the architecture of mlir-reduce

Add iterator for ReductionNode traversal and use range to indicate the region we would like to keep. Refactor the interaction between Pass/Tester/ReductionNode.
Now it'll be easier to add new traversal type and OpReducer

Reviewed By: jpienaar, rriddle

Differential Revision: https://reviews.llvm.org/D99713
The file was modifiedmlir/tools/mlir-reduce/mlir-reduce.cpp
The file was removedmlir/tools/mlir-reduce/Passes/OpReducer.cpp
The file was modifiedmlir/include/mlir/Reducer/Passes/OpReducer.h
The file was modifiedmlir/include/mlir/Reducer/ReductionTreePass.h
The file was modifiedmlir/include/mlir/Reducer/Tester.h
The file was modifiedmlir/tools/mlir-reduce/ReductionNode.cpp
The file was modifiedmlir/lib/Reducer/Tester.cpp
The file was addedmlir/tools/mlir-reduce/ReductionTreePass.cpp
The file was modifiedmlir/tools/mlir-reduce/CMakeLists.txt
The file was modifiedmlir/tools/mlir-reduce/OptReductionPass.cpp
The file was modifiedmlir/include/mlir/Reducer/ReductionNode.h
The file was removedmlir/include/mlir/Reducer/ReductionTreeUtils.h
The file was removedmlir/tools/mlir-reduce/ReductionTreeUtils.cpp
Commit 17e2f236f05a8eb73bd66d5f286dccc14d412e74 by pklausler
[flang] Fix Boolean flag arguments

Two sites in io-api.cpp pass the wrong Boolean flag value to
signify that a new anonymous unit is a formatted file.

Differential Revision: https://reviews.llvm.org/D100419
The file was modifiedflang/runtime/io-api.cpp
The file was modifiedflang/runtime/buffer.h