FailedChanges

Summary

  1. [PhaseOrdering] regenerate test checks; NFC (details)
  2. AMDGPU/GlobalISel: Fix masked control flow with fallthrough blocks (details)
  3. [NFC][AIX] Remove spaces after the comma for '.csect' directive (details)
  4. [SCEV] Constant fold MultExpr before applying depth limit. (details)
  5. [InstCombine] add tests for adds with common operand; NFC (details)
  6. [InstCombine] (A + B) + B --> A + (B << 1) (details)
  7. [CGP] Ensure address offset is representable as int64_t (details)
  8. [analyzer] SATestBuild.py: Fix hang when one of the tasks fails (details)
  9. [RISCV] Register null target streamer for RISC-V (details)
  10. [VectorCombine] position pass after SLP in the optimization pipeline rather than before (details)
  11. [lldb/Test] Remove issue_verification subdirectory (details)
  12. [clang-tidy] Expand the list of functions in bugprone-unused-return-value (details)
  13. [DSE,MSSA] Add additional multiblock tests. (details)
  14. Revert "[analyzer] Change the default output type to PD_TEXT_MINIMAL in the frontend, error if an output loc is missing for PathDiagConsumers that need it" (details)
  15. [libc++] Make MoveOnly constexpr-friendly (details)
  16. Revert "[lldb] Enable C++14 when evaluating expressions in a C++14 frame" (details)
  17. Revert "[CodeGen] Add support for multiple memory operands in MachineInstr::mayAlias" (details)
  18. [libc++] Fix broken tuple tests (details)
  19. [PowerPC] Add support for vmsumudm (details)
  20. [lldb/Reproducers] Make the type tests work with reproducers (details)
  21. [lldb/Test] Disable APITests.exe on Windows (details)
  22. [libc++] Mark __u64toa and __u32toa as noexcept (details)
  23. [VectorCombine] set preserve alias analysis (details)
  24. Handle eExpressionThreadVanished in error switch to handle (details)
  25. [AMDGPU] Define 6 dword subregs (details)
  26. Reapply "[lit] GoogleTest framework should report failures if test binary crashes" (details)
  27. Print a warning when stopped in a frame LLDB has no plugin for. (details)
  28. [MC] Change MCCFIInstruction::createDefCfa to cfiDefCfa which does not negate Offset (details)
  29. Restrict test for DW_AT_APPLE_optimized to Darwin (details)
  30. Traverse-ignore invisible CXXConstructExprs with default args (details)
  31. Fix ignoring traversal of intermediate parens (details)
  32. Add some explicit use of TK_AsIs (details)
  33. [MC] Change MCCFIInstruction::createDefCfaOffset to cfiDefCfaOffset which does not negate Offset (details)
  34. Fix mistake made while rebasing (details)
  35. Add missing unit test (details)
  36. [AMDGPU] DWARF For Heterogeneous Debugging (details)
  37. [AMDGPU] DWARF Proposal For Heterogeneous Debugging (details)
  38. [MC] Fix double negation of DW_CFA_def_cfa_offset (details)
  39. [X86] Update some av512 shift intrinsics to use "unsigned int" parameter instead of int to match Intel documentation (details)
  40. [MC] Fix double negation of DW_CFA_def_cfa (details)
  41. [MC] Drop unneeded std::abs for DW_def_cfa_offset in DarwinX86AsmBackend::generateCompactUnwindEncoding (details)
  42. [Align] Remove operations on MaybeAlign that asserted that it had a defined value. (details)
  43. [TargetPassConfig] Don't add alias analysis at optnone (details)
  44. [Analyzer][WebKit][NFC] Correct documentation to avoid sphinx build error (details)
  45. Added a new IRCanonicalizer pass. (details)
  46. [gn build] Port 14d358537f1 (details)
  47. Revert "[gn build] Port 14d358537f1" (details)
  48. Revert "Added a new IRCanonicalizer pass." (details)
  49. [libc++] Mark __cpp_lib_hardware_interference_size as unimplemented. This fxes bug PR41423. (details)
  50. Add a way to set traversal mode in clang-query (details)
  51. [yaml2obj] - Add a technical prefix for each unnamed chunk. (details)
  52. [yaml2obj] - Move "repeated section/fill name" check earlier. (details)
  53. TableGen: Don't reconstruct CodeGenDAGTarget (details)
  54. [ELF] Parse SHT_GNU_verneed and respect versioned undefined symbols in shared objects (details)
  55. Silence warning from unit test (details)
  56. AMDGPU: Define mode register (details)
  57. AMDGPU: Implement isConstantPhysReg (details)
  58. HIP: Try to deal with more llvm package layouts (details)
  59. AMDGPU: Refine rcp/rsq intrinsic folding for modern FP rules (details)
  60. SimplifyCFG: Clean up optforfuzzing implementation (details)
  61. TargetLowering.h - remove unnecessary TargetMachine.h include. NFC (details)
  62. [DwarfEHPrepare] Don't prune unreachable resumes at optnone (details)
  63. [ValueTracking] Use assumptions in computeConstantRange. (details)
  64. [docs] Fix warnings in ConstantInterpreter (details)
  65. [lldb/Interpreter] Fix another eExpressionThreadVanished warning (details)
  66. Revert "[lldb/Interpreter] Fix another eExpressionThreadVanished warning" (details)
  67. [NFC] Remove non-variadic overloads of allocator_traits::construct. (details)
  68. [CFIInstrInserter] Delete unneeded checks (details)
  69. [libcxx] Fix deprecation warning by suppressing deprecated around (details)
  70. [TLI][PowerPC] Introduce TLI query to check if MULH is cheaper than MUL + SHIFT (details)
  71. [clang driver] Spell "--export-dynamic-symbol" with two dashes. (details)
  72. [NFC, StackSafety] LTO tests for MTE and StackSafety (details)
  73. [AArch64][GlobalISel] When generating SUBS for compares, don't write to wzr/xzr. (details)
  74. [X86] Improve i8 + 'slow' i16 funnel shift codegen (details)
  75. [X86] Fix typo in comment. NFC (details)
  76. [X86] Add family/model for Intel Comet Lake CPUs for -march=native and function multiversioning (details)
  77. [X86][AVX] Call SimplifyDemandedBits on MaskedLoadSDNode with non-boolean masks (details)
  78. [LLD/MinGW]: Expose --thinlto-cache-dir (details)
  79. X86TargetMachine.h - remove unnecessary X86Subtarget forward declaration. NFC. (details)
  80. [X86] Move CONCAT_VECTORS/INSERT_SUBVECTOR actions inside loop. NFC. (details)
  81. Fix Wdocumentation warnings after argument renaming. NFC. (details)
  82. [TargetLowering] Improve expandFunnelShift shift amount masking (details)
  83. [X86] Pull out repeated DemandedBits signmask variable. NFC. (details)
  84. X86Subtarget.h - remove unnecessary TargetMachine.h include. NFC. (details)
  85. Add explicit traversal mode to matchers for implicit constructors (details)
  86. Fix skip-invisible with overloaded method calls (details)
  87. Fix return values of some matcher functions (details)
  88. LoopSimplify.h - reduce unnecessary includes to forward declarations. NFC. (details)
  89. AMDGPULibFunc - fix include order. NFC. (details)
  90. AMDGPUTargetObjectFile.h - remove unnecessary includes. NFC. (details)
  91. [VPlan] Use VPUser for VPWidenSelectRecipe operands (NFC). (details)
  92. AMDGPUInstPrinter.cpp - add CommandLine.h include. NFC. (details)
  93. [PatternMatch] abbreviate vector inst matchers; NFC (details)
  94. [InstCombine] fold FP trunc into exact itofp (details)
  95. [clang-tidy] Fix potential assert in use-noexcept check (details)
  96. [PowerPC] Add some InstAlias definitions (details)
  97. AMDGPU.h - reduce TargetMachine.h include. NFC. (details)
  98. [X86] SimplifyMultipleUseDemandedBitsForTargetNode - add initial X86ISD::VSRAI handling. (details)
  99. [PhaseOrdering] adjust test to use default alias analysis with new pass manager; NFC (details)
  100. [LV] Either get invariant condition OR vector condition. (details)
  101. [Pass Manager] remove EarlyCSE as clean-up for VectorCombine (details)
  102. [X86][AVX] Fold extract_subvector(broadcast(x),c) -> extract_subvector(broadcast(x),0) iff c != 0 (details)
  103. [X86][AVX] Fold extract_subvector(subv_broadcast(x),c) -> (x) (details)
  104. Fix ignore-traversal to call correct method (details)
  105. Add missing test (details)
  106. [X86] Remove isCommutable flag from MULX instructions. (details)
  107. Change default traversal in AST Matchers to ignore invisible nodes (details)
  108. [clang-format][PR46043] Parse git config w/ implicit values (details)
  109. [TargetLoweringObjectFileImpl] Use llvm::transform (details)
  110. [mlir] Expand operand adapter to take attributes (details)
  111. [MCDwarf] Delete unneeded DW_AT_prototyped for DW_TAG_label (details)
  112. [MCDwarf] Delete unneeded DW_AT_unspecified_parameters (details)
  113. [CMake] Properly handle the LTO cache arguments for MinGW (details)
  114. [VE][NFC] Correct sjlj_expection test (details)
  115. [clangd] Log use of heuristic go-to-def. NFC (details)
  116. [OpenMP] Fix a race in task queue reallocation (details)
  117. [LV] Clamp MaxVF to power of 2. (details)
  118. [AST] default implementation is possible for non-member functions in C++20. (details)
  119. [clangd] Enable cross-file-rename by default. (details)
  120. Prevent GetNumChildren from transitively walking pointer chains (details)
  121. [lldb][NFC] Pass DeclarationName to NameSearchContext by value (details)
  122. [AMDGPU][CODEGEN] Added 'A' constraint for inline assembler (details)
  123. TargetInstrInfo.h - remove unnecessary includes. NFC. (details)
  124. SystemZInstrBuilder.h - remove unnecessary PseudoSourceValue.h include. NFC. (details)
  125. [DAG] Add SimplifyDemandedVectorElts binop SimplifyMultipleUseDemandedBits handling (details)
  126. [ObjectYAML][DWARF] Remove unimplemented function. (details)
  127. [ARM] VMULH tests for when other parts are working. NFC (details)
  128. [PowerPC][NFC] Split PPCELFStreamer::emitInstruction (details)
  129. Added pow intrinsic to LLVMIR dialect (details)
  130. FunctionLoweringInfo.h - remove orphan addSEHHandlersForLPads declaration. NFC. (details)
  131. FunctionLoweringInfo.h - move APInt.h dependency to FunctionLoweringInfo.cpp. NFC. (details)
  132. [x86] favor vector constant load to avoid GPR to XMM transfer, part 2 (details)
  133. InlineAdvisor.h - remove unnecessary PreservedAnalyses forward declaration. NFC. (details)
  134. InstructionSimplify.h - remove unnecessary includes. NFC. (details)
  135. LoopInfo.h - remove unnecessary PHINode forward declaration. NFC. (details)
  136. MemoryBuiltins.h - remove unnecessary TargetLibraryInfo forward declaration. NFC. (details)
  137. Improve stack-clash implementation on x86 (details)
  138. MemoryLocation.h - reduce Instructions.h include to Instruction.h include. NFC. (details)
  139. Make FEATURE_AVX512VP2INTERSECT match between compiler-rt and LLVM (details)
  140. [LoopUtils] Use llvm::find (details)
  141. Stack clash: update live-ins (details)
  142. [ManagedStatic] Fix build errors with clang-tblgen in Debug mode using MSVC 2019 v16.6 (details)
  143. [lldb] Remove custom DWARF expression printing code (details)
  144. Add AIX to the test macro-same-context XFAIL list (details)
  145. [X86] Add PTEST tests showing failure to extract allsign cases (details)
  146. MustExecute.h - remove unnecessary includes. NFC. (details)
  147. [AMDGPU] Added 'A' constraint for inline assembler (details)
  148. [PGO] Fix computation of function Hash (details)
  149. [analyzer] Improved RangeSet::Negate support of unsigned ranges (details)
  150. Re-commit "[libc++] [test] Generate static_test_env on the fly" (details)
  151. Re-commit "[cmake] Allow std::filesystem tests in CrossWinToARMLinux.cmake" (details)
  152. Make mlir::Value's bool conversion operator explicit (details)
  153. [AMDGPU][MC][GFX8+] Enabled clamp for v_add_u16, v_sub_u16 and v_subrev_u16 (details)
  154. [AIX] Add '-bcdtors:all:0:s' to linker to gather static init functions (details)
  155. [lldb/Test] Add a trace method to replace print statements. (details)
  156. Revert "[PGO] Fix computation of function Hash" (details)
  157. [gn build] Port ba92b274225 (details)
  158. [libcxx] Fix C++14 and up constexpr members in MoveOnly. (details)
  159. [X86] Teach combineTruncatedArithmetic to push truncate through subtracts where only one of the inputs is free to truncate. (details)
  160. [libc++] [LWG3201] Update status page: lerp should be marked noexcept. (details)
  161. [Transforms] Fix typos. NFC (details)
  162. [LoopUnroll] Remove dead NextBlocks argument (NFC). (details)
  163. [Inlining] Set inline-deferral-scale to 2. (details)
  164. [Clang][test] fix tests when using external assembler. (details)
  165. [clang][test] fix tests for external assemblers (details)
  166. [PowerPC] Prevent legalization loop from promoting SELECT_CC from v4i32 to v4i32 (details)
  167. Make explicit -fno-semantic-interposition (in -fpic mode) infer dso_local (details)
  168. [clang][test] fix tests for external assemblers (details)
  169. [clangd] Make use of SourceOrder to find first initializer in DefineOutline (details)
  170. [clangd] Change PreambleOnlyAction with content truncation (details)
  171. [NFC][PowerPC] Add a new case to test two-address verification (details)
  172. [FPEnv] Small fixes to implementation of flt.rounds (details)
  173. [AsmPrinter] Don't generate .Lfoo$local for -fno-PIC and -fPIE (details)
  174. [lldb] s/dyn_cast/isa (details)
  175. [CostModel] Check for free intrinsics in BasicTTI (details)
  176. [AArch64] Set i32 ISD::MULHU/S to Expand instead of Legal. (details)
  177. [clangd] Don't traverse the AST within uninteresting files during indexing (details)
  178. [NFC][ARM] Add intrinsic code size runs (details)
  179. [CostModel] Unify Intrinsic Costs. (details)
  180. [Clang][AArch64] Capturing proper pointer alignment for Neon vld1 intrinsicts (details)
  181. [DebugInfo] - Fix multiple issues in DWARFDebugFrame::parse(). (details)
  182. [AMDGPU] Fix wait counts in the presence of 16bit subregisters (details)
  183. [NFC][ARM] Add code size analysis tests (details)
  184. [yaml2obj] - Map section names to chunks for each ELFYAML::ProgramHeader early. NFCI. (details)
  185. [ObjectYAML][DWARF] Use .empty() to indicate if the DWARF sections are empty. (details)
  186. [ObjectYAML][DWARF] Make variable names consistent. (details)
  187. [NFC][ARM] Fix for previous commit (details)
  188. [DebugInfo/llvm-objdump] - Print "ZERO terminator" for terminator entries when dumping .eh_frame. (details)
  189. [X86][AVX] Add some initial movmsk combine tests (details)
  190. [X86] Fix fshr comment copy+paste typo. NFC. (details)
  191. [AMDGPU/MemOpsCluster] Code clean-up around mem ops clustering logic (details)
  192. [build] Add LLVM_LOCAL_RPATH which can set an rpath on just unit test binaries (details)
  193. Add support for binary operators in Syntax Trees (details)
  194. [CostModel] Unify getCastInstrCost (details)
  195. [analyzer][RetainCount] Remove the CheckOSObject option (details)
  196. [CostModel] getUserCost for intrinsic throughput (details)
  197. MachineInstr.h - remove unnecessary MachineMemOperand forward declaration. NFC. (details)
  198. [libc][NFC] Simplify memcpy implementation (details)
  199. [Transforms] Check validity of profile reader before invoking it (details)
  200. [DAGCombiner] try to move splat after binop with splat constant (details)
  201. [FPEnv] Intrinsic llvm.roundeven (details)
  202. [Sema] Diagnose more cases of static data members in local or unnamed classes (details)
  203. [ARM] MVE VMINV/VMAXV test additions. NFC (details)
  204. [libTooling] In Transformer, allow atomic changes to span multiple files. (details)
  205. Update DialectConversion.md (details)
  206. [mlir][Vector] Add vector contraction to outerproduct lowering (details)
  207. [NFC][ARM][AArch64] More code size tests (details)
  208. [MLIR] Helper class referencing MemRefType to unify runner implementations. (details)
  209. AMDGPU/GlobalISel: Don't select boolean phi by default (details)
  210. [PowerPC] Unaligned FP default should apply to scalars only (details)
  211. Use configure depends to trigger reconfiguration when LLVMBuild files change (details)
  212. GlobalISel: Merge G_PTR_MASK with llvm.ptrmask intrinsic (details)
  213. Debug Info: Mark os_log helper functions as artificial (details)
  214. Add missing forward decl to unbreak the modular build (details)
  215. AMDGPU/GlobalISel: Fix assert on 16-bit G_EXTRACT results (details)
  216. Fix MemoryLocation.h use without Instructions.h (details)
  217. [PowerPC][AIX] Spill CSRs to the ABI specified stack offsets. (details)
  218. [ELF][PPC64] Synthesize _savegpr[01]_{14..31} and _restgpr[01]_{14..31} (details)
  219. [dsymutil] Escape CFBundleIdentifier in plist. (details)
  220. [AMDGPU] NFC target dependent requiresUniformRegister refactored out (details)
  221. Revert "[AMDGPU] NFC target dependent requiresUniformRegister refactored out" (details)
  222. [InstCombine] reassociate fsub+fadd with FMF to increase adds and throughput (details)
  223. [PGO] Add memcmp/bcmp size value profiling. (details)
  224. [PowerPC][NFC] Add colon to TODO's and fix indentation. (details)
  225. [MSSA][Doc] Clobbers, more info on Defs / Def chain (details)
  226. [clang-format] Fix an ObjC regression introduced with new [[likely]][[unlikely]] support in if/else clauses (details)
  227. [Analyzer][NFC] Remove the SubEngine interface (details)
  228. [gn build] Port d70ec366c91 (details)
  229. [YAMLTraits] Remove char trait and serialize as uint8_t in lldb. (details)
  230. [ELF] Allow misaligned SHT_GNU_verneed (details)
  231. ResourcePriorityQueue.h - reduce unnecessary includes to forward declarations. NFC. (details)
  232. ObjCARCAnalysisUtils.h - remove unused includes. NFC. (details)
  233. [lldb/Reproducers] Skip remaining failing test in python_api subdir (details)
  234. [StaticAnalyzer] Fix non-virtual destructor warning (details)
  235. [fuzzer][afl] Fix build with GCC (details)
  236. [PowerPC][NFC] Update test to prevent DCE from causing failures (details)
  237. [Analyzer] Fix buildbot failure of commit rGd70ec366c91b (details)
  238. [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm (details)
  239. [InstCombine] add tests for reassociative sub/add expressions; NFC (details)
  240. [LoopVectorize] regenerate full test checks; NFC (details)
  241. [InstCombine] reassociate sub+add to increase adds and throughput (details)
  242. Be more specific about auto * vs auto for po alias. (details)
  243. Roll variables into an LLVM_DEBUG block to address -Wunused-but-set-variable (details)
  244. [lldb/Test] Reinstate FoundationSymtabTestCase (details)
  245. [MSSA][Doc] Fix typo (details)
  246. [flang] Fixes for problems with declaring procedure entities (details)
  247. AMDGPU: Update store node checks for atomics (details)
  248. [Support] Remove stale comment (details)
  249. [mlir][Vector] Add more vector.contract -> outerproduct lowerings and fix vector.contract type inference. (details)
  250. Process gep (select ptr1, ptr2) in SROA (details)
  251. [DebugInfo] Correct debuginfo for post-ra hoist and sink in Machine LICM (details)
  252. [lldb/Test] Cleanup TestSymbolTable.py (NFC) (details)
  253. [mlir] Hotfix - Drop spurious constexpr that breaks build (details)
  254. [mlir] Hotfix - Add inline to avoid multiple symbols on trivial functions (details)
  255. AMDGPU: Fix wrong null value for private address space (details)
  256. [Clang][Driver] Add Bounds and Thread to SupportsCoverage list (details)
  257. Let @skipUnlessAddressSanitizer imply @skipIfAsan (details)
  258. [MLICM] Remove unneeded option so the test doesn't fail. (details)
  259. [LoopUnroll] Simplify latch/header block handling (NFC). (details)
  260. [AMDGPU] Bail alloca vectorization if GEP not found (details)
  261. [NFC, StackSafety] Move FunctionInfo into :: namespace (details)
  262. [NFC, StackSafety] Remove unnecessary data (details)
  263. [DwarfExpression] Support entry values for indirect parameters (details)
  264. [sancov] Accommodate sancov and coverage report server for use under Windows (details)
  265. [clang][docs] Document additional bits of libc that -ffreestanding envs must provide (details)
  266. [debuginfo] Fix broken tests from MachineLICM salvaging fix (details)
  267. [analyzer][RetainCount] Tie diagnostics to osx.cocoa.RetainCount rather then RetainCountBase, for the most part (details)
  268. [analyzer][MallocChecker] Make NewDeleteLeaks depend on DynamicMemoryModeling rather than NewDelete (details)
  269. [NFC] Fix formatting for the 'aix-ld.c' test case. (details)
  270. Modify verifier checks to support musttail + preallocated (details)
  271. [llvm-objcopy][MachO] Add support for removing Swift symbols (details)
  272. [mlir][shape] Add `shape.get_extent`. (details)
  273. [lldb/Test] Modify TestSymbolTable.py for reproducers (details)
  274. [lldb][Core] Remove dead codepath in Mangled (details)
  275. Autogen a couple of test files to make a future diff easier to read (details)
  276. Split a test file so that most of it can be autogened (details)
  277. [lldb/Docs] Add the application speicfic lldbinit to the man page (details)
  278. Add self as code owner for SCEV and IndVars (details)
  279. [AArch64][GlobalISel] Do not modify predicate when optimizing G_ICMP (details)
  280. [NFC, StackSafety] Better names for internal stuff (details)
  281. [NFC, StackSafety] Remove duplicate code (details)
  282. [NFC, StackSafety] Add some missing includes (details)
  283. [StackSafety] Simplify SCEVRewriteVisitor (details)
  284. GlobalISel: Basic legalization for G_PTRMASK (details)
  285. GlobalISel: Add a clarification to G_STORE documentation (details)
  286. Temporarily Revert "[Clang][AArch64] Capturing proper pointer alignment for Neon vld1 intrinsicts" (details)
  287. [NFC][PowerPC] Modify the test case two-address-crash.mir (details)
  288. [compiler-rt][NFC]Fix Wdeprecated warnings for fsanitize-coverage (details)
  289. [mlir][Linalg] Avoid using scf.parallel for non-parallel loops in Linalg ops. (details)
  290. [mlir][linalg] Allow promotion to use callbacks for (details)
  291. [libc][NFC][Obvious] Convert the MPFR operations enum to an enum class. (details)
  292. [analyzer] Add support for IE of keyboard and mouse navigation in HTML report (details)
  293. [StackSafety] Use getSignedRange for offsets (details)
  294. [StackSafety] Use SCEV to find mem operation length (details)
  295. [X86][llvm-mc] Make the suffix matcher more accurate. (details)
  296. [X86] Use SIMD_EXC to remove some let statements in tablegen. NFCI (details)
  297. [X86] Lower sse_cmp_ss/sse2_cmp_sd intrinsics to X86ISD::FSETCC with vector types. (details)
  298. [PGO] Fix computation of function Hash (details)
  299. Automatically configure MLIR when flang is enabled (details)
  300. [OpenMP][AMDGCN] Support OpenMP offloading for AMDGCN architecture - Part 1 (details)
  301. Add test exposing a bug in SimpleLoopUnswitch. (details)
  302. [VE] Dynamic stack allocation (details)
  303. [X86] Add helper function to reduce some code duplication when shrinking a vector load to a vzext_load. (details)
  304. [NFC][Debugify] Format the CheckModuleDebugify output (details)
  305. [DebugInfo] - Fix typo in comment. NFC. (details)
  306. [StackSafety] Ignore some use of values (details)
  307. [StackSafety] Fix formatting in the test (details)
  308. [StackSafety] Bailout on some function calls (details)
  309. [GlobalISel][InlineAsm] Add missing EarlyClobber flag to inline asm output operands (details)
  310. [X86][SSE] Convert PTEST to MOVMSK for allsign bits vector results (details)
  311. VPlanValue.h - reduce unnecessary includes to forward declarations. NFC. (details)
  312. [lldb] Don't complete ObjCInterfaceDecls in ClangExternalASTSourceCallbacks::FindExternalVisibleDeclsByName (details)
  313. [llvm-readobj] - Do not skip building of the GNU hash table histogram. (details)
  314. DOTGraphTraitsPass.h - remove unnecessary includes. NFC. (details)
  315. ArchiveWriter.h - remove unnecessary includes. NFC. (details)
  316. [llvm-readelf] - Split GNUStyle<ELFT>::printHashHistogram. NFC. (details)
  317. [SimpleLoopUnswitch] Drop uses of instructions before block deletion (details)
  318. [LAA] We only need pointer checks if there are non-zero checks (NFC). (details)
  319. Revert "[LAA] We only need pointer checks if there are non-zero checks (NFC)." (details)
  320. [LAA] We only need pointer checks if there are non-zero checks (NFC). (details)
  321. [NFC] Updating tests (details)
  322. [lldb] Fix a potential bug that may cause assert failure in CommandObject::CheckRequirements (details)
  323. [ARM] Fix rewrite of frame index in Thumb2's address mode i8s4 (details)
  324. [lldb] Tab completion for process plugin name (details)
  325. [Alignment] Fix misaligned interleaved loads (details)
  326. Update release notes with porting guide for AST Matchers (details)
  327. [CodeGen][BFloat] Add bfloat MVT type (details)
  328. ObjCARCInstKind.h - remove unused includes. NFC. (details)
  329. ObjectFile.h - reduce unnecessary includes to forward declarations. NFC. (details)
  330. [IR] add set function for FMF 'contract' (details)
  331. AMDGPU: Fix backwards s_cselect_* operands (details)
  332. [UnJ] Update LI for inner nested loops (details)
  333. [IR][BFloat] add BFloat IR intrinsics support (details)
  334. [llvm-readobj] - Do not crash when an invalid .eh_frame_hdr is dumped using --unwind. (details)
  335. [compiler-rt][asan] Add noinline to use-after-scope testcases (details)
  336. [mlir] SCF: provide function_ref builders for IfOp (details)
  337. [AArch64][BFloat] basic AArch64 bfloat support (details)
  338. tsan: fix false positives in AcquireGlobal (details)
  339. [AArch64][BFloat] add BFloat instruction support for AArch64 (details)
  340. Revert "[PowerPC] Add support for -mcpu=pwr10 in both clang and llvm" (details)
  341. SpecialCaseList.h - reduce unnecessary includes to forward declarations. NFC. (details)
  342. Add support for UnaryOperator in SyntaxTree (details)
  343. [FileCheck] Allow parenthesized expressions (details)
  344. [OPENMP50]Initial support for use_device_addr clause. (details)
  345. [mlir] Add simple generator for return types (details)
  346. CoverageFilters.h - reduce unnecessary includes to forward declarations. NFC. (details)
  347. Fix Darwin 'constinit thread_local' variables. (details)
  348. Fix warning `-Wpedantic`. NFC. (details)
  349. [VFABI] Fix parsing of uniform parameters that shouldn't expect step or positional data. (details)
  350. Start migrating away from statepoint's inline length prefixed argument bundles (details)
  351. [MLIR] [OpenMP] Add basic OpenMP parallel operation (details)
  352. [gn build] (manually) port dedaf3a2ac5 (details)
  353. [DDG] Data Dependence Graph - Add query function for memory dependencies between two nodes (details)
  354. [gn build] Port 0d20ed664ff (details)
  355. [CodeGen] fix typo `def nxv1bf32` -> `def nxv1f32` (details)
  356. [mlir][spirv] Lower allocation/deallocations of workgroup memory. (details)
  357. [X86] Assemble movzb 1280(%rbx, %r12), %r12 after D80608 (details)
  358. [lldb] Make order of completions for expressions deterministic and sorted by Clang's priority values. (details)
  359. AMDGPU: Fix dropping MI flags when rewriting instructions (details)
  360. [lldb/Reproducers] Skip API logging in the DUMMY macro (details)
  361. [clangd] Add access specifier information to hover contents (details)
  362. [Driver] Support -fsanitize=shadow-call-stack on aarch64_be (details)
  363. AMDGPU: Set StackPointerRegisterToSaveRestore (details)
  364. [NFC][XCOFF][AIX] Return function entry point symbol with dedicate function (details)
  365. [Driver] Support -fsanitize=shadow-call-stack and cfi-icall on aarch64_be (details)
  366. [CodeMoverUtils] Use dominator tree level to decide the direction of (details)
  367. [mlir] [VectorOps] Add 'vector.flat_transpose' operation (details)
  368. [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm (details)
  369. [BPF] simplify zero extension with MOV_32_64 (details)
  370. AMDGPU: Start adding MODE register uses to instructions (details)
  371. [InstCombine] add tests for vector demanded elements of select condition; NFC (details)
  372. [llvm]NFC] Simplify ProfileSummaryInfo state transitions (details)
  373. [X86] Restore selection of MULX on BMI2 targets. (details)
  374. [lldb/Test] Generate YAML binary in build directory (details)
  375. [lldb/Reproducers] Skip tests relying on timeouts (details)
  376. Also cache negative results in GetXcodeSDKPath (NFC) (details)
  377. [AMDGPU] Fix for the lost CarryOut/CarryIn register operands in S_ADD/SUB_CO_PSEUDO. (details)
  378. tsan: fix test in debug mode (details)
  379. [GlobalISel] Don't combine instructions which are fed by memory instructions. (details)
  380. Fix `-Wpedantic` warning. NFC. (details)
  381. [mlir][Linalg] Fix build failure from D80188 (details)
  382. [mlir] Fix RunnerUtils template specialization (details)
  383. [TargetPassConfig] Add CanonicalizeFreezeInLoops before LSR (details)
  384. Remove error-prone mlir::ExecutionEngine::invoke overload. (details)
  385. [StackSafety] Bailout more aggressively (details)
  386. [NFC,StackSafety] Rename some variables (details)
  387. Refactor argument attribute specification in intrinsic definition. NFC. (details)
  388. Enable `align <n>` to be used in the intrinsic definition. (details)
  389. [llvm] Add function feature extraction analysis (details)
  390. [mlir][core] Add IndexElementsAttr helpers. (details)
  391. [mlir][shape] Use IndexElementsAttr in Shape dialect. (details)
  392. [lldb/Reproducers] Differentiate active and passive replay unexpected packet. (details)
  393. [lldb/Reproducers] Skip & add FIXME to tests failing with unexpected packet. (details)
  394. [NFC] Reformat TEST_FOO macros in test_macros.h (details)
  395. Fix a use-after-free in GetXcodeSDKPath (details)
  396. [mlir][Linalg] Add missing library linkage for shared library builds. (details)
  397. Fix Windows command line bug when last token in response file is "" (details)
  398. Fix shared libs build break introduced in rG98ef93eabd76 (details)
  399. [MLPolicies] Fix dependency and -DBUILD_SHARED_LIBS=on builds after D80579 (details)
  400. [CMake] Revert cf86a234ba86acf0bb875e21d27833be36e08be4 (details)
  401. AMDGPU/GlobalISel: Fixed handling of non-standard vectors (details)
  402. DAG: Fix expansion of DYNAMIC_STACKALLOC for StackGrowsUp targets (details)
  403. AMDGPU: Support non-entry block static sized allocas (details)
  404. [Lexer] Fix invalid suffix diagnostic for fixed-point literals (details)
  405. AMDGPU/GlobalISel: Fixed insert element for non-standard vectors (details)
  406. [TRE] Allow elimination when the returned value is non-constant (details)
  407. [ELF] --wrap: Drop __real_ symbol from the symbol table (details)
  408. [gn build] Port D80579 (details)
  409. [llvm][NFC] ProfileSummaryInfo - const-ify APIs (details)
  410. [gn build] Add MLAnalysisTests after D80579 (details)
  411. Introduce a GCStatepointInst type analogous to IntrinsicInst subclasses (details)
  412. Do not warn that an expression of the form (void)arr; is unused when (details)
  413. [ELF][test] Fix wrap-no-real.s after D51283 (details)
  414. [NFC,StackSafety] Cleanup alloca size calculation (details)
  415. Sink first bit of functionality from Statepoint to GCStatepointInst (details)
  416. [Statepoint] Replace uses of isX functions with idiomatic isa<X> (details)
  417. [ObjectYAML][MachO] Add error handling in MachOEmitter. (details)
  418. [Statepoint] Reduce scope of usage of ImmutableStatepoint (details)
  419. Temporarily disable the following failing tests on Darwin: (details)
  420. [Analyzer][WebKit] NoUncountedMembersChecker (details)
  421. [gn build] Port 660cda572d6 (details)
  422. [NFC,StackSafety] Add StackSafetyGlobalInfo class (details)
  423. [lldb/Reproducers] Skip or fix the remaining tests. (details)
  424. [lldb/Test] Import all decorators. (details)
  425. [docs] Release notes for DIModule metadata (details)
  426. [Driver][X86] Support branch align options with LTO (details)
  427. [JumpThreading] Use emplace_back instead of push_back (NFC) (details)
  428. [Analyzer][StreamChecker] Added check for "indeterminate file position". (details)
  429. [HardwareLoops] LangRef Intrinsic descriptions (details)
  430. [VE] Implements minimum MC layer for VE (3/4) (details)
  431. [gn build] Port 5921782f744 (details)
  432. Harden MLIR detection of misconfiguration when missing dialect registration (details)
  433. [DebugInfo] Upgrade DISubrange to support Fortran dynamic arrays (details)
  434. [CodeGen] Specify meaning of ISD opcodes for scalable vectors (details)
  435. tsan: disable java_finalizer2 test on darwin (details)
  436. [Clang][Sanitizers] Expect test failure on {arm,thumb}v7 (details)
  437. [TableGen] Fix non-standard escape warnings for braces in InstAlias (details)
  438. FileCheck [10/12]: Add support for signed numeric values (details)
  439. [ARM] Improve codegen of volatile load/store of i64 (details)
  440. [AArch64][SVE] Add support for spilling/filling ZPR2/3/4 (details)
  441. Fixed bot failure after d20bf5a7258d4b6a7 (details)
  442. [AArch64] Precommit new fp extraction/insertion test. (details)
  443. [DebugInfo] Use SplitTemplateClosers (foo<bar<baz> >) in DWARF too (details)
  444. [yaml2obj] - Implement the "SectionHeaderTable" tag. (details)
  445. [analyzer] Allow bindings of the CompoundLiteralRegion (details)
  446. [AMDGPU][MC][DISASSEMBLER] Corrected decoder to consume each code fragment only once (details)
  447. [clangd] Highlight related control flow. (details)
  448. [AMDGPU][MC] Corrected v_writelane_b32 to fix a decoding bug (details)
  449. [Clang] Enable _Complex __float128 (details)
  450. llvm-dwarfdump.h - remove unnecessary WithColor.h include. NFC. (details)
  451. DWARFDebugMacro.h - remove unnecessary WithColor.h include. NFC. (details)
  452. Fix MSVC signed/unsigned comparison warnings. NFC. (details)
  453. [AMDGPU][MC][GFX908] Corrected src0 of v_accvgpr_write to accept only VGPRs and inline constants. (details)
  454. Fixed bot failure after d20bf5a7258d4b6a7 (details)
  455. [X86][SSE] Peek though MOVMSK source sign bits using SimplifyMultipleUseDemandedBits (details)
  456. [MLIR] Move `ConcatOp` to its lexicographic position (details)
  457. WithColor.h - reduce unnecessary includes to forward declarations. NFC. (details)
  458. FileOutputBuffer.h - remove unused includes. NFC. (details)
  459. [MLIR] Tidy up documentation for `Shape_JoinOp`, `Shape_ReduceOp`, and (details)
  460. [MLIR] Add TensorFromElementsOp to Standard ops. (details)
  461. [MLIR] Add `index_to_size` and `size_to_index` to the shape dialect (details)
  462. AMDGPU: Add baseline test for ptrmask infer address space (details)
  463. InferAddressSpaces: Handle ptrmask intrinsic (details)
  464. [MLIR] Add `num_elements` to the shape dialect (details)
  465. [mlir][gpu][mlir-cuda-runner] Refactor ConvertKernelFuncToCubin to be generic. (details)
  466. [MLIR] Fix operand type in `from_extent_tensor` in the shape dialect (details)
  467. Prevent test from failing in my home directory (details)
  468. SymbolicFile.h - removed unused FileSystem.h include. NFC. (details)
  469. AMDGPU: Make S_DENORM_MODE not be a scheduling boundary (details)
  470. libclc: Compile with -nostdlib (details)
  471. AMDGPU: Add missing test for s_denorm_mode scheduling (details)
  472. [clangd] Work around PS4 -fno-exceptions, easier than disabling tests? (details)
  473. [ASTMatchers] Add traversal-kind support to `DynTypedMatcher` (details)
  474. [mlir] Make translation libraries available through MLIRConfig.cmake (details)
  475. [libTooling] Fix Transformer to work with ambient traversal kinds. (details)
  476. [x86] Propagate memory operands during call frame optimization (details)
  477. [analyzer] Merge implementations of SymInt, IntSym, and SymSym exprs (details)
  478. [analyzer] Refactor range inference for symbolic expressions (details)
  479. [analyzer] Generalize bitwise OR rules for ranges (details)
  480. [analyzer] Generalize bitwise AND rules for ranges (details)
  481. [analyzer] Introduce reasoning about symbolic remainder operator (details)
  482. Remove WrapperMatcherInterface (details)
  483. [mlir] Use ValueRange instead of ArrayRef<Value> (details)
  484. [mlir] Fix mismatched-tags warning (details)
  485. [AMDGPU] Reject moving PHI to VALU if the only VGPR input originated from move immediate (details)
  486. [libc++] Complete overhaul of constexpr support in std::array (details)
  487. Make VE.def a textual header (details)
  488. [clang-tidy] Add abseil-string-find-str-contains checker. (details)
  489. [llvm-exegesis] Make a few counter methods virtual to allow targets to provide target-specific support. (details)
  490. Create utility function to Merge Adjacent Basic Blocks (details)
  491. [SDAG] Don't require LazyBlockFrequencyInfo at optnone (details)
  492. [gn build] Port 7cfdff7b4a6 (details)
  493. Fix the crashlog.py script's use of the load_address property. (details)
  494. [X86] Add 'avx512vp2intersect' to getHostCPUFeatures. (details)
  495. [PGO] Guard the memcmp/bcmp size value profiling instrumentation behind flag. (details)
  496. Default to generating statepoints with deopt and gc-transition bundles if needed (details)
  497. [analyzer] Remove unused function. NFC. (details)
  498. [analyzer] Remove unused function declaration. NFC. (details)
  499. [ThinLTO] Compute the basic block count across modules. (details)
  500. [IR] Avoid linear scan in MDNode::intersect() (NFC) (details)
  501. [clang-tidy] Fix build broken by commit 7cfdff7b4a6704b8ef2a1b594e1ec19d2d89f385 (D80023) (details)
  502. [analyzer] SATestBuild.py: Make verbosity level a cmd option (details)
  503. [lldb/Reproducers] Add top-level-target check-lldb-reproducers (details)
  504. [Statepoint] Sink logic about actual callee into GCStatepointInst (details)
  505. [mlir][GPU] Link relevant LLVM components in GPUCommon instead of test (details)
  506. [mlir][Linalg] Add pass to remove unit-extent dims from tensor (details)
  507. [clang] Avoid linking libdl unless needed (details)
  508. [libc] Fixing the build command for benchmarks. (details)
  509. AMDGPU: Add intrinsic for s_setreg (details)
  510. [LoopUnroll] Support loops with exiting block that is neither header nor (details)
  511. [libc++] NFC: Remove outdated numbering in <bit> synopsis (details)
  512. AMDGPU: Handle rewriting ptrmask for more address spaces (details)
  513. [Statepoint] Convert a few more isStatepoint calls to idiomatic isa/cast (details)
  514. AMDGPU/GlobalISel: precommit extractelement test. NFC. (details)
  515. [AArch64] Add native CPU detection for Neoverse N1 (details)
  516. Revert "[LoopUnroll] Support loops with exiting block that is neither header nor" (details)
  517. [llvm] [MatrixIntrinsics] Add row-major support for llvm.matrix.transpose (details)
  518. Add tests for preallocated + musttail (details)
  519. Improve test infrastructure in SyntaxTree (details)
  520. add isAtPosition narrowing matcher for parmVarDecl (details)
  521. [Docs] Correct description of lldbinit behavior (details)
  522. [StackSafety] Remove SetMetadata parameter (details)
  523. [StackSafety] Don't run datafow on allocas (details)
  524. [NFC,StackSafety] Move internal offset calculation (details)
  525. [StackSafety] Lazy calculations (details)
  526. [lldb-vscode] Make it possible to run vsce package (details)
  527. [Clang] Enable KF and KC mode for [_Complex] __float128 (details)
  528. [Statepoint] Use iterate_range.empty [NFC] (details)
  529. [Statepoint] Sink actual_args and gc_args to GCStatepointInst [NFC] (details)
  530. [Statepoints] Sink routines for grabbing projections to GCStatepointInst [NFC] (details)
  531. [MachineLICM] Assert that locations from debug insts are not lost (details)
  532. [MachineVerifier] Verify that a DBG_VALUE has a debug location (details)
  533. [LiveDebugValues] Add cutoffs to avoid pathological behavior (details)
  534. [ARM] More tests for MVE LSR and float issues. NFC (details)
  535. [MLIR] Fix build when NVPTX is not enabled (details)
  536. [mlir] Extend standalone example by standalone-translate (details)
  537. [SVE] Eliminate calls to default-false VectorType::get() from Analysis (details)
  538. Run Coverage pass before other *San passes under new pass manager, round 2 (details)
  539. [NFC,StackSafety] clang-tidy warning fixes (details)
  540. [scudo] Fix deadlock in ScudoWrappersCTest.DisableForkEnable test. (details)
  541. [Tests] Switch a few statepoint tests to using operand bundles (details)
  542. [Tests] Remove deopt operands from SafepointIRVerfier tests (details)
  543. Revert "Run Coverage pass before other *San passes under new pass manager, round 2" (details)
  544. [SVE] Eliminate calls to default-false VectorType::get() from mlir (details)
  545. [libc][NFC][Obvious] Remove line break from a CMake message. (details)
  546. [mlir][Vector] Fix vector.transfer alignment calculation (details)
  547. [libc][NFC][Obvious] Fix few header guards in src/threads. (details)
  548. [X86] Fix a comment reference to registers R8L..R15L to use R8B..R15B like everywhere else. NFC (details)
  549. [Tests] Update a few more statepoint tests (details)
  550. unsigned -> Register for readability. (details)
  551. [mlir] Add test to check if standalone dialect is registered (details)
  552. Fix handling of default arguments in __attribute__((enable_if)). (details)
  553. [NFC,StackSafety] Add test flag (details)
  554. clang-format xray InstrumentationMap.cpp (details)
  555. [xray] Add llvm-xray extract support for 32 bit ARM (details)
  556. [X86] Add test case to show fast-isel incorrectly emitting a 64-bit movabsq instruction in 32-bit mode when using constant pools with -code-model=large. NFC (details)
  557. Disable `duplicate_os_log_reports.cpp` test. (details)
  558. Test update for a7fa35a629e85a72b8cf07a8f95c7c09d9663808 (details)
  559. [lldb/CMake] Set both the BUILD and INSTALL RPATH on macOS (details)
  560. [lld][WebAssembly] Convert some lld tests to assembly (details)
  561. Run Coverage pass before other *San passes under new pass manager, round 2 (details)
  562. [X86] Fix a nullptr dereference in X86Subtarget::classifyLocalReference when compiling with -mcmodel=medium -fpic and using a constant pool (details)
  563. GlobalISel: Work on improving stock set of legality predicates (details)
  564. [NFC][SLP] Add test case exposing SLP cost model bug. (details)
  565. [AMDGPU] DWARF Proposal For Heterogeneous Debugging (details)
  566. [LoopUnroll] Support loops with exiting block that is neither header nor (details)
  567. [llvm-xray][test] Fix unsupported-elf32.txt after D80185 (details)
  568. [WebAssembly] Fix a bug in removing unnecessary branches (details)
  569. [WebAssembly] Fix a bug in finding matching EH pad (details)
  570. [ObjectYAML][DWARF] Add DWARF entry in ELFYAML. (details)
  571. [Tests] Migrate more statepoint lowering tests to use operand bundles (details)
  572. [LoopUnroll] Fix not-rotated.ll by adding back a limitation was unintentionally (details)
  573. [JITLink] Fix 80-column rule violation. (details)
  574. [JITLink] Improve llvm-jitlink regression testing support for ELF. (details)
  575. [ORC] Add debugging output for LLJIT construction. (details)
  576. [gn build] Port a6deaeec370 (details)
  577. [AArch64][GlobalISel] Enable extending loads combines post-legalization. (details)
  578. [X86] Remove MMX isel patterns containing (x86mmx (scalar_to_vector (i32))). (details)
  579. [libc] Add implementation of call_once from threads.h. (details)
  580. [CodeGen] Add support for extracting elements of scalable vectors (details)
  581. [SVE] Fix warnings in SelectInst::areInvalidOperands (details)
  582. [SVE] Remove getNumElements() warnings in InstCombiner::visitBitCast (details)
  583. [CMake] Pass CLANG_VENDOR variables into later stages (details)
  584. libclc: update website url (details)
  585. New intrinsic @llvm.get.active.lane.mask() (details)
  586. [AST][RecoveryExpr] Make DeduceAutoType fail if the auto is deduced from recovery exprs. (details)
  587. [TTI] New target hook emitGetActiveLaneMask (details)
  588. [VE] Implements minimum MC layer for VE (4/4) (details)
  589. [AMDGPU] Use numbers::pi instead of M_PI. NFC. (details)
  590. [AMDGPU] Better use of llvm::numbers (details)
  591. [MLIR][BufferPlacement] Support functions that return Memref typed results (details)
  592. Avoid O_CLOEXEC to allow building on older Linux (RHEL5) (details)
  593. [lldb][NFC] Remove a std::string->C string->StringRef conversion in ClangUserExpression (details)
  594. [lldb] Make "inline" tests more configurable (details)
  595. Do not list adb devices when a device id is given (details)
  596. [llvm-readobj][test] - unwind.test: add comments, document the current behavior. (details)
  597. [libc++] Fix the LIBCXX_HAS_MERGED_TYPEINFO_NAMES_DEFAULT setting (details)
  598. Unbreak the build of mlir-cuda-runner (details)
  599. [clangd] Handle additional includes while parsing ASTs (details)
  600. [clangd] Add buildPreamble to TestTU (details)
  601. [llvm-readelf] - --elf-hash-histogram: do not crash when the .gnu.hash goes past the EOF. (details)
  602. [clangd] Preserve extra args in PreambleTests::IncludeParsing to fix windows build bots (details)
  603. VirtualFileSystem.h - reduce Twine.h include to forward declaration. NFC. (details)
  604. IPDBInjectedSource.h - remove unused includes and forward declarations. NFC. (details)
  605. IPDBLineNumber.h - remove unused includes. NFC. (details)
  606. [clangd] Patch PP directives to use stale preambles while building ASTs (details)
  607. [clangd] locateMacroAt handles patched macros (details)
  608. Fix broken include (details)
  609. [CodeGen] Fix warnings in getZeroExtendInReg (details)
  610. [readobj] Fix dangling else warning (details)
  611. [SCCP] Switch to widen at PHIs, stores and call edges. (details)
  612. [lit] Add an option to print all features used in tests (details)
  613. [SelectionDAG] Update getNode asserts for EXTRACT/INSERT_SUBVECTOR. (details)
  614. [clangd] Run PreambleThread in async mode behind a flag (details)
  615. [CGP] Ensure address scaled offset is representable as int64_t (details)
  616. [mlir][SCF] Add utility to clone an scf.ForOp while appending new yield values. (details)
  617. [clangd][NFC] Add traces for PreamblePatch::create (details)
  618. [ObjectYAML][DWARF] Make the `PubSection` optional. (details)
  619. [mlir][Linalg][Vector] Add forwarding patterns between linalg.copy and vector.transfer (details)
  620. [DAGComb] Do not turn insert_elt into shuffle for single elt vectors. (details)
  621. [clang] [Darwin] Add reverse mappings for aarch64/aarch64_32 to darwin arch names (details)
  622. [clang] [MinGW] Fix libunwind extension (details)
  623. Rename APIs in unittests/AST/Language.h in preparation to share them (details)
  624. [AArch64][x86] add tests for FMA combines; NFC (details)
  625. TextAPIContext.h - remove unused MemoryBuffer.h include. NFC. (details)
  626. TextStubCommon.h - move StringSwitch.h include to TextStubCommon.cpp. NFC. (details)
  627. [llvm-objcopy][ELF] Fix removing SHT_GROUP sections. (details)
  628. [llvm-objcopy][ELF] Fix removing a group member. (details)
  629. [DAGCombiner] avoid unnecessary indirection from SDNode/SDValue; NFCI (details)
  630. [llvm-readobj] - Cleanup the DwarfCFIEH::PrinterContext class. NFCI. (details)
  631. [ModuloSchedule] Allow illegal phis to be moved across stages. (details)
  632. [analyzer] ApiModeling: Add buffer size arg constraint (details)
  633. [CodeGen] Fix warnings in LowerToPredicatedOp (details)
  634. [analyzer] ApiModeling: Add buffer size arg constraint with multiplier involved (details)
  635. [SVE] Remove getNumElements() calls in visitGetElementPtrInst (details)
  636. Fix build failure when source is read only (details)
  637. [analyzer] StdLibraryFunctionsChecker: Add sanity checks for constraints (details)
  638. Move unittest helpers to a shared location (details)
  639. [OpenMP][SYCL] Improve diagnosing of unsupported types usage (details)
  640. Remove SVN logic from find_first_existing_vc_file (details)
  641. [AIX][XCOFF] add symbol priority for the llvm-objdump -D -symbol-description (details)
  642. [ARM] Extra MVE VMLAV reduction patterns (details)
  643. unwind: use a more portable endianness check in EHABI (details)
  644. [lldb/test] Fix TestAppleSimulatorOSType when multiple runtimes are installed (details)
  645. [AMDGPU] Remove duplicate test cases (details)
  646. [analyzer] StdLibraryFunctionsChecker: Add support to lookup types (details)
  647. [CodeGen] Fix warning in visitShuffleVector (details)
  648. Fix errors in use of strictfp attribute. (details)
  649. Fix errors in use of strictfp attribute. (details)
  650. Fix errors in use of strictfp attribute. (details)
  651. GlobalISel: fix CombinerHelper::matchEqualDefs() (details)
  652. [X86] Fix errors in use of strictfp attribute. (details)
  653. [DAGCombiner] Add command line options to guard store width reduction (details)
  654. Let @skipUnlessThreadSanitizer imply @skipIfAsan (details)
  655. Let @skipUnlessUndefinedBehaviorSanitizer imply @skipIfAsan (details)
  656. [ConstantFolding] Constant folding for integer vector reduce intrinsics (details)
  657. Preserve DbgLoc when DeadArgumentElimination rewrites a 'ret'. (details)
  658. [LoopVectorize] auto-generate complete test checks; NFC (details)
  659. [LoopVectorize] regenerate test checks; NFC (details)
  660. [LoopVectorize] auto-generate complete checks; NFC (details)
  661. [LoopVectorize] regenerate test checks; NFC (details)
  662. [SVE] Eliminate calls to default-false VectorType::get() from polly (details)
  663. [AIX] Emit AvailableExternally Linkage on AIX (details)
  664. [LoopVectorize] auto-generate complete test checks; NFC (details)
  665. [PrintSCC] Fix printing a basic-block without a name (details)
  666. [MLIR][OpenMP] Defined master operation in OpenMP Dialect (details)
  667. [X86] Remove isel pattern for MMX_X86movdq2q+simple_load. Replace with DAG combine to to loadmmx. (details)
  668. [SVE] Replace deprecated call in changeVectorElementTypeToInteger (details)
  669. [X86] Ignore large code model in X86FastISel::X86MaterializeFP in 32-bit mode (details)
  670. [SLP] auto-generate complete test checks; NFC (details)
  671. [WebAssembly] Add placeholders for R_WASM_TABLE_INDEX_REL_SLEB relocations (details)
  672. Add support for Overloaded Binary Operators in SyntaxTree (details)
  673. [Local] Prevent `invertCondition` from creating a redundant instruction (details)
  674. [SVE] Eliminate calls to default-false VectorType::get() from Vectorize (details)
  675. [DWARF5] Added support for .debug_macro.dwo section in llvm-dwarfdump (details)
  676. [DWARF5] Replace emission of strp with stx forms in debug_macro section (details)
  677. [mlir][Linalg] Make contraction vectorization use vector transfers (details)
  678. [AMDGPU] Regenrated urem/udiv global isel tests. NFC. (details)
  679. [tests] Fix AMDGPU test (details)
  680. AMDGPU: Remove fp-exceptions feature (details)
  681. [lldb/CMake] Set both the BUILD and INSTALL RPATH on macOS (2/2) (details)
  682. [clang-format] Create a python documentation tool to generate a summary of the clang-format status for the whole of the LLVM project (details)
  683. Add NoMerge MIFlag to avoid MIR branch folding (details)
  684. [ASTMatchers] Matchers related to C++ inheritance (details)
  685. [Matrix] Implement + and - operators for MatrixType. (details)
  686. Process gep (phi ptr1, ptr2) in SROA (details)
  687. [DebugInfo][DAG] Don't reuse debug location on COPY if width changes. (details)
  688. AMDGPU/GlobalISel: Add boilerplate for inline asm lowering (details)
  689. Revert "Process gep (phi ptr1, ptr2) in SROA" (details)
  690. [lldb/Test] Don't leak forked processes on Darwin (details)
  691. [CMake] Change target 'check' from 'check-llvm' to 'check-all' (details)
  692. [ELF] Add -z rel and -z rela (details)
  693. [mlir][Affine] Minor clean-up of D79829 (details)
  694. [SVE] Eliminate calls to default-false VectorType::get() from Utils (details)
  695. [SVE] Eliminate calls to default-false VectorType::get() from Instrumentation (details)
  696. [flang] Batch together the changes to the PFT intermediate data (details)
  697. [SVE] Eliminate calls to default-false VectorType::get() from InstCombine (details)
  698. [mlir] NFC - Add debug information for Linalg transformations. (details)
  699. [SLP] Apply external to vectorizable tree users cost adjustment for (details)
  700. [SVE] Eliminate calls to default-false VectorType::get() from AArch64 (details)
  701. [SVE] Eliminate calls to default-false VectorType::get() from AggressiveInstCombine (details)
  702. [mlir] Fix Windows build (details)
  703. [libFuzzer] Fixed description of fuzzer merge control file. (details)
  704. [SVE] Eliminate calls to default-false VectorType::get() from X86 (details)
  705. [diagtool] Install diagtool when LLVM_INSTALL_TOOLCHAIN_ONLY is ON. (details)
  706. [libc++] Fix issues with the triviality of std::array (details)
  707. [mlir][spirv] Clean up coop matrix assembly declaration. (details)
  708. [flang][NFC] Remove link-time dependency of Evaluate on Semantics (details)
  709. [gn build] (manually) port 0e265e31578 (details)
  710. [AMDGPU] Add loaded code object path URI definition to AMDGPUUsage (details)
  711. [gn build] Port 34cfed24ebd (details)
  712. [gn build] Port cf6cc662eee (details)
  713. [SVE] Eliminate calls to default-false VectorType::get() from Linker (details)
  714. [jitlink] R_X86_64_PC32 support for the elf x86 jitlinker (details)
  715. [SVE] Eliminate calls to default-false VectorType::get() from AMDGPU (details)
  716. AMDGPU: Move MIMG MMO check to verifier (details)
  717. AMDGPU: Add new baseline tests for setreg handling (details)
  718. AMDGPU: Optimize s_setreg_b32 to s_denorm_mode/s_round_mode (details)
  719. [AMDGPU] Remove assertion on S1024 SGPR to VGPR spill (details)
  720. [ValueLattice] Fix uninitialized-value after D79036 (details)
  721. Fix full unrolling with new pass manager. (details)
  722. NFC: Simplify O1 pass pipeline construction. (details)
  723. Use .empty() instead of .size() == 0 (NFC) (details)
  724. [lldb/Bindings] Raise exception when using properties that rely on lldb.target (details)
  725. [DWARF5] Added support for emission of .debug_macro.dwo section (details)
  726. [lldb/Test] use GetLoadAddress from scripted thread plan (details)
  727. [AArch64] Treat x18 as callee-saved in functions with windows calling convention on non-windows OSes (details)
  728. [test] Regenerate checks in aarch64_win64cc_vararg.ll with update_llc_test_checks.py. NFC. (details)
  729. [X86] Autogenerate complete checks. NFC (details)
  730. [lldb/CMake] Fix typo that prevented regenerating the bindings (details)
  731. [SelectionDAG] Remove repeated getOperand() call. NFC. (details)
  732. [OpenMP][SYCL] Do not crash on attempt to diagnose unsupported type use (details)
  733. [libcxx testing] Stop using arbitrary timeouts in one test (details)
  734. IPDBRawSymbol.h - reduce StringRef.h include to forward declaration. NFC. (details)
  735. IPDBRawSymbol.h - remove already declared forward declarations. NFC. (details)
  736. Architecture.h - reduce includes to forward declarations. NFC. (details)
  737. ArchitectureSet.h - reduce raw_ostream.h include to forward declaration. NFC. (details)
  738. ArchitectureSet.h - add missing <tuple> include. (details)
  739. TBEHandler.h - remove unnecessary VersionTuple forward declaration. NFC. (details)
  740. [clang-format] [PR46130] When editing a file with unbalance {} the namespace comment fixer can incorrectly comment the wrong closing brace (details)
  741. PackedVersion.h - reduce includes to forward declarations. NFC. (details)
  742. [SelectionDAG] ComputeNumSignBits - use Valid Min/Max shift amount helpers directly. NFCI. (details)
  743. [TargetLowering] SimplifyDemandedBits - remove shift amount clamps from getValidShiftAmountConstant calls. NFC. (details)
  744. SafeStackLayout.cpp - remove includes directly defined in SafeStackLayout.h module header. NFC. (details)
  745. CriticalAntiDepBreaker.cpp - remove includes directly defined in CriticalAntiDepBreaker.h header. NFC. (details)
  746. SafeStackColoring.h - reduce Instructions.h include to forward declaration. NFC. (details)
  747. [BasicAA] Use known lower bounds for index values for size based check. (details)
  748. [lldb] Pass -fPIC flag even when DYLIB_ONLY is set (details)
  749. [DSE] Remove noop stores in MSSA. (details)
  750. [LoopUnroll] Fix build failure for allyesconfig. (details)
  751. [clang-tidy] RenamerClangTidyChecks ignore builtin and command line macros (details)
  752. [Tests] Convert last statepoint lowering tests to bundle format (details)
  753. [LoopUnroll] Add a test case for rG7873376bb36b. (details)
  754. [X86] Factor constant pool comment printing out of the switch in X86AsmPrinter::emitInstruction. NFC (details)
  755. [X86] Minor cleanups to addShuffleComments in X86MCInstPrinter.cpp. NFCI (details)
  756. Remove some non-determinism from the `Darwin/duplicate_os_log_reports.cpp` test. (details)
  757. [Driver] Fix BooleanFFlag identifiers to use 'f' 'fno_' prefixes instead of suffixes (details)
  758. [X86] Add pseudo instructions to use MULX with a single destination when the low result isn't used. (details)
  759. [llvm-objdump] Simplify reportError() and prepend outs().flush() (details)
  760. [llvm-objdump] Move llvm:: to llvm::objdump:: and qualifying definitions with objdump:: (details)
  761. [llvm-objdump] Delete unneeeded namespace llvm {} (details)
  762. [ELF][docs] Update supported targets (details)
  763. [X86] Move MMX_SET0 pattern into the instruction definition. NFC (details)
  764. [X86] Autogenerate complete checks. NFC (details)
  765. [X86] Fix a place where we created MOVQ2DQ with a DstVT other than v2i64. (details)
  766. [X86] Teach computeKnownBitsForTargetNode that the upper half of X86ISD::MOVQ2DQ is all zero. (details)
  767. [DAGCombiner] Move debug message and statistic update into CommitTargetLoweringOpt. (details)
  768. [X86] Add DAG combine to turn (v2i64 (scalar_to_vector (i64 (bitconvert (mmx))))) to MOVQ2DQ. Remove unneeded isel patterns. (details)
  769. [X86] Remove unneeded bitconverts from isel patterns. NFC (details)
  770. AMDGPU: Add setTruncStoreAction for vector i64 types made legal recently (details)
  771. [AMDGPU] Precommit tests for D80813 (details)
  772. [AMDGPU] Propagate fast-math flags when lowering FSIN and FCOS (details)
  773. [NFC][PowerPC] Add a new case to test phi-node-elimination pass (details)
  774. Revert "[NFC][PowerPC] Add a new case to test phi-node-elimination pass" (details)
  775. [ScheduleDAG] Avoid unnecessary recomputation of topological order. (details)
  776. [X86][AVX] Pad small shuffle inputs in combineX86ShufflesRecursively (details)
  777. [X86][AVX] getFauxShuffleMask - don't widen shuffle inputs from INSERT_SUBVECTOR(X,SHUFFLE(Y,Z)) (details)
  778. [PhaseOrdering] add scalarization test for PR42174; NFC (details)
  779. [X86][AVX] Add test case described in D79987 (details)
  780. [X86] getFauxShuffleMask/getTargetShuffleInputs - make SelectionDAG const (PR45974). (details)
  781. [VectorCombine] add tests for scalarizing binop-with-constant; NFC (details)
  782. [X86][AVX] Add SimplifyMultipleUseDemandedBits VBROADCAST handling to SimplifyDemandedVectorElts. (details)
  783. [PhaseOrdering] add test for hoisting/CSE (PR46115); NFC (details)
  784. [utils] change update_test_checks.py use of 'TMP' value names (details)
  785. AArch64/GlobalISel: Fix incorrect ptrmask usage for alignment (details)
  786. clang-tidy and clang-query wont crash with invalid command line options (details)
  787. [utils] update expected strings in tests; NFC (details)
  788. Revert "clang-tidy and clang-query wont crash with invalid command line options" (details)
  789. clang-tidy and clang-query wont crash with invalid command line options (details)
  790. Change some extraneous /// comments to // comments inside methods. NFC. (details)
  791. [X86][AVX] combineX86ShufflesRecursively - peekThroughOneUseBitcasts subvector before widening. (details)
  792. [X86][AVX] Reduce unary target shuffles width if the upper elements aren't demanded. (details)
  793. [X86] Rewrite how X86PartialReduction finds candidates to consider optimizing. (details)
  794. [test][compiler-rt] Avoid LD_PRELOAD for "outer" dynamic linkers (details)
  795. [Driver] NFC: Use Twine temp to replace std::string local (details)
  796. [analyzer] Add dumps to CheckerRegistry (details)
  797. [Driver] Simplify Linux::addProfileRTLibs (details)
  798. AMDGPU/GlobalISel: Add stub reg-bank aware combiner pass (details)
  799. [gn build] (semi-manually) port a8ca0ec2670 (details)
  800. [PowerPC] Exploit vabsd on P9 (details)
  801. [MachineCombine] add a hook for resource length limit (details)
  802. Fix strict aliasing warning in msan.cpp (details)
  803. Improve SmallPtrSetImpl::count implementation (details)
  804. [ASTMatchers] Force c++ unittests to specify correct language standard (details)
  805. [DebugInfo][CallSites] Remove decl subprograms from 'retainedTypes:' (details)
  806. AArch64: materialize large stack offset into xzr correctly. (details)
  807. [llvm-readobj] - Improve error reporting for hash tables. (details)
  808. [StructurizeCFG] Fix region nodes ordering (details)
  809. [llvm-readelf] - Add explicit braces. NFC. (details)
  810. [llvm-readelf] - Add explicit braces again. NFC. (details)
  811. [DebugInfo] Separate fields with commas in headers of .debug_pub* tables (1/3). (details)
  812. [DebugInfo] Separate fields with commas in headers of compile units (2/3). (details)
  813. [DebugInfo] Separate fields with commas in headers of type units (3/3). (details)
  814. MIPatternMatch.h - remove unused APFloat/APInt includes. NFC. (details)
  815. ARMFrameLowering.h - remove unnecessary includes. NFC. (details)
  816. [llvm-dwarfdump][test] Use verbose output to check expected opcodes (details)
  817. [utils] change default nameless value to "TMP" (details)
  818. [lldb][NFC] Make ClangExpressionSourceCode's wrapping logic more consistent (details)
  819. [DebugInfo] Add use of truncating data extractor to debug line parsing (details)
  820. Revert "[lldb] Pass -fPIC flag even when DYLIB_ONLY is set" (details)
  821. [Support] Add more context to DataExtractor getLEB128 errors (details)
  822. [CodeGen] remove instnamer dependency from test file; NFC (details)
  823. [StructurizeCFG] Fix an incorrect comment, NFC. (details)
  824. Support GCC [[gnu::attributes]] in C2x mode (details)
  825. [openmp] Fixed taskloop recursive splitting so that taskloop tasks have (details)
  826. [InstNamer] use 'i' for Instructions, not 'tmp' (details)
  827. [WebAssembly] Update test expectations (details)
  828. [libc] Add implementations of ceil[f], floor[f] and trunc[f] from math.h. (details)
  829. Process gep (phi ptr1, ptr2) in SROA (details)
  830. [InstCombine] add test for select-of-shuffle; NFC (details)
  831. [Object] Add DF_1_PIE (details)
  832. Update some names in test. NFC. (details)
  833. [flang] This adds the lowering stubs for Open MP. (details)
  834. [Clang][CGM] style cleanups NFC (details)
  835. [SVE] Eliminate calls to default-false VectorType::get() from Clang (details)
  836. AMDGPU: Fix alignment for dynamic allocas (details)
  837. Temporarily removed unstable test. NFC. (details)
  838. [ELF] Set DF_1_PIE for -pie (details)
  839. [AMDGPU/MemOpsCluster] Let mem ops clustering logic also consider number of clustered bytes (details)
  840. AMDGPU: Remove dead file (details)
  841. AMDGPU: Fix test in code directory (details)
  842. [PGO] Improve the working set size heuristics under the partial sample PGO. (details)
  843. [Darwin] Add and adopt a way to query the Darwin kernel version (details)
  844. DAG: Fix getNode dropping flags if there's a glue output (details)
  845. [LiveDebugValues] Speed up removeEntryValue, NFC (details)
  846. [LiveDebugValues] Add LocIndex::u32_{location,index}_t types for readability, NFC (details)
  847. AMDGPU: Fix not emitting nofpexcept on fdiv expansion (details)
  848. [InstCombine] fix use of base VectorType; NFC (details)
  849. [ELF] Refine --export-dynamic-symbol semantics to be compatible GNU ld 2.35 (details)
  850. Move internal_uname to #if SANITIZER_LINUX scope. (details)
  851. [Matrix] Implement matrix index expressions ([][]). (details)
  852. [PDB] Use inlinee file checksum offsets directly (details)
  853. [libc] Expose APIGenerator. (details)
  854. Add DIAError.h to list of headers excluded from the LLVM_DebugInfo_PDB module (details)
  855. [llvm][NFC] Cache FAM in InlineAdvisor (details)
  856. [lldb/Test] Add test for man page and lldb --help output (details)
  857. For --relativenames, ignore directory 0, which is the comp_dir. (details)
  858. [PDB] Share code to relocate .debug$[SF] sections, NFC (details)
  859. [OpenMP] Replace Clang's OpenMP RTL Definitions with OMPKinds.def (details)
  860. [libc++] NFC: Minor refactoring in std::array (details)
  861. [PowerPC] Add clang option -m[no-]pcrel (details)
  862. [libc++] Add assertions on OOB accesses in std::array when the debug mode is enabled (details)
  863. [analyzer][MallocChecker] Fix the incorrect retrieval of the from argument in realloc() (details)
  864. Clean up clang/test/CodeGenObjC/os_log.m (details)
  865. Updated synopsis of <atomic> to match what is implemented (details)
  866. AMDGPU: Change internal tracking of wave size (details)
  867. [LiveDebugValues] Remove early-exit when testing regmasks, NFC (details)
  868. [AArch64] Fix CollectLOH creating an AdrpAdd LOH when there's a live used reg (details)
  869. [AArch64][GlobalISel] Split G_GLOBAL_VALUE into ADRP + G_ADD_LOW and optimize. (details)
  870. [docs] Sketch outline for HowToUpdateDebugInfo.rst (details)
  871. [os_log][test] Remove -O1 from a test, NFC (details)
  872. Fix UB in EmulateInstructionARM64.cpp (details)
  873. [COFF] Free some memory used for chunks (details)
  874. Fix how cc1 command line options are mapped into FP options. (details)
  875. add debug code to chase down a rare crash in asan/lsan https://github.com/google/sanitizers/issues/1193 (details)
  876. [asan] fix a comment typo (details)
  877. [BrachProbablityInfo] Rename loop variables. NFC (details)
  878. [X86] Fix a few recursivelyDeleteUnusedNodes calls that were trying to delete nodes before their user was really gone. (details)
  879. Fix violations of [basic.class.scope]p2. (details)
  880. [BrachProbablityInfo] Proportional distribution of reachable probabilities (details)
  881. [ELF] --wrap: don't error `undefined reference to __real_foo` (--no-allow-shlib-undefined) if foo is a wrapped definition (details)
  882. [mlir][SCFToGPU] Remove conversions from scf.for to gpu.launch. (details)
  883. [ObjectYAML][DWARF] Let `dumpPubSection` return `DWARFYAML::PubSection`. (details)
  884. [NFC] Move vector unmerge(trunc) combine to function (details)
  885. [GlobalISel] Combine scalar unmerge(trunc) (details)
  886. [StatepointLowering] Handle UNDEF gc values. (details)
  887. Options for Basic Block Sections, enabled in D68063 and D73674. (details)
  888. [OpenMP][OMPT] Fix and add event callbacks for detached tasks (details)
  889. [NFC][ARM][AArch64] Test runs (details)
  890. [llvm-exegesis] Fix D80610. (details)
  891. [VE] Support I32/F32 registers in assembler parser (details)
  892. Run syntax tree tests in many language modes (details)
  893. [mips] Support 64-bit relative relocations (details)
  894. [AST] Fix a null initializer crash for InitListExpr (details)
  895. [VectorCombine][X86] Add loaded insert tests from D80885 (details)
  896. [LLDB] Mark TestCreateDuringInstructionStep as flaky on Linux (details)
  897. [EarlyCSE] Common gc.relocate calls. (details)
  898. [mlir] Introduce CallOp converter for buffer placement (details)
  899. [LV] Make sure the MaxVF is a power-of-2 by rounding down. (details)
  900. [Sema] Fix -Wunused-variable in CreateBuiltinMatrixSubscriptExpr (NFC). (details)
  901. TextAPIWriter.h - reduce MemoryBuffer.h include to forward declarations. NFC. (details)
  902. TextAPIReader.h - reduce MemoryBuffer.h include to forward declaration. NFC. (details)
  903. [mlir] post-commit review fixes (details)
  904. Add missing MemoryBuffer.h include (details)
  905. [mlir] Toy tutorial: avoid erasing and then re-creating loop terminators (details)
  906. [DebugInfo] Extract a helper function to return the DWARF format name, NFC [1/10] (details)
  907. [DebugInfo] Report the format of .debug_names [2/10] (details)
  908. [DebugInfo] Report the format of compilation units [3/10] (details)
  909. [DebugInfo] Report the format of address tables [4/10] (details)
  910. [DebugInfo] Report the format of address range tables [5/10] (details)
  911. [DebugInfo] Report the format of call frame information entries [6/10] (details)
  912. [DebugInfo] Report the format of line tables [7/10] (details)
  913. [DebugInfo] Report the format of tables in .debug_pub* sections [8/10] (details)
  914. [DebugInfo] Report the format of location and range lists [9/10] (details)
  915. [DebugInfo] Report the format of type units [10/10] (details)
  916. [lldb/DWARF] Add support for pre-standard GNU call site attributes (details)
  917. [Support] Make DataExtractor error messages more clear (details)
  918. [mlir] SCFToGPUPass: fix macros referring to LOOPS to use SCF instead (details)
  919. [CSInfo][NFC] Interpret loaded parameter value separately (details)
  920. [clangd] Copy existing includes in ReplayPreamble (details)
  921. [mlir] support materialization for 1-1 type conversions (details)
  922. Fix a failing test. (details)
  923. [gn build] (manually) port 44f989e7809 (details)
  924. Revert "[clangd] Copy existing includes in ReplayPreamble" (details)
  925. [clangd] Copy existing includes in ReplayPreamble (details)
  926. AMDGPU: Fix clang side null pointer value for private (details)
  927. [lldb] Handle a new clang built-in type (details)
  928. Remove a comment-out llvm::errs debugging code, NFC. (details)
  929. AMDGPU: Fix not using scalar loads for global reads in shaders (details)
  930. [AST][RecoveryExpr] Build RecoveryExpr for "undef_var" cases. (details)
  931. Use Pseudo Instruction to carry stack probing information (details)
  932. [yaml2obj] - Allocate the file space for SHT_NOBITS sections in some cases. (details)
  933. Renamed Lang_C to Lang_C99, Lang_CXX to Lang_CXX03, and 2a to 20 (details)
  934. [OPENMP50]Initial codegen for 'affinity' clauses. (details)
  935. Reinstate the syntax tree test for 'static' in an array subscript (details)
  936. [Dexter] Add os.path.normcase(...) transform to test path early. (details)
  937. [Dexter] Add DexLimitSteps command and ConditionalController (details)
  938. [flang] Fix release build flags. (details)
  939. TypeSymbolEmitter.h - reduce includes to forward declarations. NFC. (details)
  940. [libc++abi] Make sure we link in CrashReporterClient.a when it's present (details)
  941. [lldb] Skip tests exercising DW_OP_GNU_entry_value with dsymutil (details)
  942. Support ExtVectorType conditional operator (details)
Commit 5a230a19ad0fa52bd7aa2169b2f0abc6b2bc47df by spatel
[PhaseOrdering] regenerate test checks; NFC

Remove some redundant/unnecessary bits too.
The file was modifiedllvm/test/Transforms/PhaseOrdering/reassociate-after-unroll.ll
Commit 66fe60220ca2b1932e06093294c72b246be54ec8 by Matthew.Arsenault
AMDGPU/GlobalISel: Fix masked control flow with fallthrough blocks

Unlike SelectionDAGBuilder, IRTranslator omits the unconditional
branch in fallthrough cases. Confusingly, the control flow pseudos
function in the opposite way the intrinsics are used, and the branch
targets always need to be swapped. We're inverting the target blocks,
so we need to figure out the old fallthrough block and insert a branch
to the original unconditional branch target.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.if.xfail.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
Commit 2419dce5d1c6338012002a9358c7c8fc6a7baca5 by xiangling_liao
[NFC][AIX] Remove spaces after the comma for '.csect' directive

To be consistent with other directives like '.comm', '.lcomm', we remove
the spaces after the comma for '.csect' on AIX.

Differential Revision: https://reviews.llvm.org/D80247
The file was modifiedllvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
The file was modifiedllvm/lib/MC/MCSectionXCOFF.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/aix-readonly-with-relocation.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-func-align.ll
The file was modifiedllvm/test/CodeGen/PowerPC/test_func_desc.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
Commit 5451289abafd8879adf892ede7660ce8c46c6a6f by dantrushin
[SCEV] Constant fold MultExpr before applying depth limit.

Summary:
Users of SCEV reasonably assume that multiplication of two constant
SCEVs will in turn be constant.
However, that is not always the case:
First, we can get here with reached depth limit, and will create
MultExpr SCEV `C1 * C2` and cache it.
Then, we can get here with the same operands, but with small depth
level. But this time we will find existing MultExpr SCEV and return
it, instead of expected constant SCEV.

This patch changes getMultExpr to not apply depth limit to all constant
operands expression, allowing them to be folded.

Reviewers: reames, mkazantsev

Subscribers: hiraditya, javed.absar, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79893
The file was modifiedllvm/test/Analysis/ScalarEvolution/limit-depth.ll
The file was addedllvm/test/Analysis/ScalarEvolution/depth-limit-overrun.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit b603794061f651695b155a0456a701d0ad82e8f4 by spatel
[InstCombine] add tests for adds with common operand; NFC
The file was modifiedllvm/test/Transforms/InstCombine/add.ll
Commit 2f7c24fe303f09308f1032515379f0abf20c5f90 by spatel
[InstCombine] (A + B) + B --> A + (B << 1)

This eliminates a use of 'B', so it can enable follow-on transforms
as well as improve analysis/codegen.

The PhaseOrdering test was added for D61726, and that shows
the limits of instcombine vs. real reassociation. We would
need to run some form of CSE to collapse that further.

The intermediate variable naming here is intentional because
there's a test at llvm/test/Bitcode/value-with-long-name.ll
that would break with the usual nameless value. I'm not sure
how to improve that test to be more robust.

The naming may also be helpful to debug regressions if this
change exposes weaknesses in the reassociation pass for example.
The file was modifiedllvm/test/Transforms/PhaseOrdering/reassociate-after-unroll.ll
The file was modifiedllvm/test/Transforms/PGOProfile/chr.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
The file was modifiedllvm/test/Transforms/InstCombine/add.ll
Commit c479052a74b204071902c5290059de0f2365db47 by llvm-dev
[CGP] Ensure address offset is representable as int64_t

AddressingModeMatcher::matchAddr was calling getSExtValue for a constant before ensuring that we can actually represent the value as int64_t

Fixes PR46004 / OSSFuzz#22357
The file was addedllvm/test/CodeGen/X86/pr46004.ll
The file was modifiedllvm/lib/CodeGen/CodeGenPrepare.cpp
Commit a5b2503a8ab4fb21345fa9e2316530cdfaec1a60 by vsavchenko
[analyzer] SATestBuild.py: Fix hang when one of the tasks fails

Summary:
Tasks can crash with many different exceptions including SystemExit.
Bare except still causes a warning, so let's use BaseException instead.

Differential Revision: https://reviews.llvm.org/D80443
The file was modifiedclang/utils/analyzer/SATestBuild.py
Commit 22ed724975d265086149dcac8d2c983c1e49f13f by pzheng
[RISCV] Register null target streamer for RISC-V

Summary:
This fixes two llc crashes with the following tests when RISC-V is the default
target.

LLVM :: DebugInfo/Generic/global.ll
LLVM :: DebugInfo/Generic/inlined-strings.ll

Reviewers: HsiangKai

Reviewed By: HsiangKai

Subscribers: hiraditya, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, lenary, s.egerton, sameer.abuasal, apazos, luismarques, evandro, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80352
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
Commit 6438ea45e053378a3c461a879805174eaa864bdb by spatel
[VectorCombine] position pass after SLP in the optimization pipeline rather than before

There are 2 known problem patterns shown in the test diffs here:
vector horizontal ops (an x86 specialization) and vector reductions.

SLP has greater ability to match and fold those than vector-combine,
so let SLP have first chance at that.

This is a quick fix while we continue to improve vector-combine and
possibly canonicalize to reduction intrinsics.

In the longer term, we should improve matching of these patterns
because if they were created in the "bad" forms shown here, then we
would miss optimizing them.

I'm not sure what is happening with alias analysis on the addsub test.
The old pass manager now shows an extra line for that, and we see an
improvement that comes from SLP vectorizing a store. I don't know
what's missing with the new pass manager to make that happen.
Strangely, I can't reproduce the behavior if I compile from C++ with
clang and invoke the new PM with "-fexperimental-new-pass-manager".

Differential Revision: https://reviews.llvm.org/D80236
The file was modifiedllvm/test/Other/new-pm-thinlto-defaults.ll
The file was modifiedllvm/test/Other/opt-Os-pipeline.ll
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was modifiedllvm/test/Other/opt-pipeline-vector-passes.ll
The file was modifiedllvm/lib/Transforms/IPO/PassManagerBuilder.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/opt-pipeline.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
The file was modifiedllvm/test/Other/opt-O2-pipeline.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/horiz-math.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/addsub.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
The file was modifiedllvm/test/Other/opt-O3-pipeline.ll
The file was modifiedllvm/test/Other/new-pm-defaults.ll
Commit d89c98a020c9903f31b659e3f5cc513ea878c900 by Jonas Devlieghere
[lldb/Test] Remove issue_verification subdirectory

These files haven't been touched since 2015. According to Pavel these
were intended to be test for the test framework which never really took
of and are mostly irrelevant by now.

Differential revision: https://reviews.llvm.org/D80408
The file was removedlldb/test/API/issue_verification/TestFail.py.park
The file was removedlldb/test/API/issue_verification/TestSignal.py.park
The file was removedlldb/test/API/issue_verification/TestTimeout.py.park
The file was removedlldb/test/API/issue_verification/TestRerunFail.py.park
The file was removedlldb/test/API/issue_verification/TestSignalOutsideTestMethod.py.park
The file was removedlldb/test/API/issue_verification/enable.py
The file was removedlldb/test/API/issue_verification/TestExpectedTimeout.py.park
The file was removedlldb/test/API/issue_verification/TestRerunFileLevelTimeout.py.park
The file was removedlldb/test/API/issue_verification/TestRerunInline.py.park
The file was removedlldb/test/API/issue_verification/TestRerunTimeout.py.park
The file was removedlldb/test/API/issue_verification/disable.py
The file was removedlldb/test/API/issue_verification/rerun_base.py
The file was removedlldb/test/API/issue_verification/TestInvalidDecorator.py.park
The file was removedlldb/test/API/issue_verification/inline_rerun_inferior.cpp
The file was removedlldb/test/API/issue_verification/README.txt
Commit e4bb3e25e4400151133fd3737f4842f2aeda1c1b by jranieri
[clang-tidy] Expand the list of functions in bugprone-unused-return-value

This change adds common C, C++, and POSIX functions to the clang-tidy unused return value checker.

Differential Revision: https://reviews.llvm.org/D76083
The file was modifiedclang-tools-extra/clang-tidy/bugprone/UnusedReturnValueCheck.cpp
Commit 7a325c14b46557694d08ae887bfe4bb64c8828ff by flo
[DSE,MSSA] Add additional multiblock tests.
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-simple.ll
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-multipath.ll
Commit 429f03089951d62fb370026905c87f1f25cf220f by dkszelethus
Revert "[analyzer] Change the default output type to PD_TEXT_MINIMAL in the frontend, error if an output loc is missing for PathDiagConsumers that need it"

This reverts commit fe1a3a7e8c8be33968b9a768666489823dabab10.
The file was modifiedclang/include/clang/Basic/DiagnosticDriverKinds.td
The file was modifiedclang/lib/StaticAnalyzer/Core/PlistDiagnostics.cpp
The file was modifiedclang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/SarifDiagnostics.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.h
The file was removedclang/test/Analysis/output_types.cpp
Commit a4b8ee64223f2b942f55237e40e3bd01d9b16893 by Louis Dionne
[libc++] Make MoveOnly constexpr-friendly

This is necessary when writing constexpr tests.
The file was modifiedlibcxx/test/support/MoveOnly.h
Commit 8cb75745412e4bc9592d2409cc6cfa4a2940d9e7 by Raphael Isemann
Revert "[lldb] Enable C++14 when evaluating expressions in a C++14 frame"

This reverts commit 5f88f39ab8154682c3b1eb9d7050a9412a55d9e7. It broke these
three tests on the Window bot:
  lldb-api :: commands/expression/completion/TestExprCompletion.py
  lldb-api :: lang/cpp/scope/TestCppScope.py
  lldb-api :: lang/cpp/standards/cpp11/TestCPP11Standard.py
The file was removedlldb/test/API/lang/cpp/standards/cpp14/Makefile
The file was removedlldb/test/API/lang/cpp/standards/cpp14/TestCPP14Standard.py
The file was removedlldb/test/API/lang/cpp/standards/cpp11/main.cpp
The file was removedlldb/test/API/lang/cpp/standards/cpp11/TestCPP11Standard.py
The file was removedlldb/test/API/lang/cpp/standards/cpp11/Makefile
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
The file was removedlldb/test/API/lang/cpp/standards/cpp14/main.cpp
Commit 65cd2c7a8015577fea15c861f41d2e4b5768961f by jean-michel.gorius
Revert "[CodeGen] Add support for multiple memory operands in MachineInstr::mayAlias"

This temporarily reverts commit 7019cea26dfef5882c96f278c32d0f9c49a5e516.

It seems that, for some targets, there are instructions with a lot of memory operands (probably more than would be expected). This causes a lot of buildbots to timeout and notify failed builds. While investigations are ongoing to find out why this happens, revert the changes.
The file was modifiedllvm/test/CodeGen/ARM/big-endian-neon-fp16-bitconv.ll
The file was modifiedllvm/lib/CodeGen/ScheduleDAGInstrs.cpp
The file was modifiedllvm/test/CodeGen/AArch64/merge-store-dependency.ll
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-vldm-wrback.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-phireg.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-float32regloops.ll
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-vstm.ll
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vst3.ll
The file was modifiedllvm/test/CodeGen/Thumb2/umulo-128-legalisation-lowering.ll
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-vstm-wrback.ll
The file was modifiedllvm/test/CodeGen/X86/store_op_load_fold2.ll
The file was removedllvm/test/CodeGen/X86/instr-sched-multiple-memops.mir
Commit 861b52693373f08fd78f394a697a2250612b55e1 by Louis Dionne
[libc++] Fix broken tuple tests

The tests had copy-paste errors which started showing when an
unused-variable warning started being emitted after we made
the MoveOnly type constexpr (in a4b8ee64223f).
The file was modifiedlibcxx/test/libcxx/utilities/tuple/tuple.tuple/tuple.cnstr/disable_reduced_arity_initialization_extension.pass.cpp
The file was modifiedlibcxx/test/libcxx/utilities/tuple/tuple.tuple/tuple.cnstr/enable_reduced_arity_initialization_extension.pass.cpp
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/UTypes.pass.cpp
Commit a28e9f1208608f8d18750bb88ca74722fb0bcce4 by kamau.bridgeman
[PowerPC] Add support for vmsumudm

This patch adds support for Vector Multiply-Sum Unsigned Doubleword Modulo
instruction; vmsumudm.

Differential Revision: https://reviews.llvm.org/D80294
The file was modifiedllvm/lib/Target/PowerPC/P9InstrResources.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrAltivec.td
The file was modifiedllvm/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt
The file was modifiedllvm/test/MC/PowerPC/ppc64-encoding-vmx.s
Commit 5a85582eb26f0c8f6b8ef5a14385d608ef10385c by Jonas Devlieghere
[lldb/Reproducers] Make the type tests work with reproducers
The file was modifiedlldb/test/API/types/AbstractBase.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbtest.py
Commit a67b2faa7c4cfbceffb4213f46769c45a5a9291a by Jonas Devlieghere
[lldb/Test] Disable APITests.exe on Windows

The generated binary (APITests.exe) is not a valid googletest binary. I
suspect it has something to do with us linking against liblldb.
The file was modifiedlldb/unittests/CMakeLists.txt
Commit 485b9083fe69601c9f3f91f7f1be9d7f3a26bb1e by Louis Dionne
[libc++] Mark __u64toa and __u32toa as noexcept

The two functions don't throw, and the generated code is better when
we explicitly tell the compiler that the functions are noexcept. This
isn't an ABI break because the signatures of the functions stay the
same with or without noexcept.

Fixes https://llvm.org/PR46016

Differential Revision: https://reviews.llvm.org/D80379
The file was modifiedlibcxx/include/charconv
The file was modifiedlibcxx/src/charconv.cpp
Commit 024098ae53497be2ddba82474451934611ce87d5 by spatel
[VectorCombine] set preserve alias analysis

As noted in D80236, moving the pass in the pipeline exposed this
shortcoming. Extra work to recalculate the alias results showed
up as a compile-time slowdown.
The file was modifiedllvm/test/Other/opt-O3-pipeline.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/opt-pipeline.ll
The file was modifiedllvm/test/Other/opt-Os-pipeline.ll
The file was modifiedllvm/test/Other/opt-O2-pipeline.ll
The file was modifiedllvm/lib/Transforms/Vectorize/VectorCombine.cpp
Commit 7510aede627267819d9693381ad6c16dccfa0d17 by echristo
Handle eExpressionThreadVanished in error switch to handle
covered switch warning.
The file was modifiedlldb/source/Interpreter/CommandInterpreter.cpp
Commit 62fb3fa6d9c007385ce61e1203e6830fa4172bdd by Stanislav.Mekhanoshin
[AMDGPU] Define 6 dword subregs

This prevents autogeneration of degenerate names for these.

Differential Revision: https://reviews.llvm.org/D80451
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
Commit 0231227e5d8a7c4737ce2316dae01b63a2adfbe5 by stephen.neuendorffer
Reapply "[lit] GoogleTest framework should report failures if test binary crashes"

This reverts commit 78dea0e8fb6cc5c0fae64d65b7f40560cab7b329.

The offending lldb test (which is a real bug exposed by this patch)
has been disabled on windows (see a67b2faa7c4cfbceffb4213f46769c45a5a9291a)
and lldb is queued for inclusion into precommit testing, which would
have caught this.

Differential Revision: https://reviews.llvm.org/D80389
The file was addedllvm/utils/lit/tests/googletest-discovery-failed.py
The file was addedllvm/utils/lit/tests/Inputs/googletest-discovery-failed/subdir/OneTest.py
The file was modifiedllvm/utils/lit/lit/formats/googletest.py
The file was addedllvm/utils/lit/tests/Inputs/googletest-discovery-failed/lit.cfg
Commit 220c17ffd4e1b127bcc02b25980b7934184ee1da by Adrian Prantl
Print a warning when stopped in a frame LLDB has no plugin for.

This patchs adds an optional warning that is printed when stopped at a
frame that was compiled in a source language that LLDB has no plugin
for.

The motivational use-case is debugging Swift code on Linux. When the
user accidentally invokes the system LLDB that was built without the
Swift plugin, it is very much non-obvious why debugging doesnt
work. This warning makes it easy to figure out what went wrong.

<rdar://problem/56986569>
The file was addedlldb/test/Shell/Process/Inputs/true.c
The file was addedlldb/test/Shell/Process/Optimization.test
The file was addedlldb/test/Shell/Process/UnsupportedLanguage.test
The file was modifiedlldb/source/Target/Process.cpp
The file was modifiedlldb/source/Target/TargetProperties.td
The file was modifiedlldb/source/Target/Thread.cpp
The file was modifiedlldb/include/lldb/Target/Process.h
Commit 7e49dc6184ef3baf421a5bb0190466cbb1a87785 by maskray
[MC] Change MCCFIInstruction::createDefCfa to cfiDefCfa which does not negate Offset

The negative Offset has caused a bunch of problems and confused quite a
few call sites. Delete the unneeded negation and fix all call sites.
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
The file was modifiedllvm/lib/Target/ARM/ARMFrameLowering.cpp
The file was modifiedllvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/ARM/Thumb1FrameLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
The file was modifiedllvm/lib/MC/MCStreamer.cpp
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
The file was modifiedllvm/lib/CodeGen/CFIInstrInserter.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
The file was modifiedllvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
The file was modifiedllvm/include/llvm/MC/MCDwarf.h
The file was modifiedllvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
The file was modifiedllvm/lib/CodeGen/MIRParser/MIParser.cpp
The file was modifiedllvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Commit a8a048ac7253ca92228d0862b6c1175f1613a840 by Adrian Prantl
Restrict test for DW_AT_APPLE_optimized to Darwin
The file was modifiedlldb/test/Shell/Process/Optimization.test
Commit aa5d2d22485470365cc8f7016c1be672a273c2fe by steveire
Traverse-ignore invisible CXXConstructExprs with default args
The file was modifiedclang/lib/AST/Expr.cpp
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
The file was modifiedclang/unittests/AST/ASTTraverserTest.cpp
Commit 26ac5a34bae7cb5b65e0580b317d4559af847ddb by steveire
Fix ignoring traversal of intermediate parens
The file was modifiedclang/lib/AST/Expr.cpp
The file was modifiedclang/unittests/AST/ASTTraverserTest.cpp
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
Commit 8d62eba1053a4156032e5333ce0b1c6d33ca8ec5 by steveire
Add some explicit use of TK_AsIs
The file was modifiedclang-tools-extra/clang-reorder-fields/ReorderFieldsAction.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/NumberObjectConversionChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/PointerSortingChecker.cpp
The file was modifiedclang/unittests/ASTMatchers/Dynamic/ParserTest.cpp
Commit 0840d725c4e7c98bb440db7b886054525be6ddf1 by maskray
[MC] Change MCCFIInstruction::createDefCfaOffset to cfiDefCfaOffset which does not negate Offset

The negative Offset has caused a bunch of problems and confused quite a
few call sites. Delete the unneeded negation and fix all call sites.
The file was modifiedllvm/lib/Target/Mips/MipsSEFrameLowering.cpp
The file was modifiedllvm/lib/Target/Mips/Mips16FrameLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
The file was modifiedllvm/lib/Target/XCore/XCoreFrameLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVFrameLowering.cpp
The file was modifiedllvm/include/llvm/MC/MCDwarf.h
The file was modifiedllvm/lib/MC/MCStreamer.cpp
The file was modifiedllvm/lib/Target/ARM/Thumb1FrameLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCFrameLowering.cpp
The file was modifiedllvm/lib/Target/ARM/ARMFrameLowering.cpp
The file was modifiedllvm/lib/CodeGen/MIRParser/MIParser.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
The file was modifiedllvm/lib/Target/ARC/ARCFrameLowering.cpp
The file was modifiedllvm/lib/CodeGen/CFIInstrInserter.cpp
Commit 3a1f0c6bd1e09b6fd081ad83bb67228de83ac9b4 by steveire
Fix mistake made while rebasing
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
Commit 64356b6d94eac13780cc36ea12053d61a027561e by steveire
Add missing unit test
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
Commit 1b58cbad018c3634f7b87bddba9465b250e9a7b4 by Tony.Tye
[AMDGPU] DWARF For Heterogeneous Debugging

- Change title to "DWARF For Heterogeneous Debugging".
- Add "Examples" section that references the AMDGPUUsage DWARF section.
- Make the "References" section a top level section.

Differential Revision: https://reviews.llvm.org/D70523
The file was modifiedllvm/docs/AMDGPUDwarfProposalForHeterogeneousDebugging.rst
Commit 8a9f09df42867d05e9b2b64df715595a2aab647a by Tony.Tye
[AMDGPU] DWARF Proposal For Heterogeneous Debugging

- Change title to "DWARF Proposal For Heterogeneous Debugging".
The file was modifiedllvm/docs/AMDGPUDwarfProposalForHeterogeneousDebugging.rst
Commit c693b9c321d5a40d012340619674cf790c9ac86c by maskray
[MC] Fix double negation of DW_CFA_def_cfa_offset

Negations are incorrectly added in two places and the code works just
because the negations cancel each other.
The file was modifiedllvm/lib/MC/MCDwarf.cpp
The file was modifiedllvm/lib/MC/MCStreamer.cpp
Commit 1b02db52b79e01f038775f59193a49850a34184d by craig.topper
[X86] Update some av512 shift intrinsics to use "unsigned int" parameter instead of int to match Intel documentation

There are 65 that take a scalar shift amount. Intel documentation shows 60 of them taking unsigned int. There are 5 versions of srli_epi16 that use int, the 512-bit maskz and 128/256 mask/maskz.

Fixes PR45931

Differential Revision: https://reviews.llvm.org/D80251
The file was modifiedclang/lib/Headers/avx512fintrin.h
The file was modifiedclang/test/CodeGen/avx512f-builtins.c
The file was modifiedclang/lib/Headers/avx512vlbwintrin.h
The file was modifiedclang/lib/Headers/avx512bwintrin.h
The file was modifiedclang/test/CodeGen/avx512vl-builtins.c
The file was modifiedclang/lib/Headers/avx512vlintrin.h
The file was modifiedclang/test/CodeGen/avx512bw-builtins.c
The file was modifiedclang/test/CodeGen/avx512vlbw-builtins.c
Commit 773f8dbd1da8409f1b62e8c5692cb9a5d199d6c8 by maskray
[MC] Fix double negation of DW_CFA_def_cfa

Negations are incorrectly added in numerous places and the code just happens to work.
Also fix a missed DW_CFA_def_cfa_offset negation in c693b9c321d5a40d012340619674cf790c9ac86c:
ARMAsmBackendDarwin::generateCompactUnwindEncoding
The file was modifiedllvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
The file was modifiedllvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
The file was modifiedllvm/lib/MC/MCStreamer.cpp
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
The file was modifiedllvm/lib/MC/MCDwarf.cpp
Commit 0f6bd9cda6c002050b610b886a43c282e4ca2807 by maskray
[MC] Drop unneeded std::abs for DW_def_cfa_offset in DarwinX86AsmBackend::generateCompactUnwindEncoding

This clean-up is available after double negation bugs are fixed.
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Commit 7392820f989048000562b8fa7dade023dddacb37 by craig.topper
[Align] Remove operations on MaybeAlign that asserted that it had a defined value.

If the caller needs to reponsible for making sure the MaybeAlign
has a value, then we should just make the caller convert it to an Align
with operator*.

I explicitly deleted the relational comparison operators that
were being inherited from Optional. It's unclear what the meaning
of two MaybeAligns were one is defined and the other isn't
should be. So make the caller reponsible for defining the behavior.

I left the ==/!= operators from Optional. But now that exposed a
weird quirk that ==/!= between Align and MaybeAlign required the
MaybeAlign to be defined. But now we use the operator== from
Optional that takes an Optional and the Value.

Differential Revision: https://reviews.llvm.org/D80455
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
The file was modifiedllvm/unittests/Support/AlignmentTest.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/LTO/LTO.cpp
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
The file was modifiedllvm/lib/IR/Globals.cpp
The file was modifiedllvm/include/llvm/Support/Alignment.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/IR/DataLayout.h
The file was modifiedllvm/lib/Transforms/IPO/AttributorAttributes.cpp
Commit 0c6bba71e3926edf19251425fa6435250f148ece by nikita.ppv
[TargetPassConfig] Don't add alias analysis at optnone

When performing codegen at optnone, don't add alias analysis to
the pipeline. We don't need it, but it causes an unnecessary
dominator tree calculation.

I've also moved the module verifier call to the top so that a bunch
of disabled-at-optnone passes group more nicely.

Differential Revision: https://reviews.llvm.org/D80378
The file was modifiedllvm/test/CodeGen/ARM/O3-pipeline.ll
The file was modifiedllvm/test/CodeGen/X86/O0-pipeline.ll
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp
The file was modifiedllvm/test/CodeGen/AArch64/O0-pipeline.ll
The file was modifiedllvm/test/CodeGen/X86/O3-pipeline.ll
The file was modifiedllvm/test/CodeGen/AArch64/O3-pipeline.ll
Commit 0591329dd1f1b1691c65e700c2805590a090b7d8 by mydeveloperday
[Analyzer][WebKit][NFC] Correct documentation to avoid sphinx build error

This was introduced with commit 54e91a3c7010
The file was modifiedclang/docs/analyzer/checkers.rst
Commit 14d358537f124a732adad1ec6edf3981dc9baece by michal.paszkowski
Added a new IRCanonicalizer pass.

Summary:
Added a new IRCanonicalizer pass which aims to transform LLVM modules into
a canonical form by reordering and renaming instructions while preserving the
same semantics. The canonicalizer makes it easier to spot semantic differences
when diffing two modules which have undergone different passes.

Presentation: https://www.youtube.com/watch?v=c9WMijSOEUg

Reviewed by: plotfi

Differential Revision: https://reviews.llvm.org/D66029
The file was modifiedllvm/lib/Transforms/Utils/Utils.cpp
The file was addedllvm/test/Transforms/IRCanonicalizer/reordering-instructions.ll
The file was modifiedllvm/include/llvm/Transforms/Utils.h
The file was modifiedllvm/docs/Passes.rst
The file was addedllvm/test/Transforms/IRCanonicalizer/naming-basic-blocks.ll
The file was modifiedllvm/lib/Transforms/Utils/CMakeLists.txt
The file was addedllvm/test/Transforms/IRCanonicalizer/reordering-phi-node-values.ll
The file was addedllvm/test/Transforms/IRCanonicalizer/naming-arguments.ll
The file was modifiedllvm/include/llvm/LinkAllPasses.h
The file was addedllvm/test/Transforms/IRCanonicalizer/naming-instructions.ll
The file was modifiedllvm/include/llvm/InitializePasses.h
The file was addedllvm/lib/Transforms/Utils/IRCanonicalizer.cpp
The file was modifiedllvm/docs/ReleaseNotes.rst
Commit a0c7108b99f834cd7571ae57872116a4ef2682d9 by llvmgnsyncbot
[gn build] Port 14d358537f1
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Commit fc12ead8ff514b834a648f8b6af56cf57993158b by michal.paszkowski
Revert "[gn build] Port 14d358537f1"

This reverts commit a0c7108b99f834cd7571ae57872116a4ef2682d9.
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Commit 335de55fa3384946f1e62050f2545c0966163236 by michal.paszkowski
Revert "Added a new IRCanonicalizer pass."

This reverts commit 14d358537f124a732adad1ec6edf3981dc9baece.
The file was modifiedllvm/include/llvm/InitializePasses.h
The file was removedllvm/test/Transforms/IRCanonicalizer/reordering-instructions.ll
The file was removedllvm/test/Transforms/IRCanonicalizer/naming-arguments.ll
The file was removedllvm/lib/Transforms/Utils/IRCanonicalizer.cpp
The file was removedllvm/test/Transforms/IRCanonicalizer/naming-basic-blocks.ll
The file was modifiedllvm/include/llvm/LinkAllPasses.h
The file was removedllvm/test/Transforms/IRCanonicalizer/naming-instructions.ll
The file was removedllvm/test/Transforms/IRCanonicalizer/reordering-phi-node-values.ll
The file was modifiedllvm/docs/Passes.rst
The file was modifiedllvm/docs/ReleaseNotes.rst
The file was modifiedllvm/include/llvm/Transforms/Utils.h
The file was modifiedllvm/lib/Transforms/Utils/Utils.cpp
The file was modifiedllvm/lib/Transforms/Utils/CMakeLists.txt
Commit 174322c2737d699e199db4762aaf4217305ec465 by marek
[libc++] Mark __cpp_lib_hardware_interference_size as unimplemented. This fxes bug PR41423.

Summary:
As described in the bug report:
The commit a8b9f59e8caf378d56e8bfcecdb22184cdabf42d "Implement feature test macros using a script" added test features macros for libc++. Among others, it added `__cpp_lib_hardware_interference_size`. However, there is nothing like std::hardware_constructive_interference_size nor std::hardware_destructive_interference_size, that should be in header <new>.

* https://bugs.llvm.org/show_bug.cgi?id=41423

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D80431
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/version.version.pass.cpp
The file was modifiedlibcxx/utils/generate_feature_test_macro_components.py
The file was modifiedlibcxx/include/version
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/new.version.pass.cpp
The file was modifiedlibcxx/docs/FeatureTestMacroTable.rst
Commit 10f0f98eac5b20796ae804a2df2a9d853d59d3bd by steveire
Add a way to set traversal mode in clang-query

Reviewers: aaron.ballman

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73037
The file was modifiedclang-tools-extra/clang-query/QuerySession.h
The file was modifiedclang-tools-extra/clang-query/QueryParser.h
The file was modifiedclang-tools-extra/unittests/clang-query/QueryParserTest.cpp
The file was modifiedclang-tools-extra/clang-query/Query.cpp
The file was modifiedclang-tools-extra/clang-query/Query.h
The file was modifiedclang-tools-extra/clang-query/QueryParser.cpp
Commit 38c5d6f70060046bbbfec7491c7ba54a50fa5d16 by grimar
[yaml2obj] - Add a technical prefix for each unnamed chunk.

This change does not affect the produced binary.

In this patch I assign a technical suffix to each section/fill
(i.e. chunk) name when it is empty. It allows to simplify the code
slightly and improve error messages reported.

In the code we have the section to index mapping, SN2I, which is
globally used. With this change we can use it to map "empty"
names to indexes now, what is helpful.

Differential revision: https://reviews.llvm.org/D79984
The file was modifiedllvm/test/tools/yaml2obj/ELF/section-link.yaml
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp
The file was modifiedllvm/test/tools/yaml2obj/ELF/custom-null-section.yaml
Commit 304b0ed40392830e6f833c56b38cdc8296f58ce4 by grimar
[yaml2obj] - Move "repeated section/fill name" check earlier.

This allows to simplify the code.
Doing checks early is generally useful.

Differential revision: https://reviews.llvm.org/D79985
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp
Commit 421a40b32520f5a3764a974df44f89e7d80bc6b4 by arsenm2
TableGen: Don't reconstruct CodeGenDAGTarget

This is quite expensive and it's already available.

Just ReadLegalValueTypes is taking 4 seconds for me in a debug build
for AMDGPU's -gen-instr-info, and this was introducing a second call.
The file was modifiedllvm/utils/TableGen/InstrInfoEmitter.cpp
Commit e32f04cdc95224589f30148599c362ba37bae7b6 by maskray
[ELF] Parse SHT_GNU_verneed and respect versioned undefined symbols in shared objects

An undefined symbol in a shared object can be versioned, like `f@v1`.
We currently insert `f` as an Undefined into the symbol table, but we
should insert `f@v1` instead.

The string `v1` is inferred from SHT_GNU_versym and SHT_GNU_verneed.
This patch implements the functionality.

Failing to do this can cause two issues:

* If a versioned symbol referenced by a shared object is defined in the
  executable, we will fail to export it.
* If a versioned symbol referenced by a shared object in another object
  file, --no-allow-shlib-undefined may spuriously report an
  "undefined reference to " error. See https://bugs.llvm.org/show_bug.cgi?id=44842
  (Linking -lfftw3 -lm on Arch Linux can cause
  `undefined reference to __log_finite`)

Reviewed By: grimar

Differential Revision: https://reviews.llvm.org/D80059
The file was addedlld/test/ELF/invalid/verneed-shared.yaml
The file was modifiedlld/ELF/InputFiles.cpp
The file was addedlld/test/ELF/verneed-shared.s
The file was modifiedlld/ELF/InputFiles.h
Commit 286ca0f7fd6bf26923f3df464e6a74d032f242ea by arsenm2
Silence warning from unit test

This was printing about r600 not being a valid subtarget for an amdgcn
triple. This is an awkward place because r600 and amdgcn unfortunately
occupy the same target. Silence the warning by specifying an explicit
subtarget.
The file was modifiedllvm/unittests/MI/LiveIntervalTest.cpp
Commit 2e82667f60237c32d8a10eb04825ff434a3e474c by arsenm2
AMDGPU: Define mode register

This should eventually model FP mode constraints as well as the other
special fields it tracks.
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.td
Commit 76e3dd0a490d7da25ccf35c29b3b7ec34908f7d6 by arsenm2
AMDGPU: Implement isConstantPhysReg

I don't think any of these registers are used in contexts where this
would do anything yet.
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
Commit 1d96dca9491e3d75c11c3cd1acff5fcda8c2f613 by Matthew.Arsenault
HIP: Try to deal with more llvm package layouts

The various HIP builds are all inconsistent.

The default llvm install goes to ${INSTALL_PREFIX}/bin/clang, but the
rocm packaging scripts move this under
${INSTALL_PREFIX}/llvm/bin/clang. Some other builds further pollute
this with ${INSTALL_PREFIX}/bin/x86_64/clang. These should really be
consolidated, but try to handle them for now.
The file was modifiedclang/lib/Driver/ToolChains/AMDGPU.cpp
Commit 27fe841aa650a24fd98da2fb6c6eb2fca806a63f by Matthew.Arsenault
AMDGPU: Refine rcp/rsq intrinsic folding for modern FP rules

We have to assume undef could be an snan, which would need quieting so
returning qnan is safer than undef. Also consider strictfp, and don't
care if the result rounded.
The file was modifiedllvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
Commit cdd006eec9409923f9a56b9026ce2cb72e7b71dc by Matthew.Arsenault
SimplifyCFG: Clean up optforfuzzing implementation

This should function as any other SimplifyCFGOption rather than having
the transform check and specially consider the attribute itself.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
The file was modifiedllvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/Local.h
Commit fe0006c882f1c134b2abe8552d48c876cde9343d by llvm-dev
TargetLowering.h - remove unnecessary TargetMachine.h include. NFC

Replace with forward declaration and move dependency down to source files that actually need it.

Both TargetLowering.h and TargetMachine.h are 2 of the most expensive headers (top 10) in the ClangBuildAnalyzer report when building llc.
The file was modifiedllvm/lib/Target/X86/X86Subtarget.h
The file was modifiedllvm/lib/CodeGen/Analysis.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZTDC.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/WinException.cpp
The file was modifiedllvm/lib/CodeGen/SwitchLoweringUtils.cpp
The file was modifiedllvm/lib/Target/ARM/ARMSubtarget.h
The file was modifiedllvm/lib/Target/Sparc/SparcTargetObjectFile.cpp
The file was modifiedllvm/lib/CodeGen/ExpandMemCmp.cpp
The file was modifiedllvm/lib/CodeGen/TypePromotion.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetObjectFile.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZSubtarget.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
The file was modifiedllvm/lib/CodeGen/LiveDebugValues.cpp
The file was modifiedllvm/lib/CodeGen/LowerEmuTLS.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/CallLowering.cpp
The file was modifiedllvm/lib/LTO/UpdateCompilerUsed.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
Commit 2833c46f75a9cb97d717101a70db76d20cc4fcbd by nikita.ppv
[DwarfEHPrepare] Don't prune unreachable resumes at optnone

Disable pruning of unreachable resumes in the DwarfEHPrepare pass
at optnone. While I expect the pruning itself to be essentially free,
this does require a dominator tree calculation, that is not used for
anything else. Saving this DT construction makes for a 0.4% O0
compile-time improvement.

Differential Revision: https://reviews.llvm.org/D80400
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp
The file was modifiedllvm/test/CodeGen/AArch64/O0-pipeline.ll
The file was modifiedllvm/include/llvm/CodeGen/Passes.h
The file was modifiedllvm/lib/CodeGen/DwarfEHPrepare.cpp
The file was modifiedllvm/test/CodeGen/X86/O0-pipeline.ll
Commit 8d041811983b0b8b9df5fa5f76d8b9d5178d03ea by flo
[ValueTracking] Use assumptions in computeConstantRange.

This patch updates computeConstantRange to optionally take an assumption
cache as argument and use the available assumptions to limit the range
of the result.

Currently this is limited to assumptions that are comparisons.

Reviewers: reames, nikic, spatel, jdoerfert, lebedev.ri

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D76193
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
The file was modifiedllvm/include/llvm/Analysis/ValueTracking.h
The file was modifiedllvm/unittests/Analysis/ValueTrackingTest.cpp
Commit 2e43bab1c161a97df4883def3c4c4a8b92883377 by Jinsong Ji
[docs] Fix warnings in ConstantInterpreter

Fixed following trivial issues that caught by warnings by adding
indents.

clang/docs/ConstantInterpreter.rst:133: WARNING: Bullet list ends
without a blank line; unexpected unindent.
clang/docs/ConstantInterpreter.rst:136: WARNING: Bullet list ends
without a blank line; unexpected unindent.
clang/docs/ConstantInterpreter.rst:153: WARNING: Bullet list ends
without a blank line; unexpected unindent.
clang/docs/ConstantInterpreter.rst:195: WARNING: Bullet list ends
without a blank line; unexpected unindent.
clang/docs/ConstantInterpreter.rst:225: WARNING: Bullet list ends
without a blank line; unexpected unindent.
clang/docs/ConstantInterpreter.rst:370: WARNING: Bullet list ends
without a blank line; unexpected unindent.
clang/docs/ConstantInterpreter.rst:383: WARNING: Bullet list ends
without a blank line; unexpected unindent.
The file was modifiedclang/docs/ConstantInterpreter.rst
Commit f2ffa33c79d3d0636d6c8eb7b5b7bcf8db7b397b by Jonas Devlieghere
[lldb/Interpreter] Fix another eExpressionThreadVanished warning

Fixes warning: enumeration value 'eExpressionThreadVanished' not handled
in switch [-Wswitch] in CommandInterpreter.cpp.
The file was modifiedlldb/source/Interpreter/CommandInterpreter.cpp
Commit c3116182c80b8d23b2136b69d46ecc4cd597b38c by Jonas Devlieghere
Revert "[lldb/Interpreter] Fix another eExpressionThreadVanished warning"

This reverts commit f2ffa33c79d3d0636d6c8eb7b5b7bcf8db7b397b. My local
checkout was behind and Eric already took care of it in the meantime.
The file was modifiedlldb/source/Interpreter/CommandInterpreter.cpp
Commit a521532aa16df2c06c91488f2a4e787586f0a611 by zoecarver
[NFC] Remove non-variadic overloads of allocator_traits::construct.

Summary:
Libcxx only supports compilers with variadics. We can safely remove all "fake" variadic overloads of allocator_traits::construct.

This also provides the correct behavior if anything other than exactly one argument is supplied to allocator_traits::construct in C++03 mode.

Reviewers: ldionne, #libc!

Subscribers: dexonsmith, libcxx-commits

Tags: #libc

Differential Revision: https://reviews.llvm.org/D80067
The file was modifiedlibcxx/include/memory
Commit de172ef61eab6776c1dbeb5f669e40272e388473 by maskray
[CFIInstrInserter] Delete unneeded checks
The file was modifiedllvm/lib/CodeGen/CFIInstrInserter.cpp
Commit 6e48a6e407bf23ca5baf8bbfead8f869786bec34 by zoecarver
[libcxx] Fix deprecation warning by suppressing deprecated around
__test_has_construct.

In C++17 some tests started failing after a521532aa16df2c06c91488f2a4e787586f0a611. This fixes those errors by suppressing the deprecation warning when calling `construct` in `__test_has_construct`. This is the same solution as `__has_destroy_test` already uses.

Reviewers: ldionne, #libc!

Subscribers: dexonsmith, libcxx-commits

Tags: #libc

Differential Revision: https://reviews.llvm.org/D80481
The file was modifiedlibcxx/include/memory
Commit b631f86ac5b9df3f87ae963415d17e35104eca86 by amy.kwan1
[TLI][PowerPC] Introduce TLI query to check if MULH is cheaper than MUL + SHIFT

This patch introduces a TargetLowering query, isMulhCheaperThanMulShift.

Currently in DAG Combine, it will transform mulhs/mulhu into a
wider multiply and a shift if the wide multiply is legal.

This TLI function is implemented on 64-bit PowerPC, as it is more desirable to
have multiply-high over multiply + shift for words and doublewords. Having
multiply-high can also aid in further transformations that can be done.

Differential Revision: https://reviews.llvm.org/D78271
The file was modifiedllvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.h
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/test/CodeGen/PowerPC/loop-instr-form-prepare.ll
The file was modifiedllvm/test/CodeGen/PowerPC/machine-pre.ll
The file was modifiedllvm/test/CodeGen/PowerPC/ppc64-P9-mod.ll
The file was modifiedllvm/test/CodeGen/PowerPC/srem-vector-lkk.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
Commit 9292ece9956c98acf0cfa6e188316243ffbf4bed by efriedma
[clang driver] Spell "--export-dynamic-symbol" with two dashes.

This doesn't make a difference for linkers that support the option, but
it improves the error message from older linkers that don't support it.
The file was modifiedclang/test/Driver/sanitizer-ld.c
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp
Commit 088fb9734843c09493d5965baed775c4ec32d5fb by Vitaly Buka
[NFC, StackSafety] LTO tests for MTE and StackSafety

Summary:
The test demonstrates the current state of the compiler and
I am going to resolve FIXME in followup patches.

Reviewers: eugenis

Reviewed By: eugenis

Subscribers: inglorion, hiraditya, steven_wu, dexonsmith, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80039
The file was addedclang/test/Driver/memtag_lto.c
Commit 99660217e930c131407766f68024f76acc375597 by Amara Emerson
[AArch64][GlobalISel] When generating SUBS for compares, don't write to wzr/xzr.

Although writing to wzr/xzr is correct since we don't care about the result
of the sub, only the flags, doing so causes tail merge blocks to fail.

Writing to an unused virtual register instead allows the optimization to fire,
improving performance significantly on 256.bzip2.

Differential Revision: https://reviews.llvm.org/D80460
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-arith-immed-compare.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/tbnz-slt.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-cmp.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/opt-fold-compare.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/tbz-sgt.mir
Commit cc65a7a5ea81f8cb5068e99d9bf407745623c624 by llvm-dev
[X86] Improve i8 + 'slow' i16 funnel shift codegen

This is a preliminary patch before I deal with the xor+and issue raised in D77301.

We get much better code for i8/i16 funnel shifts by concatenating the operands together and performing the shift as a double width type, it avoids repeated use of the shift amount and partial registers.

fshl(x,y,z) -> (((zext(x) << bw) | zext(y)) << (z & (bw-1))) >> bw.
fshr(x,y,z) -> (((zext(x) << bw) | zext(y)) >> (z & (bw-1))) >> bw.

Alive2: http://volta.cs.utah.edu:8080/z/CZx7Cn

This doesn't do as well for i32 cases on x86_64 (the xor+and followup patch is much better) so I haven't bothered with that.

Cases with constant amounts are more dubious as well so I haven't currently bothered with those - its these kind of 'edge' cases that put me off trying to put this in TargetLowering::expandFunnelShift.

Differential Revision: https://reviews.llvm.org/D80466
The file was modifiedllvm/test/CodeGen/X86/rotate-extract.ll
The file was modifiedllvm/test/CodeGen/X86/fshr.ll
The file was modifiedllvm/test/CodeGen/X86/fshl.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 79401230840ffb0a20c146aa108224fad99d702f by craig.topper
[X86] Fix typo in comment. NFC
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Commit 2bb822bc902a094347c4e3a885d1563200907f20 by craig.topper
[X86] Add family/model for Intel Comet Lake CPUs for -march=native and function multiversioning

This adds the family/model returned by CPUID for some Intel
Comet Lake CPUs. Instruction set and tuning wise these are
the same as "skylake".

These are not in the Intel SDM yet, but these should be correct.
The file was modifiedllvm/lib/Support/Host.cpp
The file was modifiedcompiler-rt/lib/builtins/cpu_model.c
Commit 8310c9b74102a5a66fae18596baf9fcc5ed63f61 by llvm-dev
[X86][AVX] Call SimplifyDemandedBits on MaskedLoadSDNode with non-boolean masks

On X86 (AVX1/AVX2), non-boolean masked loads only demand the sign bit of the mask, we already do the equivalent for masked stores.

Annoyingly I can't easily handle this inside TargetLowering::SimplifyDemandedBits as this is an x86 specific case for a generic node.

Differential Revision: https://reviews.llvm.org/D80478
The file was modifiedllvm/test/CodeGen/X86/pr45563-2.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/masked_load.ll
Commit f794808bb9ec06966a67fe33d41a13b9601768f8 by martin
[LLD/MinGW]: Expose --thinlto-cache-dir

Differential Revision: https://reviews.llvm.org/D80438
The file was modifiedlld/MinGW/Options.td
The file was modifiedlld/test/MinGW/driver.test
The file was modifiedlld/MinGW/Driver.cpp
Commit 04d32d7ac18dd97258839d2b50976365dd165f2d by llvm-dev
X86TargetMachine.h - remove unnecessary X86Subtarget forward declaration. NFC.

We have to include X86Subtarget.h.
The file was modifiedllvm/lib/Target/X86/X86TargetMachine.h
Commit ffb367217d6abc4c28840cbb6f09edb6ab7a4699 by llvm-dev
[X86] Move CONCAT_VECTORS/INSERT_SUBVECTOR actions inside loop. NFC.

CONCAT_VECTORS/INSERT_SUBVECTOR both are custom on v32i1/v64i1 like the other ops in the loop.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 72210ce7f57192652414ebbdf9f643f86532d700 by llvm-dev
Fix Wdocumentation warnings after argument renaming. NFC.
The file was modifiedclang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
Commit 16031067252dc466cdc4311ab1491f996e5b4848 by llvm-dev
[TargetLowering] Improve expandFunnelShift shift amount masking

For the 'inverse shift', we currently always perform a subtraction of the original (masked) shift amount.

But for the case where we are handling power-of-2 type widths, we can replace:

(sub bw-1, (and amt, bw-1) ) -> (and (xor amt, bw-1), bw-1) -> (and ~amt, bw-1)

This allows x86 shifts to fold away the and-mask.

Followup to D77301 + D80466.

http://volta.cs.utah.edu:8080/z/Nod0Gr

Differential Revision: https://reviews.llvm.org/D80489
The file was modifiedllvm/test/CodeGen/X86/fshl.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/fshr.ll
Commit 478f2ce5d3c44565b328c18d999deb6d1f3c7ee1 by llvm-dev
[X86] Pull out repeated DemandedBits signmask variable. NFC.

Both paths always create the same DemandedBits mask.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit d0f2a8a0492367c6a049afd30eafa550f04e8d5e by llvm-dev
X86Subtarget.h - remove unnecessary TargetMachine.h include. NFC.

By moving X86Subtarget::isPositionIndependent() into X86Subtarget.cpp we can remove the header dependency and move the few uses into source files.
The file was modifiedllvm/lib/Target/X86/X86Subtarget.h
The file was modifiedllvm/lib/Target/X86/X86MCInstLower.cpp
The file was modifiedllvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
The file was modifiedllvm/lib/Target/X86/X86IndirectThunks.cpp
The file was modifiedllvm/lib/Target/X86/X86Subtarget.cpp
Commit 5e9392deaf5bfa43846334e9b07a126ae3410a38 by steveire
Add explicit traversal mode to matchers for implicit constructors
The file was modifiedclang-tools-extra/clang-tidy/readability/RedundantStringInitCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/bugprone/StringConstructorCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/bugprone/StringLiteralWithEmbeddedNulCheck.cpp
Commit 04ed532ef0ce76d53ca456cbc581756bb01d30e7 by steveire
Fix skip-invisible with overloaded method calls
The file was modifiedclang/lib/AST/Expr.cpp
The file was modifiedclang/unittests/AST/ASTTraverserTest.cpp
Commit 3ed8ebc2f6b8172bed48cc5986d3b7af4cfca1bc by steveire
Fix return values of some matcher functions

The old return values mean

* implicit conversion
* not being able to write sizeOfExpr().bind() for example
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h
Commit 510b0f42371cc123eb33e86a527866123e10b2ff by llvm-dev
LoopSimplify.h - reduce unnecessary includes to forward declarations. NFC.
The file was modifiedllvm/include/llvm/Transforms/Utils/LoopSimplify.h
Commit a6502560628a726b72abb90bda4700da8356a4a1 by llvm-dev
AMDGPULibFunc - fix include order. NFC.

Ensure AMDGPULibFunc.h module header is first, and fix exposed missing forward declaration.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULibFunc.h
Commit 725b3463c53b380b322555b02f1e33e530c52f59 by llvm-dev
AMDGPUTargetObjectFile.h - remove unnecessary includes. NFC.

As we're inheriting from TargetLoweringObjectFileELF, TargetLoweringObjectFileImpl.h already declares all types we require in the overrides.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetObjectFile.h
Commit 15224408f0d49ddd2716080c52a9d0f9f64a2b5a by flo
[VPlan] Use VPUser for VPWidenSelectRecipe operands (NFC).

VPWidenSelectRecipe already contains a VPUser, but it is not used. This
patch updates the code related to VPWidenSelectRecipe to use VPUser for
its operands.

Reviewers: Ayal, gilr, rengolin

Reviewed By: gilr

Differential Revision: https://reviews.llvm.org/D80219
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
Commit b05b69e056adfa95f8bbb92b541247eb0ba055ee by llvm-dev
AMDGPUInstPrinter.cpp - add CommandLine.h include. NFC.

Fixes implicit dependency that will be exposed by a future patch.
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
Commit 7eed772a279e8cd45eee70cab2cfa71f71cc90c8 by spatel
[PatternMatch] abbreviate vector inst matchers; NFC

Readability is not reduced with these opcodes/match lines,
so reduce odds of awkward wrapping from 80-col limit.
The file was modifiedllvm/lib/Transforms/Vectorize/VectorCombine.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/lib/CodeGen/CodeGenPrepare.cpp
The file was modifiedllvm/include/llvm/IR/PatternMatch.h
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/unittests/IR/PatternMatch.cpp
The file was modifiedllvm/lib/Target/ARM/MVETailPredication.cpp
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
The file was modifiedllvm/lib/Analysis/VectorUtils.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit c048a02b5b26c21a2a891131e3d52c7ddbc3cf62 by spatel
[InstCombine] fold FP trunc into exact itofp

Similar to D79116 and rGbfd512160fe0 - if the 1st cast
is exact, then we can go directly to the destination
type because there is no double-rounding.
The file was modifiedllvm/test/Transforms/InstCombine/fptrunc.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
Commit 4c5818dd8cd9336136a80a02b262b501b23f6492 by n.james93
[clang-tidy] Fix potential assert in use-noexcept check

Summary: Fix a potential assert in use-noexcept check if there is an issue getting the `TypeSourceInfo` as well as a small clean up.

Reviewers: aaron.ballman, alexfh, gribozavr2

Reviewed By: aaron.ballman

Subscribers: xazax.hun, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80371
The file was modifiedclang-tools-extra/clang-tidy/modernize/UseNoexceptCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/modernize/UseNoexceptCheck.h
The file was addedclang-tools-extra/test/clang-tidy/checkers/modernize-use-noexcept-error.cpp
Commit 86e3abc9e63e01675cb37919c55419f5c190d90e by shkzhang
[PowerPC] Add some InstAlias definitions

Summary:
This patch add the InstAlias definitions for below instructions.

ADDI ADDIS ADDI8 ADDIS8
RLWINM8
ISEL ISEL8
OR OR_rec ORI ORI8 XORI8
CNTLZW8 CNTLZW8_rec
TEND TSR
RFEBB
NOR NOR_rec
MTCRF
SUBF SUBF_rec SUBFC SUBFC_rec
RLDICL_32_64
TW

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D77559
The file was modifiedllvm/test/CodeGen/PowerPC/optimize-andiso.ll
The file was modifiedllvm/test/CodeGen/PowerPC/funnel-shift.ll
The file was modifiedllvm/test/CodeGen/PowerPC/stack-guard-reassign.ll
The file was modifiedllvm/test/CodeGen/PowerPC/use-cr-result-of-dom-icmp-st.ll
The file was modifiedllvm/test/CodeGen/PowerPC/CompareEliminationSpillIssue.ll
The file was modifiedllvm/test/CodeGen/PowerPC/signbit-shift.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrHTM.td
The file was modifiedlld/test/ELF/ppc32-call-stub-pic.s
The file was modifiedllvm/test/MC/Disassembler/PowerPC/ppc64-encoding-p8htm.txt
The file was modifiedllvm/test/CodeGen/PowerPC/atomics-regression.ll
The file was modifiedllvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll
The file was modifiedllvm/test/CodeGen/PowerPC/sat-add.ll
The file was modifiedllvm/test/CodeGen/PowerPC/loop-instr-form-prepare.ll
The file was modifiedllvm/test/CodeGen/PowerPC/expand-isel.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fold-zero.ll
The file was modifiedllvm/test/CodeGen/PowerPC/noPermuteFormasking.ll
The file was modifiedllvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
The file was modifiedllvm/test/CodeGen/PowerPC/subreg-postra.ll
The file was modifiedllvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fold-remove-li.ll
The file was modifiedllvm/test/CodeGen/PowerPC/shift128.ll
The file was modifiedllvm/test/CodeGen/PowerPC/popcnt-zext.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fast-isel-binary.ll
The file was modifiedllvm/test/CodeGen/PowerPC/eqv-andc-orc-nor.ll
The file was modifiedllvm/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
The file was modifiedllvm/test/CodeGen/PowerPC/select_const.ll
The file was modifiedllvm/test/CodeGen/PowerPC/i64_fp_round.ll
The file was modifiedllvm/test/CodeGen/PowerPC/ifcvt.ll
The file was modifiedllvm/test/CodeGen/PowerPC/memcmp.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vec-min-max.ll
The file was modifiedllvm/test/CodeGen/PowerPC/ppc-crbits-onoff.ll
The file was modifiedllvm/test/CodeGen/PowerPC/mul-const.ll
The file was modifiedllvm/test/CodeGen/PowerPC/i1-ext-fold.ll
The file was modifiedllvm/test/CodeGen/PowerPC/setcc-logic.ll
The file was modifiedllvm/test/CodeGen/PowerPC/store-combine.ll
The file was modifiedllvm/test/CodeGen/PowerPC/htm.ll
The file was modifiedllvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
The file was modifiedllvm/test/CodeGen/PowerPC/spe.ll
The file was modifiedllvm/test/CodeGen/PowerPC/crbits.ll
The file was modifiedllvm/test/CodeGen/PowerPC/stack-realign.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vsx.ll
The file was modifiedllvm/test/MC/PowerPC/ppc64-encoding.s
The file was modifiedllvm/lib/Target/PowerPC/PPCInstr64Bit.td
The file was modifiedllvm/test/CodeGen/PowerPC/inc-of-add.ll
The file was modifiedllvm/test/MC/Disassembler/PowerPC/ppc64le-encoding.txt
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.td
The file was modifiedllvm/test/CodeGen/PowerPC/urem-lkk.ll
The file was modifiedllvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
The file was modifiedllvm/test/CodeGen/PowerPC/ppc64-P9-mod.ll
The file was modifiedllvm/test/MC/PowerPC/ppc64-operands.s
The file was modifiedllvm/test/CodeGen/PowerPC/f128-compare.ll
The file was modifiedllvm/test/CodeGen/PowerPC/subc.ll
The file was modifiedllvm/test/CodeGen/PowerPC/2009-09-18-carrybit.ll
The file was modifiedllvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll
The file was modifiedllvm/test/CodeGen/PowerPC/remove-redundant-load-imm.ll
The file was modifiedllvm/test/CodeGen/PowerPC/machine-pre.ll
The file was modifiedllvm/test/CodeGen/PowerPC/expand-contiguous-isel.ll
The file was modifiedllvm/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll
The file was modifiedllvm/test/CodeGen/PowerPC/sms-phi-2.ll
The file was modifiedllvm/test/CodeGen/PowerPC/optcmp.ll
The file was modifiedllvm/test/CodeGen/PowerPC/pr44183.ll
The file was modifiedllvm/test/MC/Disassembler/PowerPC/ppc64-encoding.txt
The file was modifiedllvm/test/CodeGen/PowerPC/srem-vector-lkk.ll
The file was modifiedllvm/test/CodeGen/PowerPC/sub-of-not.ll
The file was modifiedllvm/test/MC/PowerPC/htm.s
The file was modifiedllvm/test/CodeGen/PowerPC/sms-cpy-1.ll
The file was modifiedllvm/test/CodeGen/PowerPC/srem-lkk.ll
Commit 71bed8206b354a08ad88a2c4585eecf2d94cb444 by llvm-dev
AMDGPU.h - reduce TargetMachine.h include. NFC.

Replace TargetMachine.h include with forward declaration and CodeGen.h include in AMDGPU.h.

Exposes a couple of implicit dependencies that require additional forward declarations/includes.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUFixFunctionBitcasts.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h
Commit 1e7865d94647119aab3c1b2e8ce259ca1634bc64 by llvm-dev
[X86] SimplifyMultipleUseDemandedBitsForTargetNode - add initial X86ISD::VSRAI handling.

This initial version only peeks through cases where we just demand the sign bit of an ashr shift, but we could generalize this further depending on how many sign bits we already have.

The pr18014.ll case is a minor annoyance - we've failed to to move the psrad/paddd after the blendvps which would have avoided the extra move, but we have still increased the ILP.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/avx2-masked-gather.ll
The file was modifiedllvm/test/CodeGen/X86/pr18014.ll
The file was modifiedllvm/test/CodeGen/X86/movmsk-cmp.ll
Commit d43fac052e16412a5dbd4e265064d6038dda9a89 by spatel
[PhaseOrdering] adjust test to use default alias analysis with new pass manager; NFC

As discussed in D80236 - this test (like all PhaseOrdering tests?)
was intended to show that there is no difference with the new
pass manager, but the 'opt' command requires extra parameters
to make that happen.
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/addsub.ll
Commit 0deab8a54fd8d83853740eb751ddba967ad514f7 by flo
[LV] Either get invariant condition OR vector condition.

Currently we unconditionally get the first lane of the condition
operand, even if we later use the full vector condition. This can result
in some unnecessary instructions being generated.

Suggested as follow-up in D80219.
The file was modifiedllvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/optsize.ll
Commit 57bb4787d72f1ae64f877b05c98d506602ac5958 by spatel
[Pass Manager] remove EarlyCSE as clean-up for VectorCombine

EarlyCSE was added with D75145, but the motivating test is
not regressed by removing the extra pass now. That might be
because VectorCombine altered the way it processes instructions,
or it might be from (re)moving VectorCombine in the pipeline.

The extra round of EarlyCSE appears to cost approximately
0.26% in compile-time as discussed in D80236, so we need some
evidence to justify its inclusion here, but we do not have
that (yet).

I suspect that between SLP and VectorCombine, we are creating
patterns that InstCombine and/or codegen are not prepared for,
but we will need to reduce those examples and include them as
PhaseOrdering and/or test-suite benchmarks.
The file was modifiedllvm/test/Other/opt-O2-pipeline.ll
The file was modifiedllvm/lib/Transforms/IPO/PassManagerBuilder.cpp
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was modifiedllvm/test/Other/new-pm-thinlto-defaults.ll
The file was modifiedllvm/test/Other/new-pm-defaults.ll
The file was modifiedllvm/test/Other/opt-O3-pipeline.ll
The file was modifiedllvm/test/Other/opt-Os-pipeline.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/opt-pipeline.ll
Commit e508d643cfd583b92dfd5484e27fb280cf0f3c60 by llvm-dev
[X86][AVX] Fold extract_subvector(broadcast(x),c) -> extract_subvector(broadcast(x),0) iff c != 0

If we're extracting an upper subvector from a broadcast we're better off extracting the lowest subvector instead as it avoids an actual extract instruction and might help SimplifyDemandedVectorElts further simplify the code.
The file was modifiedllvm/test/CodeGen/X86/vector-shift-shl-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-lshr-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-512.ll
The file was modifiedllvm/test/CodeGen/X86/pr45443.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-ashr-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-512.ll
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-256.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 8a5aea7b50429cd4a459511286a7a9f1a7f4f5e2 by llvm-dev
[X86][AVX] Fold extract_subvector(subv_broadcast(x),c) -> (x)

If we're extracting an subvector from a broadcasted subvector of the same type then we can use the source vector directly.
The file was modifiedllvm/test/CodeGen/X86/avx512-vbroadcasti256.ll
The file was modifiedllvm/test/CodeGen/X86/oddshuffles.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 2be92b7f7e41037e051096df8a9c4de35502c036 by steveire
Fix ignore-traversal to call correct method

As is done by ignoreParenImpCasts(). We were not previously calling the
correct internal method.  Adjust tests to account for this.
The file was modifiedclang/lib/AST/Expr.cpp
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
The file was modifiedclang-tools-extra/clang-tidy/readability/UppercaseLiteralSuffixCheck.cpp
Commit e60de8c825d3087dca26d97985febbf97e179311 by steveire
Add missing test
The file was modifiedclang/unittests/AST/ASTTraverserTest.cpp
The file was modifiedclang/lib/AST/Expr.cpp
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
Commit 51dec88c5df26d4ecb5ca3016f0a1c8668685f35 by craig.topper
[X86] Remove isCommutable flag from MULX instructions.

The fixed register constraint on EDX/RDX as an input
makes this not really commutable.
The file was modifiedllvm/lib/Target/X86/X86InstrArithmetic.td
Commit d0da5d2bbe8305d06dc01a98706fd73e11e24a9f by steveire
Change default traversal in AST Matchers to ignore invisible nodes

This makes many scenarios simpler by not requiring the user to write
ignoringImplicit() all the time, nor to account for non-visible
cxxConstructExpr() and cxxMemberCalExpr() nodes. This is also, in part,
inclusive of the equivalent of adding a use of ignoringParenImpCasts()
between all expr()-related matchers in an expression.

The pre-existing traverse(TK_AsIs, ...) matcher can be used to explcitly
match on implicit/invisible nodes. See

  http://lists.llvm.org/pipermail/cfe-dev/2019-December/064143.html

for more

Reviewers: aaron.ballman

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D72534
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/include/clang/AST/ParentMapContext.h
Commit 52b03aaa22f650bbd36ceb3bdae4699dae71b2b8 by Jake.Merdich
[clang-format][PR46043] Parse git config w/ implicit values

Summary:
https://bugs.llvm.org/show_bug.cgi?id=46043

Git's config is generally of the format 'key=val', but a setting
'key=true' can be written as just 'key'.  The git-clang-format script
expects a value and crashes in this case; this change handles implicit
'true' values in the script.

Reviewers: MyDeveloperDay, krasimir, sammccall

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80486
The file was modifiedclang/tools/clang-format/git-clang-format
Commit 838d12207b04b7be7245fdff0ce93335bafe5b78 by maskray
[TargetLoweringObjectFileImpl] Use llvm::transform

Fixes a build issue with libc++ configured with _LIBCPP_RAW_ITERATORS (ADL not effective)

```
llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp:1602:3: error: no matching function for call to 'transform'
  transform(HexString.begin(), HexString.end(), HexString.begin(), tolower);
  ^~~~~~~~~
```

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D80475
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
Commit 4b8632e174d5ba79c4858a1245b96efd3ed281fb by jpienaar
[mlir] Expand operand adapter to take attributes

* Enables using with more variadic sized operands;
* Generate convenience accessors for attributes;
  - The accessor are named the same as their name in ODS and returns attribute
    type (not convenience type) and no derived attributes.

This is first step to changing adapter to support verifying argument
constraints before the op is even created. This does not change the name of
adaptor nor does it require it except for ops with variadic operands to keep this change smaller.

Considered creating separate adapter but decided against that given operands also require attributes in general (and definitely for verification of operands and attributes).

Differential Revision: https://reviews.llvm.org/D80420
The file was modifiedmlir/test/mlir-tblgen/op-operand.td
The file was modifiedmlir/lib/TableGen/OpClass.cpp
The file was modifiedmlir/test/mlir-tblgen/op-decl.td
The file was modifiedmlir/include/mlir/TableGen/OpClass.h
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Commit 20e9fc55feb58dd1f766a494c530684011291ff3 by maskray
[MCDwarf] Delete unneeded DW_AT_prototyped for DW_TAG_label
The file was modifiedllvm/lib/MC/MCDwarf.cpp
The file was modifiedllvm/test/MC/MachO/gen-dwarf.s
Commit 1b79509f97b6c9595027b53d3d67f174d0ae1c78 by maskray
[MCDwarf] Delete unneeded DW_AT_unspecified_parameters
The file was modifiedllvm/test/MC/ARM/dwarf-asm-multiple-sections.s
The file was modifiedllvm/test/MC/MachO/gen-dwarf.s
The file was modifiedllvm/lib/MC/MCDwarf.cpp
Commit 760f45eacadbabf9634fb81d7ccaa16c269cf19e by martin
[CMake] Properly handle the LTO cache arguments for MinGW

We want to make sure that LINKER_IS_LLD_LINK is properly set - in
this case it shouldn't be set when building for MinGW.

Then we want to make the test for it correct and finally include
the option to build with thinlto cache since the MinGW driver now
supports that.

Differential Revision: https://reviews.llvm.org/D80493
The file was modifiedllvm/cmake/modules/HandleLLVMOptions.cmake
Commit 5b7ff6f07ffbcbcfad24f39faad5858cc379fad0 by simon.moll
[VE][NFC] Correct sjlj_expection test

Summary: '|&' works with bash only, so it should not be used in regression
tests.

Differential Revision: https://reviews.llvm.org/D80501
The file was modifiedllvm/test/CodeGen/VE/sjlj_except.ll
Commit b752a2743ab0d24d8da5d97c07fbdb996df78b1f by sam.mccall
[clangd] Log use of heuristic go-to-def. NFC

Generally:
- found results using this method -> log
- no results using this method -> vlog
- method wasn't applied because ineligible -> no log
The file was modifiedclang-tools-extra/clangd/XRefs.cpp
Commit 3895148d7cd8ff76220f8f8209ec06369a8e816f by protze
[OpenMP] Fix a race in task queue reallocation

__kmp_realloc_task_deque implicitly assumes, that the task queue is full
(ntasks == size), therefore tail = size in line 319.
An assertion is added to document this assumption.

The first check for a full queue is before the locking and might not hold
when the lock is taken. So, we need to check again for this condition when
we have the lock.

Reviewed By: AndreyChurbanov

Differential Revision: https://reviews.llvm.org/D80480
The file was modifiedopenmp/runtime/src/kmp_tasking.cpp
Commit 840450549c9199150cbdee29acef756c19660ca1 by ayal.zaks
[LV] Clamp MaxVF to power of 2.

If a loop has a constant trip count known to be a multiple of MaxVF (times user
UF), LV infers that no tail will be generated for any chosen VF. This relies on
the chosen VF's being powers of 2 bound by MaxVF, and assumes MaxVF is a power
of 2. Make sure the latter holds, in particular when MaxVF is set by a memory
dependence distance which may not be a power of 2.

Differential Revision: https://reviews.llvm.org/D80491
The file was addedllvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 447ea9b4f5f562c8fab7d11ecbb10ecd33155d5b by hokein.wu
[AST] default implementation is possible for non-member functions in C++20.

Summary:
Make RAV not visit the default function decl by default.
Also update some stale comments on FunctionDecl::isDefault.

Fixes https://github.com/clangd/clangd/issues/383

Reviewers: sammccall, rsmith

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80288
The file was modifiedclang/include/clang/AST/RecursiveASTVisitor.h
The file was modifiedclang/unittests/Tooling/RecursiveASTVisitorTests/CXXMethodDecl.cpp
The file was modifiedclang/include/clang/AST/Decl.h
Commit 72c5ea1d73bb89af6f82c14ddb0b7f4c2510bab7 by hokein.wu
[clangd] Enable cross-file-rename by default.

Summary:
The cross-file rename feature is stable enough to enable it (has been
rolled out internally for a few weeks).

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80507
The file was modifiedclang-tools-extra/clangd/tool/ClangdMain.cpp
Commit 83bd2c4a06803fa9af7f92a474b1d37cb70397cc by Raphael Isemann
Prevent GetNumChildren from transitively walking pointer chains

Summary:

This is an attempt to fix https://bugs.llvm.org/show_bug.cgi?id=45988,
where SBValue::GetNumChildren returns 2, but SBValue::GetChildAtIndex(1) returns
an invalid value sentinel.

The root cause of this seems to be that GetNumChildren can return the number of
children of a wrong value. In particular, for pointers GetNumChildren just
recursively calls itself on the pointee type, so it effectively walks chains of
pointers. This is different from the logic of GetChildAtIndex, which only
recurses if pointee.IsAggregateType() returns true (IsAggregateType is false for
pointers and references), so it never follows chain of pointers.

This patch aims to make GetNumChildren (more) consistent with GetChildAtIndex by
only recursively calling GetNumChildren for aggregate types.

Ideally, GetNumChildren and GetChildAtIndex would share the code that decides
which pointers/references are followed, but that is a bit more invasive change.

Reviewers: teemperor, jingham, clayborg

Reviewed By: teemperor, clayborg

Subscribers: clayborg, labath, shafik, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D80254
The file was addedlldb/test/API/functionalities/pointer_num_children/TestPointerNumChildren.py
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
The file was addedlldb/test/API/functionalities/pointer_num_children/main.cpp
The file was addedlldb/test/API/functionalities/pointer_num_children/Makefile
Commit fe22e5689e94370b8eadef4b7267201cc9fcb2e3 by Raphael Isemann
[lldb][NFC] Pass DeclarationName to NameSearchContext by value

DeclarationName is usually passed around by value as it's just a pointer.
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/NameSearchContext.h
Commit b087b91c917087bc53d47282a16ee4af78bfe286 by dmitry.preobrazhensky
[AMDGPU][CODEGEN] Added 'A' constraint for inline assembler

Summary: 'A' constraint requires an immediate int or fp constant that can be inlined in an instruction encoding.

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D78494
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/test/CodeGen/AMDGPU/inline-constraints.ll
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
Commit 8e62f3b658cc85bf0a42dec1326c5e87e848485c by llvm-dev
TargetInstrInfo.h - remove unnecessary includes. NFC.
The file was modifiedllvm/include/llvm/CodeGen/TargetInstrInfo.h
Commit 0e83e67cd359aef475e5c3b86c1a5c932cfb1aba by llvm-dev
SystemZInstrBuilder.h - remove unnecessary PseudoSourceValue.h include. NFC.
The file was modifiedllvm/lib/Target/SystemZ/SystemZInstrBuilder.h
Commit 9fa58d1bf2f83a556c109f701aacfb92e2184c23 by llvm-dev
[DAG] Add SimplifyDemandedVectorElts binop SimplifyMultipleUseDemandedBits handling

For the supported binops (basic arithmetic, logicals + shifts), if we fail to simplify the demanded vector elts, then call SimplifyMultipleUseDemandedBits and try to peek through ops to remove unnecessary dependencies.

This helps with PR40502.

Differential Revision: https://reviews.llvm.org/D79003
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-narrow-binop.ll
The file was modifiedllvm/test/CodeGen/X86/combine-pmuldq.ll
The file was modifiedllvm/test/CodeGen/X86/oddsubvector.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-256.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/mul_by_elt.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-128.ll
The file was modifiedllvm/test/CodeGen/X86/combine-sdiv.ll
Commit 7b15dc1e0e8dfaf3efb608734421eac4e2399d6a by Xing
[ObjectYAML][DWARF] Remove unimplemented function.

```
StringMap<std::unique_ptr<MemoryBuffer>>
EmitDebugSections(llvm::DWARFYAML::Data &DI, bool ApplyFixups);
```
is unimplemented and unused.
The file was modifiedllvm/include/llvm/ObjectYAML/DWARFEmitter.h
Commit 9ff361b099f16ce27c8af61806447df5bca52228 by david.green
[ARM] VMULH tests for when other parts are working. NFC
The file was addedllvm/test/CodeGen/Thumb2/mve-vmulh.ll
Commit 5a4bcec8db420cf22b06720d45a9f9981b0297bf by stefanp
[PowerPC][NFC] Split PPCELFStreamer::emitInstruction

Split off PPCELFStreamer::emitPrefixedInstruction from
PPCELFStreamer::emitInstruction.

Differential Revision: https://reviews.llvm.org/D79626
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.h
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
Commit 7293dd5b4033d94ce1397b192a93010e64b2d949 by antiagainst
Added pow intrinsic to LLVMIR dialect

Added pow intrinsic to LLVMIR dialect. Added a roundrip test for it.

Differential Revision: https://reviews.llvm.org/D80248
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
The file was modifiedmlir/test/Target/llvmir-intrinsics.mlir
The file was modifiedmlir/test/Dialect/LLVMIR/roundtrip.mlir
Commit 38366cf1676f9ac8d421586658e8bcd5ac4ab62d by llvm-dev
FunctionLoweringInfo.h - remove orphan addSEHHandlersForLPads declaration. NFC.
The file was modifiedllvm/include/llvm/CodeGen/FunctionLoweringInfo.h
Commit 8f48814879c06bbf9f211fa5d959419f0d2d38b6 by llvm-dev
FunctionLoweringInfo.h - move APInt.h dependency to FunctionLoweringInfo.cpp. NFC.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/FunctionLoweringInfo.h
Commit fa038e03504c7d0dfd438b1dfdd6da7081e75617 by spatel
[x86] favor vector constant load to avoid GPR to XMM transfer, part 2

This replaces the build_vector lowering code that was just added in
D80013
and matches the pattern later from the x86-specific "vzext_movl".
That seems to result in the same or better improvements and gets rid
of the 'TODO' items from that patch.

AFAICT, we always shrink wider constant vectors to 128-bit on these
patterns, so we still get the implicit zero-extension to ymm/zmm
without wasting space on larger vector constants. There's a trade-off
there because that means we miss potential load-folding.

Similarly, we could load scalar constants here with implicit
zero-extension even to 128-bit. That saves constant space, but it
means we forego load-folding, and so it increases register pressure.
This seems like a good middle-ground between those 2 options.

Differential Revision: https://reviews.llvm.org/D80131
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
The file was modifiedllvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
The file was modifiedllvm/test/CodeGen/X86/vec_shift2.ll
The file was modifiedllvm/test/CodeGen/X86/avx-load-store.ll
The file was modifiedllvm/test/CodeGen/X86/packss.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
The file was modifiedllvm/test/CodeGen/X86/fcmp-constant.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
The file was modifiedllvm/test/CodeGen/X86/ret-mmx.ll
The file was modifiedllvm/test/CodeGen/X86/pshufb-mask-comments.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/combine-udiv.ll
The file was modifiedllvm/test/CodeGen/X86/vec_set-A.ll
The file was modifiedllvm/test/CodeGen/X86/avx2-arith.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
The file was modifiedllvm/test/CodeGen/X86/insert-into-constant-vector.ll
The file was modifiedllvm/test/CodeGen/X86/sad.ll
The file was modifiedllvm/test/CodeGen/X86/vector-lzcnt-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-tzcnt-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-v1.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-512-v32.ll
Commit 5bb632339ac53e72b81921b6db9c1f0c1fbf63bb by llvm-dev
InlineAdvisor.h - remove unnecessary PreservedAnalyses forward declaration. NFC.

This is directly defined in PassManager.h
The file was modifiedllvm/include/llvm/Analysis/InlineAdvisor.h
Commit 8b4ecafee66c405ca33b9d2dc826c2d720160432 by llvm-dev
InstructionSimplify.h - remove unnecessary includes. NFC.

Remove unused User.h include.
Replace SetVector.h with forward declaration.
Sort the forward declarations + remove FastMathFlags (defined in Operator.h).
Fix implicit SetVector.h dependency in LowerConstantIntrinsics.cpp.
The file was modifiedllvm/lib/Transforms/Scalar/LowerConstantIntrinsics.cpp
The file was modifiedllvm/include/llvm/Analysis/InstructionSimplify.h
Commit 03ec5b6bc4629b9ce4e11cbf54799995dbcb9c29 by llvm-dev
LoopInfo.h - remove unnecessary PHINode forward declaration. NFC.

This is directly defined in Instructions.h
The file was modifiedllvm/include/llvm/Analysis/LoopInfo.h
Commit 0e3faab6f0fa00668f97747a6a4afa1bc5647ef9 by llvm-dev
MemoryBuiltins.h - remove unnecessary TargetLibraryInfo forward declaration. NFC.

We already have to include TargetLibraryInfo.h
The file was modifiedllvm/include/llvm/Analysis/MemoryBuiltins.h
Commit 8eae32188bbaa4ac5943f8a98b3b7e4bbba55698 by sguelton
Improve stack-clash implementation on x86

- test both 32 and 64 bit version
- probe the tail in dynamic-alloca
- generate more concise code

Differential Revision: https://reviews.llvm.org/D79482
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/stack-clash-large.ll
The file was modifiedllvm/test/CodeGen/X86/stack-clash-medium.ll
The file was modifiedllvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll
Commit 6ade4eb91811c7e7c59634d2de2767421d13a99b by llvm-dev
MemoryLocation.h - reduce Instructions.h include to Instruction.h include. NFC.

Add forward declarations for the few Instr classes we reference.
The file was modifiedllvm/include/llvm/Analysis/MemoryLocation.h
Commit 82bee922afd65bf884abb9ea3db3fc7fede4e1cf by benny.kra
Make FEATURE_AVX512VP2INTERSECT match between compiler-rt and LLVM

compiler-rt also doesn't support bits >= 64 as far as I know.
The file was modifiedllvm/lib/Support/Host.cpp
The file was modifiedllvm/include/llvm/Support/X86TargetParser.def
Commit 5d6c5b463cab7aeb74b20f51af88ba1d1658f8a8 by whitneyt
[LoopUtils] Use llvm::find

Summary: Fixes this build error:

llvm/lib/Transforms/Utils/LoopUtils.cpp:679:26: error: no matching
function for call to 'find'
      Loop::iterator I = find(ParentLoop->begin(), ParentLoop->end(),
L);
                         ^~~~
Authored By: orivej
Reviewer: Whitney
Reviewed By: Whitney
Subscribers: hiraditya, llvm-commits
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D80473
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
Commit 356bf5ea5d91642b7a932a368804cef6733133c2 by sguelton
Stack clash: update live-ins

This fixes http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-debian/builds/7150
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
Commit 46e5c5fe778b92b2a7e2c2ad3610e1da6794bd5e by dpetrov
[ManagedStatic] Fix build errors with clang-tblgen in Debug mode using MSVC 2019 v16.6

After updating MSVS19 from v16.4 to v16.6 I faced with a build errors compiling in Debug mode.
It complains on clang-tblgen.exe and llvm-tblgen.exe cmd line args.
VS compiler had a bug. It dynamically creates an object with constexpr ctor in Debug mode. This bug was fixed in VS2019 v16.5.
A workaround was implemented for that and everything works until v16.5 comes.
The workaround became irrelevant since v16.5 and caused build errors.
So I disabled the workaround for VS2019 v16.5 and higher.

This relates to http://llvm.org/PR41367.

Differential Revision: https://reviews.llvm.org/D80433
The file was modifiedllvm/include/llvm/Support/ManagedStatic.h
Commit ba03bcbc4a21b92f6a4a54bd6e90417956da7952 by pavel
[lldb] Remove custom DWARF expression printing code

The llvm DWARFExpression dump is nearly identical, but better -- for
example it does print a spurious space after zero-argument expressions.

Some parts of our code (variable locations) have been already switched
to llvm-based expression dumping. This switches the remainder: unwind
plans and some unit tests.
The file was modifiedlldb/source/Symbol/UnwindPlan.cpp
The file was modifiedlldb/unittests/Symbol/PostfixExpressionTest.cpp
The file was modifiedlldb/include/lldb/Expression/DWARFExpression.h
The file was modifiedlldb/unittests/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpressionTests.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFDefines.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFDefines.h
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/stack-cfi-arm.yaml
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/unwind-via-stack-cfi.test
The file was modifiedlldb/test/Shell/Unwind/unwind-plan-dwarf-dump.test
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/unwind-via-stack-win.test
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/unwind-via-raSearch.test
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/stack-cfi-parsing.test
The file was modifiedlldb/source/Expression/DWARFExpression.cpp
The file was modifiedlldb/test/Shell/Unwind/eh-frame-dwarf-unwind.test
Commit c8b7c73c57f0c835f036aaa00a4970fc91d40020 by daltenty
Add AIX to the test macro-same-context XFAIL list

Summary: Since the integrated assembly parser was not implemented yet for AIX and macro is not part of the native assembly dialect on AIX, the test macro-same-context is expected to fail for AIX; hence added AIX to XFAIL list.

Reviewers: hubert.reinterpretcast, daltenty, jasonliu

Reviewed By: daltenty

Subscribers: jasonliu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80232
The file was modifiedllvm/test/MC/AsmParser/macro-same-context.ll
Commit a6c4cd3bcb715c112607fcc4a1c806d511e2f947 by llvm-dev
[X86] Add PTEST tests showing failure to extract allsign cases

As discussed on PR42035, we can often use MOVMSK to avoid a cmpgt/ashr by just analysing the extracted signbits.
The file was modifiedllvm/test/CodeGen/X86/combine-ptest.ll
Commit 7b1dc0015aec39ad27619872f5debbd86f8f9a2c by llvm-dev
MustExecute.h - remove unnecessary includes. NFC.

Reduce to forward declarations and fix implicit LoopInfo.h dependency in Attributor.h
The file was modifiedllvm/include/llvm/Analysis/MustExecute.h
The file was modifiedllvm/include/llvm/Transforms/IPO/Attributor.h
Commit 3c6c2ecd6efa393e7a8422d88e5d4ada0970e47e by dmitry.preobrazhensky
[AMDGPU] Added 'A' constraint for inline assembler

Summary: 'A' constraint requires an immediate int or fp constant that can be inlined in an instruction encoding.
This is the second part of the change. The llvm part has been committed as b087b91c9170.
See https://reviews.llvm.org/D78494

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D79493
The file was modifiedclang/test/Sema/inline-asm-validate-amdgpu.cl
The file was modifiedclang/lib/Basic/Targets/AMDGPU.h
Commit 7c298c104bfe725d4315926a656263e8a5ac3054 by sguelton
[PGO] Fix computation of function Hash

Previous implementation was incorrectly passing an uint64_t, that got converted
to an uint8_t, to finalize the hash computation. This led to different functions
having the same hash if they only differ by the remaining statements, which is
incorrect.

Added a new test case that trivially tests that a small function change is
reflected in the hash value.

Not that as this patch fixes the hash computation, it invalidates all hashes
computed before that patch applies, which could be an issue for large build
system that pre-compute the profile data and let client download them as part of
the build process.

Differential Revision: https://reviews.llvm.org/D79961
The file was addedclang/test/Profile/c-collision.c
The file was modifiedclang/lib/CodeGen/CodeGenPGO.cpp
Commit ba92b274225fc78dc15e8dc0076f71e7a8b5d084 by dpetrov
[analyzer] Improved RangeSet::Negate support of unsigned ranges

Summary:
This fixes https://bugs.llvm.org/show_bug.cgi?id=41588
RangeSet Negate function shall handle unsigned ranges as well as signed ones.
RangeSet getRangeForMinusSymbol function shall use wider variety of ranges, not only concrete value ranges.
RangeSet Intersect functions shall not produce assertions.

Changes:
Improved safety of RangeSet::Intersect function. Added isEmpty() check to prevent an assertion.
Added support of handling unsigned ranges to RangeSet::Negate and RangeSet::getRangeForMinusSymbol.
Extended RangeSet::getRangeForMinusSymbol to return not only range sets with single value [n,n], but with wide ranges [n,m].
Added unit test for Negate function.
Added regression tests for unsigned values.

Differential Revision: https://reviews.llvm.org/D77802
The file was modifiedclang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
The file was addedclang/unittests/StaticAnalyzer/RangeSetTest.cpp
The file was modifiedclang/unittests/StaticAnalyzer/CMakeLists.txt
The file was modifiedclang/test/Analysis/constraint_manager_negate_difference.c
Commit b62ce9e05d9ec95532fa131a3e47ff1d4e7ed5de by jaskiewiczs
Re-commit "[libc++] [test] Generate static_test_env on the fly"

Don't use std::filesystem APIs for CWDGuard, use POSIX functions
instead. This way the tests don't rely on the correctness of
the functionality they're testing.

Differential Revision: https://reviews.llvm.org/D78200
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_iterator/directory_iterator.members/move.pass.cpp
The file was removedlibcxx/test/std/input.output/filesystems/Inputs/static_test_env/dir1/dir2/afile3
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/last_write_time.pass.cpp
The file was removedlibcxx/test/std/input.output/filesystems/Inputs/static_test_env/empty_file
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_iterator/directory_iterator.members/ctor.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.file_size/file_size.pass.cpp
The file was removedlibcxx/test/std/input.output/filesystems/Inputs/static_test_env/symlink_to_empty_file
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.is_directory/is_directory.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.symlink_status/symlink_status.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/status.pass.cpp
The file was removedlibcxx/test/std/input.output/filesystems/Inputs/static_test_env/dir1/file1
The file was removedlibcxx/test/std/input.output/filesystems/Inputs/static_test_env/dir1/dir2/symlink_to_dir3
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.equivalent/equivalent.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.space/space.pass.cpp
The file was removedlibcxx/test/std/input.output/filesystems/Inputs/static_test_env/bad_symlink
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.is_empty/is_empty.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.is_other/is_other.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.rec.dir.itr/rec.dir.itr.nonmembers/begin_end.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.is_regular_file/is_regular_file.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.is_char_file/is_character_file.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.cons/path.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_iterator/directory_iterator.members/copy.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_iterator/directory_iterator.nonmembers/begin_end.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/file_size.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/symlink_status.pass.cpp
The file was removedlibcxx/test/std/input.output/filesystems/Inputs/static_test_env/dir1/dir2/dir3/file5
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.current_path/current_path.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.relative/relative.pass.cpp
The file was removedlibcxx/test/std/input.output/filesystems/Inputs/static_test_env/dir1/dir2/file4
The file was modifiedlibcxx/test/std/input.output/filesystems/class.rec.dir.itr/rec.dir.itr.members/copy_assign.pass.cpp
The file was removedlibcxx/test/std/input.output/filesystems/Inputs/static_test_env/non_empty_file
The file was modifiedlibcxx/test/std/input.output/filesystems/class.rec.dir.itr/rec.dir.itr.members/depth.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.hard_lk_ct/hard_link_count.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.is_symlink/is_symlink.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.canonical/canonical.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.weakly_canonical/weakly_canonical.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/file_type_obs.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_iterator/directory_iterator.members/increment.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_iterator/directory_iterator.members/move_assign.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.is_fifo/is_fifo.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.rec.dir.itr/rec.dir.itr.members/move_assign.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.is_block_file/is_block_file.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.rec.dir.itr/rec.dir.itr.members/recursion_pending.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.rec.dir.itr/rec.dir.itr.members/move.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.exists/exists.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.status/status.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.rec.dir.itr/rec.dir.itr.members/disable_recursion_pending.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_iterator/directory_iterator.members/copy_assign.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/hard_link_count.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.is_socket/is_socket.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.rec.dir.itr/rec.dir.itr.members/pop.pass.cpp
The file was removedlibcxx/test/std/input.output/filesystems/Inputs/static_test_env/symlink_to_dir
The file was modifiedlibcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.mods/replace_filename.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.rec.dir.itr/rec.dir.itr.members/ctor.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.copy/copy.pass.cpp
The file was modifiedlibcxx/test/support/filesystem_test_helper.h
The file was modifiedlibcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.last_write_time/last_write_time.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.rec.dir.itr/rec.dir.itr.members/copy.pass.cpp
The file was removedlibcxx/test/std/input.output/filesystems/Inputs/static_test_env/dir1/file2
The file was modifiedlibcxx/test/std/input.output/filesystems/class.rec.dir.itr/rec.dir.itr.members/increment.pass.cpp
Commit 3873d0b3d899bb84a5983450dd2d98006c4527e2 by jaskiewiczs
Re-commit "[cmake] Allow std::filesystem tests in CrossWinToARMLinux.cmake"

https://reviews.llvm.org/D78200 has been re-committed, so we can now
enable building std::filesystem and running tests for it.
The file was modifiedclang/cmake/caches/CrossWinToARMLinux.cmake
Commit a9b5edc5e2c4ec9d506b2c30465ee9f2dc21e5cc by benny.kra
Make mlir::Value's bool conversion operator explicit

This still allows `if (value)` while requiring an explicit cast when not
in a boolean context. This means things like `std::set<Value>` will no
longer compile.

Differential Revision: https://reviews.llvm.org/D80497
The file was modifiedmlir/include/mlir/EDSC/Builders.h
The file was modifiedmlir/lib/Parser/Parser.cpp
The file was modifiedmlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
The file was modifiedmlir/include/mlir/IR/Value.h
Commit 77aec3b4c0e63b07d98dbb1aeb693d200e769a05 by dmitry.preobrazhensky
[AMDGPU][MC][GFX8+] Enabled clamp for v_add_u16, v_sub_u16 and v_subrev_u16

See https://bugs.llvm.org/show_bug.cgi?id=45926

Reviewers: arsenm, rampitec, vpykhtin

Differential Revision: https://reviews.llvm.org/D80430
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/vop2_vi.txt
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.s16.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.td
The file was modifiedllvm/lib/Target/AMDGPU/VOP2Instructions.td
The file was modifiedllvm/test/MC/AMDGPU/gfx10_asm_all.s
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
The file was modifiedllvm/test/MC/AMDGPU/vop2.s
Commit 5bf2409a4e4d23018ecffe4eff39988a957e76f7 by wanyu9511
[AIX] Add '-bcdtors:all:0:s' to linker to gather static init functions

Summary: On AIX, add '-bcdtors:all:0:s' to the linker implicitly through the driver so that we can collect all static constructor and destructor functions.

Reviewers: hubert.reinterpretcast, Xiangling_L, ZarkoCA, daltenty

Reviewed By: hubert.reinterpretcast

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80415
The file was modifiedclang/test/Driver/aix-ld.c
The file was modifiedclang/lib/Driver/ToolChains/AIX.cpp
Commit b321b429416ec51691a3c5372cb59912bded5f08 by Jonas Devlieghere
[lldb/Test] Add a trace method to replace print statements.

Many tests use (commented out) print statement for debugging the test
itself. This patch adds a new trace method to lldbtest to reuse the
existing tracing infrastructure and replace these print statements.

Differential revision: https://reviews.llvm.org/D80448
The file was modifiedlldb/test/API/python_api/function_symbol/TestDisasmAPI.py
The file was modifiedlldb/test/API/tools/lldb-server/TestGdbRemoteAuxvSupport.py
The file was modifiedlldb/test/API/tools/lldb-server/TestGdbRemoteExpeditedRegisters.py
The file was modifiedlldb/test/API/tools/lldb-server/TestGdbRemoteRegisterState.py
The file was modifiedlldb/test/API/lang/objc/foundation/TestSymbolTable.py
The file was modifiedlldb/test/API/functionalities/breakpoint/serialize/TestBreakpointSerialization.py
The file was modifiedlldb/test/API/python_api/frame/inlines/TestInlinedFrame.py
The file was modifiedlldb/test/API/functionalities/load_unload/TestLoadUnload.py
The file was modifiedlldb/test/API/functionalities/data-formatter/data-formatter-skip-summary/TestDataFormatterSkipSummary.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbtest.py
The file was modifiedlldb/test/API/python_api/frame/TestFrames.py
The file was modifiedlldb/test/API/lang/cpp/class_types/TestClassTypesDisassembly.py
The file was modifiedlldb/test/API/python_api/function_symbol/TestSymbolAPI.py
The file was modifiedlldb/test/API/tools/lldb-server/TestLldbGdbServer.py
The file was modifiedlldb/test/API/python_api/thread/TestThreadAPI.py
The file was modifiedlldb/test/API/lang/c/register_variables/TestRegisterVariables.py
The file was modifiedlldb/test/API/benchmarks/stepping/TestSteppingSpeed.py
The file was modifiedlldb/test/API/functionalities/breakpoint/breakpoint_conditions/TestBreakpointConditions.py
The file was modifiedlldb/test/API/commands/target/basic/TestTargetCommand.py
The file was modifiedlldb/test/API/lang/objc/blocks/TestObjCIvarsInBlocks.py
The file was modifiedlldb/test/API/python_api/breakpoint/TestBreakpointAPI.py
The file was modifiedlldb/test/API/python_api/event/TestEvents.py
The file was modifiedlldb/test/API/python_api/target/TestTargetAPI.py
Commit 2b8d6fa0acacba4dee31ed618a5596414b2279d5 by benny.kra
Revert "[PGO] Fix computation of function Hash"

This reverts commit 7c298c104bfe725d4315926a656263e8a5ac3054.
Fails make check-clang.

Failing Tests (8):
Clang :: Profile/c-counter-overflows.c
Clang :: Profile/c-general.c
Clang :: Profile/c-unprofiled-blocks.c
Clang :: Profile/cxx-rangefor.cpp
Clang :: Profile/cxx-throws.cpp
Clang :: Profile/misexpect-switch-default.c
Clang :: Profile/misexpect-switch-nonconst.c
Clang :: Profile/misexpect-switch.c
The file was modifiedclang/lib/CodeGen/CodeGenPGO.cpp
The file was removedclang/test/Profile/c-collision.c
Commit e0aefaedb617766f4667118911fccb4a14abfb94 by llvmgnsyncbot
[gn build] Port ba92b274225
The file was modifiedllvm/utils/gn/secondary/clang/unittests/StaticAnalyzer/BUILD.gn
Commit 37ef15143a5d77a0fba0ece4c26a72cfb9e050a0 by zoecarver
[libcxx] Fix C++14 and up constexpr members in MoveOnly.

Summary: a4b8ee6 made all MoveOnly members constexpr but, some members and constructors contain expressions that are only valid in C++14 and later. This patch prefixes those methods and constructors with TEST_CONSTEXPR_CXX14.

Reviewers: ldionne, #libc!

Subscribers: dexonsmith, libcxx-commits

Tags: #libc

Differential Revision: https://reviews.llvm.org/D80482
The file was modifiedlibcxx/test/support/MoveOnly.h
Commit 51a276c759c90c844bbabf5066195aaf42fb0c6e by craig.topper
[X86] Teach combineTruncatedArithmetic to push truncate through subtracts where only one of the inputs is free to truncate.

Fix combineSubToSubus to handle the new DAG to avoid a regression.

There are still regressions in test14/test15/test16. Where it
looks like were trying to set up cases we could match to
umin+trunc+subus but the handling was never finished. The
regression here isn't unique to sub. Its a lost opportunity for
taking an AND with two truncated inputs and producing a larger
AND with a single truncate. The same thing could happen with
any other node we handle in combineTruncatedArithmetic since we
are moving the truncate up the DAG.

Differential Revision: https://reviews.llvm.org/D80483
The file was modifiedllvm/test/CodeGen/X86/psubus.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit d1dbda10cefeaa124e28eb289cdc92c049c3d973 by marek
[libc++] [LWG3201] Update status page: lerp should be marked noexcept.

Summary: Update status page and test synopsis. Add synopsis in <cmath>.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D80456
The file was modifiedlibcxx/include/cmath
The file was modifiedlibcxx/www/cxx2a_status.html
The file was modifiedlibcxx/test/std/numerics/c.math/c.math.lerp/c.math.lerp.pass.cpp
Commit bc93c2d72e84c38fc86e64c9c26aafcf2c61457a by marek
[Transforms] Fix typos. NFC
The file was modifiedllvm/lib/Transforms/Instrumentation/PoisonChecking.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/CallGraphUpdater.h
The file was modifiedllvm/lib/Transforms/IPO/AttributorAttributes.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopPredication.cpp
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
The file was modifiedllvm/test/Transforms/RewriteStatepointsForGC/preprocess.ll
Commit 179c80117c91fc3ba3079740a91de40d98b18916 by flo
[LoopUnroll] Remove dead NextBlocks argument (NFC).
The file was modifiedllvm/lib/Transforms/Utils/LoopUnroll.cpp
Commit cec20db588254289dc2953517310b9886f6dc243 by kazu
[Inlining] Set inline-deferral-scale to 2.

Summary:
This patch sets inline-deferral-scale to 2.

Both internal and SPEC benchmarking show that 2 is the best number
among -1, 2, 3, and 4.

inline-deferral-scale  SPECint2006
------------------------------------------------------------
                   -1  38.0 (the default without this patch)
                    2  38.5
                    3  38.1
                    4  38.1

With the new default number, shouldBeDeferred returns true if:

  TotalCost < IC.getCost() * 2

where

  TotalCost is TotalSecondaryCost + IC.getCost() * NumCallerUsers.

If TotalCost >= 0 and NumCallerUsers >= 2, then
TotalCost >= IC.getCost() * 2, so shouldBeDeferred returns true only
when NumCallerUsers is 1.

Now, if TotalSecondaryCost < 0, which can happen if
InlineConstants::LastCallToStaticBonus, a huge number, has been
subtracted from TotalSecondaryCost, then TotalCost may be negative.
In this case, shouldBeDeferred may return true even when
NumCallerUsers >= 2.

Reviewers: davidxl, nikic

Reviewed By: davidxl

Subscribers: xbolva00, hiraditya, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80229
The file was modifiedllvm/lib/Analysis/InlineAdvisor.cpp
Commit 3a2df3bad07f7e5fc22538ad782e08ee55f29e41 by Yuanfang Chen
[Clang][test] fix tests when using external assembler.

Summary:
The test assume using integraed-as, so make it explicit.

Reviewered by: aganea

Differential Revision: https://reviews.llvm.org/D80454
The file was modifiedclang/test/Driver/cc1-spawnprocess.c
Commit 9a8d7bd77040a6497233ea10fd866ad9de8bf98c by Yuanfang Chen
[clang][test] fix tests for external assemblers

These three tests depend on using the integrated assembler. Make it
explicit by specifying -fintegrated-as.
The file was modifiedclang/test/Driver/flang/flang_ucase.F90
The file was modifiedclang/test/Driver/flang/flang.f90
The file was modifiedclang/test/Driver/debug-prefix-map.S
Commit 793cc518b9428a0b7a40c59d4ecd5939a7bc84f7 by nemanjai
[PowerPC] Prevent legalization loop from promoting SELECT_CC from v4i32 to v4i32

As reported in https://bugs.llvm.org/show_bug.cgi?id=45709 we can hit an
infinite loop in legalization since we set the legalization action for
ISD::SELECT_CC for all fixed length vector types to Promote. Without some
different legalization action for the type being promoted to, the legalizer
simply loops. Since we don't have patterns to match the node, the right
legalization action should be Expand.

Differential revision: https://reviews.llvm.org/D79854
The file was addedllvm/test/CodeGen/PowerPC/pr45709.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
Commit 9d55e4ee1367b440bb8402ce3a33d5a8b99aee06 by maskray
Make explicit -fno-semantic-interposition (in -fpic mode) infer dso_local

-fno-semantic-interposition is currently the CC1 default. (The opposite
disables some interprocedural optimizations.) However, it does not infer
dso_local: on most targets accesses to ExternalLinkage functions/variables
defined in the current module still need PLT/GOT.

This patch makes explicit -fno-semantic-interposition infer dso_local,
so that PLT/GOT can be eliminated if targets implement local aliases
for AsmPrinter::getSymbolPreferLocal (currently only x86).

Currently we check whether the module flag "SemanticInterposition" is 0.
If yes, infer dso_local. In the future, we can infer dso_local unless
"SemanticInterposition" is 1: frontends other than clang will also
benefit from the optimization if they don't bother setting the flag.
(There will be risks if they do want ELF interposition: they need to set
"SemanticInterposition" to 1.)
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedllvm/lib/Target/TargetMachine.cpp
The file was modifiedllvm/include/llvm/IR/Module.h
The file was modifiedllvm/lib/IR/Module.cpp
The file was modifiedclang/test/Driver/fsemantic-interposition.c
The file was modifiedllvm/include/llvm/IR/GlobalValue.h
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was addedllvm/test/CodeGen/X86/semantic-interposition-infer-dsolocal.ll
The file was modifiedclang/include/clang/Basic/LangOptions.def
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/test/CodeGen/semantic-interposition.c
The file was modifiedllvm/lib/IR/Globals.cpp
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
Commit d8e0ad9620c6e626d753a3ae0da6c712e4d400d3 by Yuanfang Chen
[clang][test] fix tests for external assemblers

The test depends on using the integrated assembler. Make it
explicit by specifying -fintegrated-as.
The file was modifiedclang/test/Driver/modules-ts.cpp
Commit eeedbd033612e105755156023bdeec2fba4eca21 by kadircet
[clangd] Make use of SourceOrder to find first initializer in DefineOutline

Summary:
Constructors can have implicit initializers, this was crashing define
outline. Make sure we find the first "written" ctor initializer to figure out
`:` location.

Fixes https://github.com/clangd/clangd/issues/400

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80521
The file was modifiedclang-tools-extra/clangd/unittests/TweakTests.cpp
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/DefineOutline.cpp
Commit 34e39eb2adc2b3f16c2c2c0607a904ee55705c01 by kadircet
[clangd] Change PreambleOnlyAction with content truncation

Summary:
Lexing until the token location is past preamble bound could be wrong
in some cases as preprocessor lexer can lex multiple tokens in a single call.

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79426
The file was modifiedclang-tools-extra/clangd/Preamble.cpp
The file was modifiedclang-tools-extra/clangd/unittests/PreambleTests.cpp
Commit e6e89875b04ea521a9dbf3e6a82d81b23f9f77d7 by shkzhang
[NFC][PowerPC] Add a new case to test two-address verification
The file was addedllvm/test/CodeGen/PowerPC/two-address-crash.mir
Commit 61f72dd8ace7c4bea1ae74d9734d2b02946b4898 by sepavloff
[FPEnv] Small fixes to implementation of flt.rounds

This change makes minor correction to the implementation of intrinsic
`llvm.flt.rounds`:
- Added documentation entry in LangRef,
- Attributes of the intrinsic changed to be in line with other functions
  dependent of floating-point environment.

Differential Revision: https://reviews.llvm.org/D79322
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedclang/include/clang/Basic/Builtins.def
Commit 872c5fb1432493c0a09b6f210765c0d94ce9b5d0 by maskray
[AsmPrinter] Don't generate .Lfoo$local for -fno-PIC and -fPIE

-fno-PIC and -fPIE code generally cannot be linked in -shared mode and there is no benefit accessing via local aliases.

Actually, a .Lfoo$local reference will be converted to a STT_SECTION (if no section relaxation) reference which will cause the section symbol (sizeof(Elf64_Sym)=24) to be generated.
The file was modifiedllvm/test/CodeGen/X86/lifetime-alias.ll
The file was modifiedllvm/test/CodeGen/X86/linux-preemption.ll
The file was modifiedllvm/test/CodeGen/X86/code-model-elf.ll
The file was modifiedllvm/test/CodeGen/X86/pr38795.ll
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/test/CodeGen/X86/semantic-interposition-comdat.ll
The file was modifiedllvm/test/CodeGen/X86/oddsubvector.ll
The file was modifiedllvm/test/CodeGen/X86/tls.ll
The file was modifiedllvm/test/CodeGen/X86/emutls.ll
The file was modifiedllvm/test/CodeGen/X86/indirect-branch-tracking-eh2.ll
The file was modifiedllvm/test/CodeGen/AArch64/fp16_intrinsic_lane.ll
Commit c34936dae734085c4bc01703da0f5b7456e1bf51 by pavel
[lldb] s/dyn_cast/isa

The cast result is unused and produces a warning with gcc.
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Commit 1f72d5880e332dfbd36c22388d2b72bd2bd70411 by sam.parker
[CostModel] Check for free intrinsics in BasicTTI

Recommitting part of "[CostModel] Unify Intrinsic Costs."
de71def3f59dc9f12f67141b5040d8e15c84d08a

Now that the 'free' intrinsic information has been sunk to the lowest
level, query the base implementation in BasicTTI before doing
anything else. I suspect this is the change that was causing the main
changes, particularly the large effects on debug builds.

Differential Revision: https://reviews.llvm.org/D80012
The file was addedllvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
The file was addedllvm/test/Analysis/CostModel/X86/free-intrinsics.ll
The file was addedllvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
Commit 80cc43b420a8ab8648f44fbb554b483a2998712d by craig.topper
[AArch64] Set i32 ISD::MULHU/S to Expand instead of Legal.

Looks like there are no isel patterns for these. A DAG combine
turns it into i64 multiply and a shift which hides this.

Extracted from D80485
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit 1abb883a048153c83a4e11070219d23f362e7377 by sam.mccall
[clangd] Don't traverse the AST within uninteresting files during indexing

Summary:
We already skip function bodies from these files while parsing, and drop symbols
found in them. However, traversing their ASTs still takes a substantial amount
of time.

Non-scientific benchmark on my machine:
  background-indexing llvm-project (llvm+clang+clang-tools-extra), wall time
  before: 7:46
  after: 5:13
  change: -33%

Indexer.cpp libclang should be updated too, I'm less familiar with that code,
and it's doing tricky things with the ShouldSkipFunctionBody callback, so it
needs to be done separately.

Reviewers: kadircet

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80296
The file was modifiedclang-tools-extra/clangd/index/IndexAction.cpp
The file was modifiedclang-tools-extra/clangd/unittests/IndexActionTests.cpp
The file was modifiedclang/include/clang/Index/IndexingAction.h
The file was modifiedclang/include/clang/Index/IndexingOptions.h
The file was modifiedclang/lib/Index/IndexDecl.cpp
The file was modifiedclang/lib/Index/IndexingAction.cpp
Commit 64cfb8a864cf98dcd762a26d03cba95145b9aa41 by sam.parker
[NFC][ARM] Add intrinsic code size runs

Add code size analysis of arithmetic intrinsics.
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith-ssat.ll
The file was modifiedllvm/test/Analysis/CostModel/ARM/reduce-add.ll
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith-overflow.ll
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith-usat.ll
Commit 871556a494552c0f503eec17055f075bcd859937 by sam.parker
[CostModel] Unify Intrinsic Costs.

Recommitting most of the remaining changes from
259eb619ff6dcd5b6111d1686e18559b9ca004d4, but excluding the call to
getUserCost from getInstructionThroughput. Though there's still no
test changes, I doubt that this is an NFC...

With the two getIntrinsicInstrCosts folded into one, now fold in the
scalar/code-size orientated getIntrinsicCost. The remaining scalar
intrinsics were memcpy, cttz and ctlz which now have special handling
in the BasicTTI implementation.

This had required a change in the AMDGPU backend for fabs as it
should always be 'free'. I've also changed the X86 backend to return
the BaseT implementation when the CostKind isn't RecipThroughput.

Differential Revision: https://reviews.llvm.org/D80012
The file was modifiedllvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 98cad555e29187a03e2bc3db5780762981913902 by lucas.prates
[Clang][AArch64] Capturing proper pointer alignment for Neon vld1 intrinsicts

Summary:
During CodeGen for AArch64 Neon intrinsics, Clang was incorrectly
assuming all the pointers from which loads were being generated for vld1
intrinsics were aligned according to the intrinsics result type, causing
alignment faults on the code generated by the backend.

This patch updates vld1 intrinsics' CodeGen to properly capture the
correct load alignment based on the type of the pointer provided as
input for the intrinsic.

Reviewers: t.p.northover, ostannard, pcc

Reviewed By: ostannard

Subscribers: kristof.beyls, danielkiss, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79721
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedclang/test/CodeGen/aarch64-neon-intrinsics.c
Commit 2569787e44595d31942da2bb5558931351929e57 by grimar
[DebugInfo] - Fix multiple issues in DWARFDebugFrame::parse().

I've noticed an issue with "Data.getRelocatedValue(...)" call.

it might silently ignore an error when a content is truncated.
That leads to an infinite loop in the code (e.g. llvm-readobj hangs).

After fixing the issue I've found that actually we always tried
to read past the end of a section, even when a content was valid.
It happened because the terminator CIE (a CIE with the length == 0)
was never handled. At first I've tried just to stop adding the terminator
entry (and return), but it does not seem to be correct, because tools like
llvm-objdump might want to print something for such entries
(see comments in the code and test cases).

This patch fixes issues mentioned, provides new test cases for
both llvm-readobj and lib/DebugInfo and adds FIXMEs to existent
test cases related.

Differential revision: https://reviews.llvm.org/D80299
The file was modifiedllvm/test/tools/llvm-objdump/eh_frame_zero_cie.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/unwind.test
The file was addedllvm/test/DebugInfo/X86/eh-frame-truncated.s
The file was modifiedllvm/test/tools/llvm-objdump/eh_frame-mipsel.test
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
Commit 92f3828dc5675f9917d909eb75c29ba1e14920ad by vpykhtin
[AMDGPU] Fix wait counts in the presence of 16bit subregisters

Differential Revision: https://reviews.llvm.org/D80033
The file was modifiedllvm/test/CodeGen/AMDGPU/waitcnt.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Commit 48cdbd081c9111e2ffe41ac3022bdfc65df46655 by sam.parker
[NFC][ARM] Add code size analysis tests

Add code size runs for the cast costs.
The file was modifiedllvm/test/Analysis/CostModel/ARM/cast.ll
Commit 3d4c873a14fe2ffb5cd6ac329354857eef245196 by grimar
[yaml2obj] - Map section names to chunks for each ELFYAML::ProgramHeader early. NFCI.

Each `ELFYAML::ProgramHeader` currently contains a list of section names
included. We are trying to map them to Fill/Sections very late,
though we can create such mapping early, in `initProgramHeaders`.

The benefit is that with such change it is possible to access mapped
chunks earlier (for example during writing section content) and have
simpler code.

Differential revision: https://reviews.llvm.org/D80520
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp
The file was modifiedllvm/include/llvm/ObjectYAML/ELFYAML.h
Commit 590f3a72c243b888ab10c4f9e71bf7f8eca99717 by Xing
[ObjectYAML][DWARF] Use .empty() to indicate if the DWARF sections are empty.
The file was modifiedllvm/lib/ObjectYAML/DWARFYAML.cpp
Commit 2c04b8aacd070e88e64f08998dc583319e994d18 by Xing
[ObjectYAML][DWARF] Make variable names consistent.
The file was modifiedllvm/include/llvm/ObjectYAML/DWARFYAML.h
The file was modifiedllvm/lib/ObjectYAML/DWARFYAML.cpp
Commit c5bbc8dd6d686175788e6c1a5fc0339814a5adfc by sam.parker
[NFC][ARM] Fix for previous commit

Actually analyse code-size for the size runs...
The file was modifiedllvm/test/Analysis/CostModel/ARM/cast.ll
Commit 2e365ca2f7ce7a1f4a3938d79b894324b383ce5c by grimar
[DebugInfo/llvm-objdump] - Print "ZERO terminator" for terminator entries when dumping .eh_frame.

A CIE with the Length == 0 is a terminator:
https://refspecs.linuxfoundation.org/LSB_5.0.0/LSB-Core-generic/LSB-Core-generic/ehframechpt.html

And GNU objdump recognizes them and prints the following for such entries:

"00000000 ZERO terminator"

This patch teaches llvm-objdump to do the same. I had to update tests to use
"CHECK-NEXT" too.

(Note: it looks perhaps not right that printing is done inside the DebugInfo library,
I'd expect to see the change in the llvm-objdump's code somewhere instead,
but that is how it done atm).

Differential revision: https://reviews.llvm.org/D80476
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
The file was modifiedllvm/test/tools/llvm-objdump/eh_frame-mipsel.test
The file was modifiedllvm/test/tools/llvm-objdump/eh_frame_zero_cie.test
Commit 8b4639d0a0e0e65f23e0315f7ade83b9126472af by llvm-dev
[X86][AVX] Add some initial movmsk combine tests

Show failure to reduce the signbit extraction for 256-bit integer vectors on AVX1 targets where the pcmpgt/ashr has to be done with split 128-bit vectors.
The file was addedllvm/test/CodeGen/X86/combine-movmsk-avx.ll
Commit 6f802ec4333cc1227bb37e258a81e9a588f964dc by llvm-dev
[X86] Fix fshr comment copy+paste typo. NFC.

Noticed by @foad on D80466.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 09f7dcb64e1b2a3568ddb6ab327dd2f4a4d3d0fe by mahesha.comp
[AMDGPU/MemOpsCluster] Code clean-up around mem ops clustering logic

Summary:
Clean-up code around mem ops clustering logic. This patch cleans up code within
the function clusterNeighboringMemOps(). It is WIP, and this patch is a first cut.

Reviewers: foad, rampitec, arsenm, vpykhtin, javedabsar

Reviewed By: foad

Subscribers: MatzeB, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, javed.absar, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80119
The file was modifiedllvm/lib/CodeGen/MachineScheduler.cpp
Commit 5229dd1366ab1423d66d3d16dddff6fbaee049d8 by thakis
[build] Add LLVM_LOCAL_RPATH which can set an rpath on just unit test binaries

After D80096, bots that build clang for distribution and that can't use
system gcc / libstdc++ need to pass a working rpath so that unit test
binaries can run. The method suggested in GettingStarted.rst works fine
for local development, but it results in an absolute local rpath ending
up even in distributed binaries like clang, which is both ugly and
unnecessary.

Add an explicit toggle that can be used to add an rpath only for the
non-distributed binaries that need it.

Differential Revision: https://reviews.llvm.org/D80534
The file was modifiedllvm/CMakeLists.txt
The file was modifiedllvm/cmake/modules/AddLLVM.cmake
The file was modifiedllvm/docs/GettingStarted.rst
Commit 3785eb83af4161bd52ed993ef3a2184c998071e6 by gribozavr
Add support for binary operators in Syntax Trees

Reviewers: gribozavr2

Reviewed By: gribozavr2

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80540
The file was modifiedclang/unittests/Tooling/Syntax/TreeTest.cpp
The file was modifiedclang/lib/Tooling/Syntax/Nodes.cpp
The file was modifiedclang/lib/Tooling/Syntax/BuildTree.cpp
The file was modifiedclang/include/clang/Tooling/Syntax/Nodes.h
Commit 8aaabadeced32a1cd959a5b1524b9c927e82bcc0 by sam.parker
[CostModel] Unify getCastInstrCost

Add the remaining cast instruction opcodes to the base implementation
of getUserCost and directly return the result. This allows
getInstructionThroughput to return getUserCost for the casts. This
has required changes to PPC and SystemZ because they implement
getUserCost and/or getCastInstrCost with adjustments for vector
operations. Adjusts have also been made in the remaining backends
that implement the method so that they still produce a cost of zero
or one for cost kinds other than throughput.

Differential Revision: https://reviews.llvm.org/D79848
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
Commit 6f5431846bbf3270d8fc605324e8843c5aaf579b by dkszelethus
[analyzer][RetainCount] Remove the CheckOSObject option

As per http://lists.llvm.org/pipermail/cfe-dev/2019-August/063215.html, lets get rid of this option.

It presents 2 issues that have bugged me for years now:

* OSObject is NOT a boolean option. It in fact has 3 states:
  * osx.OSObjectRetainCount is enabled but OSObject it set to false: RetainCount
    regards the option as disabled.
  * sx.OSObjectRetainCount is enabled and OSObject it set to true: RetainCount
    regards the option as enabled.
  * osx.OSObjectRetainCount is disabled: RetainCount regards the option as
    disabled.
* The hack involves directly modifying AnalyzerOptions::ConfigTable, which
  shouldn't even be public in the first place.

This still isn't really ideal, because it would be better to preserve the option
and remove the checker (we want visible checkers to be associated with
diagnostics, and hidden options like this one to be associated with changing how
the modeling is done), but backwards compatibility is an issue.

Differential Revision: https://reviews.llvm.org/D78097
The file was modifiedclang/test/Analysis/test-separate-retaincount.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Checkers/Checkers.td
The file was modifiedclang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.cpp
The file was modifiedclang/test/Analysis/analyzer-config.c
Commit bd9dce8f9acd710ed62bab44ad3563209503cd72 by sam.parker
[CostModel] getUserCost for intrinsic throughput

Last part of recommitting 'Unify Intrinsic Costs'
259eb619ff6dcd5b6111d1686e18559b9ca004d4. This patch now uses
getUserCost from getInstructionThroughput.

Differential Revision: https://reviews.llvm.org/D80012
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
Commit 4b7812116d513a66fb5fb3c83e7d8be08c1efc65 by llvm-dev
MachineInstr.h - remove unnecessary MachineMemOperand forward declaration. NFC.

We already have to include MachineMemOperand.h
The file was modifiedllvm/include/llvm/CodeGen/MachineInstr.h
Commit 0d52a7d038e189770984594a6ca71bea50fee4d9 by gchatelet
[libc][NFC] Simplify memcpy implementation

Summary: This is a NFC, it aims at simplifying both the code and build files.

Reviewers: abrachet, sivachandra

Subscribers: mgorny, tschuett, ecnelises, libc-commits, courbet

Tags: #libc-project

Differential Revision: https://reviews.llvm.org/D80291
The file was removedlibc/src/string/memcpy_arch_specific.h.def
The file was modifiedlibc/test/src/string/memory_utils/memcpy_utils_test.cpp
The file was removedlibc/src/string/x86/memcpy_arch_specific.h.inc
The file was modifiedlibc/src/string/CMakeLists.txt
The file was modifiedlibc/src/string/memory_utils/memcpy_utils.h
The file was addedlibc/src/string/x86/memcpy.cpp
The file was removedlibc/src/string/memcpy.cpp
Commit c1c9eb0ab7d20e61f0fb345a60694bda0487c0da by yikong
[Transforms] Check validity of profile reader before invoking it

Although an invalid sampling profile would fail the compilation anyway,
this avoids crashing the compiler.
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
Commit f368040c14f4bdac718798db28299a68adc42695 by spatel
[DAGCombiner] try to move splat after binop with splat constant

binop (splat X), (splat C) --> splat (binop X, C)
binop (splat C), (splat X) --> splat (binop C, X)

We do this in IR, and there's a similar fold for the case with 2
non-constant operands just above the code diff in this patch.

This was discussed in D79718, and the extra shuffle in the test
(llvm/test/CodeGen/X86/vector-fshl-128.ll::sink_splatvar) where it
was noticed disappears because demanded elements analysis is no
longer blocked. The large majority of the test diffs seem to be
benign code scheduling changes, but I do see another type of win:
moving the splat later allows binop narrowing in some cases.

Regressions were avoided on x86 and ARM with the INSERT_VECTOR_ELT
restriction.

Differential Revision: https://reviews.llvm.org/D79886
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-ashr-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-512.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-lshr-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-256.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-512.ll
Commit 4d20e31f736c76785e03367c036183474459ef9a by sepavloff
[FPEnv] Intrinsic llvm.roundeven

This intrinsic implements IEEE-754 operation roundToIntegralTiesToEven,
and performs rounding to the nearest integer value, rounding halfway
cases to even. The intrinsic represents the missed case of IEEE-754
rounding operations and now llvm provides full support of the rounding
operations defined by the standard.

Differential Revision: https://reviews.llvm.org/D75670
The file was modifiedllvm/unittests/IR/IRBuilderTest.cpp
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedllvm/lib/Analysis/TargetLibraryInfo.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/include/llvm/CodeGen/ISDOpcodes.h
The file was modifiedllvm/test/Transforms/InstCombine/float-shrink-compare.ll
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/include/llvm/IR/ConstrainedOps.def
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
The file was modifiedllvm/include/llvm/IR/RuntimeLibcalls.def
The file was modifiedllvm/lib/Analysis/ConstantFolding.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
The file was addedllvm/test/CodeGen/Generic/fpoperations.ll
The file was modifiedllvm/test/ExecutionEngine/Interpreter/intrinsics.ll
The file was modifiedllvm/lib/CodeGen/IntrinsicLowering.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedllvm/unittests/Analysis/TargetLibraryInfoTest.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/intrinsic.ll
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
The file was modifiedllvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/lib/Analysis/VectorUtils.cpp
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedllvm/test/Transforms/InstSimplify/round-intrinsics.ll
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
The file was modifiedllvm/test/Transforms/InstSimplify/known-never-nan.ll
The file was modifiedllvm/test/Transforms/LICM/hoist-round.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
The file was modifiedllvm/include/llvm/Analysis/TargetLibraryInfo.def
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
The file was modifiedllvm/test/Transforms/InstCombine/double-float-shrink-2.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Commit 6c906f7785dad3a1dea5357cfde0762952c2a2bd by john.brawn
[Sema] Diagnose more cases of static data members in local or unnamed classes

We currently diagnose static data members directly contained in unnamed classes,
but we should also diagnose when they're in a class that is nested (directly or
indirectly) in an unnamed class. Do this by iterating up the list of parent
DeclContexts and checking if any is an unnamed class.

Similarly also check for function or method DeclContexts (which includes things
like blocks and openmp captured statements) as then the class is considered to
be a local class, which means static data members aren't allowed.

Differential Revision: https://reviews.llvm.org/D80295
The file was modifiedclang/lib/Sema/SemaDecl.cpp
The file was modifiedclang/test/SemaCXX/anonymous-struct.cpp
The file was modifiedclang/test/SemaCXX/blocks.cpp
The file was modifiedclang/test/OpenMP/for_loop_messages.cpp
Commit 049c16ba93fa77df7984353b1a0124ed64fc0439 by david.green
[ARM] MVE VMINV/VMAXV test additions. NFC
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmaxv.ll
Commit ff2743bf047deac7ef6cc6c3efd30ff05e55b2ad by yitzhakm
[libTooling] In Transformer, allow atomic changes to span multiple files.

Summary:
Currently, all changes returned by a single application of a rule must fit in
one atomic change and therefore must apply to one file. However, there are
patterns in which a single rule will want to modify multiple files; for example,
a header and implementation to change a declaration and its definition. This
patch relaxes Transformer, libTooling's interpreter of RewriteRules, to support
multiple changes.

Reviewers: gribozavr

Subscribers: mgrang, jfb, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80239
The file was modifiedclang/unittests/Tooling/TransformerTest.cpp
The file was modifiedclang/lib/Tooling/Transformer/Transformer.cpp
Commit a3b5ccddcc3512432fc386b9197e6f103e190894 by sguelton
Update DialectConversion.md

line 164: typo? baz.add should be bar.add.
`bar.add` -> `foo.add`
The file was modifiedmlir/docs/DialectConversion.md
Commit 9578a54f5007e8a02cef449dd151da27837b388e by ntv
[mlir][Vector] Add vector contraction to outerproduct lowering

This revision adds the additional lowering and exposes the patterns at a finer granularity for better programmatic reuse. The unit test makes use of the finer grained pattern for simpler checks.

As the ContractionOpLowering is exposed programmatically, cleanup opportunities appear and static class methods are turned into free functions with static visibility.

Differential Revision: https://reviews.llvm.org/D80375
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.h
The file was modifiedmlir/test/Dialect/Vector/vector-contract-transforms.mlir
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.td
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorTransforms.h
The file was modifiedmlir/test/lib/Transforms/TestVectorTransforms.cpp
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp
Commit 792575ff323b714d03215951c6fff105f1074aac by sam.parker
[NFC][ARM][AArch64] More code size tests

Add analysis runs for icmp, fcmp and select instructions.
The file was addedllvm/test/Analysis/CostModel/AArch64/cmp.ll
The file was modifiedllvm/test/Analysis/CostModel/AArch64/select.ll
The file was modifiedllvm/test/Analysis/CostModel/ARM/select.ll
The file was removedllvm/test/Analysis/CostModel/ARM/icmps.ll
The file was addedllvm/test/Analysis/CostModel/ARM/cmps.ll
Commit 222e0e58a87649623b3d16ce3fef56a6a0555be3 by csigg
[MLIR] Helper class referencing MemRefType to unify runner implementations.

Summary:
Add DynamicMemRefType which can reference one of the statically ranked StridedMemRefType or a UnrankedMemRefType so that runner utils only need to be implemented once.

There is definitely room for more clean up and unification, but I will keep that for follow-ups.

Reviewers: nicolasvasilache

Reviewed By: nicolasvasilache

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, stephenneuendorffer, Joonsoo, grosul1, frgossen, Kayjukh, jurahul, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80513
The file was modifiedmlir/test/mlir-cpu-runner/unranked_memref.mlir
The file was modifiedmlir/include/mlir/ExecutionEngine/CRunnerUtils.h
The file was modifiedmlir/include/mlir/ExecutionEngine/RunnerUtils.h
The file was modifiedmlir/lib/ExecutionEngine/RunnerUtils.cpp
The file was modifiedmlir/tools/mlir-cuda-runner/cuda-runtime-wrappers.cpp
The file was modifiedmlir/test/mlir-cpu-runner/utils.mlir
Commit 2dd7714b8d264f6436b56582e4448f6a003a61fc by Matthew.Arsenault
AMDGPU/GlobalISel: Don't select boolean phi by default

This is currently missing most of the hard parts to lower correctly,
so disable it for now. This fixes at least one OpenCL conformance test
and allows it to pass with fallback. Hide this behind an option for
now.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
Commit 099a875f28d0131a6ae85af91b9eb8627917fbbe by nemanja.i.ibm
[PowerPC] Unaligned FP default should apply to scalars only

As reported in PR45186, we could be in a situation where we don't
want to handle unaligned memory accesses for FP scalars but still
have VSX (which allows unaligned access for vectors). Change the
default to only apply to scalars.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=45186
The file was addedllvm/test/CodeGen/PowerPC/pr45186.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
Commit e72cba975735c2202b254621d79fb9dbbed08d39 by David.Chisnall
Use configure depends to trigger reconfiguration when LLVMBuild files change

Summary:
The existing logic has a workaround where configure_file is used to write a single dummy file output many times.

CMake has a feature to more directly add the dependency and avoid the dummy file (it is available in the minimum version specified).

Reviewers: theraven

Reviewed By: theraven

Subscribers: theraven, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80218
The file was modifiedllvm/utils/llvm-build/llvmbuild/main.py
Commit 8bc03d2168241f7b12265e9cd7e4eb7655709f34 by Matthew.Arsenault
GlobalISel: Merge G_PTR_MASK with llvm.ptrmask intrinsic

Confusingly, these were unrelated and had different semantics. The
G_PTR_MASK instruction predates the llvm.ptrmask intrinsic, but has a
different format. G_PTR_MASK only allows clearing the low bits of a
pointer, and only a constant number of bits. The ptrmask intrinsic
allows an arbitrary mask. Replace G_PTR_MASK to match the intrinsic.

Only selects the cases that look like the old instruction. More work
is needed to select the general case. Also new legalization code is
still needed to deal with the case where the incoming mask size does
not match the pointer size, which has a specified behavior in the
langref.
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
The file was modifiedllvm/docs/GlobalISel/GenericOpcode.rst
The file was modifiedllvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrmask.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrmask.mir
The file was modifiedllvm/include/llvm/Target/GenericOpcodes.td
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select.mir
The file was addedllvm/test/MachineVerifier/test_g_ptrmask.mir
The file was removedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-mask.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-ptrmask.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/include/llvm/Support/TargetOpcodes.def
The file was modifiedllvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
Commit b59b3640bcbdfc6cf4b35ff3a6ad5f524a073b45 by Adrian Prantl
Debug Info: Mark os_log helper functions as artificial

The os_log helper functions are linkonce_odr and supposed to be
uniqued across TUs, so attachine a DW_AT_decl_line on it is highly
misleading. By setting the function decl to implicit, CGDebugInfo
properly marks the functions as artificial and uses a default file /
line 0 location for the function.

rdar://problem/63450824

Differential Revision: https://reviews.llvm.org/D80463
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was addedclang/test/CodeGen/debug-info-oslog.c
Commit 6b7d51ad4a16579b0a7d41c77715be4d9e266d8c by Adrian Prantl
Add missing forward decl to unbreak the modular build
The file was modifiedclang/include/clang/Index/IndexingOptions.h
Commit 50d4b22ca0dd8f25a2ab2cb53a04627b2504ecfe by Matthew.Arsenault
AMDGPU/GlobalISel: Fix assert on 16-bit G_EXTRACT results

I consider this to be a hack, since we probably should not mark any
16-bit extract as legal, and require all extracts to be done on
multiples of 32. There are quite a few more battles to fight in the
legalizer for sub-dword vectors, so just select this for now so we can
pass OpenCL conformance without crashing.

Also fix the same assert for G_INSERTs. Unlike G_EXTRACT there's not a
trivial way to select this so just fail on it.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.xfail.mir
Commit 5bd97eb28aff252a3a9e8b0ef00d563b557f5580 by Sanne.Wouda
Fix MemoryLocation.h use without Instructions.h

MemoryLocation.h was changed to only include Instruction.h.  However,
cast<> still needs the full definiton, so move MemoryLocation::getOrNone
to the cpp file.
The file was modifiedllvm/include/llvm/Analysis/MemoryLocation.h
The file was modifiedllvm/lib/Analysis/MemoryLocation.cpp
Commit d6c8736287371f1c9eba3629819209c5fb54e546 by sd.fertile
[PowerPC][AIX] Spill CSRs to the ABI specified stack offsets.

Extend the CSR save/restore insertion code to support both 32-bit and
64-bit AIX.

Differential Revision: https://reviews.llvm.org/D79252
The file was modifiedllvm/test/CodeGen/PowerPC/aix-calleesavedregs.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-cc-byval-mem.ll
The file was addedllvm/test/CodeGen/PowerPC/aix-csr.ll
The file was modifiedllvm/test/CodeGen/PowerPC/ppc64-crsave.mir
The file was modifiedllvm/test/CodeGen/PowerPC/aix-cc-abi.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix32-crsave.mir
The file was modifiedllvm/lib/Target/PowerPC/PPCFrameLowering.cpp
Commit bae7cf674621b5892a036fabe77692a59e2b115b by maskray
[ELF][PPC64] Synthesize _savegpr[01]_{14..31} and _restgpr[01]_{14..31}

In the 64-bit ELF V2 API Specification: Power Architecture, 2.3.3.1. GPR
Save and Restore Functions defines some special functions which may be
referenced by GCC produced assembly (LLVM does not reference them).

With GCC -Os, when the number of call-saved registers exceeds a certain
threshold, GCC generates `_savegpr0_* _restgpr0_*` calls and expects the
linker to define them. See
https://sourceware.org/pipermail/binutils/2002-February/017444.html and
https://sourceware.org/pipermail/binutils/2004-August/036765.html . This
is weird because libgcc.a would be the natural place. However, the linker
generation approach has the advantage that the linker can generate
multiple copies to avoid long branch thunks. We don't consider the
advantage significant enough to complicate our trunk implementation, so
we take a simple approach.

* Check whether `_savegpr0_{14..31}` are used
* If yes, define needed symbols and add an InputSection with the code sequence.

`_savegpr1_*` `_restgpr0_*` and `_restgpr1_*` are similar.

Reviewed By: sfertile

Differential Revision: https://reviews.llvm.org/D79977
The file was addedlld/test/ELF/ppc64-restgpr0.s
The file was addedlld/test/ELF/ppc64-restgpr1.s
The file was modifiedlld/ELF/Writer.cpp
The file was addedlld/test/ELF/ppc64-savegpr0.s
The file was modifiedlld/ELF/Arch/PPC64.cpp
The file was addedlld/test/ELF/ppc64-saveres.s
The file was modifiedlld/ELF/Target.h
The file was addedlld/test/ELF/ppc64-savegpr1.s
Commit d4086213c6d76fcaa5fa620ad680eaaf886cc66e by Jonas Devlieghere
[dsymutil] Escape CFBundleIdentifier in plist.

Revision 333565 started escaping HTML special characters in the plist
written by dsymutil, but didn't include the updated CFBundleIdentifier.
The file was modifiedllvm/tools/dsymutil/dsymutil.cpp
The file was modifiedllvm/test/tools/dsymutil/Inputs/Info.plist
The file was modifiedllvm/test/tools/dsymutil/X86/darwin-bundle.test
Commit fb38b98338cc87442e3451665e82bf1c8ef9388f by alex-t
[AMDGPU] NFC target dependent requiresUniformRegister refactored out

Summary: Target specific method encapsulated into the Target Lowering Info.

Reviewers: rampitec, vpykhtin

Reviewed By: rampitec

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70085
The file was modifiedllvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
Commit 9786e7552d5564268484357866088d0a054bccaf by Matthew.Arsenault
Revert "[AMDGPU] NFC target dependent requiresUniformRegister refactored out"

This reverts commit fb38b98338cc87442e3451665e82bf1c8ef9388f.

This will regress compile time.
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
Commit a0ce2338a0838ccb04e10bd4f8e9ec9d7136e1d2 by spatel
[InstCombine] reassociate fsub+fadd with FMF to increase adds and throughput

The -reassociate pass tends to transform this kind of pattern into
something that is worse for vectorization and codegen. See PR43953:
https://bugs.llvm.org/show_bug.cgi?id=43953
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
The file was modifiedllvm/test/Transforms/InstCombine/fsub.ll
Commit 106ec64fbc7fb5ef28d0368fb1dca18e67e75adf by yamauchi
[PGO] Add memcmp/bcmp size value profiling.

Summary: This adds support for memcmp/bcmp to the existing memcpy/memset value profiling.

Reviewers: davidxl

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79751
The file was modifiedllvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/ValueProfilePlugins.inc
The file was modifiedllvm/test/Transforms/PGOProfile/memop_size_opt.ll
The file was modifiedllvm/lib/Transforms/Instrumentation/ValueProfileCollector.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/ValueProfileCollector.h
The file was modifiedllvm/test/Transforms/PGOProfile/memop_size_annotation.ll
The file was modifiedllvm/test/Transforms/PGOProfile/Inputs/memop_size_annotation.proftext
The file was modifiedllvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
Commit 3e62289f42d21e7e1f9a8b1d6f970740b22f5d47 by sd.fertile
[PowerPC][NFC] Add colon to TODO's and fix indentation.
The file was modifiedllvm/lib/Target/PowerPC/PPCFrameLowering.cpp
Commit 2c7d63257d8e33ff721af78045d2be6bac54da05 by sdi1600105
[MSSA][Doc] Clobbers, more info on Defs / Def chain

- Added more info about what we refer as a clobber in MSSA.
- Added more info about MemoryDefs and how there is a single Def chain.
- The doc portrayed MSSA as modeling the heap whileit is modeling
  the whole memory, so I changed the wording to not be heap-specific.

Differential Revision: https://reviews.llvm.org/D80000
The file was modifiedllvm/docs/MemorySSA.rst
Commit 8f1156a7d004d97e9f75484a00dc4278698fd8ea by mydeveloperday
[clang-format] Fix an ObjC regression introduced with new [[likely]][[unlikely]] support in if/else clauses

Summary:
{D80144} introduce an ObjC regression

Only parse the `[]` if what follows is really an attribute

Reviewers: krasimir, JakeMerdichAMD

Reviewed By: krasimir

Subscribers: rdwampler, aaron.ballman, curdeius, cfe-commits

Tags: #clang, #clang-format

Differential Revision: https://reviews.llvm.org/D80547
The file was modifiedclang/unittests/Format/FormatTestObjC.cpp
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was modifiedclang/lib/Format/UnwrappedLineParser.h
The file was modifiedclang/lib/Format/UnwrappedLineParser.cpp
Commit d70ec366c91b2a5fc6334e6f6ca9c4d9a6785c5e by adam.balogh
[Analyzer][NFC] Remove the SubEngine interface

The `SubEngine` interface is an interface with only one implementation
`EpxrEngine`. Adding other implementations are difficult and very
unlikely in the near future. Currently, if anything from `ExprEngine` is
to be exposed to other classes it is moved to `SubEngine` which
restricts the alternative implementations. The virtual methods are have
a slight perofrmance impact. Furthermore, instead of the `LLVM`-style
inheritance a native inheritance is used here, which renders `LLVM`
functions like e.g. `cast<T>()` unusable here. This patch removes this
interface and allows usage of `ExprEngine` directly.

Differential Revision: https://reviews.llvm.org/D80548
The file was modifiedclang/lib/StaticAnalyzer/Core/SMTConstraintManager.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/RegionStore.cpp
The file was removedclang/lib/StaticAnalyzer/Core/SubEngine.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
The file was modifiedclang/lib/StaticAnalyzer/Core/SValBuilder.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
The file was modifiedclang/lib/StaticAnalyzer/Core/CoreEngine.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/CallEvent.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/ConstraintManager.h
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/RangedConstraintManager.h
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/SimpleConstraintManager.h
The file was removedclang/include/clang/StaticAnalyzer/Core/PathSensitive/SubEngine.h
The file was modifiedclang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConstraintManager.h
The file was modifiedclang/lib/StaticAnalyzer/Core/ExprEngine.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/SimpleConstraintManager.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/ProgramState.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/CMakeLists.txt
The file was modifiedclang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
Commit 10f0b18ed950545d10574f5b30d234bd3789d7b2 by llvmgnsyncbot
[gn build] Port d70ec366c91
The file was modifiedllvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Core/BUILD.gn
Commit d1f0a76b21975ba66ec2427c2d3ddb7ed1e63949 by Jonas Devlieghere
[YAMLTraits] Remove char trait and serialize as uint8_t in lldb.

As discussed in https://reviews.llvm.org/D79745
The file was modifiedllvm/unittests/Support/YAMLIOTest.cpp
The file was modifiedllvm/include/llvm/Support/YAMLTraits.h
The file was modifiedllvm/lib/Support/YAMLTraits.cpp
The file was modifiedlldb/include/lldb/Utility/Args.h
Commit b8a3c618d6c5df081cad69b5ffb386a7a7b0361f by maskray
[ELF] Allow misaligned SHT_GNU_verneed

Bazel created interface shared objects (.ifso) may be misaligned.  We use
llvm::support::detail::packed_endian_specific_integral under the hood
which allows reading of misaligned values, so there is not a need to
diagnose (in LLD we don't intend to support sophisticated parsing for
SHT_GNU_*).
The file was addedlld/test/ELF/invalid/verneed-shared.test
The file was modifiedlld/ELF/InputFiles.cpp
The file was removedlld/test/ELF/invalid/verneed-shared.yaml
Commit 50db8402fc6652559d9ba3dc97bb787c4160ef5b by llvm-dev
ResourcePriorityQueue.h - reduce unnecessary includes to forward declarations. NFC.

Move includes to ResourcePriorityQueue.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp
The file was modifiedllvm/include/llvm/CodeGen/ResourcePriorityQueue.h
Commit 0165cf701156db4d399cb31d31ecb154372e2562 by llvm-dev
ObjCARCAnalysisUtils.h - remove unused includes. NFC.

We just need to include Passes.h in ObjCARCAliasAnalysis.cpp to compensate
The file was modifiedllvm/lib/Analysis/ObjCARCAliasAnalysis.cpp
The file was modifiedllvm/include/llvm/Analysis/ObjCARCAnalysisUtils.h
Commit 8d31dd23ec2368d00b0668c3d01b1fd2ce4d621b by Jonas Devlieghere
[lldb/Reproducers] Skip remaining failing test in python_api subdir

Skip the remaining two failing test in the python_api subdirectory. See
inline comments for the reason why.
The file was modifiedlldb/test/API/python_api/hello_world/TestHelloWorld.py
The file was modifiedlldb/test/API/python_api/sbdata/TestSBData.py
Commit a94e08d2e840a0e7ce032f59e9344bc49b5a54a1 by Jonas Devlieghere
[StaticAnalyzer] Fix non-virtual destructor warning

Ficed warning: 'clang::ento::ExprEngine' has virtual functions but non-virtual destructor [-
Wnon-virtual-dtor]
  ~ExprEngine() = default;
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
Commit 2e824925402f011c2a4d3a0b51cce388b6d14d16 by kcc
[fuzzer][afl] Fix build with GCC

Summary:
Fixes this build error with GCC 9.3.0:

```
../lib/fuzzer/afl/afl_driver.cpp:114:30: error: expected unqualified-id before string constant
  114 | __attribute__((weak)) extern "C" void __sanitizer_set_report_fd(void *);
      |                              ^~~
```

Reviewers: metzman, kcc

Reviewed By: kcc

Subscribers: #sanitizers

Tags: #sanitizers

Differential Revision: https://reviews.llvm.org/D80479
The file was modifiedcompiler-rt/lib/fuzzer/afl/afl_driver.cpp
Commit 6e9223a2c65835444c5c1328d52daf9f85f9618c by nemanja.i.ibm
[PowerPC][NFC] Update test to prevent DCE from causing failures

The test case provided in PR45709 can be simplified by DCE to an
empty function. To prevent this from happening if DCE is run prior
to ISEL in the back end, just add optnone to the function. The
behaviour it is testing for is in the SDAG legalization and is
not sensitive to optnone so the test case still achieves its desired
objective.
The file was modifiedllvm/test/CodeGen/PowerPC/pr45709.ll
Commit 12dbdc2a6b68162f7370e9754bdb0e1edd65bf3c by adam.balogh
[Analyzer] Fix buildbot failure of commit rGd70ec366c91b
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
Commit 7eb666b1556b86503f2f386bf921186cdbb2d22a by lei
[PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

Summary:
This patch simply adds support for the new CPU in anticipation of
Power10. There isn't really any functionality added so there are no
associated test cases at this time.

Reviewers: stefanp, nemanjai, amyk, hfinkel, power-llvm-team, #powerpc

Reviewed By: stefanp, nemanjai, amyk, #powerpc

Subscribers: NeHuang, steven.zhang, hiraditya, llvm-commits, wuzish, shchenz, cfe-commits, kbarton, echristo

Tags: #clang, #powerpc, #llvm

Differential Revision: https://reviews.llvm.org/D80020
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPC.td
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
The file was modifiedclang/lib/Driver/ToolChains/Arch/PPC.cpp
The file was modifiedclang/test/Preprocessor/init-ppc64.c
The file was modifiedllvm/lib/Support/Host.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedclang/test/Misc/target-invalid-cpu-note.c
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.h
The file was modifiedclang/lib/Basic/Targets/PPC.h
The file was modifiedllvm/test/CodeGen/PowerPC/check-cpu.ll
The file was modifiedclang/lib/Basic/Targets/PPC.cpp
Commit 0788392637f414c312a995f3202177a2919eba2f by spatel
[InstCombine] add tests for reassociative sub/add expressions; NFC
The file was modifiedllvm/test/Transforms/InstCombine/sub.ll
Commit f5cfcc4b0638eaca9194776309d16cd59c1f961b by spatel
[LoopVectorize] regenerate full test checks; NFC
The file was modifiedllvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
Commit 1a2bffaf8b4567663f3001bd9c7532322e89f990 by spatel
[InstCombine] reassociate sub+add to increase adds and throughput

The -reassociate pass tends to transform this kind of pattern into
something that is worse for vectorization and codegen. See PR43953:
https://bugs.llvm.org/show_bug.cgi?id=43953

Follows-up the FP version of the same transform:
rGa0ce2338a083
The file was modifiedllvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
The file was modifiedllvm/test/Transforms/InstCombine/sub.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
Commit 713538b629e45e6236b5d60fd6b64d7b8669cd00 by echristo
Be more specific about auto * vs auto for po alias.
The file was modifiedlldb/source/Interpreter/CommandInterpreter.cpp
Commit fca76b79456c916fd2ce193ef76d6e795bd9c105 by dblaikie
Roll variables into an LLVM_DEBUG block to address -Wunused-but-set-variable
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
Commit ae903f0313e481520eff8a13044070aca4d0b75d by Jonas Devlieghere
[lldb/Test] Reinstate FoundationSymtabTestCase
The file was modifiedlldb/test/API/lang/objc/foundation/TestSymbolTable.py
Commit ef94f60ff7954521e6ff1be044a4a5d0599ce4ef by sdi1600105
[MSSA][Doc] Fix typo
The file was modifiedllvm/docs/MemorySSA.rst
Commit c4dbe59ae8253d73b63e5fcce0bc8bc44b4d07b5 by psteinfeld
[flang] Fixes for problems with declaring procedure entities

Summary:
We were not detecting declaring multiple interfaces to the same procedure.
Also, we were not handling the initialization of entitiies where the associated
Symbol had previously had errors.

I added the function `IsInterfaceSet()` to ProcEntityDetails to see if
the value of `interface_` had been previously set.  I then checked  this
function before calling set_interface() and emitted an error message if
the interface was already set.

Also, in situations where we were emitting error messages for symbols, I
set the Error flag on the Symbol.  Then when performing initialization
on the Symbol, I first check to see if the Symbol had an error.

Reviewers: tskeith, klausler, DavidTruby

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80453
The file was modifiedflang/lib/Semantics/resolve-names.cpp
The file was addedflang/test/Semantics/resolve91.f90
The file was modifiedflang/include/flang/Semantics/symbol.h
Commit e09064e97f293491e59b30569033c8962129bdeb by Matthew.Arsenault
AMDGPU: Update store node checks for atomics

Prepare to switch to using StoreSDNode for atomic stores.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
Commit e99d50d8440efe8fa3515db4dae873ba39810dfd by smeenai
[Support] Remove stale comment

Clang has supported __builtin_assume_aligned since r217349 back in 2014,
so the comment is very out of date.
The file was modifiedllvm/include/llvm/Support/Compiler.h
Commit ba10daa820fa868816eed2b85e70197d354ebfe6 by ntv
[mlir][Vector] Add more vector.contract -> outerproduct lowerings and fix vector.contract type inference.

This revision expands the types of vector contractions that can be lowered to vector.outerproduct.
All 8 permutation cases are support.
The idiomatic manipulation of AffineMap written declaratively makes this straightforward.

In the process a bug with the vector.contract verifier was uncovered.
The vector shape verification part of the contract op is rewritten to use AffineMap composition.
One bug in the vector `ops.mlir` test is fixed and a new case not yet captured is added
to the vector`invalid.mlir` test.

Differential Revision: https://reviews.llvm.org/D80393
The file was modifiedmlir/test/Dialect/Vector/vector-contract-transforms.mlir
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
The file was modifiedmlir/test/Dialect/Vector/invalid.mlir
The file was modifiedmlir/test/Dialect/Vector/ops.mlir
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp
The file was modifiedmlir/include/mlir/Dialect/Utils/StructuredOpsUtils.h
Commit 42725aeed8cbabc15e351e2854ae549df2c5dcde by Stanislav.Mekhanoshin
Process gep (select ptr1, ptr2) in SROA

Differential Revision: https://reviews.llvm.org/D79217
The file was addedllvm/test/Transforms/SROA/select-gep.ll
The file was modifiedllvm/lib/Transforms/Scalar/SROA.cpp
Commit bd7ff5d94f0f591206188267a0e1529fa13d6c2e by chris.jackson
[DebugInfo] Correct debuginfo for post-ra hoist and sink in Machine LICM

Reviewers: vsk, aprantl

Differential Revision: https://reviews.llvm.org/D79868
The file was addedllvm/test/DebugInfo/MIR/X86/mlicm-sink.mir
The file was addedllvm/test/DebugInfo/MIR/X86/mlicm-hoist-pre-regalloc.mir
The file was modifiedllvm/lib/CodeGen/MachineLICM.cpp
The file was removedllvm/test/DebugInfo/MIR/X86/mlicm-hoist.mir
The file was addedllvm/test/DebugInfo/MIR/X86/mlicm-hoist-post-regalloc.mir
Commit e1d2cecec5197af7104e4c50e6aed4313d512cda by Jonas Devlieghere
[lldb/Test] Cleanup TestSymbolTable.py (NFC)
The file was modifiedlldb/test/API/lang/objc/foundation/TestSymbolTable.py
Commit e9003207591e4830bcce2de1631db901f8c4f2b8 by ntv
[mlir] Hotfix - Drop spurious constexpr that breaks build
The file was modifiedmlir/include/mlir/Dialect/Utils/StructuredOpsUtils.h
Commit c990bdf7f8761f047fac85615377835edf015698 by ntv
[mlir] Hotfix - Add inline to avoid multiple symbols on trivial functions
The file was modifiedmlir/include/mlir/Dialect/Utils/StructuredOpsUtils.h
Commit bb10fa3a53f928e2e24ad3eaf8e57508fe9d4320 by Matthew.Arsenault
AMDGPU: Fix wrong null value for private address space

I'm guessing this was a holdover from when 0 was an invalid stack
pointer, but surprised nobody has discovered this before.

Also don't allow offset folding for -1 pointers, since it looks weird
to partially fold this.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-private.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/addrspacecast.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/nullptr.ll
Commit 14de6e29b1315e9abe61d71e3e13f75bff80e1be by Vitaly Buka
[Clang][Driver] Add Bounds and Thread to SupportsCoverage list

Summary:
This permits combining -fsanitize-coverage with -fsanitize=bounds or
-fsanitize=thread. Note that, GCC already supports combining these.

Tested:
- Add Clang end-to-end test checking IR is generated for both combinations
of sanitizers.
- Several previously failing TSAN tests now pass.

Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=45831

Reviewers: vitalybuka

Reviewed By: vitalybuka

Subscribers: #sanitizers, dvyukov, nickdesaulniers, cfe-commits

Tags: #clang, #sanitizers

Differential Revision: https://reviews.llvm.org/D79628
The file was modifiedcompiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_trace_pc_guard-init.cpp
The file was addedclang/test/CodeGen/sanitize-coverage.c
The file was modifiedcompiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_stack_depth.cpp
The file was modifiedclang/test/Driver/fsanitize-coverage.c
The file was modifiedcompiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_inline_bool_flag.cpp
The file was modifiedclang/lib/Driver/SanitizerArgs.cpp
The file was modifiedcompiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_no_prune.cpp
The file was modifiedcompiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_inline8bit_counter.cpp
Commit 09de6e0fbd0b6ca7fa8760ac3513be6bbbba5a81 by Adrian Prantl
Let @skipUnlessAddressSanitizer imply @skipIfAsan

Don't run tests that use address sanitizer inside an address-sanitized
LLDB. The tests don't support that configuration. Incidentally they
were skipped on green dragon for a different reason, so this hasn't
come up there before.
The file was modifiedlldb/packages/Python/lldbsuite/test/decorators.py
Commit 01fee8aa24a6070542cfa55b2c32036d1d5869b8 by ditaliano
[MLICM] Remove unneeded option so the test doesn't fail.
The file was modifiedllvm/test/DebugInfo/MIR/X86/mlicm-hoist-post-regalloc.mir
Commit 5cf90d6cf1b811a6693383c487f79d24d5b306bb by flo
[LoopUnroll] Simplify latch/header block handling (NFC).

I think the current code dealing with connecting the unrolled iterations
is a bit more complicated than necessary currently. To connect the
unrolled iterations, we have to update the unrolled latch blocks to
branch to the header of the next unrolled iteration.

We need to do this regardless whether the latch is exiting or not.

Additionally, we try to turn the conditional branch in the exiting block
to an unconditional one. This is an optimization only; alternatively we
could leave the conditional branches in place and rely on other passes
to simplify the conditions.

Logically, this is a separate step from connecting the latches to the
headers, but it is convenient to fold them into the same loop, if the
latch is also exiting. For headers (or other non-latch exiting blocks,
this is done separately).

Hopefully the patch with additional comments makes things a bit clearer.

Reviewers: efriedma, dmgreen, hfinkel, Whitney

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D80544
The file was modifiedllvm/lib/Transforms/Utils/LoopUnroll.cpp
Commit 512e806a33e80058a409d205a378a6e6fc2ef39d by Stanislav.Mekhanoshin
[AMDGPU] Bail alloca vectorization if GEP not found

Differential Revision: https://reviews.llvm.org/D80587
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll
Commit ecb66f50eeb73c32f8fd955a97bb070fbdd519ed by Vitaly Buka
[NFC, StackSafety] Move FunctionInfo into :: namespace
The file was modifiedllvm/include/llvm/Analysis/StackSafetyAnalysis.h
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
Commit 9abb0e8d5be2ffad06ccfcc2d5530997ad093b81 by Vitaly Buka
[NFC, StackSafety] Remove unnecessary data
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
The file was modifiedllvm/include/llvm/Analysis/StackSafetyAnalysis.h
Commit 6e39379bbbe1d8aba658f638dfc42f0ba0cbb926 by Vedant Kumar
[DwarfExpression] Support entry values for indirect parameters

Summary:
A struct argument can be passed-by-value to a callee via a pointer to a
temporary stack copy. Add support for emitting an entry value DBG_VALUE
when an indirect parameter DBG_VALUE becomes unavailable. This is done
by omitting DW_OP_stack_value from the entry value expression, to make
the expression describe the location of an object.

rdar://63373691

Reviewers: djtodoro, aprantl, dstenb

Subscribers: hiraditya, lldb-commits, llvm-commits

Tags: #lldb, #llvm

Differential Revision: https://reviews.llvm.org/D80345
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
The file was modifiedlldb/test/API/functionalities/param_entry_vals/basic_entry_values/main.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfExpression.h
The file was addedllvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir
The file was modifiedllvm/lib/CodeGen/LiveDebugValues.cpp
The file was addedllvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param-with-offset.mir
Commit 6a74ad6baad45b8572d196f7f290593ed62075b5 by Vitaly Buka
[sancov] Accommodate sancov and coverage report server for use under Windows

Summary:
This patch makes the following changes to SanCov and its complementary Python script in order to resolve issues pertaining to non-UNIX file paths in JSON symbolization information:
* Convert all paths to use forward slash.
* Update `coverage-report-server.py` to correctly handle paths to sources which contain spaces.
* Remove Linux platform restriction for all SanCov unit tests. All SanCov tests passed when ran on my local Windows machine.

Patch by Douglas Gliner.

Reviewers: kcc, filcab, phosek, morehouse, vitalybuka, metzman

Reviewed By: vitalybuka

Subscribers: vsk, Dor1s, llvm-commits

Tags: #sanitizers, #llvm

Differential Revision: https://reviews.llvm.org/D51018
The file was modifiedllvm/test/tools/sancov/stats.test
The file was modifiedllvm/test/tools/sancov/blacklist.test
The file was modifiedllvm/test/tools/sancov/symbolize_noskip_dead_files.test
The file was modifiedllvm/test/tools/sancov/merge.test
The file was modifiedllvm/test/tools/sancov/validation.test
The file was modifiedllvm/test/tools/sancov/print.test
The file was modifiedllvm/test/tools/sancov/not_covered_functions.test
The file was modifiedllvm/test/tools/sancov/symbolize.test
The file was modifiedllvm/test/tools/sancov/covered_functions.test
The file was modifiedllvm/tools/sancov/coverage-report-server.py
The file was modifiedllvm/tools/sancov/sancov.cpp
Commit 1e06b169be3e59799b8dcaf16d1d03bd4c12da42 by Jonathan Roelofs
[clang][docs] Document additional bits of libc that -ffreestanding envs must provide

Differential Revision: https://reviews.llvm.org/D80436
The file was modifiedclang/docs/CommandGuide/clang.rst
Commit 9eacda51fa23abf4f6503ff533dcb70071cbe569 by chris.jackson
[debuginfo] Fix broken tests from MachineLICM salvaging fix

Previous commit: bd7ff5d94f

- Added missing x86 triples
- Added missing asserts
The file was modifiedllvm/test/DebugInfo/MIR/X86/mlicm-hoist-pre-regalloc.mir
The file was modifiedllvm/test/DebugInfo/MIR/X86/mlicm-sink.mir
The file was modifiedllvm/test/DebugInfo/MIR/X86/mlicm-hoist-post-regalloc.mir
Commit 5192783bb29c32196f87044de113fc43d7dfaae8 by dkszelethus
[analyzer][RetainCount] Tie diagnostics to osx.cocoa.RetainCount rather then RetainCountBase, for the most part

Similarly to other patches of mine, I'm trying to uniformize the checker
interface so that dependency checkers don't emit diagnostics. The checker that
made me most anxious so far was definitely RetainCount, because it is definitely
impacted by backward compatibility concerns, and implements a checker hierarchy
that is a lot different to other examples of similar size. Also, I don't have
authority, nor expertise regarding ObjC related code, so I welcome any
objection/discussion!

Differential Revision: https://reviews.llvm.org/D78099
The file was modifiedclang/test/Analysis/incorrect-checker-names.mm
The file was modifiedclang/test/Analysis/Inputs/expected-plists/edges-new.mm.plist
The file was modifiedclang/test/Analysis/Inputs/expected-plists/plist-output-alternate.m.plist
The file was modifiedclang/test/Analysis/Inputs/expected-plists/retain-release-path-notes.m.plist
The file was modifiedclang/test/Analysis/Inputs/expected-plists/objc-radar17039661.m.plist
The file was modifiedclang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountDiagnostics.cpp
The file was modifiedclang/test/Analysis/Inputs/expected-plists/plist-output.m.plist
The file was modifiedclang/test/Analysis/Inputs/expected-plists/retain-release.m.objcpp.plist
The file was modifiedclang/test/Analysis/inlining/Inputs/expected-plists/path-notes.m.plist
The file was modifiedclang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountDiagnostics.h
The file was modifiedclang/test/Analysis/Inputs/expected-plists/objc-arc.m.plist
The file was modifiedclang/test/Analysis/test-separate-retaincount.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.cpp
The file was modifiedclang/test/Analysis/Inputs/expected-plists/retain-release.m.objc.plist
The file was modifiedclang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.h
Commit efd1a8e66eaa13afff709ebf16ff6280caa82ead by dkszelethus
[analyzer][MallocChecker] Make NewDeleteLeaks depend on DynamicMemoryModeling rather than NewDelete

If you remember the mail [1] I sent out about how I envision the future of the
already existing checkers to look dependencywise, one my main points was that no
checker that emits diagnostics should be a dependency. This is more problematic
for some checkers (ahem, RetainCount [2]) more than for others, like this one.

The MallocChecker family is a mostly big monolithic modeling class some small
reporting checkers that only come to action when we are constructing a warning
message, after the actual bug was detected. The implication of this is that
NewDeleteChecker doesn't really do anything to depend on, so this change was
relatively simple.

The only thing that complicates this change is that FreeMemAux (MallocCheckers
method that models general memory deallocation) returns after calling a bug
reporting method, regardless whether the report was ever emitted (which may not
always happen, for instance, if the checker responsible for the report isn't
enabled). This return unfortunately happens before cleaning up the maps in the
GDM keeping track of the state of symbols (whether they are released, whether
that release was successful, etc). What this means is that upon disabling some
checkers, we would never clean up the map and that could've lead to false
positives, e.g.:

error: 'warning' diagnostics seen but not expected:
  File clang/test/Analysis/NewDelete-intersections.mm Line 66: Potential leak of memory pointed to by 'p'
  File clang/test/Analysis/NewDelete-intersections.mm Line 73: Potential leak of memory pointed to by 'p'
  File clang/test/Analysis/NewDelete-intersections.mm Line 77: Potential leak of memory pointed to by 'p'

error: 'warning' diagnostics seen but not expected:
  File clang/test/Analysis/NewDelete-checker-test.cpp Line 111: Undefined or garbage value returned to caller
  File clang/test/Analysis/NewDelete-checker-test.cpp Line 200: Potential leak of memory pointed to by 'p'

error: 'warning' diagnostics seen but not expected:
  File clang/test/Analysis/new.cpp Line 137: Potential leak of memory pointed to by 'x'
There two possible approaches I had in mind:

Make bug reporting methods of MallocChecker returns whether they succeeded, and
proceed with the rest of FreeMemAux if not,
Halt execution with a sink node upon failure. I decided to go with this, as
described in the code.
As you can see from the removed/changed test files, before the big checker
dependency effort landed, there were tests to check for all the weird
configurations of enabled/disabled checkers and their messy interactions, I
largely repurposed these.

[1] http://lists.llvm.org/pipermail/cfe-dev/2019-August/063070.html
[2] http://lists.llvm.org/pipermail/cfe-dev/2019-August/063205.html

Differential Revision: https://reviews.llvm.org/D77474
The file was modifiedclang/include/clang/StaticAnalyzer/Checkers/Checkers.td
The file was modifiedclang/test/Analysis/NewDelete-checker-test.cpp
The file was modifiedclang/test/Analysis/new.cpp
The file was modifiedclang/test/Analysis/NewDelete-intersections.mm
The file was removedclang/test/Analysis/Malloc+NewDelete_intersections.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
Commit a924dac44f31ffa19508165fc61a9f10cd1d4836 by wanyu9511
[NFC] Fix formatting for the 'aix-ld.c' test case.

Summary:
Based on comments received in D80415 pertinent to test case format, the following fixes are provided to other tests in 'aix-ld.c' for the sake of consistency and readability,
  - Align flags in RUN directives vertically.
  - Align patterns in CHECK directives vertically.
  - Remove the ‘-o %t.o’ as it’s unnecessary for tests with ‘-###’.
  - Fix typos in comments.

Reviewers: ZarkoCA, hubert.reinterpretcast, daltenty

Reviewed By: hubert.reinterpretcast

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80532
The file was modifiedclang/test/Driver/aix-ld.c
Commit 9a0b0855a96ad91e082c6fb066e0ebabe72eb6b3 by aeubanks
Modify verifier checks to support musttail + preallocated

Summary:
preallocated and musttail can work together, but we don't want to call
@llvm.call.preallocated.setup() to modify the stack in musttail calls.
So we shouldn't have the "preallocated" operand bundle when a
preallocated call is musttail.

Also disallow use of preallocated on calls without preallocated.

Codegen not yet implemented.

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80581
The file was modifiedllvm/test/Verifier/preallocated-valid.ll
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was modifiedllvm/test/Verifier/preallocated-invalid.ll
Commit 842a8cc10c4146cee6cedd94fbf556c94b8ec365 by alexshap
[llvm-objcopy][MachO] Add support for removing Swift symbols

cctools strip has the option "-T" which removes Swift symbols.
This diff implements this option in llvm-strip for MachO.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D80099
The file was addedllvm/test/tools/llvm-objcopy/MachO/remove-swift-symbols.test
The file was modifiedllvm/docs/CommandGuide/llvm-strip.rst
The file was modifiedllvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp
The file was modifiedllvm/tools/llvm-objcopy/MachO/MachOReader.h
The file was modifiedllvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp
The file was modifiedllvm/tools/llvm-objcopy/StripOpts.td
The file was modifiedllvm/tools/llvm-objcopy/CopyConfig.h
The file was modifiedllvm/tools/llvm-objcopy/COFF/COFFObjcopy.cpp
The file was modifiedllvm/tools/llvm-objcopy/MachO/MachOReader.cpp
The file was modifiedllvm/tools/llvm-objcopy/MachO/Object.h
The file was modifiedllvm/tools/llvm-objcopy/CopyConfig.cpp
Commit cf42b704391c44e84485dd2547ae006196998266 by silvasean
[mlir][shape] Add `shape.get_extent`.

Summary:
This op extracts an extent from a shape.

This also is the first op which constant folds to shape.const_size,
which revealed that shape.const_size needs a folder (ConstantLike ops
seem to always need folders for the constant folding infra to work).

Differential Revision: https://reviews.llvm.org/D80394
The file was modifiedmlir/lib/Dialect/Shape/IR/Shape.cpp
The file was modifiedmlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
The file was modifiedmlir/test/Dialect/Shape/canonicalize.mlir
Commit e724db03752a0cd06a86153fea0d95e377f999c0 by Jonas Devlieghere
[lldb/Test] Modify TestSymbolTable.py for reproducers

Work around global module caching during reproducer replay. See inline
comment for the details.
The file was modifiedlldb/test/API/lang/objc/foundation/TestSymbolTable.py
Commit 1079978b3c506abca2b4dd9a5b131c024330206b by apl
[lldb][Core] Remove dead codepath in Mangled

Summary:
Objective-C names are stored in m_demangled, not in m_mangled. The
method in the condition will never return true.

Differential Revision: https://reviews.llvm.org/D79823
The file was modifiedlldb/source/Core/Mangled.cpp
Commit b90eb0f23b5bf3db4a091748b3ea6de9a45645c9 by listmail
Autogen a couple of test files to make a future diff easier to read
The file was modifiedllvm/test/Transforms/RewriteStatepointsForGC/deopt-lowering-attrs.ll
The file was modifiedllvm/test/Transforms/RewriteStatepointsForGC/base-pointers-4.ll
The file was modifiedllvm/test/Transforms/RewriteStatepointsForGC/basic.ll
Commit bed6624ac43bc223114d0b9380d593f2dfd749ff by listmail
Split a test file so that most of it can be autogened
The file was modifiedllvm/test/Transforms/RewriteStatepointsForGC/scalar-base-vector.ll
The file was addedllvm/test/Transforms/RewriteStatepointsForGC/scalar-base-vector-2.ll
Commit 40c4ecabc238cfdd639bc1e927800337457e69e3 by Jonas Devlieghere
[lldb/Docs] Add the application speicfic lldbinit to the man page

This used to be part of the man page but got lost when we moved to
generating it with Sphinx.
The file was modifiedlldb/docs/man/lldb.rst
Commit 323d850427472ed060fc4c495b2010e6174b875b by listmail
Add self as code owner for SCEV and IndVars

This was discussed on llvm-dev thread "Transferring code ownership for SCEV and IndVars" a few months back.  I just forgot to make the actual change.
The file was modifiedllvm/CODE_OWNERS.TXT
Commit ae597a771ed4d7530e2ef232d02a253067e3312f by Jessica Paquette
[AArch64][GlobalISel] Do not modify predicate when optimizing G_ICMP

This fixes a bug in `tryOptArithImmedIntegerCompare`.

It is unsafe to update the predicate on a MachineOperand when optimizing a
G_ICMP, because it may be used in more than one place.

For example, when we are optimizing G_SELECT, we allow compares which are used
in more than one G_SELECT. If we modify the G_ICMP, then we'll break one of
the G_SELECTs.

Since the compare is being produced to either

1) Select a G_ICMP
2) Fold a G_ICMP into an instruction when profitable

there's no reason to actually modify it. The change is local to the specific
compare.

Instead, pass a `CmpInst::Predicate` to `tryOptArithImmedIntegerCompare` which
can be modified by reference.

Differential Revision: https://reviews.llvm.org/D80585
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-arith-immed-compare.mir
Commit f20ace6f333fa56af1879f7480a0e7979201c374 by Vitaly Buka
[NFC, StackSafety] Better names for internal stuff

Remove const from some parameters as upcoming changes in ScalarEvolution
calls will need non const pointers.
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
Commit 5afef79ff465e1711a9412f6814d66ff80f50dcf by Vitaly Buka
[NFC, StackSafety] Remove duplicate code
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
Commit 4320d4aa1c1c7d8bd75537703f7a11140552b0fa by Vitaly Buka
[NFC, StackSafety] Add some missing includes
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
Commit b5ae70046b0211ff75be8459f7282fe07ad918d8 by Vitaly Buka
[StackSafety] Simplify SCEVRewriteVisitor

Probably NFC.
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/local.ll
Commit ef3e83122665adcb2f7a7f380c9deb3dac68cb80 by Matthew.Arsenault
GlobalISel: Basic legalization for G_PTRMASK
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptrmask.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalityPredicates.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Commit 8e3307f5519fa58827c7b030274f122b1ed36617 by Matthew.Arsenault
GlobalISel: Add a clarification to G_STORE documentation

Mirror the note on G_LOAD. We probably do need to add an explicit
G_TRUNCSTORE opcode for the vector case, although I do not have a use
for it.
The file was modifiedllvm/docs/GlobalISel/GenericOpcode.rst
Commit 97a133f15724aa7ddf5d9b62dc9c0657a4efd115 by echristo
Temporarily Revert "[Clang][AArch64] Capturing proper pointer alignment for Neon vld1 intrinsicts"
as it's causing crashes on code generation and https://bugs.llvm.org/show_bug.cgi?id=46084

This reverts commit 98cad555e29187a03e2bc3db5780762981913902.
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedclang/test/CodeGen/aarch64-neon-intrinsics.c
Commit 23a2f4521467a708fb1f9ae1f9536f302a1dc7e3 by shkzhang
[NFC][PowerPC] Modify the test case two-address-crash.mir
The file was modifiedllvm/test/CodeGen/PowerPC/two-address-crash.mir
Commit a7141480fb04eadf8d7d60c03494bcc885979a8e by Jinsong Ji
[compiler-rt][NFC]Fix Wdeprecated warnings for fsanitize-coverage

A few testcases are still using deprecated options.

warning: argument '-fsanitize-coverage=[func|bb|edge]' is deprecated,
use '-fsanitize-coverage=[func|bb|edge],[trace-pc-guard|trace-pc]'
instead [-Wdeprecated]

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D79741
The file was modifiedcompiler-rt/test/asan/TestCases/Windows/coverage-basic.cpp
The file was modifiedcompiler-rt/test/ubsan/TestCases/Misc/coverage-levels.cpp
The file was modifiedcompiler-rt/test/msan/coverage-levels.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/coverage-disabled.cpp
Commit 5759e4731635e1f28fef2c4619491a1b4a2bc305 by ravishankarm
[mlir][Linalg] Avoid using scf.parallel for non-parallel loops in Linalg ops.

Modifying the loop nest builder for generating scf.parallel loops to
not generate scf.parallel loops for non-parallel iterator types in
Linalg operations. The existing implementation incorrectly generated
scf.parallel for all tiled loops. It is rectified by refactoring logic
used while lowering to loops that accounted for this.

Differential Revision: https://reviews.llvm.org/D80188
The file was addedmlir/test/Dialect/Linalg/tile_parallel_reduce.mlir
The file was modifiedmlir/test/Dialect/Linalg/transform-patterns.mlir
The file was modifiedmlir/test/Dialect/Linalg/parallel_loops.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Loops.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
The file was modifiedmlir/test/lib/Transforms/TestLinalgTransforms.cpp
Commit 0ed2d4c7cba8fb15e51d0f6f4e9011027c17085c by ravishankarm
[mlir][linalg] Allow promotion to use callbacks for
alloc/dealloc/copies.

Add options to LinalgPromotion to use callbacks for implementating the
allocation, deallocation of buffers used for the promoted subviews,
and to copy data into and from the original subviews to the allocated
buffers.
Also some misc. cleanup of the code.

Differential Revision: https://reviews.llvm.org/D80365
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
The file was addedmlir/test/Dialect/Linalg/promotion_options.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was modifiedmlir/test/lib/Transforms/TestLinalgTransforms.cpp
Commit 9f69d3d0bc65ff50b1dc3ab0a6a08ddc32b190a6 by sivachandra
[libc][NFC][Obvious] Convert the MPFR operations enum to an enum class.

This was suggested in https://reviews.llvm.org/D79149.
The file was modifiedlibc/test/src/math/fabsf_test.cpp
The file was modifiedlibc/test/src/math/sinf_test.cpp
The file was modifiedlibc/utils/MPFRWrapper/MPFRUtils.cpp
The file was modifiedlibc/test/src/math/fabs_test.cpp
The file was modifiedlibc/test/src/math/cosf_test.cpp
The file was modifiedlibc/test/src/math/exp2f_test.cpp
The file was modifiedlibc/utils/MPFRWrapper/MPFRUtils.h
The file was modifiedlibc/test/src/math/sincosf_test.cpp
The file was modifiedlibc/test/src/math/expf_test.cpp
Commit 6bbaa62d26b6061c93eb62c82048c14014ab7bd7 by dpetrov
[analyzer] Add support for IE of keyboard and mouse navigation in HTML report

IE throws errors while using key and mouse navigation through the error path tips.
querySelectorAll method returns NodeList. NodeList belongs to browser API. IE doesn't have forEach among NodeList's methods. At the same time Array is a JavaScript object and can be used instead. The fix is in the converting NodeList into Array and keeps using forEach method as before.

Checked in IE11, Chrome and Opera.

Differential Revision: https://reviews.llvm.org/D80444
The file was modifiedclang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
Commit d0f1f5adfa574ece80d566f400ebb689ae822a16 by Vitaly Buka
[StackSafety] Use getSignedRange for offsets
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/local.ll
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/ipa.ll
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
Commit 32a1f60d11f7295c1b93c33c190303c606b1b41d by Vitaly Buka
[StackSafety] Use SCEV to find mem operation length
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/local.ll
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/memintrin.ll
Commit 6565b5858444ba7dcf799467f5be63d2c2370715 by pengfei.wang
[X86][llvm-mc] Make the suffix matcher more accurate.

Summary:
Some instruction like VPMULDQ is NOT the variant of VPMULD but a new
one.
So we should make sure the suffix matcher only works for memory variant
that has the same size with the suffix.
Currently we only check for SSE/AVX* instructions, because many legacy
instructions didn't declare the alias instructions of their variants.

Differential Revision: https://reviews.llvm.org/D80608
The file was modifiedllvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
The file was modifiedllvm/lib/Target/X86/AsmParser/X86Operand.h
The file was modifiedllvm/test/tools/llvm-mca/X86/BtVer2/dependent-pmuld-paddd.s
The file was modifiedllvm/test/tools/llvm-mca/X86/BdVer2/dependent-pmuld-paddd.s
The file was modifiedllvm/test/MC/X86/avx512-err.s
Commit b4978b24445cdc33311bbdb661060f9d9229efe9 by craig.topper
[X86] Use SIMD_EXC to remove some let statements in tablegen. NFCI
The file was modifiedllvm/lib/Target/X86/X86InstrSSE.td
Commit 84cf8ed8fd3f950b6e30225cae6f092da768cbe6 by craig.topper
[X86] Lower sse_cmp_ss/sse2_cmp_sd intrinsics to X86ISD::FSETCC with vector types.

Isel match that instead of the intrinsic. Similar to what we do
for avx512.

Trying to move more intrinsics to target specific ISD opcodes.
Hoping to add DAG combines to shrink simple loads going into
scalar intrinsics that only read 32 or 64 bits.
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.td
The file was modifiedllvm/lib/Target/X86/X86IntrinsicsInfo.h
The file was modifiedllvm/lib/Target/X86/X86InstrFragmentsSIMD.td
The file was modifiedllvm/lib/Target/X86/X86InstrSSE.td
Commit de02a75e398415bad4df27b4547c25b896c8bf3b by sguelton
[PGO] Fix computation of function Hash

And bump its version number accordingly.

This is a patched recommit of 7c298c104bfe725d4315926a656263e8a5ac3054

Previous hash implementation was incorrectly passing an uint64_t, that got converted
to an uint8_t, to finalize the hash computation. This led to different functions
having the same hash if they only differ by the remaining statements, which is
incorrect.

Added a new test case that trivially tests that a small function change is
reflected in the hash value.

Not that as this patch fixes the hash computation, it would invalidate all hashes
computed before that patch applies, this is why we bumped the version number.

Update profile data hash entries due to hash function update, except for binary
version, in which case we keep the buggy behavior for backward compatibility.

Differential Revision: https://reviews.llvm.org/D79961
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/test/Profile/Inputs/cxx-rangefor.proftext
The file was modifiedclang/test/Profile/Inputs/misexpect-switch-nonconst.proftext
The file was modifiedllvm/include/llvm/ProfileData/InstrProf.h
The file was modifiedclang/test/Profile/Inputs/c-unprofiled-blocks.proftext
The file was modifiedclang/test/Profile/Inputs/misexpect-switch-default.proftext
The file was modifiedclang/test/Profile/Inputs/misexpect-switch.proftext
The file was modifiedclang/test/Profile/Inputs/cxx-throws.proftext
The file was modifiedclang/test/Profile/c-general.c
The file was modifiedclang/lib/CodeGen/CodeGenPGO.cpp
The file was modifiedclang/test/Profile/Inputs/c-counter-overflows.proftext
The file was modifiedclang/test/Profile/Inputs/c-general.proftext
The file was modifiedllvm/include/llvm/ProfileData/InstrProfData.inc
The file was addedclang/test/Profile/c-collision.c
The file was addedclang/test/Profile/Inputs/c-general.profdata.v5
Commit 0b5d81e6bbad1656c2e059621948967aaeaa5702 by joker.eph
Automatically configure MLIR when flang is enabled

This is more friendly than the "Unknown CMake command “mlir_tablegen”."
that would be issued instead.

Differential Revision: https://reviews.llvm.org/D80359
The file was modifiedllvm/CMakeLists.txt
Commit 602d9b0afc77828f419869289b159a567c62ae81 by Saiyedul.Islam
[OpenMP][AMDGCN] Support OpenMP offloading for AMDGCN architecture - Part 1

Summary:
Allow AMDGCN as a GPU offloading target for OpenMP during compiler
invocation and allow setting CUDAMode for it.

Originally authored by Greg Rodgers (@gregrodgers).

Reviewers: ronlieb, yaxunl, b-sumner, scchan, JonChesterfield, jdoerfert, sameerds, msearles, hliao, arsenm

Reviewed By: sameerds

Subscribers: sstefan1, jvesely, wdng, arsenm, guansong, dexonsmith, cfe-commits, llvm-commits, gregrodgers

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D79754
The file was modifiedclang/test/Driver/openmp-offload-gpu.c
The file was addedclang/test/OpenMP/amdgcn_device_function_call.cpp
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/test/OpenMP/target_parallel_no_exceptions.cpp
The file was modifiedllvm/include/llvm/ADT/Triple.h
The file was modifiedclang/lib/AST/Decl.cpp
Commit fc44da746faab5c0ad20e9de8b8fca43b7c5f408 by suc-daniil
Add test exposing a bug in SimpleLoopUnswitch.
The file was addedllvm/test/Transforms/SimpleLoopUnswitch/dead-blocks-uses-in-unreachablel-blocks.ll
Commit dedaf3a2ac59548c70a0d54da7267bbb082782c0 by simon.moll
[VE] Dynamic stack allocation

Summary:
This patch implements dynamic stack allocation for the VE target. Changes:
* compiler-rt: `__ve_grow_stack` to request stack allocation on the VE.
* VE: base pointer support, dynamic stack allocation.

Differential Revision: https://reviews.llvm.org/D79084
The file was modifiedllvm/lib/Target/VE/VEFrameLowering.cpp
The file was modifiedllvm/lib/Target/VE/VEFrameLowering.h
The file was modifiedllvm/lib/Target/VE/VEInstrInfo.cpp
The file was modifiedllvm/lib/Target/VE/VESubtarget.h
The file was modifiedllvm/lib/Target/VE/VEInstrInfo.h
The file was modifiedcompiler-rt/cmake/builtin-config-ix.cmake
The file was addedcompiler-rt/lib/builtins/ve/grow_stack_align.S
The file was addedcompiler-rt/lib/builtins/ve/grow_stack.S
The file was addedllvm/test/CodeGen/VE/alloca_aligned.ll
The file was modifiedcompiler-rt/cmake/base-config-ix.cmake
The file was modifiedcompiler-rt/cmake/Modules/CompilerRTUtils.cmake
The file was addedllvm/test/CodeGen/VE/alloca.ll
The file was modifiedcompiler-rt/lib/builtins/CMakeLists.txt
The file was modifiedllvm/lib/Target/VE/VEISelLowering.h
The file was modifiedllvm/lib/Target/VE/VEInstrInfo.td
The file was modifiedllvm/lib/Target/VE/VEISelLowering.cpp
The file was modifiedllvm/lib/Target/VE/VECallingConv.td
The file was modifiedllvm/lib/Target/VE/VERegisterInfo.cpp
Commit a1dfd6d828ac4f8e11e8013b952f0ef080890dcf by craig.topper
[X86] Add helper function to reduce some code duplication when shrinking a vector load to a vzext_load.

There's more code for calling CombineTo and replacing the nodes
that I'd like to share, but its complicated by the getNode call
in the middle that needs to be specific to each opcode.

While there are also make sure we recursively delete the load
we're replacing. It eventually gets removed by a RemoveDeadNodes
call at the end of DAG combine, but we should be more eager about
it. We were inconsistently doing this in some places but not all.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 65030821d4a6af94b84a33e66a40c08ca26f1526 by djordje.todorovic
[NFC][Debugify] Format the CheckModuleDebugify output

This fixes the output of the check-debugify option.
Without the patch an example of running the option:

$ opt -check-debugify test.ll -S -o testDebugify.ll
CheckModuleDebugifySkipping module without debugify metadata

After the patch:

$ opt -check-debugify test.ll -S -o testDebugify.ll
CheckModuleDebugify: Skipping module without debugify metadata

Differential Revision: https://reviews.llvm.org/D80553
The file was modifiedllvm/lib/Transforms/Utils/Debugify.cpp
Commit 84c643358691b8057199e8c8597428ad0d960786 by grimar
[DebugInfo] - Fix typo in comment. NFC.

I've forgot to address this bit when landed D80476.
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
Commit b101c6251a9bce8dc11f47bce70ee169e9fe5bfe by Vitaly Buka
[StackSafety] Ignore some use of values

We should ignore value used in MemTransferInst
as other then src/dst argument.
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/local.ll
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/memintrin.ll
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
Commit 06a07dd6080c72ca886cc7bb21beef2a372d94cf by Vitaly Buka
[StackSafety] Fix formatting in the test
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/memintrin.ll
Commit f6383643d9e84a139f68cbe19fa16d4969d20d5c by Vitaly Buka
[StackSafety] Bailout on some function calls

Don't miss values used in calls outside regular argument list.
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/local.ll
Commit f2fad3f703aa20cc7b452bdf1605cb46eb960653 by konstantin.schwarz
[GlobalISel][InlineAsm] Add missing EarlyClobber flag to inline asm output operands

Summary:
Previously, we only added early-clobber flags to the 'group' immediate flag operand
of an inline asm operand.
However, we also have to add the EarlyClobber flag to the MachineOperand itself.

This fixes PR46028

Reviewers: arsenm, leonardchan

Reviewed By: arsenm, leonardchan

Subscribers: phosek, wdng, rovka, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80467
The file was modifiedllvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
Commit 410667f1b74c614d9382f180d29f5aa1e42cc5c9 by llvm-dev
[X86][SSE] Convert PTEST to MOVMSK for allsign bits vector results

If we are using PTEST to check 'allsign bits' vector elements we can use MOVMSK to extract the signbits directly and perform the comparison on the scalar value.

For vXi16 cases, as we don't have a MOVMSK for this type, we must mask each signbit out of a PMOVMSKB v2Xi8 result, which folds into the TEST comparison.

If this allows us to remove a vector op (via the SimplifyMultipleUseDemandedBits call) this is consistently faster than a PTEST (https://godbolt.org/z/ziJUst).

I'm investigating whether we ever get regressions without the SimplifyMultipleUseDemandedBits call, even if this means we don't remove a vector op, but that has exposed some other poor codegen issues that I'm still investigating and would have to wait for a later patch.

Suggested on PR42035 to avoid unnecessary ashr(x,bw-1)/pcmpgt(0,x) sign splat patterns feeding into ptest.

Differential Revision: https://reviews.llvm.org/D80563
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/combine-ptest.ll
Commit 35963f6d8519d7384c9040d629cbb4cf6ff96de8 by llvm-dev
VPlanValue.h - reduce unnecessary includes to forward declarations. NFC.
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanValue.h
Commit 019bd6485c52a62c008eacfdf0d13a26ca6b0a6f by Raphael Isemann
[lldb] Don't complete ObjCInterfaceDecls in ClangExternalASTSourceCallbacks::FindExternalVisibleDeclsByName

Summary:
For ObjCInterfaceDecls, LLDB iterates over the `methods` of the interface in FindExternalVisibleDeclsByName
since commit ef423a3ba57045f80b0fcafce72121449a8b54d4 .
However, when LLDB calls `oid->methods()` in that function, Clang will pull in all declarations in the current
DeclContext from the current ExternalASTSource (which is again, `ClangExternalASTSourceCallbacks`). The
reason for that is that `methods()` is just a wrapper for `decls()` which is supposed to provide a list of *all*
(both currently loaded and external) decls in the DeclContext.

However, `ClangExternalASTSourceCallbacks::FindExternalLexicalDecls` doesn't implement support for ObjCInterfaceDecl,
so we don't actually add any declarations and just mark the ObjCInterfaceDecl as having no ExternalLexicalStorage.

As LLDB uses the ExternalLexicalStorage to see if it can complete a type with the ExternalASTSource, this causes
that LLDB thinks our class can't be completed any further by the ExternalASTSource
and will from on no longer make any CompleteType/FindExternalLexicalDecls calls to that decl. This essentially
renders those types unusable in the expression parser as they will always be considered incomplete.

This patch just changes the call to `methods` (which is just a `decls()` wrapper), to some ad-hoc `noload_methods`
call which is wrapping `noload_decls()`. `noload_decls()` won't trigger any calls to the ExternalASTSource, so
this prevents that ExternalLexicalStorage will be set to false.

The test for this is just adding a method to an ObjC interface. Before this patch, this unset the ExternalLexicalStorage
flag and put the interface into the state described above.

In a normal user session this situation was triggered by setting a breakpoint in a method of some ObjC class. This
caused LLDB to create the MethodDecl for that specific method and put it into the the ObjCInterfaceDecl.
Also `ObjCLanguageRuntime::LookupInCompleteClassCache` needs to be unable to resolve the type do
an actual definition when the breakpoint is set (I'm not sure how exactly this can happen, but we just
found no Type instance that had the `TypePayloadClang::IsCompleteObjCClass` flag set in its payload in
the situation where this happens. This however doesn't seem to be a regression as logic wasn't changed
from what I can see).

The module-ownership.mm test had to be changed as the only reason why the ObjC interface in that test had
it's ExternalLexicalStorage flag set to false was because of this unintended side effect. What actually happens
in the test is that ExternalLexicalStorage is first set to false in `DWARFASTParserClang::CompleteTypeFromDWARF`
when we try to complete the `SomeClass` interface, but is then the flag is set back to true once we add
the last ivar of `SomeClass` (see `SetMemberOwningModule` in `TypeSystemClang.cpp` which is called
when we add the ivar). I'll fix the code for that in a follow-up patch.

I think some of the code here needs some rethinking. LLDB and Clang shouldn't infer anything about the ExternalASTSource
and its ability to complete the current type form the `ExternalLexicalStorage` flag. We probably should
also actually provide any declarations when we get asked for the lexical decls of an ObjCInterfaceDecl. But both of those
changes are bigger (and most likely would cause us to eagerly complete more types), so those will be follow up patches
and this patch just brings us back to the state before commit ef423a3ba57045f80b0fcafce72121449a8b54d4 .

Fixes rdar://63584164

Reviewers: aprantl, friss, shafik

Reviewed By: aprantl, shafik

Subscribers: arphaman, abidh, JDevlieghere

Differential Revision: https://reviews.llvm.org/D80556
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/module-ownership.mm
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExternalASTSourceCallbacks.cpp
The file was modifiedlldb/unittests/Symbol/TestTypeSystemClang.cpp
Commit fc98447af65f5a51d3b62a7e76a056d2556be59d by grimar
[llvm-readobj] - Do not skip building of the GNU hash table histogram.

When the `--elf-hash-histogram` is used, the code first tries to build
a histogram for the .hash table and then for the .gnu.hash table.

The problem is that dumper might return early when unable or do not need to
build a histogram for the .hash.

This patch reorders the code slightly to fix the issue and adds a test case.

Differential revision: https://reviews.llvm.org/D80204
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
The file was modifiedllvm/test/tools/llvm-readobj/ELF/hash-histogram.test
Commit 8062602810fed6fe377deabe8abd563a0c5d1809 by llvm-dev
DOTGraphTraitsPass.h - remove unnecessary includes. NFC.
The file was modifiedllvm/include/llvm/Analysis/DOTGraphTraitsPass.h
Commit 1e9462a201c3a09612e7fe8d56a0be0829e99dcf by llvm-dev
ArchiveWriter.h - remove unnecessary includes. NFC.
The file was modifiedllvm/include/llvm/Object/ArchiveWriter.h
Commit d804b334ed0f1c88b90ab028541582e35ba3c172 by grimar
[llvm-readelf] - Split GNUStyle<ELFT>::printHashHistogram. NFC.

As was mentioned in review comments for D80204,
`printHashHistogram` has 2 lambdas that are probably too large
and deserves splitting into member functions.

This patch does it.

Differential revision: https://reviews.llvm.org/D80546
The file was modifiedllvm/tools/llvm-readobj/ObjDumper.h
The file was modifiedllvm/tools/llvm-readobj/llvm-readobj.cpp
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
Commit 706b22e3e446621b20befe1094c26e4eda133bc9 by suc-daniil
[SimpleLoopUnswitch] Drop uses of instructions before block deletion

Currently if instructions defined in a block are used in unreachable
blocks and SimpleLoopUnswitch attempts deleting the block, it triggers
assertion "Uses remain when a value is destroyed!".
This patch fixes it by replacing all uses of instructions from BB with
undefs before BB deletion.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D80551
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/dead-blocks-uses-in-unreachablel-blocks.ll
The file was modifiedllvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
Commit 259abfc7cbc11cd98c05b1eb8e4b3fb6a9664bc0 by flo
[LAA] We only need pointer checks if there are non-zero checks (NFC).

If it turns out that we can do runtime checks, but there are no
runtime-checks to generate, set RtCheck.Need to false.

This can happen if we can prove statically that the pointers passed in
to canCheckPtrAtRT do not alias. This should not change any results, but
allows us to skip some work and assert that runtime checks are
generated, if LAA indicates that runtime checks are required.

Reviewers: anemet, Ayal

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D79969
The file was modifiedllvm/lib/Analysis/LoopAccessAnalysis.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 2d0389821e0c6371823198d3a5b1f032138a40bb by flo
Revert "[LAA] We only need pointer checks if there are non-zero checks (NFC)."

This reverts commit 259abfc7cbc11cd98c05b1eb8e4b3fb6a9664bc0.

Reverting this, as I missed a case where we return without setting
RtCheck.Need.
The file was modifiedllvm/lib/Analysis/LoopAccessAnalysis.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 9b507b2127f116f29437e04a187cdca70ae9aa33 by flo
[LAA] We only need pointer checks if there are non-zero checks (NFC).

If it turns out that we can do runtime checks, but there are no
runtime-checks to generate, set RtCheck.Need to false.

This can happen if we can prove statically that the pointers passed in
to canCheckPtrAtRT do not alias. This should not change any results, but
allows us to skip some work and assert that runtime checks are
generated, if LAA indicates that runtime checks are required.

Reviewers: anemet, Ayal

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D79969

Note: This is a recommit of 259abfc7cbc11cd98c05b1eb8e4b3fb6a9664bc0,
with some suggested renaming.
The file was modifiedllvm/lib/Analysis/LoopAccessAnalysis.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 6e1eff785892edb75948f3c0a18e01ef8fbe2619 by gchatelet
[NFC] Updating tests

Summary:
Updating IR now that alignment is explicitly set.
This is a prerequisite to D80276.

Reviewers: efriedma

Subscribers: llvm-commits, craig.topper

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80549
The file was modifiedllvm/test/Transforms/InterleavedAccess/X86/interleavedStore.ll
The file was modifiedllvm/test/Transforms/InterleavedAccess/X86/interleaved-accesses-64bits-avx.ll
The file was modifiedllvm/test/Transforms/InterleavedAccess/X86/interleavedLoad.ll
Commit 18bb1f1067028fbeaf92774e640bd865c53e1ce1 by Raphael Isemann
[lldb] Fix a potential bug that may cause assert failure in CommandObject::CheckRequirements

Summary: `CommandObject::CheckRequirements` requires cleaning up `m_exe_ctx`
between commands. Function `HandleOptionCompletion` returns without cleaning up
`m_exe_ctx` could cause assert failure in later `CheckRequirements`.

Reviewers: teemperor, JDevlieghere

Reviewed By: teemperor

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D80447
The file was modifiedlldb/source/Interpreter/CommandObject.cpp
Commit c7593b0f0d28f6b7f9fa4557ce73197a49b37799 by victor.campos
[ARM] Fix rewrite of frame index in Thumb2's address mode i8s4

Summary:
In Thumb2's frame index rewriting process, the address mode i8s4, which
is used by LDRD and STRD instructions, is handled by taking the
immediate offset operand and multiplying it by 4.

This behaviour is wrong, however. In this specific address mode, the
MachineInstr's immediate operand is already in the expected form. By
consequence of that, multiplying it once more by 4 yields a flawed
offset value, four times greater than it should be.

Differential Revision: https://reviews.llvm.org/D80557
The file was addedllvm/test/CodeGen/Thumb2/frame-index-addrmode-t2i8s4.mir
The file was modifiedllvm/lib/Target/ARM/Thumb2InstrInfo.cpp
Commit 763bc2305797c980a4f4fa2f6314ed78a010678d by Raphael Isemann
[lldb] Tab completion for process plugin name

Summary:

1. Added tab completion to `process launch -p`, `process attach -P`, `process
connect -p`;

2. Bound the plugin name common completion as the default completion for
`eArgTypePlugin` arguments.

Reviewers: teemperor, JDevlieghere

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D79929
The file was modifiedlldb/source/Interpreter/CommandObject.cpp
The file was modifiedlldb/source/Commands/CommandCompletions.cpp
The file was modifiedlldb/source/Core/PluginManager.cpp
The file was modifiedlldb/source/Commands/CommandObjectProcess.cpp
The file was modifiedlldb/test/API/functionalities/completion/TestCompletion.py
The file was modifiedlldb/include/lldb/Core/PluginManager.h
The file was modifiedlldb/include/lldb/Interpreter/CommandCompletions.h
Commit 5b84ee4f61419b9a911ce75b4bc1c5cc7de1d0d6 by gchatelet
[Alignment] Fix misaligned interleaved loads

Summary: Tentatively fixing https://bugs.llvm.org/show_bug.cgi?id=45957

Reviewers: craig.topper, nlopes

Subscribers: hiraditya, llvm-commits, RKSimon, jdoerfert, efriedma

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80276
The file was modifiedllvm/lib/Target/X86/X86InterleavedAccess.cpp
The file was modifiedllvm/test/Transforms/InterleavedAccess/X86/interleavedLoad.ll
Commit 63f927b17a1ce18cb922c441ffc0691a71d550b8 by steveire
Update release notes with porting guide for AST Matchers
The file was modifiedclang/docs/ReleaseNotes.rst
Commit 0508fb45dfbc3ffde6bacc1e52177f3972a3eb99 by ties.stuij
[CodeGen][BFloat] Add bfloat MVT type

Summary:
This patch adds BFloat MVT support. It also adds fixed and scalable vector MVT
types for BFloat.

This patch is part of a series that adds support for the Bfloat16 extension of the Armv8.6-a architecture, as
detailed here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

The bfloat type, and its properties are specified in the Arm Architecture
Reference Manual:

https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile

Reviewers: aemerson, huntergr, craig.topper, fpetrogalli, sdesmalen, LukeGeeson, ostannard

Reviewed By: ostannard

Subscribers: LukeGeeson, pbarrio, dschuff, kristof.beyls, hiraditya, aheejin, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79706
The file was modifiedllvm/include/llvm/CodeGen/ValueTypes.td
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAG.h
The file was modifiedllvm/include/llvm/Support/MachineValueType.h
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
The file was modifiedllvm/lib/CodeGen/ValueTypes.cpp
Commit ae07fabf6a705b7eb91e801d7735bda4a319567c by llvm-dev
ObjCARCInstKind.h - remove unused includes. NFC.
The file was modifiedllvm/include/llvm/Analysis/ObjCARCInstKind.h
Commit 0865d41492a7f2e8ca8ab70cb3baa121b747e9a7 by llvm-dev
ObjectFile.h - reduce unnecessary includes to forward declarations. NFC.

Fix SubtargetFeature.h include dependency in XCOFFObjectFile.cpp
The file was modifiedllvm/lib/Object/XCOFFObjectFile.cpp
The file was modifiedllvm/include/llvm/Object/ObjectFile.h
Commit 2ee4ec6b6f6d0571288db69b824f6773717d2cf7 by spatel
[IR] add set function for FMF 'contract'

This was missed when the flag was added with D31164.
The file was modifiedllvm/lib/IR/Instruction.cpp
The file was modifiedllvm/include/llvm/IR/Instruction.h
Commit 833996cef1381115b0077ab5694e189463f5d02e by Matthew.Arsenault
AMDGPU: Fix backwards s_cselect_* operands

The vector equivalent has backwards operands, but the scalar version
does not. The passes that use these hooks aren't enabled by default,
so this doesn't really change anything.
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/early-if-convert.ll
Commit 70d4a202995315c77d7daec9f332a6ceda84efc9 by david.green
[UnJ] Update LI for inner nested loops

This makes sure to correctly register the loop info of the children
of unroll and jammed loops. It re-uses some code from the unroller for
registering subloops.

Differential Revision: https://reviews.llvm.org/D80619
The file was addedllvm/test/Transforms/LoopUnrollAndJam/innerloop.ll
The file was modifiedllvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
Commit ad5d319ee85d31ee2b1ca5c29b3a10b340513fec by ties.stuij
[IR][BFloat] add BFloat IR intrinsics support

Summary:
This patch is part of a series that adds support for the Bfloat16 extension of
the Armv8.6-a architecture, as detailed here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

The bfloat type, and its properties are specified in the Arm Architecture
Reference Manual:

https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile

Reviewers: scanon, fpetrogalli, sdesmalen, craig.topper, LukeGeeson

Reviewed By: fpetrogalli

Subscribers: LukeGeeson, pbarrio, kristof.beyls, hiraditya, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79707
The file was modifiedllvm/utils/TableGen/IntrinsicEmitter.cpp
The file was modifiedllvm/include/llvm/IR/Intrinsics.h
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/lib/IR/Function.cpp
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
Commit 4ab03e62fd040efdbde4b6c310e5abbda5363abd by grimar
[llvm-readobj] - Do not crash when an invalid .eh_frame_hdr is dumped using --unwind.

When the p_offset/p_filesz of the PT_GNU_EH_FRAME is invalid
(e.g larger than the file size) then llvm-readobj might crash.

This patch fixes the issue. I've introduced `ELFFile<ELFT>::getSegmentContent`
method, which is very similar to `ELFFile<ELFT>::getSectionContentsAsArray` one.

Differential revision: https://reviews.llvm.org/D80380
The file was modifiedllvm/tools/llvm-readobj/DwarfCFIEHPrinter.h
The file was modifiedllvm/test/tools/llvm-readobj/ELF/unwind.test
The file was modifiedllvm/include/llvm/Object/ELF.h
Commit 5ee902bb5f3a843230f45dcd7b8101de71da7c83 by Jinsong Ji
[compiler-rt][asan] Add noinline to use-after-scope testcases

Some testcases are unexpectedly passing with NPM.
This is because the target functions are inlined in NPM.

I think we should add noinline attribute to keep these test points.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D79648
The file was modifiedcompiler-rt/test/asan/TestCases/use-after-scope-dtor-order.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/use-after-scope-temp.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/use-after-scope-temp2.cpp
Commit cadb7ccf2cebcaa2d546db77223bde3d69a162af by zinenko
[mlir] SCF: provide function_ref builders for IfOp

Now that OpBuilder is available in `build` functions, it becomes possible to
populate the "then" and "else" regions directly when building the "if"
operation. This is desirable in more structured forms of builders, especially
in when conditionals are mixed with loops. Provide new `build` APIs taking
callbacks for body constructors, similarly to scf::ForOp, and replace more
clunky edsc::BlockBuilder uses with these. The original APIs remain available
and go through the new implementation.

Differential Revision: https://reviews.llvm.org/D80527
The file was modifiedmlir/lib/Dialect/SCF/EDSC/Builders.cpp
The file was modifiedmlir/include/mlir/Dialect/SCF/SCF.h
The file was modifiedmlir/include/mlir/Dialect/SCF/SCFOps.td
The file was modifiedmlir/lib/Dialect/SCF/SCF.cpp
The file was modifiedmlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
The file was modifiedmlir/include/mlir/Dialect/SCF/EDSC/Builders.h
Commit 42eba9b40b25cceeb3e6d432047c5ef99d4a7b50 by ties.stuij
[AArch64][BFloat] basic AArch64 bfloat support

Summary:
This patch adds the bfloat type to the AArch64 backend:
- adds it as part of the FPR16 register class
- adds bfloat calling conventions
- as f16 is now not the only FPR16 type anymore, we need to constrain a number
  of instruction patterns using FPR16Op to help out the TableGen type inferrer

This patch is part of a series implementing the Bfloat16 extension of the
Armv8.6-a architecture, as detailed here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

The bfloat type, and its properties are specified in the Arm Architecture
Reference Manual:

https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile

Reviewers: t.p.northover, c-rhodes, fpetrogalli, sdesmalen, ostannard, LukeGeeson, ab

Reviewed By: fpetrogalli

Subscribers: pbarrio, LukeGeeson, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79709
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrFormats.td
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/AArch64CallingConvention.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.td
Commit 4408eeed0ff191304121c11168aa1db861cccb97 by dvyukov
tsan: fix false positives in AcquireGlobal

Add ThreadClock:: global_acquire_ which is the last time another thread
has done a global acquire of this thread's clock.

It helps to avoid problem described in:
https://github.com/golang/go/issues/39186
See test/tsan/java_finalizer2.cpp for a regression test.
Note the failuire is _extremely_ hard to hit, so if you are trying
to reproduce it, you may want to run something like:
$ go get golang.org/x/tools/cmd/stress
$ stress -p=64 ./a.out

The crux of the problem is roughly as follows.
A number of O(1) optimizations in the clocks algorithm assume proper
transitive cumulative propagation of clock values. The AcquireGlobal
operation may produce an inconsistent non-linearazable view of
thread clocks. Namely, it may acquire a later value from a thread
with a higher ID, but fail to acquire an earlier value from a thread
with a lower ID. If a thread that executed AcquireGlobal then releases
to a sync clock, it will spoil the sync clock with the inconsistent
values. If another thread later releases to the sync clock, the optimized
algorithm may break.

The exact sequence of events that leads to the failure.
- thread 1 executes AcquireGlobal
- thread 1 acquires value 1 for thread 2
- thread 2 increments clock to 2
- thread 2 releases to sync object 1
- thread 3 at time 1
- thread 3 acquires from sync object 1
- thread 1 acquires value 1 for thread 3
- thread 1 releases to sync object 2
- sync object 2 clock has 1 for thread 2 and 1 for thread 3
- thread 3 releases to sync object 2
- thread 3 sees value 1 in the clock for itself
  and decides that it has already released to the clock
  and did not acquire anything from other threads after that
  (the last_acquire_ check in release operation)
- thread 3 does not update the value for thread 2 in the clock from 1 to 2
- thread 4 acquires from sync object 2
- thread 4 detects a false race with thread 2
  as it should have been synchronized with thread 2 up to time 2,
  but because of the broken clock it is now synchronized only up to time 1

The global_acquire_ value helps to prevent this scenario.
Namely, thread 3 will not trust any own clock values up to global_acquire_
for the purposes of the last_acquire_ optimization.

Reviewed-in: https://reviews.llvm.org/D80474
Reported-by: nvanbenschoten (Nathan VanBenschoten)
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp
The file was addedcompiler-rt/test/tsan/java_finalizer2.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_clock.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_clock.h
Commit 78bd0c0e5e8fbbfbb9f827bdd1f83f91ed3437fa by ties.stuij
[AArch64][BFloat] add BFloat instruction support for AArch64

Summary:
Add support for lowering various BFloat related SelDAG nodes:
- load/store (ldrh/strh)
- concat
- dup/duplane
- bitconvert/bitcast
- insert_subvector/insert_subreg

This patch is part of a series implementing the Bfloat16 extension of the
Armv8.6-a architecture, as detailed here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

The bfloat type, and its properties are specified in the Arm Architecture
Reference Manual:

https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile

Reviewers: ab, t.p.northover, john.brawn, fpetrogalli, sdesmalen, LukeGeeson

Reviewed By: fpetrogalli

Subscribers: LukeGeeson, pbarrio, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79712
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was addedllvm/test/CodeGen/AArch64/bf16-vector-shuffle.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/bf16.ll
The file was addedllvm/test/CodeGen/AArch64/bf16-vector-bitcast.ll
Commit 559845f8fe53fabb22f9a392e8d34761df250c72 by lei
Revert "[PowerPC] Add support for -mcpu=pwr10 in both clang and llvm"

This reverts commit 7eb666b1556b86503f2f386bf921186cdbb2d22a.
The file was modifiedclang/test/Preprocessor/init-ppc64.c
The file was modifiedclang/lib/Basic/Targets/PPC.h
The file was modifiedclang/lib/Basic/Targets/PPC.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.cpp
The file was modifiedclang/test/Misc/target-invalid-cpu-note.c
The file was modifiedllvm/lib/Support/Host.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPC.td
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/check-cpu.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.h
The file was modifiedclang/lib/Driver/ToolChains/Arch/PPC.cpp
Commit b5b00877221ec7817b9de9cd65571e1c05e80145 by llvm-dev
SpecialCaseList.h - reduce unnecessary includes to forward declarations. NFC.

Remove Regex forward declaration as we already require the Regex.h include.

Add missing VirtualFileSystem.h include to dependent source files.
The file was modifiedclang/lib/Driver/SanitizerArgs.cpp
The file was modifiedclang/lib/Driver/XRayArgs.cpp
The file was modifiedllvm/include/llvm/Support/SpecialCaseList.h
Commit 461af57de78155ee5d1dc1969b81dd019d228538 by gribozavr
Add support for UnaryOperator in SyntaxTree

Reviewers: gribozavr2

Reviewed By: gribozavr2

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80624
The file was modifiedclang/include/clang/Tooling/Syntax/Nodes.h
The file was modifiedclang/unittests/Tooling/Syntax/TreeTest.cpp
The file was modifiedclang/lib/Tooling/Syntax/BuildTree.cpp
The file was modifiedclang/lib/Tooling/Syntax/Nodes.cpp
Commit 3be5e53f208d63135bb4e8499abdc1ac8a2b3266 by Alexander.Richardson
[FileCheck] Allow parenthesized expressions

With this change it is be possible to write FileCheck expressions such
as [[#(VAR+1)-2]]. Currently, the only supported arithmetic operators are
plus and minus, so this is not particularly useful yet. However, it our
CHERI fork we have tests that benefit from having multiplication in
FileCheck expressions. Allowing parenthesized expressions is the simplest
way for us to work around the current lack of operator precedence in
FileCheck expressions.

Reviewed By: thopre, jhenderson
Differential Revision: https://reviews.llvm.org/D77383
The file was modifiedllvm/test/FileCheck/numeric-expression.txt
The file was modifiedllvm/lib/Support/FileCheck.cpp
The file was modifiedllvm/unittests/Support/FileCheckTest.cpp
The file was modifiedllvm/docs/CommandGuide/FileCheck.rst
The file was modifiedllvm/lib/Support/FileCheckImpl.h
Commit a888fc6b3412574f5869a8680acf4ed2bed1d2a2 by a.bataev
[OPENMP50]Initial support for use_device_addr clause.

Summary:
Added parsing/sema analysis/serialization support for use_device_addr
clauses.

Reviewers: jdoerfert

Subscribers: yaxunl, guansong, arphaman, sstefan1, llvm-commits, cfe-commits, caomhin

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D80404
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMPKinds.def
The file was modifiedclang/include/clang/AST/OpenMPClause.h
The file was modifiedclang/test/OpenMP/target_teams_map_messages.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Parse/ParseOpenMP.cpp
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp
The file was modifiedclang/tools/libclang/CIndex.cpp
The file was removedclang/test/OpenMP/target_data_use_device_ptr_messages.cpp
The file was modifiedclang/include/clang/AST/RecursiveASTVisitor.h
The file was modifiedclang/test/OpenMP/target_data_messages.c
The file was addedclang/test/OpenMP/target_data_use_device_ptr_addr_ast_print.cpp
The file was modifiedclang/test/OpenMP/target_map_messages.cpp
The file was modifiedclang/lib/Sema/TreeTransform.h
The file was modifiedclang/lib/Basic/OpenMPKinds.cpp
The file was modifiedclang/lib/AST/OpenMPClause.cpp
The file was modifiedclang/lib/AST/StmtProfile.cpp
The file was addedclang/test/OpenMP/target_data_use_device_ptr_addr_messages.cpp
The file was modifiedclang/lib/Serialization/ASTReader.cpp
The file was removedclang/test/OpenMP/target_data_use_device_ptr_ast_print.cpp
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp
The file was modifiedclang/lib/Serialization/ASTWriter.cpp
Commit 31f40f603d0c00b313397196124c5f39090badf0 by jpienaar
[mlir] Add simple generator for return types

Take advantage of equality constrains to generate the type inference interface.
This is used for equality and trivially built types. The type inference method
is only generated when no type inference trait is specified already.

This reorders verification that changes some test error messages.

Differential Revision: https://reviews.llvm.org/D80484
The file was modifiedmlir/lib/Dialect/Shape/IR/Shape.cpp
The file was modifiedmlir/test/mlir-tblgen/op-decl.td
The file was modifiedmlir/include/mlir/TableGen/Operator.h
The file was modifiedmlir/lib/TableGen/Operator.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
The file was modifiedmlir/docs/OpDefinitions.md
The file was modifiedmlir/include/mlir/TableGen/Attribute.h
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
The file was modifiedmlir/test/mlir-tblgen/types.mlir
The file was modifiedmlir/lib/TableGen/Attribute.cpp
The file was modifiedmlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
Commit 6022efb0e9cbb350f7b690acd0cfa4b87b1dfe87 by llvm-dev
CoverageFilters.h - reduce unnecessary includes to forward declarations. NFC.
The file was modifiedllvm/tools/llvm-cov/CoverageFilters.h
The file was modifiedllvm/tools/llvm-cov/CoverageFilters.cpp
The file was modifiedllvm/tools/llvm-cov/CodeCoverage.cpp
Commit aca3d067efe194539efd1e0fcf03820a2c377753 by jyknight
Fix Darwin 'constinit thread_local' variables.

Unlike other platforms using ItaniumCXXABI, Darwin does not allow the
creation of a thread-wrapper function for a variable in the TU of
users. Because of this, it can set the linkage of the thread-local
symbol to internal, with the assumption that no TUs other than the one
defining the variable will need it.

However, constinit thread_local variables do not require the use of
the thread-wrapper call, so users reference the variable
directly. Thus, it must not be converted to internal, or users will
get a link failure.

This was a regression introduced by the optimization in
00223827a952f66e7426c9881a2a4229e59bb019.

Differential Revision: https://reviews.llvm.org/D80417
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedclang/test/CodeGenCXX/cxx2a-thread-local-constinit.cpp
Commit b0404681171d8cfebdb1f439f45aeb1001321eb7 by michael.hliao
Fix warning `-Wpedantic`. NFC.
The file was modifiedllvm/include/llvm/Support/SpecialCaseList.h
Commit 495f18292b2bc90a162b79d187c6d14ecfbe98f9 by paul.walker
[VFABI] Fix parsing of uniform parameters that shouldn't expect step or positional data.

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80575
The file was modifiedllvm/lib/Analysis/VFABIDemangling.cpp
The file was modifiedllvm/unittests/Analysis/VectorFunctionABITest.cpp
Commit 1af3705c7fe23db9d5308bfdf07bfbd04398b895 by listmail
Start migrating away from statepoint's inline length prefixed argument bundles

In the current statepoint design, we have four distinct groups of operands to the call: call args, gc transition args, deopt args, and gc args. This format prexisted the support in IR for operand bundles and was in fact one of the inspirations for the extension. However, we never went back and rearchitected statepoints to fully leverage bundles.

This change is the first in a small sequence to do so. All this does is extend the SelectionDAG lowering code to allow deopt and gc transition operands to be specified in either inline argument bundles or operand bundles.

Differential Revision: https://reviews.llvm.org/D8059
The file was modifiedllvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/statepoint-regs.ll
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was modifiedllvm/test/CodeGen/X86/statepoint-gctransition-call-lowering.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Commit 5ba874e4724e72838dfbb3e4b40392e0b24cc6f4 by david.truby
[MLIR] [OpenMP] Add basic OpenMP parallel operation

Summary:
This includes a basic implementation for the OpenMP parallel
operation without a custom pretty-printer and parser.
The if, num_threads, private, shared, first_private, last_private,
proc_bind and default clauses are included in this implementation.

Currently the reduction clause is omitted as it is more complex and
requires analysis to see if we can share implementation with the loop
dialect. The allocate clause is also omitted.

A discussion about the design of this operation can be found here:
https://llvm.discourse.group/t/openmp-parallel-operation-design-issues/686

The current OpenMP Specification can be found here:
https://www.openmp.org/wp-content/uploads/OpenMP-API-Specification-5.0.pdf

Co-authored-by: Kiran Chandramohan <kiran.chandramohan@arm.com>

Reviewers: jdoerfert

Subscribers: mgorny, yaxunl, kristof.beyls, guansong, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, grosul1, frgossen, Kayjukh, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79410
The file was modifiedmlir/include/mlir/Dialect/OpenMP/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
The file was modifiedmlir/test/Dialect/OpenMP/ops.mlir
The file was modifiedmlir/include/mlir/Dialect/OpenMP/OpenMPDialect.h
The file was modifiedmlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Commit 4f0eba28eba873de402d9742d62fcae89f4c2363 by thakis
[gn build] (manually) port dedaf3a2ac5
The file was modifiedllvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
Commit 0d20ed664ff2d51dae14f9324a64e4433e6b663e by bmahjour
[DDG] Data Dependence Graph - Add query function for memory dependencies between two nodes

Summary:
When working with the DDG it's useful to be able to query details of the
memory dependencies between two nodes connected by a memory edge. The DDG
does not hold a copy of the dependencies, but it contains a reference to a
DependenceInfo object through which dependence information can be queried.
This patch adds a query function to the DDG to obtain all the Dependence
objects that exist between instructions of two nodes.

Authored By: bmahjour

Reviewers: Meinersbur, Whitney, etiotto

Reviewed By: Whitney

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80529
The file was modifiedllvm/unittests/Analysis/CMakeLists.txt
The file was addedllvm/unittests/Analysis/DDGTest.cpp
The file was modifiedllvm/include/llvm/Analysis/DDG.h
Commit bed78845e555790c0bcbe34d04436fae41a3fa5f by llvmgnsyncbot
[gn build] Port 0d20ed664ff
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn
Commit 29f8056b54ea5ea6b333e3b8f11de2cc327d1421 by ties.stuij
[CodeGen] fix typo `def nxv1bf32` -> `def nxv1f32`

The `Add bfloat MVT type` patch introduced a typo in the nxv1f32 definition
in llvm/include/llvm/CodeGen/ValueTypes.td:
https://reviews.llvm.org/D79706/new/#inline-740433

This patch fixes that.
The file was modifiedllvm/include/llvm/CodeGen/ValueTypes.td
Commit 4d6f44f5f0925f2d05431065d9f197644d07b1b5 by ravishankarm
[mlir][spirv] Lower allocation/deallocations of workgroup memory.

This allocation of a workgroup memory is lowered to a
spv.globalVariable. Only static size allocation with element type
being int or float is handled. The lowering does account for the
element type that are not supported in the lowered spv.module based on
the extensions/capabilities and adjusts the number of elements to get
the same byte length.

Differential Revision: https://reviews.llvm.org/D80411
The file was modifiedmlir/test/Conversion/GPUToSPIRV/loop.mlir
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/ConvertStandardToSPIRV.cpp
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVLowering.h
The file was addedmlir/test/Conversion/StandardToSPIRV/alloc.mlir
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVLowering.cpp
The file was modifiedmlir/test/Conversion/GPUToSPIRV/load-store.mlir
The file was modifiedmlir/test/Conversion/StandardToSPIRV/std-ops-to-spirv.mlir
Commit 5b4cd2d4c42360469ccc9f59aa04a1a24b290df9 by maskray
[X86] Assemble movzb 1280(%rbx, %r12), %r12 after D80608

ffmpeg/libavcodec/x86/h264_cabac.c inline assembly may produce
movzb 1280(%rbx, %r12), %r12

After D80608, llvm-mc errors:

error: unknown use of instruction mnemonic without a size suffix
The file was modifiedllvm/test/MC/X86/x86-64.s
The file was modifiedllvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
Commit 74a51753a6c2c587f650174e19f99279e8e4ef35 by Raphael Isemann
[lldb] Make order of completions for expressions deterministic and sorted by Clang's priority values.

Summary:

It turns out that the order in which we provide completions for expressions is
nondeterministic. This leads to confusing user experience and also breaks the
reproducer tests (as two LLDB tests can go out of sync due to the
non-determinism in the completion lists)

The reason for the non-determinism is that the CompletionConsumer informs us
about decls in the order in which it finds declarations in the lookup store of
the DeclContexts it visits (mainly this snippet in SemaLookup.cpp):

``` lang=c++
    // Enumerate all of the results in this context.
    for (DeclContextLookupResult R :
         Load ? Ctx->lookups()
              : Ctx->noload_lookups(/*PreserveInternalState=*/false)) {
       [...]
```

This storage of the lookup is sorted by pointer values (see the hash of
`DeclarationName`) and can therefore be non-deterministic. The LLDB code
completion consumer that receives these calls originally expected that the order
of declarations is defined by Clang, but it seems the API expects the client to
provide an order to the completions.

This patch fixes the issue as follows:

* We sort the completions we get from Clang alphabetically and also by the
priority value we get from Clang (with priority value sorting having precedence
over the alphabetical sorting)

* We make all the functions/variables that touch a completion before the sorting
const-qualified. The idea is that this should prevent that we never have
observable side-effect from touching these declarations in a non-deterministic
order (e.g., we don't try to complete the type by accident).

This way we behave like the other parts of Clang which also sort the results by
some deterministic value (usually the name or something computed from a name,
e.g., edit distance to a given string).

We most likely also need to fix the Clang code to make the loop I listed above
deterministic to prevent these issues in the future (tracked in rdar://63442513
). This wouldn't replace the functionality provided in this patch though as we
would still need the priority and overall alphabetical sorting.

Note: I had to increase the lldb-vscode completion limit to 100 as the tests
look for strings that aren't in the first 50 results anymore due to variable
names starting with letters like 'v' (which are now always shown much further
down in the list due to the alphabetical sorting).

Fixes rdar://63200995

Reviewers: JDevlieghere, clayborg

Reviewed By: JDevlieghere

Subscribers: mgrang, abidh

Differential Revision: https://reviews.llvm.org/D80292
The file was modifiedlldb/tools/lldb-vscode/lldb-vscode.cpp
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbtest.py
The file was modifiedlldb/test/API/commands/expression/completion/TestExprCompletion.py
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
Commit 07cd19efa2a63b01aea9b516a7a003cb7f750a12 by arsenm2
AMDGPU: Fix dropping MI flags when rewriting instructions

All 3 passes that change instruction encodings were dropping MI
flags. This avoids scheduling regressions caused by setting
mayRaiseFPExceptions on FP instructions for non-strictfp functions.
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/dpp_combine.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-ops.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
The file was addedllvm/test/CodeGen/AMDGPU/shrink-instructions-flags.mir
Commit e7f1067ad6f116ff1e4bfc0f7fe1977f172b0ea0 by Jonas Devlieghere
[lldb/Reproducers] Skip API logging in the DUMMY macro

The purpose of the LLDB_RECORD_DUMMY macro is twofold: it is used in
functions that take arguments that we don't know how to serialize (e.g.
void*) and it's used by function where we want to avoid doing excessive
work because they can be called from a signal handler (e.g.
setTerminalWidth).

To support the latter case, I've disabled API logging form the Recorder
ctor used by the DUMMY macro. This ensures we don't allocate memory when
called from a signal handler.
The file was modifiedlldb/source/Utility/ReproducerInstrumentation.cpp
The file was modifiedlldb/include/lldb/Utility/ReproducerInstrumentation.h
Commit 6407aa9d2e0e225bc81d3b2602d6e6ed79912ec2 by kadircet
[clangd] Add access specifier information to hover contents

Summary:
For https://github.com/clangd/clangd/issues/382

This commit adds access specifier information to the hover
contents. For example, the hover information of a class field or
member function will now indicate if the field or member is private,
public, or protected. This can be particularly useful when a developer
is in the implementation file and wants to know if a particular member
definition is public or private.

Reviewers: kadircet

Reviewed By: kadircet

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80472
The file was modifiedclang-tools-extra/clang-doc/Generators.cpp
The file was modifiedclang-tools-extra/clang-doc/MDGenerator.cpp
The file was modifiedclang/lib/AST/JSONNodeDumper.cpp
The file was modifiedclang/lib/AST/DeclPrinter.cpp
The file was modifiedclang-tools-extra/clang-doc/Generators.h
The file was modifiedclang-tools-extra/clangd/unittests/HoverTests.cpp
The file was modifiedclang/include/clang/Basic/Specifiers.h
The file was modifiedclang/lib/AST/TextNodeDumper.cpp
The file was modifiedclang-tools-extra/clangd/Hover.cpp
The file was modifiedclang-tools-extra/clangd/Hover.h
The file was modifiedclang-tools-extra/clang-doc/HTMLGenerator.cpp
Commit a2a3e9f0a6e91103a0d1fa73086dbdf109c48f69 by maskray
[Driver] Support -fsanitize=shadow-call-stack on aarch64_be

Fixes https://bugs.llvm.org/show_bug.cgi?id=46076

Reviewed By: nickdesaulniers, pcc

Differential Revision: https://reviews.llvm.org/D80647
The file was modifiedclang/lib/Driver/SanitizerArgs.cpp
The file was modifiedclang/test/Driver/fsanitize.c
Commit d37ce53ad30f3d5e7fb37b5bb9c49793ca33d2df by Matthew.Arsenault
AMDGPU: Set StackPointerRegisterToSaveRestore

This will enable selecting non-entry block allocas. Skip the SP write
check in the base isSchedulingBoundary implementation to preserve the
previous scheduling behavior and avoid test churn. It's apparently for
compile time reasons, but if we were to use this more work would be
needed since in some of the failing tests, we seem to incorrectly get
hazard nops inserted.
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit 8d9ff2318530d91be04ccced107c3ef04ba2255f by jasonliu
[NFC][XCOFF][AIX] Return function entry point symbol with dedicate function

Use getFunctionEntryPointSymbol whenever possible to enclose the
implementation detail and reduce duplicate logic.

Differential Revision: https://reviews.llvm.org/D80402
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
The file was modifiedllvm/include/llvm/Target/TargetLoweringObjectFile.h
The file was modifiedllvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
Commit b9c6871a9570975827dc0bbeb39131c99c8daf8e by maskray
[Driver] Support -fsanitize=shadow-call-stack and cfi-icall on aarch64_be

D80647 did not fix https://bugs.llvm.org/show_bug.cgi?id=46076
This is the fix.
The file was modifiedclang/test/Driver/fsanitize.c
The file was modifiedclang/lib/Driver/ToolChain.cpp
Commit eadf2959567c89bebff153feac873cbc1b71eb04 by whitneyt
[CodeMoverUtils] Use dominator tree level to decide the direction of
code motion

Summary: Currently isSafeToMoveBefore uses DFS numbering for determining
the relative position of instruction and insert point which is not
always correct. This PR proposes the use of Dominator Tree depth for the
same. If a node is at a higher level than the insert point then it is
safe to say that we want to move in the forward direction.
Authored By: RithikSharma
Reviewer: Whitney, nikic, bmahjour, etiotto, fhahn
Reviewed By: Whitney
Subscribers: fhahn, hiraditya, llvm-commits
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D80084
The file was modifiedllvm/include/llvm/Analysis/OrderedInstructions.h
The file was modifiedllvm/lib/Transforms/Utils/CodeMoverUtils.cpp
The file was modifiedllvm/unittests/Transforms/Utils/CodeMoverUtilsTest.cpp
The file was modifiedllvm/lib/Analysis/OrderedInstructions.cpp
Commit c295a65da496f5e982402e8f83e417659c7dd166 by ajcbik
[mlir] [VectorOps] Add 'vector.flat_transpose' operation

Summary:
Provides a representation of the linearized LLVM instrinsic.
With tests and lowering implementation to LLVM IR dialect.
Prepares better lowering for 2-D vector.transpose.

Reviewers: nicolasvasilache, ftynse, reidtatge, bkramer, dcaballe

Reviewed By: ftynse, dcaballe

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, stephenneuendorffer, Joonsoo, grosul1, frgossen, Kayjukh, jurahul, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80419
The file was modifiedmlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
The file was modifiedmlir/test/Dialect/Vector/invalid.mlir
The file was modifiedmlir/test/Dialect/Vector/ops.mlir
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.td
Commit 2368bf52cd7725a34f09f4b27a9c205cda06f478 by lei
[PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

Summary:
This patch simply adds support for the new CPU in anticipation of
Power10. There isn't really any functionality added so there are no
associated test cases at this time.

Reviewers: stefanp, nemanjai, amyk, hfinkel, power-llvm-team, #powerpc

Reviewed By: stefanp, nemanjai, amyk, #powerpc

Subscribers: NeHuang, steven.zhang, hiraditya, llvm-commits, wuzish, shchenz, cfe-commits, kbarton, echristo

Tags: #clang, #powerpc, #llvm

Differential Revision: https://reviews.llvm.org/D80020
The file was modifiedclang/lib/Driver/ToolChains/Arch/PPC.cpp
The file was modifiedclang/lib/Basic/Targets/PPC.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.h
The file was modifiedllvm/lib/Support/Host.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPC.td
The file was modifiedllvm/test/CodeGen/PowerPC/check-cpu.ll
The file was modifiedclang/test/Misc/target-invalid-cpu-note.c
The file was modifiedclang/test/Preprocessor/init-ppc64.c
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedclang/lib/Basic/Targets/PPC.h
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
Commit 13f6c81c5d9a7a34a684363bcaad8eb7c65356fd by yhs
[BPF] simplify zero extension with MOV_32_64

The current pattern matching for zext results in the following code snippet
being produced,

  w1 = w0
  r1 <<= 32
  r1 >>= 32

Because BPF implementations require zero extension on 32bit loads this
both adds a few extra unneeded instructions but also makes it a bit
harder for the verifier to track the r1 register bounds. For example in
this verifier trace we see at the end of the snippet R2 offset is unknown.
However, if we track this correctly we see w1 should have the same bounds
as r8. R8 smax is less than U32 max value so a zero extend load should keep
the same value. Adding a max value of 800 (R8=inv(id=0,smax_value=800)) to
an off=0, as seen in R7 should create a max offset of 800. However at the
end of the snippet we note the R2 max offset is 0xffffFFFF.

  R0=inv(id=0,smax_value=800)
  R1_w=inv(id=0,umax_value=2147483647,var_off=(0x0; 0x7fffffff))
  R6=ctx(id=0,off=0,imm=0) R7=map_value(id=0,off=0,ks=4,vs=1600,imm=0)
  R8_w=inv(id=0,smax_value=800,umax_value=4294967295,var_off=(0x0; 0xffffffff))
  R9=inv800 R10=fp0 fp-8=mmmm????
58: (1c) w9 -= w8
59: (bc) w1 = w8
60: (67) r1 <<= 32
61: (77) r1 >>= 32
62: (bf) r2 = r7
63: (0f) r2 += r1
64: (bf) r1 = r6
65: (bc) w3 = w9
66: (b7) r4 = 0
67: (85) call bpf_get_stack#67
  R0=inv(id=0,smax_value=800)
  R1_w=ctx(id=0,off=0,imm=0)
  R2_w=map_value(id=0,off=0,ks=4,vs=1600,umax_value=4294967295,var_off=(0x0; 0xffffffff))
  R3_w=inv(id=0,umax_value=800,var_off=(0x0; 0x3ff))
  R4_w=inv0 R6=ctx(id=0,off=0,imm=0)
  R7=map_value(id=0,off=0,ks=4,vs=1600,imm=0)
  R8_w=inv(id=0,smax_value=800,umax_value=4294967295,var_off=(0x0; 0xffffffff))
  R9_w=inv(id=0,umax_value=800,var_off=(0x0; 0x3ff))
  R10=fp0 fp-8=mmmm????

After this patch R1 bounds are not smashed by the <<=32 >>=32 shift and we
get correct bounds on R2 umax_value=800.

Further it reduces 3 insns to 1.

Signed-off-by: John Fastabend <john.fastabend@gmail.com>

Differential Revision: https://reviews.llvm.org/D73985
The file was modifiedllvm/test/CodeGen/BPF/32-bit-subreg-peephole-phi-2.ll
The file was modifiedllvm/lib/Target/BPF/BPFInstrInfo.td
The file was modifiedllvm/lib/Target/BPF/BPFMIPeephole.cpp
The file was modifiedllvm/test/CodeGen/BPF/32-bit-subreg-peephole-phi-3.ll
The file was modifiedllvm/test/CodeGen/BPF/32-bit-subreg-peephole.ll
The file was addedllvm/test/CodeGen/BPF/32-bit-subreg-zext.ll
The file was modifiedllvm/test/CodeGen/BPF/32-bit-subreg-peephole-phi-1.ll
The file was modifiedllvm/lib/Target/BPF/BPFISelLowering.cpp
The file was modifiedllvm/test/CodeGen/BPF/32-bit-subreg-cond-select.ll
Commit 4b4496312e3380d8c427ef836f2b0a38d145652b by arsenm2
AMDGPU: Start adding MODE register uses to instructions

This is the groundwork required to implement strictfp. For now, this
should be NFC for regular instructoins (many instructions just gain an
extra use of a reserved register). Regalloc won't rematerialize
instructions with reads of physical registers, but we were suffering
from that anyway with the exec reads.

Should add it for all the related FP uses (possibly with some
extras). I did not add it to either the gpr index mode instructions
(or every single VALU instruction) since it's a ridiculous feature
already modeled as an arbitrary side effect.

Also work towards marking instructions with FP exceptions. This
doesn't actually set the bit yet since this would start to change
codegen. It seems nofpexcept is currently not implied from the regular
IR FP operations. Add it to some MIR tests where I think it might
matter.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s32.mir
The file was modifiedllvm/lib/Target/AMDGPU/VOPCInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/hazard-kill.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir
The file was modifiedllvm/lib/Target/AMDGPU/SOPInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.s16.mir
The file was modifiedllvm/lib/Target/AMDGPU/VOP3PInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-frint.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/regcoal-subrange-join-seg.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/regcoalescing-remove-partial-redundancy-assert.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-frint.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/madak-inline-constant.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/regcoal-subrange-join.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/hazard-buffer-store-v-interp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/dpp_combine.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.legacy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s64.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s64.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fexp2.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmad.ftz.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/omod-nsz-flag.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.clamp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/couldnt-join-subrange-3.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/v_swap_b32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/power-sched-no-instr-sunit.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/cluster-flat-loads.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fp-atomic-to-s_denormmode.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pkrtz.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/dead-lane.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/movrels-bug.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/mai-hazards.mir
The file was modifiedllvm/lib/Target/AMDGPU/VOP1Instructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmad.s32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/hazard-in-bundle.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sched-assert-onlydbg-value-empty-region.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/waitcnt-back-edge-loop.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/endpgm-dce.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/mode-register.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/twoaddr-mad.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/merge-m0.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/waitcnt-overflow.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-gfx9.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/shrink-instructions-flags.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.legacy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/vmem-to-salu-hazard.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/hazard.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrFormats.td
The file was modifiedllvm/test/CodeGen/AMDGPU/bundle-latency.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/regcoalesce-prune.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-empty-live-interval.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.s16.mir
The file was modifiedllvm/lib/Target/AMDGPU/VOP3Instructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/inserted-wait-states.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir
The file was modifiedllvm/lib/Target/AMDGPU/VOPInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mir
The file was modifiedllvm/lib/Target/AMDGPU/VOP2Instructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/subreg-split-live-in-error.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/twoaddr-fma.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/smem-war-hazard.mir
The file was modifiedllvm/unittests/MI/LiveIntervalTest.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptosi.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.v2s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fix-sgpr-copies.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/insert-waitcnts-callee.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/waitcnt-permute.mir
Commit 48cb380abdca27d177520aea4fe4dfe8d628b466 by spatel
[InstCombine] add tests for vector demanded elements of select condition; NFC
The file was modifiedllvm/test/Transforms/InstCombine/vec_demanded_elts.ll
Commit fa3b587196dbc04e445257ae38e7906e5c0c4888 by mtrofin
[llvm]NFC] Simplify ProfileSummaryInfo state transitions

ProfileSummaryInfo is updated seldom, as result of very specific
triggers. This patch clearly demarcates state updates from read-only uses.
This, arguably, improves readability and maintainability.
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
The file was modifiedllvm/lib/Analysis/ProfileSummaryInfo.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
The file was modifiedllvm/include/llvm/Analysis/ProfileSummaryInfo.h
Commit 8e7e6a8d6bae19c5a18e0d0daa0614272b85598c by craig.topper
[X86] Restore selection of MULX on BMI2 targets.

Looking back over gcc and icc behavior it looks like icc does
use mulx32 on 32-bit targets and mulx64 on 64-bit targets. It's
also used when dividing i32 by constant on 32-bit targets and
i64 by constant on 64-bit targets.

gcc uses it multiplies producing a 64 bit result on 32-bit targets
and 128-bit results on a 64-bit target. gcc does not appear to use
it for division by constant.

After this patch clang is closer to the icc behavior. This
basically reverts d1c61861ddc94457b08a5a653d3908b7b38ebb22, but
there were no strong feelings at the time.

Fixes PR45518.

Differential Revision: https://reviews.llvm.org/D80498
The file was modifiedllvm/test/CodeGen/X86/hoist-invariant-load.ll
The file was modifiedllvm/test/CodeGen/X86/mulx64.ll
The file was modifiedllvm/test/CodeGen/X86/bmi2-x86_64.ll
The file was modifiedllvm/test/CodeGen/X86/bmi2.ll
The file was modifiedllvm/test/CodeGen/X86/mulx32.ll
The file was modifiedllvm/test/CodeGen/X86/atomic-unordered.ll
The file was modifiedllvm/test/CodeGen/X86/pr35636.ll
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/X86/i128-mul.ll
Commit fe9d8442e0dfc8c83e9a0a31f5079e7a70b54d9d by Jonas Devlieghere
[lldb/Test] Generate YAML binary in build directory

Although it's not entirely clear to me why, this test was generating its
binary in the source directory instead of the build directory. This
patch fixes that following the same approach as other tests.
The file was modifiedlldb/test/API/functionalities/show_location/TestShowLocationDwarf5.py
Commit c30c2368c77f05a1447bb7442c6ac2fad2912a57 by Jonas Devlieghere
[lldb/Reproducers] Skip tests relying on timeouts

The reproducer don't model timeouts so tests that rely on them end up
with unexpected packets during replay. Skip them until we can handle
this scenario.
The file was modifiedlldb/test/API/commands/expression/timeout/TestCallWithTimeout.py
The file was modifiedlldb/test/API/commands/expression/no-deadlock/TestExprDoesntBlock.py
Commit 334552150770faaa407fecab42f5333bb2a898a6 by Adrian Prantl
Also cache negative results in GetXcodeSDKPath (NFC)

This fixes a performance issue in the failure case.

rdar://63547920

Differential Revision: https://reviews.llvm.org/D80595
The file was modifiedlldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
Commit eb1092ada32d6855dcb4f763ce48ede21f4d7441 by alex-t
[AMDGPU] Fix for the lost CarryOut/CarryIn register operands in S_ADD/SUB_CO_PSEUDO.

Summary: This fixes the 5b898bddff51 bug when the carry-in and carry-out registers became lost in lowering S_ADD/SUB_CO_PSEUDO.

Reviewers: rampitec, arsenm

Reviewed By: arsenm

Subscribers: msearles, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80158
The file was addedllvm/test/CodeGen/AMDGPU/s_add_co_pseudo_lowering.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Commit d24dd2b279ffe60d579b425fb74f6e4904323a34 by dvyukov
tsan: fix test in debug mode

sanitizer-x86_64-linux-autoconf has failed after the previous tsan commit:

FAIL: ThreadSanitizer-x86_64 :: java_finalizer2.cpp (245 of 403)
******************** TEST 'ThreadSanitizer-x86_64 :: java_finalizer2.cpp' FAILED ********************
Script:
--
: 'RUN: at line 1';      /b/sanitizer-x86_64-linux-autoconf/build/tsan_debug_build/./bin/clang  --driver-mode=g++ -fsanitize=thread -Wall  -m64   -gline-tables-only -I/b/sanitizer-x86_64-linux-autoconf/build/llvm-project/compiler-rt/test/tsan/../ -std=c++11 -I/b/sanitizer-x86_64-linux-autoconf/build/llvm-project/compiler-rt/test/tsan/../ -nostdinc++ -I/b/sanitizer-x86_64-linux-autoconf/build/tsan_debug_build/tools/clang/runtime/compiler-rt-bins/lib/tsan/libcxx_tsan_x86_64/include/c++/v1 -O1 /b/sanitizer-x86_64-linux-autoconf/build/llvm-project/compiler-rt/test/tsan/java_finalizer2.cpp -o /b/sanitizer-x86_64-linux-autoconf/build/tsan_debug_build/tools/clang/runtime/compiler-rt-bins/test/tsan/X86_64Config/Output/java_finalizer2.cpp.tmp &&  /b/sanitizer-x86_64-linux-autoconf/build/tsan_debug_build/tools/clang/runtime/compiler-rt-bins/test/tsan/X86_64Config/Output/java_finalizer2.cpp.tmp 2>&1 | FileCheck /b/sanitizer-x86_64-linux-autoconf/build/llvm-project/compiler-rt/test/tsan/java_finalizer2.cpp
--
Exit Code: 1

Command Output (stderr):
--
/b/sanitizer-x86_64-linux-autoconf/build/llvm-project/compiler-rt/test/tsan/java_finalizer2.cpp:82:11: error: CHECK: expected string not found in input
// CHECK: DONE
          ^
<stdin>:1:1: note: scanning from here
FATAL: ThreadSanitizer CHECK failed: /b/sanitizer-x86_64-linux-autoconf/build/llvm-project/compiler-rt/lib/tsan/rtl/tsan_sync.cpp:69 "((*meta)) == ((0))" (0x4000003e, 0x0)
^
<stdin>:5:12: note: possible intended match here
#3 __tsan::OnUserAlloc(__tsan::ThreadState*, unsigned long, unsigned long, unsigned long, bool) /b/sanitizer-x86_64-linux-autoconf/build/llvm-project/compiler-rt/lib/tsan/rtl/tsan_mman.cpp:225:16 (java_finalizer2.cpp.tmp+0x4af407)
           ^

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-autoconf/builds/51143/steps/test%20tsan%20in%20debug%20compiler-rt%20build/logs/stdio

Fix heap object overlap by offsetting java heap as other tests are doing.
The file was modifiedcompiler-rt/test/tsan/java_finalizer2.cpp
Commit c593bf534222f2206f89b6a61993125b2475b954 by Jessica Paquette
[GlobalISel] Don't combine instructions which are fed by memory instructions.

If we have a memory instruction (e.g. a load), we shouldn't combine it away in
some trivial combine.

It's possible that, say, a call lives between the instructions. This could
modify the value loaded, making the load instructions not safe to fold.

Differential Revision: https://reviews.llvm.org/D80053
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-not-really-equiv-insts.mir
Commit 49688b3c306d0bf918c0abeee030cfd56a17c348 by michael.hliao
Fix `-Wpedantic` warning. NFC.
The file was modifiedllvm/tools/llvm-cov/CoverageFilters.h
Commit c6fa2efd481a58c979a8e9f95119b4278b13d99a by ravishankarm
[mlir][Linalg] Fix build failure from D80188

Differential Revision: https://reviews.llvm.org/D80657
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp
Commit 79aa9bfdb819c02faa3c6c78e307b20ae7f69057 by ntv
[mlir] Fix RunnerUtils template specialization

Undoing a spurious change that broke SFINAE for some out of core use
cases.
The file was modifiedmlir/include/mlir/ExecutionEngine/CRunnerUtils.h
Commit 54b64572407c8305c7bb8cc20c46a5e0c66b2979 by aqjune
[TargetPassConfig] Add CanonicalizeFreezeInLoops before LSR

Summary:
This patch adds CanonicalizeFreezeInLoops before LSR.
Relevant patch: https://reviews.llvm.org/D77523

Reviewers: spatel, efriedma, jdoerfert, fhahn, nikic, reames, xbolva00

Reviewed By: nikic

Subscribers: xbolva00, nikic, lebedev.ri, hiraditya, llvm-commits, sanwou01, nlopes

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77524
The file was modifiedllvm/test/CodeGen/X86/O3-pipeline.ll
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp
The file was modifiedllvm/test/CodeGen/AArch64/O3-pipeline.ll
The file was modifiedllvm/test/CodeGen/ARM/O3-pipeline.ll
The file was modifiedllvm/test/Transforms/CanonicalizeFreezeInLoops/aarch64.ll
Commit b2773823116157aa73ea4ac01270b22042d6bb42 by silvasean
Remove error-prone mlir::ExecutionEngine::invoke overload.

I just spent a bunch of time debugging a mysterious bug that ended being due to my SmallVector getting passed to the Args&... overload instead of the MutableArrayRef overload, with disastrous results.

I appreciate the intent of this API, but for a function that does a bunch of unsafe casts, adding in potential overload confusion is just too much C++ footgun. If we end up needing this functionality, having something like a separate `packArgs(Args&...) -> SmallVector` overload would be preferable.

Turns out this API is unused and untested (even out of tree as far as I can tell, modulo the optional passing of no args to the other invoke as I fixed in this patch), so it's an easy fix -- just delete it and touch up the other overload.

Differential Revision: https://reviews.llvm.org/D80607
The file was modifiedmlir/include/mlir/ExecutionEngine/ExecutionEngine.h
Commit 14f33575868556f928434192bd6141f4be16a7a4 by Vitaly Buka
[StackSafety] Bailout more aggressively
Many edge cases, e.g. wrapped ranges, can be processed
precisely without bailout. However it's very unlikely that
memory access with min/max integer offsets will be
classified as safe anyway.
Early bailout may help with ThinLTO where we can
drop unsafe parameters from summaries.
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
Commit 804a39a201567f5f615246bf99cf8e8ff7e006c8 by Vitaly Buka
[NFC,StackSafety] Rename some variables
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
Commit 03481287ca530494512d128cbbdc9c87f2d84921 by michael.hliao
Refactor argument attribute specification in intrinsic definition. NFC.

- Argument attribute needs specifiying through `ArgIndex<n>`
  (corresponding to `FirstArgIndex`) to distinguish explicitly from the
  index number from the overloaded type list.
- In addition, `RetIndex` (corresponding to `ReturnIndex`) and
  `FuncIndex` (corresponding to `FunctionIndex`) are introduced for us
  to associate attributes on the return value and potentially function
  itself.

Differential Revision: https://reviews.llvm.org/D80422
The file was modifiedllvm/utils/TableGen/CodeGenIntrinsics.h
The file was modifiedllvm/include/llvm/IR/IntrinsicsAMDGPU.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsWebAssembly.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsXCore.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsHexagon.td
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsX86.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsHexagonDep.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
The file was modifiedllvm/test/TableGen/GlobalISelEmitter-SDNodeXForm-timm.td
The file was modifiedllvm/test/TableGen/immarg.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsARM.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsBPF.td
The file was modifiedllvm/utils/TableGen/IntrinsicEmitter.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicsSystemZ.td
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicsMips.td
The file was modifiedllvm/test/TableGen/GlobalISelEmitter-immarg-literal-pattern.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsNVVM.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
Commit fa342b5c8054dad4cfd1032ac580d71f0f4943d3 by michael.hliao
Enable `align <n>` to be used in the intrinsic definition.

- This allow us to specify the (minimal) alignment on an intrinsic's
  arguments and, more importantly, the return value.

Differential Revision: https://reviews.llvm.org/D80422
The file was modifiedllvm/utils/TableGen/CodeGenIntrinsics.h
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
The file was modifiedllvm/utils/TableGen/IntrinsicEmitter.cpp
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedllvm/include/llvm/IR/Attributes.h
The file was modifiedllvm/include/llvm/IR/IntrinsicsAMDGPU.td
The file was modifiedllvm/lib/IR/Attributes.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/reqd-work-group-size.ll
Commit 98ef93eabd768e51aa58c7623a9fe220ab471715 by mtrofin
[llvm] Add function feature extraction analysis

Summary:
This patch introduces an analysis pass to extract function features,
which will be needed by the ML InlineAdvisor.

RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-April/140763.html

Reviewers: davidxl, dblaikie, jdoerfert

Subscribers: mgorny, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80579
The file was addedllvm/unittests/Analysis/ML/InlineFeaturesAnalysisTest.cpp
The file was modifiedllvm/lib/Passes/PassRegistry.def
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was addedllvm/include/llvm/Analysis/ML/InlineFeaturesAnalysis.h
The file was modifiedllvm/unittests/Analysis/CMakeLists.txt
The file was addedllvm/lib/Analysis/ML/CMakeLists.txt
The file was addedllvm/lib/Analysis/ML/InlineFeaturesAnalysis.cpp
The file was modifiedllvm/lib/Analysis/CMakeLists.txt
The file was addedllvm/unittests/Analysis/ML/CMakeLists.txt
Commit 9546d8b108dce03e03e0448cebbca5fa0fe4be21 by silvasean
[mlir][core] Add IndexElementsAttr helpers.

Summary:
In a follow-up, I'll update the Shape dialect to use this instead of
I64ElementsAttr.

Differential Revision: https://reviews.llvm.org/D80601
The file was modifiedmlir/lib/IR/Attributes.cpp
The file was modifiedmlir/include/mlir/IR/OpBase.td
The file was modifiedmlir/include/mlir/IR/Builders.h
The file was modifiedmlir/lib/IR/Builders.cpp
The file was modifiedmlir/test/mlir-tblgen/types.mlir
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
Commit 25132b36a8b39e7c2b0b28aa73772e57191b6df4 by silvasean
[mlir][shape] Use IndexElementsAttr in Shape dialect.

Summary:
Index is the proper type for storing shapes when constant folding, so
this fixes the previous code (which was using i64).

Differential Revision: https://reviews.llvm.org/D80600
The file was modifiedmlir/test/Dialect/Shape/canonicalize.mlir
The file was modifiedmlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
The file was modifiedmlir/lib/Dialect/Shape/IR/Shape.cpp
Commit 5f97a540ad8dd4baac47873fa4bdfba2f37e0f82 by Jonas Devlieghere
[lldb/Reproducers] Differentiate active and passive replay unexpected packet.
The file was modifiedlldb/test/API/commands/command/script/TestCommandScript.py
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestGDBRemoteClient.py
The file was modifiedlldb/test/API/lang/objc/modules/TestObjCModules.py
The file was modifiedlldb/test/API/functionalities/step_scripted/TestStepScripted.py
The file was modifiedlldb/test/API/lang/objc/foundation/TestRuntimeTypes.py
The file was modifiedlldb/test/API/lang/objc/print-obj/TestPrintObj.py
The file was modifiedlldb/test/API/functionalities/signal/TestSendSignal.py
The file was modifiedlldb/test/API/python_api/hello_world/TestHelloWorld.py
The file was modifiedlldb/test/API/commands/process/attach-resume/TestAttachResume.py
The file was modifiedlldb/test/API/functionalities/breakpoint/scripted_bkpt/TestScriptedResolver.py
The file was modifiedlldb/test/API/functionalities/conditional_break/TestConditionalBreak.py
The file was modifiedlldb/test/API/commands/expression/issue_11588/Test11588.py
The file was modifiedlldb/test/API/commands/process/attach/TestProcessAttach.py
Commit f9bea9bc4acf4c412eab4767c31674d0caa60322 by Jonas Devlieghere
[lldb/Reproducers] Skip & add FIXME to tests failing with unexpected packet.

Add skip decorator to tests failing with an unexpected packet during
passive replay.
The file was modifiedlldb/test/API/lang/objc/hidden-ivars/TestHiddenIvars.py
The file was modifiedlldb/test/API/commands/expression/unwind_expression/TestUnwindExpression.py
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestRestartBug.py
Commit f46bb9dd5ca0b5b553590da5ff177767be0b75b5 by Louis Dionne
[NFC] Reformat TEST_FOO macros in test_macros.h

To make them easier to read and to make it easier to add new ones.
The file was modifiedlibcxx/test/support/test_macros.h
Commit a57a67c59b3f7529f4aa30009b214248772b544b by Adrian Prantl
Fix a use-after-free in GetXcodeSDKPath

Introduced in https://reviews.llvm.org/D80595. Thanks Jonas for noticing!

Differential Revision: https://reviews.llvm.org/D80666
The file was modifiedlldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
Commit 0a072b8a0da7399eeeb670330b7baeddf1bb407a by ravishankarm
[mlir][Linalg] Add missing library linkage for shared library builds.

Differential Revision: https://reviews.llvm.org/D80664
The file was modifiedmlir/lib/Dialect/Linalg/Utils/CMakeLists.txt
Commit 2d068e534f1671459e1b135852c1b3c10502e929 by amccarth
Fix Windows command line bug when last token in response file is ""

Patch by Neil Dhar <dhar@alumni.duke.edu>

Current state machine for parsing tokens from response files in Windows
does not correctly handle the case where the last token is "". The current
implementation handles the last token by only adding it if it is not empty,
however this does not cover the case where the last token is meant to be
the empty string. We can cover this case by checking whether the state
machine was last in the UNQUOTED state, which indicates that the last
character of the input was a non-whitespace character.

Differential Revision: https://reviews.llvm.org/D78346
The file was modifiedllvm/unittests/Support/CommandLineTest.cpp
The file was modifiedllvm/lib/Support/CommandLine.cpp
Commit cf86a234ba86acf0bb875e21d27833be36e08be4 by mtrofin
Fix shared libs build break introduced in rG98ef93eabd76
The file was modifiedllvm/lib/Analysis/ML/CMakeLists.txt
The file was modifiedllvm/lib/Passes/CMakeLists.txt
Commit 993bbaf6a35baed4ad3d8422a76c4311140641a8 by maskray
[MLPolicies] Fix dependency and -DBUILD_SHARED_LIBS=on builds after D80579
The file was modifiedllvm/lib/Passes/LLVMBuild.txt
The file was addedllvm/lib/Analysis/ML/LLVMBuild.txt
The file was modifiedllvm/lib/Analysis/CMakeLists.txt
The file was modifiedllvm/lib/Analysis/ML/CMakeLists.txt
The file was modifiedllvm/lib/Analysis/LLVMBuild.txt
Commit be6bffe7293c63ec874aaf21b4f768dd3f77380a by maskray
[CMake] Revert cf86a234ba86acf0bb875e21d27833be36e08be4

It is unnecessary after 993bbaf6a35baed4ad3d8422a76c4311140641a8
The file was modifiedllvm/lib/Analysis/ML/CMakeLists.txt
The file was modifiedllvm/lib/Passes/CMakeLists.txt
Commit 8aa81aaebe533d0721f1c00deeb0fc452b0147a5 by Stanislav.Mekhanoshin
AMDGPU/GlobalISel: Fixed handling of non-standard vectors

We do not have register classes for all possible vector
sizes, so round it up for extract vector element.

Also fixes selection of G_MERGE_VALUES when vectors are
not a power of two.

This has required to refactor getRegSplitParts() in way
that it can handle not just power of two vectors.

Ideally we would like RegSplitParts to be generated by
tablegen.

Differential Revision: https://reviews.llvm.org/D80457
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-concat-vectors.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
Commit dda82986f97747350dce4e8ebd65c27a64a37c9d by Matthew.Arsenault
DAG: Fix expansion of DYNAMIC_STACKALLOC for StackGrowsUp targets

Can't test this since I can't directly use the default expansion for
AMDGPU. It needs to scale the amount by the wave size, rather than use
the raw byte size value.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Commit 5e007fe9980cc44e9c4a14c9baf3bdfb012d2c18 by Matthew.Arsenault
AMDGPU: Support non-entry block static sized allocas

OpenMP emits these for some reason, so handle them. Assume these use
4096 bytes by default, with a flag to override this. Also change the
related stack assumption for calls to have a flag.
The file was addedllvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
Commit ef37444058550b0f49441b994c9e9368d8e42da8 by leonardchan
[Lexer] Fix invalid suffix diagnostic for fixed-point literals

Committing on behalf of nagart, who authored this patch.

Differential Revision: https://reviews.llvm.org/D80412
The file was modifiedclang/lib/Lex/LiteralSupport.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticLexKinds.td
The file was modifiedclang/test/Frontend/fixed_point_errors.c
The file was modifiedclang/include/clang/Lex/LiteralSupport.h
Commit 7392bbc3014cd1b54852aa71ac971c6c92cd1914 by Stanislav.Mekhanoshin
AMDGPU/GlobalISel: Fixed insert element for non-standard vectors

Differential Revision: https://reviews.llvm.org/D80653
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Commit 2bf3fe9b6dedf727990e68244a3d637518ea8bc3 by efriedma
[TRE] Allow elimination when the returned value is non-constant

Currently we can only eliminate call return pairs that either return the
result of the call or a dynamic constant. This patch removes that
limitation.

Differential Revision: https://reviews.llvm.org/D79660
The file was modifiedllvm/test/Transforms/TailCallElim/2010-06-26-MultipleReturnValues.ll
The file was modifiedllvm/test/Transforms/TailCallElim/basic.ll
The file was modifiedllvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
Commit 54d289685260da85fc43c59db2550b18df7c33a5 by maskray
[ELF] --wrap: Drop __real_ symbol from the symbol table

In D34993, we discussed and concluded that we should drop `__real_
symbol from the symbol table, but I did the opposite in D50569.
This patch is to drop `__real_` symbol.

MaskRay's note: omitting `__real_` is important if it is undefined:
otherwise a subsequent link may error due to the undefined `__real_` in .dynsym

Differential Revision: https://reviews.llvm.org/D51283
The file was modifiedlld/test/ELF/lto/wrap-2.ll
The file was modifiedlld/test/ELF/wrap-no-real.s
The file was modifiedlld/test/ELF/wrap.s
The file was modifiedlld/ELF/SymbolTable.cpp
Commit dee2bb58107fc3ce438d2a12c778bb0ab485b592 by maskray
[gn build] Port D80579
The file was addedllvm/utils/gn/secondary/llvm/lib/Analysis/ML/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn
Commit d14ee1553e46634ef6b7eb0d7c0b45fd3c30567f by mtrofin
[llvm][NFC] ProfileSummaryInfo - const-ify APIs

Follow-up from https://reviews.llvm.org/D79920
The file was modifiedllvm/include/llvm/Analysis/ProfileSummaryInfo.h
The file was modifiedllvm/lib/Analysis/ProfileSummaryInfo.cpp
Commit eca963f244c711ab51e1e645241562987c0f8fbf by maskray
[gn build] Add MLAnalysisTests after D80579
The file was addedllvm/utils/gn/secondary/llvm/unittests/Analysis/ML/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/BUILD.gn
Commit c94c5bf9cce8a4c7ad5e8abbc8f21bad5cf6b889 by listmail
Introduce a GCStatepointInst type analogous to IntrinsicInst subclasses

Back when we had CallSite, we implemented the current Statepoint/ImmutableStatepoint structure in analogous manner.  Now that CallSite has been removed, the structure used for statepoints looks decidely out of place.  gc.statepoint is one of the small handful of intrinsics which are invokable.  Because of this, it can't subclass IntrinsicInst as is idiomatic.

This change simply introduces the GCStatepointInst class, restructures the existing Statepoint/ImmutableStatepoint types to wrap it.  I will be landing a series of changes to sink functionality into GCStatepointInst and updating callers to be more idiomatic.
The file was modifiedllvm/include/llvm/IR/Statepoint.h
The file was modifiedllvm/lib/IR/Statepoint.cpp
Commit 00e5d38d40162d049f67b436ad42c9d05092e65c by richard
Do not warn that an expression of the form (void)arr; is unused when
arr is a volatile non-local array.

This fixes a recent regression exposed by removing lvalue-to-rvalue
conversion of discarded volatile arrays. In passing, regularize the
rules we use to determine whether '(void)expr;' warns when expr is a
volatile glvalue.
The file was modifiedclang/lib/AST/Expr.cpp
The file was modifiedclang/include/clang/AST/Expr.h
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/test/SemaCXX/warn-unused-value.cpp
Commit 1224e619d975c7ecf8017e0ef8210188f39deec4 by maskray
[ELF][test] Fix wrap-no-real.s after D51283

Give %t3.so a DT_SONAME so that the DT_NEEDED entry in a dependent executable has a fixed length.
The file was modifiedlld/test/ELF/wrap-no-real.s
Commit a70edc2b1613b10b65f55a0670e96f9f4e6c2926 by Vitaly Buka
[NFC,StackSafety] Cleanup alloca size calculation
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
Commit 74671d5c1491dc9e252a8a10c9065b2f8cc99fba by listmail
Sink first bit of functionality from Statepoint to GCStatepointInst

Starting with the obvious stuff.  I initially tried to include the inline operand sequences too, but managed to get code which confused *me*.  Since several parts of those are being entirely removed in the near future, I may defer that portion until the cleanup is done.
The file was modifiedllvm/include/llvm/IR/Statepoint.h
Commit 87bea912c27caaa71ac9bc3d172995994b57e639 by listmail
[Statepoint] Replace uses of isX functions with idiomatic isa<X>

Now that all of the statepoint related routines have classes with isa support, let's cleanup.

I'm leaving the (dead) utitilities in tree for a few days so that I can do the same cleanup downstream without breakage.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
The file was modifiedllvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
The file was modifiedllvm/lib/CodeGen/CodeGenPrepare.cpp
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was modifiedllvm/lib/IR/SafepointIRVerifier.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/lib/Transforms/Scalar/PlaceSafepoints.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/Transforms/Utils/StripGCRelocates.cpp
Commit 3c3a6e26e7c39096b3df746faeaa743197657a8e by Xing
[ObjectYAML][MachO] Add error handling in MachOEmitter.

Currently, `yaml2macho` doesn't support error handling. This patch helps improve it.

Differential Revision: https://reviews.llvm.org/D80535
The file was modifiedllvm/test/ObjectYAML/MachO/sections.yaml
The file was modifiedllvm/lib/ObjectYAML/MachOEmitter.cpp
The file was modifiedllvm/test/ObjectYAML/MachO/fat_macho_i386_x86_64.yaml
Commit 98a87c65a35335473cf7c233cdb312892fc771a3 by listmail
[Statepoint] Reduce scope of usage of ImmutableStatepoint

Can't quite fully remove it yet as some more items need sunk the GCStatepointInst class from the wrapper, but we can at least reduce scope.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
Commit f3a089506fdcc4a1d658697009572c93e00c4373 by Dan Liew
Temporarily disable the following failing tests on Darwin:

  AddressSanitizer-Unit :: ./Asan-i386-calls-Test/AddressSanitizer.LongJmpTest
  AddressSanitizer-Unit :: ./Asan-i386-calls-Test/AddressSanitizer.SigLongJmpTest
  AddressSanitizer-Unit :: ./Asan-i386-inline-Test/AddressSanitizer.LongJmpTest
  AddressSanitizer-Unit :: ./Asan-i386-inline-Test/AddressSanitizer.SigLongJmpTest

These failures will be examined properly when time permits.

rdar://problem/62141412
The file was modifiedcompiler-rt/lib/asan/tests/asan_test.cpp
Commit 660cda572d6e05e55a9d959e61aba51790c0abbd by Jan Korous
[Analyzer][WebKit] NoUncountedMembersChecker

Differential Revision: https://reviews.llvm.org/D77178
The file was modifiedclang/docs/analyzer/checkers.rst
The file was modifiedclang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
The file was modifiedclang/lib/StaticAnalyzer/Checkers/WebKit/DiagOutputUtils.h
The file was addedclang/test/Analysis/Checkers/WebKit/uncounted-members.cpp
The file was addedclang/lib/StaticAnalyzer/Checkers/WebKit/NoUncountedMembersChecker.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Checkers/Checkers.td
Commit f830b406c655ae59888a188302edfbc5d6fa7a13 by llvmgnsyncbot
[gn build] Port 660cda572d6
The file was modifiedllvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Commit 12cd4a51640f5e025043c45a004df66b678ffa9d by Vitaly Buka
[NFC,StackSafety] Add StackSafetyGlobalInfo class
The file was modifiedllvm/include/llvm/Analysis/StackSafetyAnalysis.h
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
Commit 5238b80058a6d096220eb9fbf606d9d983f37b0b by Jonas Devlieghere
[lldb/Reproducers] Skip or fix the remaining tests.

After this patch all remaining tests should pass on macOS when replayed
from a reproducer.

To capture the reproducers:

  ./bin/llvm-lit ../llvm-project/lldb/test/ --param lldb-run-with-repro=capture

To replay the reproducers:

  ./bin/llvm-lit ../llvm-project/lldb/test/ --param lldb-run-with-repro=replay
The file was modifiedlldb/test/API/macosx/version_zero/TestGetVersionZeroVersion.py
The file was modifiedlldb/test/API/functionalities/load_unload/TestLoadUnload.py
The file was modifiedlldb/test/API/python_api/symbol-context/TestSymbolContext.py
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestWriteMemory.py
The file was modifiedlldb/test/API/functionalities/load_using_paths/TestLoadUsingPaths.py
The file was modifiedlldb/test/API/functionalities/process_group/TestChangeProcessGroup.py
The file was modifiedlldb/test/API/functionalities/postmortem/minidump-new/TestMiniDumpNew.py
The file was modifiedlldb/test/API/functionalities/thread/exit_during_expression/TestExitDuringExpression.py
The file was modifiedlldb/test/API/lang/cpp/thread_local/TestThreadLocal.py
Commit e5bb542362dfbb6c57a597810d740987afbc4202 by Jonas Devlieghere
[lldb/Test] Import all decorators.

Fixes "NameError: name 'skipIfReproducer' is not defined".
The file was modifiedlldb/test/API/macosx/version_zero/TestGetVersionZeroVersion.py
Commit c1d5b831b1cb095370a01e1749a8e9746f8f3de6 by SourabhSingh.Tomar
[docs] Release notes for DIModule metadata

Updated the release notes for the changes in the DIModule metadata.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D80614
The file was modifiedllvm/docs/ReleaseNotes.rst
Commit 49544499954912c5a0f02014de53e0bc0234c7af by shengchen.kan
[Driver][X86] Support branch align options with LTO

Summary: Before this patch, we use two different ways to pass options to align branch
depending on whether LTO is enabled. For example, `-mbranches-within-32B-boundaries`
w/o LTO and `-Wl,-plugin-opt=-x86-branches-within-32B-boundaries` w/ LTO.  It's
inconvenient, so this patch unifies the way: we only need to pass options like
`-mbranches-within-32B-boundaries` to align branches, no matter LTO is enabled or not.

Differential Revision: https://reviews.llvm.org/D80289
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.h
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/test/Driver/x86-malign-branch.c
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp
Commit c4990a03c6c347df120c0dbf6039e900889c4a92 by kazu
[JumpThreading] Use emplace_back instead of push_back (NFC)

Summary: This patch replaces push_back with emplace_back where appropriate.

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80688
The file was modifiedllvm/lib/Transforms/Scalar/JumpThreading.cpp
Commit 9081fa20991d101728434b354a96283b26495b71 by 1.int32
[Analyzer][StreamChecker] Added check for "indeterminate file position".

Summary:
According to the standard, after a `wread` or `fwrite` call the file position
becomes "indeterminate". It is assumable that a next read or write causes
undefined behavior, so a (fatal error) warning is added for this case.
The indeterminate position can be cleared by some operations, for example
`fseek` or `freopen`, not with `clearerr`.

Reviewers: Szelethus, baloghadamsoftware, martong, NoQ, xazax.hun, dcoughlin

Reviewed By: Szelethus

Subscribers: rnkovacs, NoQ, xazax.hun, baloghadamsoftware, szepet, a.sidorin, mikhail.ramalho, Szelethus, donat.nagy, dkrupp, gamesh411, Charusso, martong, ASDenysPetrov, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80018
The file was modifiedclang/test/Analysis/stream-error.c
The file was modifiedclang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
Commit 880c35a554952c3a64483502f3278431f8f06516 by sjoerd.meijer
[HardwareLoops] LangRef Intrinsic descriptions

The HardwareLoop intrinsics were missing and not described in LangRef. This
adds these descriptions/definitions.

Differential Revision: https://reviews.llvm.org/D80316
The file was modifiedllvm/docs/LangRef.rst
Commit 5921782f744deffb5f5bfd96f6a7932a4ff75666 by simon.moll
[VE] Implements minimum MC layer for VE (3/4)

Summary:
Define ELF binary code for VE and modify code where should use this new code.

Depends on D79544.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D79545
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
The file was addedllvm/unittests/Object/ELFTest.cpp
The file was modifiedllvm/include/llvm/Object/ELFObjectFile.h
The file was addedllvm/include/llvm/BinaryFormat/ELFRelocs/VE.def
The file was modifiedllvm/unittests/Object/CMakeLists.txt
The file was modifiedllvm/unittests/ObjectYAML/CMakeLists.txt
The file was addedllvm/unittests/Object/ELFObjectFileTest.cpp
The file was addedllvm/test/tools/llvm-readobj/ELF/file-header-machine-types.test
The file was addedllvm/unittests/ObjectYAML/ELFYAMLTest.cpp
The file was modifiedllvm/include/llvm/BinaryFormat/ELF.h
The file was modifiedllvm/lib/Object/ELF.cpp
Commit 4b94cee650ce9753214d562826b7f1b9663c2268 by llvmgnsyncbot
[gn build] Port 5921782f744
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/ObjectYAML/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/Object/BUILD.gn
Commit 213c6cdf2e7a30d722cee4cd66b7d48fc396d44b by joker.eph
Harden MLIR detection of misconfiguration when missing dialect registration

This changes will catch error where C++ op are used without being
registered, either through creation with the OpBuilder or when trying to
cast to the C++ op.

Differential Revision: https://reviews.llvm.org/D80651
The file was modifiedmlir/include/mlir/IR/MLIRContext.h
The file was modifiedmlir/include/mlir/IR/OpDefinition.h
The file was modifiedmlir/include/mlir/IR/Builders.h
The file was modifiedmlir/lib/IR/MLIRContext.cpp
Commit d20bf5a7258d4b6a7f017a81b125275dac1aa166 by SourabhSingh.Tomar
[DebugInfo] Upgrade DISubrange to support Fortran dynamic arrays

This patch upgrades DISubrange to support fortran requirements.

Summary:
Below are the updates/addition of fields.
lowerBound - Now accepts signed integer or DIVariable or DIExpression,
earlier it accepted only signed integer.
upperBound - This field is now added and accepts signed interger or
DIVariable or DIExpression.
stride - This field is now added and accepts signed interger or
DIVariable or DIExpression.
This is required to describe bounds of array which are known at runtime.

Testing:
unit test cases added (hand-written)
check clang
check llvm
check debug-info

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D80197
The file was modifiedllvm/test/Assembler/debug-info.ll
The file was modifiedllvm/test/DebugInfo/X86/default-subrange-array.ll
The file was addedllvm/test/Bitcode/fortranSubrangeBackward.ll.bc
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
The file was addedllvm/test/DebugInfo/fortranSubrangeInt.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
The file was modifiedllvm/lib/IR/DIBuilder.cpp
The file was modifiedllvm/include/llvm/IR/DebugInfoMetadata.h
The file was modifiedllvm/test/Assembler/invalid-disubrange-count-missing.ll
The file was modifiedllvm/unittests/IR/MetadataTest.cpp
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was modifiedllvm/test/Assembler/disubrange-empty-array.ll
The file was addedllvm/test/Bitcode/fortranSubrangeBackward.ll
The file was addedllvm/test/DebugInfo/cDefaultLower.ll
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
The file was modifiedllvm/lib/IR/LLVMContextImpl.h
The file was modifiedllvm/lib/IR/DebugInfoMetadata.cpp
The file was modifiedllvm/test/Bindings/llvm-c/debug_info.ll
The file was addedllvm/test/Bitcode/fortranSubrange.ll
The file was modifiedllvm/lib/AsmParser/LLParser.cpp
The file was addedllvm/test/DebugInfo/fortranSubrangeVar.ll
The file was addedllvm/test/DebugInfo/fortranDefaultLower.ll
The file was addedllvm/test/Verifier/disubrange-missing-upperBound.ll
The file was modifiedllvm/include/llvm/IR/DIBuilder.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
The file was addedllvm/test/Verifier/invalid-disubrange-lowerBound.ll
The file was addedllvm/test/Verifier/invalid-disubrange-stride.ll
The file was addedllvm/test/Verifier/invalid-disubrange-upperBound.ll
The file was modifiedllvm/lib/IR/AsmWriter.cpp
The file was addedllvm/test/Verifier/disubrange-count-upperBound.ll
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was modifiedllvm/lib/Bitcode/Reader/MetadataLoader.cpp
The file was addedllvm/test/DebugInfo/fortranSubrangeExpr.ll
The file was modifiedllvm/test/DebugInfo/X86/nondefault-subrange-array.ll
Commit ec0b66c318ea42ec229fd3a9ef4ad92bf81d41cf by sander.desmalen
[CodeGen] Specify meaning of ISD opcodes for scalable vectors

This patch contains changes to the description of EXTRACT_SUBVECTOR,
INSERT_SUBVECTOR, INSERT_VECTOR_ELT, EXTRACT_VECTOR_ELT and
CONCAT_VECTORS to specify their behaviour for scalable vectors.

For EXTRACT_SUBVECTOR it specifies that the IDX is scaled by the
same runtime scaling as the extracted (or inserted) vector. This
definition is the most natural extension to EXTRACT_SUBVECTOR for
scalable vectors, as most use-cases that work on fixed-width types
will have the same meaning for scalable types. For legalization for
example, it is common to split the vector operation to operate on
the LO and HI halfs of a vector.

For a fixed width vector <16 x i8> this would be expressed with:

  v16i8 %res = EXTRACT_SUBVECTOR v32i8 %v, i32 16

For a scalable vector, this would similarly be expressed as:

  nxv16i8 %res = EXTRACT_SUBVECTOR nxv32i8 %V, i32 16

By extending the meaning of IDX for scalable vectors, most existing
optimisations on EXTRACT/INSERT_SUBVECTOR work for scalable vectors
without any changes. This definition also allows extracting a
fixed-width subvector from a scalable vector, which is useful to
e.g. extract the low N lanes of a scalable vector.

This patch is not NFC because it sets the meaning of these nodes
for scalable vectors, which future patches will build upon.

Reviewers: efriedma, ctetreau, rogfer01, craig.topper

Reviewed By: efriedma

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79806
The file was modifiedllvm/include/llvm/CodeGen/ISDOpcodes.h
Commit 0969541ffcb24ae1af59fcb8778063becf17dbca by dvyukov
tsan: disable java_finalizer2 test on darwin

pthread_barrier_t is not supported on darwin.
Do what other tests that use pthread_barrier_t do.
The file was modifiedcompiler-rt/test/tsan/java_finalizer2.cpp
Commit 69935d86aed1b691c5f33a2141f15cb3aaee1af6 by elver
[Clang][Sanitizers] Expect test failure on {arm,thumb}v7

Summary:
Versions of LLVM built on {arm,thumb}v7 appear to have differently
configured pass managers, which causes restrictions on which sanitizers
we may use.

As such, expect failure of the recently added "sanitize-coverage.c" test
on these architectures until we can investigate armv7's restrictions.

Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=46117

Reviewers: vitalybuka, glider

Reviewed By: glider

Subscribers: glider, kristof.beyls, danielkiss, cfe-commits, vvereschaka

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80668
The file was modifiedclang/test/CodeGen/sanitize-coverage.c
Commit e533a176b3d4d936a4870cd1a3273941ba699882 by cullen.rhodes
[TableGen] Fix non-standard escape warnings for braces in InstAlias

Summary:
TableGen interprets braces ('{}') in the asm string of instruction aliases as
variants but when defining aliases with literal braces they have to be escaped
to prevent them being removed.

Braces are escaped with '\\', for example:

  def FooBraces : InstAlias<"foo \\{$imm\\}", (foo IntOperand:$imm)>;

Although when TableGen is emitting the assembly writer (-gen-asm-writer)
the AsmString that gets emitted is:

  AsmString = "foo \{$\x01\}";

In c/c++ braces don't need to be escaped which causes compilation
warnings:

  warning: use of non-standard escape character '\{' [-Wpedantic]

This patch fixes the issue by unescaping the flattened alias asm string
in the asm writer, by replacing '\{\}' with '{}'.

Reviewed By: hfinkel

Differential Revision: https://reviews.llvm.org/D79991
The file was addedllvm/test/TableGen/AliasAsmString.td
The file was modifiedllvm/utils/TableGen/AsmWriterEmitter.cpp
Commit 23ac16cf9bd4cc0bb434efcf6385baf083a2ff7b by thomasp
FileCheck [10/12]: Add support for signed numeric values

Summary:
This patch is part of a patch series to add support for FileCheck
numeric expressions. This specific patch adds support signed numeric
values, thus allowing negative numeric values.

As such, the patch adds a new class to represent a signed or unsigned
value and add the logic for type promotion and type conversion in
numeric expression mixing signed and unsigned values. It also adds
the %d format specifier to represent signed value.

Finally, it also adds underflow and overflow detection when performing a
binary operation.

Copyright:
    - Linaro (changes up to diff 183612 of revision D55940)
    - GraphCore (changes in later versions of revision D55940 and
                 in new revision created off D55940)

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson

Reviewed By: jhenderson, arichardson

Subscribers: MaskRay, hiraditya, llvm-commits, probinson, dblaikie, grimar, arichardson, kristina, hfinkel, rogfer01, JonChesterfield

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60390
The file was modifiedllvm/lib/Support/FileCheckImpl.h
The file was modifiedllvm/unittests/Support/FileCheckTest.cpp
The file was modifiedllvm/test/FileCheck/numeric-expression.txt
The file was modifiedllvm/docs/CommandGuide/FileCheck.rst
The file was modifiedllvm/lib/Support/FileCheck.cpp
Commit c010d4d195506aaea76a1cc8afb5a6b5884dba44 by victor.campos
[ARM] Improve codegen of volatile load/store of i64

Summary:
Instead of generating two i32 instructions for each load or store of a volatile
i64 value (two LDRs or STRs), now emit LDRD/STRD.

These improvements cover architectures implementing ARMv5TE or Thumb-2.

The code generation explicitly deviates from using the register-offset
variant of LDRD/STRD. In this variant, the register allocated to the
register-offset cannot be reused in any of the remaining operands. Such
restriction seems to be non-trivial to implement in LLVM, thus it is
left as a to-do.

Differential Revision: https://reviews.llvm.org/D70072
The file was modifiedllvm/lib/Target/ARM/ARMInstrInfo.td
The file was modifiedllvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb2.td
The file was modifiedllvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.h
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was addedllvm/test/CodeGen/ARM/i64_volatile_load_store.ll
Commit 8a397b66b2c672999e9e6d63334d5bffd7db1a3f by cullen.rhodes
[AArch64][SVE] Add support for spilling/filling ZPR2/3/4

Summary:
This patch enables the register allocator to spill/fill lists of 2, 3
and 4 SVE vectors registers to/from the stack. This is implemented with
pseudo instructions that get expanded to individual LDR_ZXI/STR_ZXI
instructions in AArch64ExpandPseudoInsts.

Patch by Sander de Smalen.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D75988
The file was modifiedllvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
The file was modifiedllvm/test/CodeGen/AArch64/spillfill-sve.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.cpp
Commit a0d847c6cdcbe167213d91313577c57073d5c013 by SourabhSingh.Tomar
Fixed bot failure after d20bf5a7258d4b6a7

There were some bot failures due unused funtion `rotateSign`
left in code.

http://lab.llvm.org:8011/builders/clang-ppc64le-rhel/builds/3731

error: unused function 'rotateSign' [-Werror,-Wunused-function]
static uint64_t rotateSign(int64_t I)
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Commit ab95ac013234189ad797f36d95c96b2d0999a653 by flo
[AArch64] Precommit new fp extraction/insertion test.
The file was modifiedllvm/test/CodeGen/AArch64/arm64-neon-copy.ll
Commit d283fc4f9d07a5f3334fe682ccabfc16e8d2933b by sam.mccall
[DebugInfo] Use SplitTemplateClosers (foo<bar<baz> >) in DWARF too

Summary:
D76801 caused some regressions in debuginfo compatibility by changing how
certain functions were named.

For CodeView we try to mirror MSVC exactly: this was fixed in a549c0d00486
For DWARF the situation is murkier. Per David Blaikie:
> In general DWARF doesn't specify this at all.
> [...]
> This isn't the only naming divergence between GCC and Clang

Nevertheless, including the space seems to provide better compatibility with
GCC and GDB. E.g. cpexprs.cc in the GDB testsuite requires this formatting.
And there was no particular desire to change the printing of names in debug
info in the first place (just in diagnostics and other more user-facing text).

Fixes PR46052

Reviewers: dblaikie, labath

Subscribers: aprantl, cfe-commits, dyung

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80554
The file was modifiedclang/test/Modules/ExtDebugInfo.cpp
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was modifiedclang/test/CodeGenCXX/debug-info-template-explicit-specialization.cpp
The file was modifiedclang/test/Modules/ModuleDebugInfo.cpp
Commit ad07d5f39425d4b7013346f4eb52a1e99e6c19a8 by grimar
[yaml2obj] - Implement the "SectionHeaderTable" tag.

With the "SectionHeaderTable" it is now possible to reorder
entries in the section header table.

It also allows to stop emitting the table.

Differential revision: https://reviews.llvm.org/D80002
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp
The file was modifiedllvm/include/llvm/ObjectYAML/ELFYAML.h
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was addedllvm/test/tools/yaml2obj/ELF/section-headers.yaml
Commit bd06c417e6c717cbe33b566d7bbaf27fb47e763a by vsavchenko
[analyzer] Allow bindings of the CompoundLiteralRegion

Summary:
CompoundLiteralRegions have been properly modeled before, but
'getBindingForElement` was not changed to accommodate this change
properly.

rdar://problem/46144644

Differential Revision: https://reviews.llvm.org/D78990
The file was addedclang/test/Analysis/retain-release-compound-literal.m
The file was modifiedclang/unittests/StaticAnalyzer/StoreTest.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/RegionStore.cpp
The file was modifiedclang/test/Analysis/compound-literals.c
Commit bab5dadfcd0fc3a77c47aec7e885e8b70b9f9756 by dmitry.preobrazhensky
[AMDGPU][MC][DISASSEMBLER] Corrected decoder to consume each code fragment only once

Summary: disabled disassembly of successfully decoded fragments of code.

See detailed bug description: https://bugs.llvm.org/show_bug.cgi?id=46101

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D80637
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
Commit a56141b8f9fea112c1ea078c974d91949b6e7a5c by sam.mccall
[clangd] Highlight related control flow.

Summary:
This means e.g. highlighting "return" will show other returns/throws
from the same function, highlighting a case will show all the
return/breaks etc.

This is a bit of an abuse of textDocument/highlight, but seems useful.

Reviewers: adamcz

Subscribers: ilya-biryukov, MaskRay, jkorous, mgrang, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78454
The file was modifiedclang-tools-extra/clangd/unittests/XRefsTests.cpp
The file was modifiedclang-tools-extra/clangd/XRefs.cpp
Commit 45251ef5345b3c81c8f394d42d252de039c72566 by dmitry.preobrazhensky
[AMDGPU][MC] Corrected v_writelane_b32 to fix a decoding bug

Corrected vdst_in to match vdst operand type.
See bug 45193: https://bugs.llvm.org/show_bug.cgi?id=45193

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D80636
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
The file was modifiedllvm/lib/Target/AMDGPU/VOP2Instructions.td
The file was modifiedllvm/lib/Target/AMDGPU/VOP3Instructions.td
Commit f9e94eb8688d1fe1727360462e957fbbfb754e59 by nemanjai
[Clang] Enable _Complex __float128

When I added __float128 a while ago, I neglected to add support for the complex
variant of the type. This patch just adds that.

Differential revision: https://reviews.llvm.org/D80533
The file was modifiedclang/test/CodeGen/ppc64-complex-return.c
The file was modifiedclang/test/CodeGen/ppc64-complex-parms.c
The file was modifiedclang/lib/Sema/DeclSpec.cpp
Commit 84be4278e7966c8747aad48aa49de9bcd9f1d730 by llvm-dev
llvm-dwarfdump.h - remove unnecessary WithColor.h include. NFC.
The file was modifiedllvm/tools/llvm-dwarfdump/llvm-dwarfdump.h
Commit ab5abce23ccf8369c39d734c6279949815a9b9dc by llvm-dev
DWARFDebugMacro.h - remove unnecessary WithColor.h include. NFC.
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFDebugMacro.h
Commit 73ae678363fb42418a8959955d05488191045b31 by llvm-dev
Fix MSVC signed/unsigned comparison warnings. NFC.
The file was modifiedllvm/lib/Support/FileCheck.cpp
Commit f47e27e260e3e06167a7e1de8a4c092b95717e15 by dmitry.preobrazhensky
[AMDGPU][MC][GFX908] Corrected src0 of v_accvgpr_write to accept only VGPRs and inline constants.

This change disables use of special SGPR registers like scc, vccz, execz, etc as operands of v_accvgpr_write.

See bug 45414: https://bugs.llvm.org/show_bug.cgi?id=45414

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D80530
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
The file was modifiedllvm/test/MC/AMDGPU/mai.s
Commit 7716681cfd0ea2dadbddae6f1983e130c2fa4247 by SourabhSingh.Tomar
Fixed bot failure after d20bf5a7258d4b6a7

There was a failure on windows bit due to format mismatch on
different(Hex and Decimal) platforms even if meaning of output is same.

For example on X86 linux =>
DW_OP_plus_uconst 0x70, DW_OP_deref, DW_OP_lit4, DW_OP_mul
              ^
on X86 Windows-gnu =>
DW_AT_location (DW_OP_fbreg +112, DW_OP_deref, DW_OP_lit4, DW_OP_mul)

: error: CHECK-SAME: expected string not found in input
; CHECK-SAME: DW_OP_plus_uconst 0x70, DW_OP_deref, DW_OP_lit4, DW_OP_mul
              ^
<stdin>:28:17: note: scanning from here
DW_AT_location (DW_OP_fbreg +112, DW_OP_deref, DW_OP_lit4, DW_OP_mul)
                ^
<stdin>:28:18: note: possible intended match here
DW_AT_location (DW_OP_fbreg +112, DW_OP_deref, DW_OP_lit4, DW_OP_mul)

Now the test is limited to x86 using REQUIRED and -mtriple.

http://45.33.8.238/win/16214/step_11.txt
The file was modifiedllvm/test/DebugInfo/fortranSubrangeVar.ll
Commit 1ddac9563d7f2414e6c4302f9902ac1294966161 by llvm-dev
[X86][SSE] Peek though MOVMSK source sign bits using SimplifyMultipleUseDemandedBits

Allows SimplifyDemandedBitsForTargetNode to peek through multi-use ops where MOVMSK only demands the signbit of each vector element.
The file was modifiedllvm/test/CodeGen/X86/vec_smulo.ll
The file was modifiedllvm/test/CodeGen/X86/vec_ssubo.ll
The file was modifiedllvm/test/CodeGen/X86/vec_saddo.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit e73bb4fba7092f7e1ef807812063a0f655a185af by frgossen
[MLIR] Move `ConcatOp` to its lexicographic position

Purely cosmetic change.
The operation implementations in `Shape.cpp` are now lexicographic order.

Differential Revision: https://reviews.llvm.org/D80277
The file was modifiedmlir/lib/Dialect/Shape/IR/Shape.cpp
Commit 1a945757ac7debd9ad14497fa404e3900869cad5 by llvm-dev
WithColor.h - reduce unnecessary includes to forward declarations. NFC.
The file was modifiedllvm/include/llvm/Support/WithColor.h
Commit f6417f5db8c16286904d074d1e40e9c1eb083951 by llvm-dev
FileOutputBuffer.h - remove unused includes. NFC.

Move dependent includes down to source files where necessary.
The file was modifiedlld/Common/Strings.cpp
The file was modifiedllvm/lib/Support/FileOutputBuffer.cpp
The file was modifiedllvm/include/llvm/Support/FileOutputBuffer.h
The file was modifiedllvm/lib/DebugInfo/PDB/Native/PDBFileBuilder.cpp
Commit dd484baffdf4a92e564c38a17d35a742e633b0e0 by frgossen
[MLIR] Tidy up documentation for `Shape_JoinOp`, `Shape_ReduceOp`, and
`Shape_ConstSizeOp`

Fix places that refer to `shape.type` instead of `shape.shape`.

Differential Revision: https://reviews.llvm.org/D80278
The file was modifiedmlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
Commit c3098e4f4036e96dbd3de0e61c5e114b0eb7bbb4 by pifon
[MLIR] Add TensorFromElementsOp to Standard ops.

Differential Revision: https://reviews.llvm.org/D80705
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
The file was modifiedmlir/test/IR/invalid-ops.mlir
The file was modifiedmlir/test/IR/core-ops.mlir
The file was modifiedmlir/test/Transforms/canonicalize.mlir
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
Commit 6594d54571ee5887f031555a7660b8d8e74194d3 by frgossen
[MLIR] Add `index_to_size` and `size_to_index` to the shape dialect

Add the two conversion operations `index_to_size` and `size_to_index` to the
shape dialect.
This facilitates the conversion of index types between the shape and the
standard dialect.

Differential Revision: https://reviews.llvm.org/D80280
The file was modifiedmlir/test/Dialect/Shape/canonicalize.mlir
The file was modifiedmlir/lib/Dialect/Shape/IR/Shape.cpp
The file was modifiedmlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
Commit 0da4353938368c1f2473cd24553989f84b964279 by Matthew.Arsenault
AMDGPU: Add baseline test for ptrmask infer address space
The file was addedllvm/test/Transforms/InferAddressSpaces/AMDGPU/ptrmask.ll
Commit d6671ee90c1423eb18c6fab11819df850ae2200d by Matthew.Arsenault
InferAddressSpaces: Handle ptrmask intrinsic

This one is slightly odd since it counts as an address expression,
which previously could never fail. Allow the existing TTI hook to
return the value to use, and re-use it for handling how to handle
ptrmask.

Handles the no-op addrspacecasts for AMDGPU. We could probably do
something better based on analysis of the mask value based on the
address space, but leave that for now.
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/test/Transforms/InferAddressSpaces/AMDGPU/ptrmask.ll
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
Commit fdaa391e3df3c3a555d933122b0ef85eaf5eb63c by frgossen
[MLIR] Add `num_elements` to the shape dialect

The operation `num_elements` determines the number of elements for a given
shape.
That is the product of its dimensions.

Differential Revision: https://reviews.llvm.org/D80281
The file was modifiedmlir/test/Dialect/Shape/canonicalize.mlir
The file was modifiedmlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
The file was modifiedmlir/lib/Dialect/Shape/IR/Shape.cpp
Commit 061fb8eb2d9f6ffa05f2b57670c918c477ca7f36 by whchung
[mlir][gpu][mlir-cuda-runner] Refactor ConvertKernelFuncToCubin to be generic.

Make ConvertKernelFuncToCubin pass to be generic:

- Rename to ConvertKernelFuncToBlob.
- Allow specifying triple, target chip, target features.
- Initializing LLVM backend is supplied by a callback function.
- Lowering process from MLIR module to LLVM module is via another callback.
- Change mlir-cuda-runner to adopt the revised pass.
- Add new tests for lowering to ROCm HSA code object (HSACO).
- Tests for CUDA and ROCm are kept in separate directories.

Differential Revision: https://reviews.llvm.org/D80142
The file was modifiedmlir/include/mlir/Conversion/GPUCommon/GPUCommonPass.h
The file was modifiedmlir/include/mlir/InitAllPasses.h
The file was addedmlir/test/Conversion/GPUToROCm/lit.local.cfg
The file was addedmlir/test/Conversion/GPUToROCm/lower-rocdl-kernel-to-hsaco.mlir
The file was modifiedmlir/tools/mlir-cuda-runner/mlir-cuda-runner.cpp
The file was modifiedmlir/tools/mlir-opt/mlir-opt.cpp
The file was modifiedmlir/lib/Conversion/GPUCommon/CMakeLists.txt
The file was addedmlir/test/lib/Transforms/TestConvertGPUKernelToHsaco.cpp
The file was removedmlir/lib/Conversion/GPUToCUDA/CMakeLists.txt
The file was removedmlir/include/mlir/Conversion/GPUToCUDA/GPUToCUDAPass.h
The file was removedmlir/lib/Conversion/GPUToCUDA/ConvertKernelFuncToCubin.cpp
The file was modifiedmlir/lib/Conversion/CMakeLists.txt
The file was modifiedmlir/test/lib/Transforms/CMakeLists.txt
The file was modifiedmlir/test/lib/Transforms/TestConvertGPUKernelToCubin.cpp
The file was modifiedmlir/test/lit.site.cfg.py.in
The file was modifiedmlir/CMakeLists.txt
The file was addedmlir/lib/Conversion/GPUCommon/ConvertKernelFuncToBlob.cpp
Commit f1ab7550bcd51c353a1cac0303df9bbe960b7eab by frgossen
[MLIR] Fix operand type in `from_extent_tensor` in the shape dialect

The operand of `from_extent_tensor` is now of the same index type as the result
type of the inverse operation `to_extent_tensor`.

Differential Revision: https://reviews.llvm.org/D80283
The file was modifiedmlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
Commit 6c2b7ee2f7fac7b683e343c2c383b7e67fadf9f8 by sam.mccall
Prevent test from failing in my home directory
The file was modifiedclang/test/Headers/nvptx_device_math_macro.cpp
Commit 0ea52537feae4bc64b5cefc3a4c168dc3ad90463 by llvm-dev
SymbolicFile.h - removed unused FileSystem.h include. NFC.

Exposes a number of implicit dependencies that needs fixing in source files and XCOFFObjectFile.h.
The file was modifiedllvm/tools/llvm-objcopy/wasm/Writer.cpp
The file was modifiedllvm/lib/Object/WasmObjectFile.cpp
The file was modifiedllvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp
The file was modifiedllvm/lib/Object/COFFObjectFile.cpp
The file was modifiedllvm/tools/llvm-rc/ResourceFileWriter.cpp
The file was modifiedllvm/include/llvm/Object/SymbolicFile.h
The file was modifiedllvm/include/llvm/Object/XCOFFObjectFile.h
Commit 1a9e0d7092145e33175f628f4cdd28acf0d17100 by Matthew.Arsenault
AMDGPU: Make S_DENORM_MODE not be a scheduling boundary

Now that the mode register uses/defs should be properly modeled, we
don't need to treat the FP mode switch as an arbitrary side effect.
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.td
The file was modifiedllvm/lib/Target/AMDGPU/SOPInstructions.td
Commit cf4d4e366a2165f0e93948f166d76ae650aecc98 by arsenm2
libclc: Compile with -nostdlib

This fixes a build error when compiling for amdgcn-amd-amdhsa, which
defaults to trying to link bitcode libraries.
The file was modifiedlibclc/CMakeLists.txt
Commit 06019e312571c886494d3287e8962e5d5943dab8 by Matthew.Arsenault
AMDGPU: Add missing test for s_denorm_mode scheduling

Forgot to add this file to 1a9e0d7092145e33175f628f4cdd28acf0d17100
The file was addedllvm/test/CodeGen/AMDGPU/schedule-barrier-fpmode.mir
Commit 8e325cfc1456820e2253909e4aa0c3014f1e050c by sam.mccall
[clangd] Work around PS4 -fno-exceptions, easier than disabling tests?
The file was modifiedclang-tools-extra/clangd/unittests/XRefsTests.cpp
Commit 04a96aa3e430a66767732f44acea00c6e13c9f78 by yitzhakm
[ASTMatchers] Add traversal-kind support to `DynTypedMatcher`

Summary:
This patch exposes `TraversalKind` support in the `DynTypedMatcher` API. While
previously, the `match` method supported traversal logic, it was not possible to
set or get the traversal kind.

Reviewers: gribozavr, steveire

Subscribers: hokein, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80685
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersInternalTest.cpp
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchersInternal.h
The file was modifiedclang/lib/ASTMatchers/ASTMatchersInternal.cpp
The file was modifiedclang/unittests/ASTMatchers/CMakeLists.txt
Commit db52a4901096f035b6cda832c4bf4c6ce2ede2f9 by jean-michel.gorius
[mlir] Make translation libraries available through MLIRConfig.cmake
The file was modifiedmlir/cmake/modules/CMakeLists.txt
The file was modifiedmlir/cmake/modules/MLIRConfig.cmake.in
Commit ce5780b88c6e2f3303afd266e5e29c1badd9eb3b by yitzhakm
[libTooling] Fix Transformer to work with ambient traversal kinds.

Summary:
`RewriteRule`'s `applyFirst` was brittle with respect to the default setting of the
`TraversalKind`. This patch builds awareness of traversal kinds directly into
rewrite rules so that they are insensitive to any changes in defaults.

Reviewers: steveire, gribozavr

Subscribers: hokein, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80606
The file was modifiedclang/lib/Tooling/Transformer/RewriteRule.cpp
The file was modifiedclang/include/clang/Tooling/Transformer/RewriteRule.h
The file was modifiedclang/unittests/Tooling/TransformerTest.cpp
Commit f5192d7fb7564c45ff4ec42f359408974b7c8fa2 by jean-michel.gorius
[x86] Propagate memory operands during call frame optimization

Summary:
Propagate memory operands when folding load instructions into instructions that directly operate on memory.

The original revision has been split. See D80140 for the other part of the changes.

Reviewers: craig.topper, rnk, lebedev.ri, efriedma

Reviewed By: craig.topper

Subscribers: lebedev.ri, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80062
The file was modifiedllvm/lib/Target/X86/X86CallFrameOptimization.cpp
The file was addedllvm/test/CodeGen/X86/cf-opt-memops.mir
Commit bb2ae74717a25ba268e7bd17a2a572d931ed094e by vsavchenko
[analyzer] Merge implementations of SymInt, IntSym, and SymSym exprs

Summary:
SymIntExpr, IntSymExpr, and SymSymExpr share a big portion of logic
that used to be duplicated across all three classes.  New
implementation also adds an easy way of introducing another type of
operands into the mix.

Differential Revision: https://reviews.llvm.org/D79156
The file was modifiedclang/lib/StaticAnalyzer/Core/SymbolManager.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/SymbolManager.h
Commit 1f57d76a8dd00611aaa4b33048be195ea9a2dc44 by vsavchenko
[analyzer] Refactor