FailedChanges

Summary

  1. AMDGPU/GlobalISel: Implement LLT version of allowsMisalignedMemoryAccesses (details)
  2. AMDGPU/GlobalISel: Stop using G_EXTRACT in argument lowering (details)
  3. AMDGPU/GlobalISel: Fix trying to widen <3 x s1> boolean ops (details)
  4. AMDGPU/GlobalISel: Implement expansion for rsq.clamp (details)
  5. [XCOFF][AIX] Put each jump table in an independent section if -ffunction-sections is specified (details)
  6. AMDGPU: Fix code duplication between the selectors (details)
  7. AMDGPU/GlobalISel: Move frame index selection to patterns (details)
  8. [PatternMatch] allow intrinsic form of min/max with existing matchers (details)
  9. AMDGPU/GlobalISel: Try to promote to use packed saturating add/sub (details)
  10. AMDGPU/GlobalISel: Handle llvm.amdgcn.ds.{fadd|fmin|fmax} (details)
  11. [ELF] Allow sections after a non-SHF_ALLOC section to be covered by PT_LOAD (details)
  12. PDBExtras.h - remove unnecessary raw_ostream forward declaration. NFCI. (details)
  13. [InstCombine] Add tests for mul(sub(x,y),negpow2) -> mul(sub(y,x),pow2) fold (details)
  14. [lldb][NFC] Document and encapsulate OriginMap in ASTContextMetadata (details)
  15. [OpenMP] Fix ref count dec for implicit map of partial data (details)
Commit 6c7f640bf7ae4bffc460c6af66f3ecd93c3156ed by Matthew.Arsenault
AMDGPU/GlobalISel: Implement LLT version of allowsMisalignedMemoryAccesses
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
Commit 28124a0a636b6218f5439a1ddf87ec09a8a3c1a2 by Matthew.Arsenault
AMDGPU/GlobalISel: Stop using G_EXTRACT in argument lowering

We really need to put this undef padding stuff into a helper
somewhere, but leave that for when this is moved to generic code.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
Commit c015cbc68b80e02b651988855b61b588f5069ef6 by Matthew.Arsenault
AMDGPU/GlobalISel: Fix trying to widen <3 x s1> boolean ops
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
Commit 5a503521e7b757bda70325f4c01bdbc0f4e3128e by Matthew.Arsenault
AMDGPU/GlobalISel: Implement expansion for rsq.clamp

Not sure why we handle this removed instruction on newer subtargets
for this one and no others, but maintain compatibility with the DAG.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.rsq.clamp.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
Commit e5062a6caf754de30b4ecba5bf670ee250f78554 by jasonliu
[XCOFF][AIX] Put each jump table in an independent section if -ffunction-sections is specified

If a function is in a unique section, putting all jump tables in
.rodata will prevent functions that have a jump table to get
garbage collect by the linker.
Therefore, we need to put jump table into a unique section as well.

Reviewed By: Xiangling_L

Differential Revision: https://reviews.llvm.org/D84761
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
Commit d188a608bd89f4792215c6d699f5076fb547685c by Matthew.Arsenault
AMDGPU: Fix code duplication between the selectors

Not sure this is the right place for this helper.
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Commit dcf3ffb0a856264bba56b7fe5b5128537903e50a by Matthew.Arsenault
AMDGPU/GlobalISel: Move frame index selection to patterns

Doesn't really save any code until global value is handled too.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
Commit 60f2c6a94cdff51fb8906030bbb73ba1c90da1c4 by spatel
[PatternMatch] allow intrinsic form of min/max with existing matchers

I skimmed the existing users of these matchers and don't see any problems
(eg, the caller assumes the matched value was a select instruction without checking).

So I think we can generalize the matching to allow the new intrinsics or the cmp+select idioms.

I did not find any unit tests for the matchers, so added some basics there. The instsimplify
tests are adapted from existing tests for the cmp+select pattern and cover the folds in
simplifyICmpWithMinMax().

Differential Revision: https://reviews.llvm.org/D85230
The file was modifiedllvm/test/Transforms/InstSimplify/maxmin_intrinsics.ll
The file was modifiedllvm/unittests/IR/PatternMatch.cpp
The file was modifiedllvm/include/llvm/IR/PatternMatch.h
Commit 63c4be53cf5569369e67b5cd7958e5eb1bfcd85a by Matthew.Arsenault
AMDGPU/GlobalISel: Try to promote to use packed saturating add/sub

This produces worse results right now for i8 vectors, but that should
be addressed when we actually try to optimize packed vectors.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
Commit 63cdc9a49f1fdd7df80dc964bf647f89982a2569 by Matthew.Arsenault
AMDGPU/GlobalISel: Handle llvm.amdgcn.ds.{fadd|fmin|fmax}

These intrinsics are missing mangling for both the pointer and data
type.
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was removedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.fmax.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fmax.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fmin.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td
The file was removedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.fmin.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fadd.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
Commit a6db64ef4a9906c96ef5652739ac15aefaa7827c by i
[ELF] Allow sections after a non-SHF_ALLOC section to be covered by PT_LOAD

GNU ld allows sections after a non-SHF_ALLOC section to be covered by PT_LOAD
(PR37607) and assigns addresses to non-SHF_ALLOC output sections (similar to
SHF_ALLOC NOBITS sections. The location counter is not advanced).

This patch tries to fix PR37607 (remove a special case in
`Writer<ELFT>::createPhdrs`). To make the created PT_LOAD meaningful, we cannot
reset dot to 0 for a middle non-SHF_ALLOC output section. This results in
removal of two special cases in LinkerScript::assignOffsets. Non-SHF_ALLOC
non-orphan sections can have non-zero addresses like in GNU ld.

The zero address rule for non-SHF_ALLOC sections is weakened to apply to orphan
only. This results in a special case in createSection and findOrphanPos, respectively.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D85100
The file was modifiedlld/test/ELF/linkerscript/sections.s
The file was modifiedlld/test/ELF/linkerscript/symbols-non-alloc.test
The file was modifiedlld/ELF/LinkerScript.cpp
The file was modifiedlld/ELF/Writer.cpp
The file was modifiedlld/test/ELF/linkerscript/compress-debug-sections-custom.s
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/Inputs/debug-line-basic.script
Commit b7b1a38d41ca3fc07894c48f050c32d49199972d by llvm-dev
PDBExtras.h - remove unnecessary raw_ostream forward declaration. NFCI.

We already need to include raw_ostream.h, also add missing StringRef.h implicit dependency.
The file was modifiedllvm/include/llvm/DebugInfo/PDB/PDBExtras.h
Commit d1a91d947f49548cf17b21671f9c6ea806e40116 by llvm-dev
[InstCombine] Add tests for mul(sub(x,y),negpow2) -> mul(sub(y,x),pow2) fold

Add full vector coverage (that currently are not folded).
The file was modifiedllvm/test/Transforms/InstCombine/mul.ll
Commit f6913e74400aa932b3edc7cc765495247799fcb0 by Raphael Isemann
[lldb][NFC] Document and encapsulate OriginMap in ASTContextMetadata

Just adds the respective accessor functions to ASTContextMetadata instead
of directly exposing the OriginMap to the whole world.
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.h
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
Commit 518a27e5591c211ceeef3091edc59012e6ace2b2 by jdenny.ornl
[OpenMP] Fix ref count dec for implicit map of partial data

D85342 broke this case.  The new test case presents an example.

Reviewed By: grokos

Differential Revision: https://reviews.llvm.org/D85369
The file was addedopenmp/libomptarget/test/mapping/target_implicit_partial_map.c
The file was modifiedopenmp/libomptarget/src/omptarget.cpp