Changes

[clang-tidy] performance-inefficient-vector-operation: Support proto
repeated field
Summary: Finds calls that add element to protobuf repeated field in a
loop without calling Reserve() before the loop. Calling Reserve() first
can avoid unnecessary memory reallocations.
A new option EnableProto is added to guard this feature.
Patch by Cong Liu!
Reviewers: gribozavr, alexfh, hokein, aaron.ballman
Reviewed By: hokein
Subscribers: lebedev.ri, xazax.hun, Eugene.Zelenko, cfe-commits
Tags: #clang, #clang-tools-extra
Differential Revision: https://reviews.llvm.org/D67135
llvm-svn: 371963

[ELF][ARM] Implement --fix-cortex-a8 to fix erratum 657417
The --fix-cortex-a8 option implements a linker workaround for the 
coretex-a8 erratum 657417. A summary of the erratum conditions is:
- A 32-bit Thumb-2 branch instruction B.w, Bcc.w, BL, BLX spans two 4KiB
regions.
- The destination of the branch is to the first 4KiB region.
- The instruction before the branch is a 32-bit Thumb-2 non-branch 
instruction.
The linker fix is to redirect the branch to a patch not in the first 
4KiB region. The patch forwards the branch on to its target.
The cortex-a8, is an old CPU, with the first implementation of this 
workaround in ld.bfd appearing in 2009. The cortex-a8 has been used in 
early Android Phones and there are some critical applications that still 
need to run on a cortex-a8 that have the erratum. The patch is applied 
roughly 10 times on LLD and 20 on Clang when they are built with
--fix-cortex-a8 on an Arm system.
The formal erratum description is avaliable in the ARM Core Cortex-A8
(AT400/AT401) Errata Notice document. This is available from Arm on 
request but it seems to be findable via a web search.
Differential Revision: https://reviews.llvm.org/D67284
llvm-svn: 371965

gn build: Merge r371965
llvm-svn: 371966

[SVE][Inline-Asm] Add constraints for SVE predicate registers
Summary: Adds the following inline asm constraints for SVE:
 - Upl: One of the low eight SVE predicate registers, P0 to P7 inclusive
 - Upa: SVE predicate register with full range, P0 to P15
Reviewers: t.p.northover, sdesmalen, rovka, momchil.velikov,
cameron.mcinally, greened, rengolin
Reviewed By: rovka
Subscribers: javed.absar, tschuett, rkruppe, psnobl, cfe-commits,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66524
llvm-svn: 371967

Fix the rst doc, unbreak buildbot.
llvm-svn: 371968

Change signature of __builtin_rotateright64 back to unsigned
The signature of __builtin_rotateright64 was by misstake changed from 
unsigned to signed in r360863, this patch will change it back to 
unsigned as intended.
This fixes pr43309
Reviewers: efriedma, hans
Reviewed By: hans
Differential Revision: https://reviews.llvm.org/D67606
llvm-svn: 371969