SuccessChanges

Summary

  1. Update parallelization settings on Linaro builders (details)
Commit 29232eb395bc07838facffcdf4a0ce80a2f93c7a by maxim.kuvyrkov
Update parallelization settings on Linaro builders

Summary:
- Remove -DLLVM_PARALLEL_LINK_JOBS=2 from Linaro builders now running
      on server-class hardware (vs Nvidia TK1 boards with 2GB RAM previously)
    - Reduce testsuite parallelism on Linaro builders from 96 to 32.
      These builders share either a 64-core machine or a 32-core machine,
      so trying for 96-thread parallelism is excessive.

Reviewers: gkistanova, olista01, rovka, yroux

Reviewed By: gkistanova, yroux

Differential Revision: https://reviews.llvm.org/D79161
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)

Summary

  1. [X86] Use SIMD_EXC to remove some let statements in tablegen. NFCI (details)
  2. [X86] Lower sse_cmp_ss/sse2_cmp_sd intrinsics to X86ISD::FSETCC with vector types. (details)
  3. [PGO] Fix computation of function Hash (details)
  4. Automatically configure MLIR when flang is enabled (details)
  5. [OpenMP][AMDGCN] Support OpenMP offloading for AMDGCN architecture - Part 1 (details)
  6. Add test exposing a bug in SimpleLoopUnswitch. (details)
  7. [VE] Dynamic stack allocation (details)
  8. [X86] Add helper function to reduce some code duplication when shrinking a vector load to a vzext_load. (details)
  9. [NFC][Debugify] Format the CheckModuleDebugify output (details)
  10. [DebugInfo] - Fix typo in comment. NFC. (details)
Commit b4978b24445cdc33311bbdb661060f9d9229efe9 by craig.topper
[X86] Use SIMD_EXC to remove some let statements in tablegen. NFCI
The file was modifiedllvm/lib/Target/X86/X86InstrSSE.td
Commit 84cf8ed8fd3f950b6e30225cae6f092da768cbe6 by craig.topper
[X86] Lower sse_cmp_ss/sse2_cmp_sd intrinsics to X86ISD::FSETCC with vector types.

Isel match that instead of the intrinsic. Similar to what we do
for avx512.

Trying to move more intrinsics to target specific ISD opcodes.
Hoping to add DAG combines to shrink simple loads going into
scalar intrinsics that only read 32 or 64 bits.
The file was modifiedllvm/lib/Target/X86/X86InstrFragmentsSIMD.td
The file was modifiedllvm/lib/Target/X86/X86IntrinsicsInfo.h
The file was modifiedllvm/lib/Target/X86/X86InstrSSE.td
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.td
Commit de02a75e398415bad4df27b4547c25b896c8bf3b by sguelton
[PGO] Fix computation of function Hash

And bump its version number accordingly.

This is a patched recommit of 7c298c104bfe725d4315926a656263e8a5ac3054

Previous hash implementation was incorrectly passing an uint64_t, that got converted
to an uint8_t, to finalize the hash computation. This led to different functions
having the same hash if they only differ by the remaining statements, which is
incorrect.

Added a new test case that trivially tests that a small function change is
reflected in the hash value.

Not that as this patch fixes the hash computation, it would invalidate all hashes
computed before that patch applies, this is why we bumped the version number.

Update profile data hash entries due to hash function update, except for binary
version, in which case we keep the buggy behavior for backward compatibility.

Differential Revision: https://reviews.llvm.org/D79961
The file was modifiedclang/test/Profile/Inputs/cxx-throws.proftext
The file was modifiedclang/test/Profile/c-general.c
The file was modifiedclang/docs/ReleaseNotes.rst
The file was addedclang/test/Profile/Inputs/c-general.profdata.v5
The file was addedclang/test/Profile/c-collision.c
The file was modifiedclang/test/Profile/Inputs/misexpect-switch.proftext
The file was modifiedclang/test/Profile/Inputs/c-unprofiled-blocks.proftext
The file was modifiedclang/test/Profile/Inputs/c-general.proftext
The file was modifiedllvm/include/llvm/ProfileData/InstrProf.h
The file was modifiedclang/test/Profile/Inputs/c-counter-overflows.proftext
The file was modifiedclang/lib/CodeGen/CodeGenPGO.cpp
The file was modifiedclang/test/Profile/Inputs/misexpect-switch-default.proftext
The file was modifiedclang/test/Profile/Inputs/cxx-rangefor.proftext
The file was modifiedllvm/include/llvm/ProfileData/InstrProfData.inc
The file was modifiedclang/test/Profile/Inputs/misexpect-switch-nonconst.proftext
Commit 0b5d81e6bbad1656c2e059621948967aaeaa5702 by joker.eph
Automatically configure MLIR when flang is enabled

This is more friendly than the "Unknown CMake command “mlir_tablegen”."
that would be issued instead.

Differential Revision: https://reviews.llvm.org/D80359
The file was modifiedllvm/CMakeLists.txt
Commit 602d9b0afc77828f419869289b159a567c62ae81 by Saiyedul.Islam
[OpenMP][AMDGCN] Support OpenMP offloading for AMDGCN architecture - Part 1

Summary:
Allow AMDGCN as a GPU offloading target for OpenMP during compiler
invocation and allow setting CUDAMode for it.

Originally authored by Greg Rodgers (@gregrodgers).

Reviewers: ronlieb, yaxunl, b-sumner, scchan, JonChesterfield, jdoerfert, sameerds, msearles, hliao, arsenm

Reviewed By: sameerds

Subscribers: sstefan1, jvesely, wdng, arsenm, guansong, dexonsmith, cfe-commits, llvm-commits, gregrodgers

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D79754
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/test/Driver/openmp-offload-gpu.c
The file was addedclang/test/OpenMP/amdgcn_device_function_call.cpp
The file was modifiedllvm/include/llvm/ADT/Triple.h
The file was modifiedclang/test/OpenMP/target_parallel_no_exceptions.cpp
The file was modifiedclang/lib/AST/Decl.cpp
Commit fc44da746faab5c0ad20e9de8b8fca43b7c5f408 by suc-daniil
Add test exposing a bug in SimpleLoopUnswitch.
The file was addedllvm/test/Transforms/SimpleLoopUnswitch/dead-blocks-uses-in-unreachablel-blocks.ll
Commit dedaf3a2ac59548c70a0d54da7267bbb082782c0 by simon.moll
[VE] Dynamic stack allocation

Summary:
This patch implements dynamic stack allocation for the VE target. Changes:
* compiler-rt: `__ve_grow_stack` to request stack allocation on the VE.
* VE: base pointer support, dynamic stack allocation.

Differential Revision: https://reviews.llvm.org/D79084
The file was modifiedllvm/lib/Target/VE/VESubtarget.h
The file was modifiedllvm/lib/Target/VE/VEISelLowering.cpp
The file was addedcompiler-rt/lib/builtins/ve/grow_stack.S
The file was modifiedcompiler-rt/cmake/builtin-config-ix.cmake
The file was modifiedcompiler-rt/cmake/Modules/CompilerRTUtils.cmake
The file was addedllvm/test/CodeGen/VE/alloca.ll
The file was addedllvm/test/CodeGen/VE/alloca_aligned.ll
The file was modifiedllvm/lib/Target/VE/VERegisterInfo.cpp
The file was modifiedcompiler-rt/lib/builtins/CMakeLists.txt
The file was modifiedllvm/lib/Target/VE/VECallingConv.td
The file was modifiedllvm/lib/Target/VE/VEFrameLowering.cpp
The file was modifiedllvm/lib/Target/VE/VEInstrInfo.td
The file was addedcompiler-rt/lib/builtins/ve/grow_stack_align.S
The file was modifiedcompiler-rt/cmake/base-config-ix.cmake
The file was modifiedllvm/lib/Target/VE/VEFrameLowering.h
The file was modifiedllvm/lib/Target/VE/VEISelLowering.h
The file was modifiedllvm/lib/Target/VE/VEInstrInfo.cpp
The file was modifiedllvm/lib/Target/VE/VEInstrInfo.h
Commit a1dfd6d828ac4f8e11e8013b952f0ef080890dcf by craig.topper
[X86] Add helper function to reduce some code duplication when shrinking a vector load to a vzext_load.

There's more code for calling CombineTo and replacing the nodes
that I'd like to share, but its complicated by the getNode call
in the middle that needs to be specific to each opcode.

While there are also make sure we recursively delete the load
we're replacing. It eventually gets removed by a RemoveDeadNodes
call at the end of DAG combine, but we should be more eager about
it. We were inconsistently doing this in some places but not all.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 65030821d4a6af94b84a33e66a40c08ca26f1526 by djordje.todorovic
[NFC][Debugify] Format the CheckModuleDebugify output

This fixes the output of the check-debugify option.
Without the patch an example of running the option:

$ opt -check-debugify test.ll -S -o testDebugify.ll
CheckModuleDebugifySkipping module without debugify metadata

After the patch:

$ opt -check-debugify test.ll -S -o testDebugify.ll
CheckModuleDebugify: Skipping module without debugify metadata

Differential Revision: https://reviews.llvm.org/D80553
The file was modifiedllvm/lib/Transforms/Utils/Debugify.cpp
Commit 84c643358691b8057199e8c8597428ad0d960786 by grimar
[DebugInfo] - Fix typo in comment. NFC.

I've forgot to address this bit when landed D80476.
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp

Summary

  1. Update parallelization settings on Linaro builders (details)
Commit 29232eb395bc07838facffcdf4a0ce80a2f93c7a by maxim.kuvyrkov
Update parallelization settings on Linaro builders

Summary:
- Remove -DLLVM_PARALLEL_LINK_JOBS=2 from Linaro builders now running
      on server-class hardware (vs Nvidia TK1 boards with 2GB RAM previously)
    - Reduce testsuite parallelism on Linaro builders from 96 to 32.
      These builders share either a 64-core machine or a 32-core machine,
      so trying for 96-thread parallelism is excessive.

Reviewers: gkistanova, olista01, rovka, yroux

Reviewed By: gkistanova, yroux

Differential Revision: https://reviews.llvm.org/D79161
The file was modifiedbuildbot/osuosl/master/config/builders.py