Started 1 mo 13 days ago
Took 3 hr 13 min

Success Build #1756 (Jul 2, 2020 9:42:16 PM)

Changes
  1. [NFC][ScalarEvolution] Add udiv-disguised-as-sdiv test (details)
  2. Revert "[flang][openmp] Use common Directive and Clause enum from llvm/Frontend" (details)
  3. [AMDGPU] Limit promote alloca to vector with VGPR budget (details)
  4. AMDGPU: Fix missing tracksRegLiveness in tests (details)
  5. RegAllocGreedy: Use TargetInstrInfo already in the class (details)
  6. AMDGPU: Set more mov flags on V_ACCVGPR_{READ|WRITE}_B32 (details)
  7. [NFCI] Actually provide correct check lines in sdiv.ll (details)
  8. clang CoverageMapping tests bot cleanup (details)
  9. typo fixes to cycle bots (details)
  10. Update lto.ll test after 3367e9da enabled multibyte NOPs in 64-bit mode. (details)
  11. Revert "Update lto.ll test after 3367e9da enabled multibyte NOPs in 64-bit mode." (details)
  12. [gcov] Move llvm_writeout_files from atexit to a static destructor (details)
  13. [flang][NFC] Get formatting in sync with latest clang-format (details)
  14. [mlir][NFC] Move conversion of scf to spir-v ops in their own file (details)
  15. [mlir][spirv] Add support for lowering scf.for scf/if with return value (details)
  16. [PowerPC] Exploit xxspltiw and xxspltidp instructions (details)
  17. [flang] Add more support for alternate returns (details)
  18. [PowerPC][NFC] Update doc for FeatureISA3_1/FeatureISA3_0 definitions (details)
  19. [X86-64] Support Intel AMX instructions (details)
  20. [flang][openmp] Use common Directive and Clause enum from llvm/Frontend (details)
  21. [PowerPC]Implement Vector Shift Double Bit Immediate Builtins (details)
  22. [lld-macho] Make sure ZeroFill sections are at the end of their segments (details)
  23. [AMDGPU] Control num waves per EU for implicit work-group size (details)
  24. [lldb/ObjCRuntime] Implement support for small method lists (details)
  25. [lldb/ObjC] Add support for direct selector references (details)
  26. [lldb/build.py] Always pass an SDK to the compiler on Darwin (details)
  27. lld/MachO: Remove a useless temporary (details)
  28. ld64.lld: Add janky support for tbd files (details)
  29. [mlir][OpFormatGen] Add support for resolving variadic types from non-variadic (details)
  30. Add parenthesized expression to SyntaxTree (details)
  31. This patch adds basic debug info support with basic block sections. (details)
  32. [clang] Re-add deleted forward declaration. (details)
  33. [X86] Enable multibyte NOPs in 64-bit mode for padding/alignment. (details)
  34. [lldb][NFC] Fix a variable name in ClangDiagnosticManagerAdapter (details)
  35. Revert "[clang-tidy] For `run-clang-tidy.py` escape the paths that are used for analysis." (details)
  36. [CodeGen] Fix warnings in getCopyToPartsVector (details)
  37. Fix missing build dependency on omp_gen. (details)
  38. [ARM] Rearrange SizeReduction when using -Oz (details)
  39. [NFC] Fix typo in triples from unkown to unknown (details)
  40. [lldb][NFC] Don't pass around passthrough from ClangDiagnosticManagerAdapter (details)
  41. [SVE] ACLE: Fix builtins for svdup_lane_bf16 and svcvtnt_bf16_f32_x (details)
  42. [AArch64][SVE] Add unpred load/store patterns for bf16 types (details)
  43. [CodeGen][SVE] Don't drop scalable flag in DAGCombiner::visitEXTRACT_SUBVECTOR (details)
  44. [AMDGPU] Fix formatting in MIR tests (details)
  45. DSE: fix builtin function recognition to take decl into account (details)
  46. [Support][Windows] Prevent 2s delay when renaming a file that does not exist (details)
  47. [SVE] Add warnings checks in four more LLVM SVE tests (details)
  48. [VE] Rename VE toolchain source files (details)
  49. [gn build] Port 804d9687443 (details)
  50. [BasicAA] New basic-aa-recphi test. NFC (details)
  51. [ScalarEvolution] createSCEV(): recognize `udiv`/`urem` disguised as an `sdiv`/`srem` (details)
  52. Regenerate llvm/test/CodeGen/X86/optimize-max-0.ll (details)
  53. [LV] Enable the LoopVectorizer to create pointer inductions (details)
  54. Fix some typos (unkown -> unknown); NFC (details)
  55. Regenerate apint-shift tests and replace %tmp variable names to silence update_test_checks warnings (details)
  56. [InstCombine] Add some (vXi1 trunc(lshr(x,c))) -> icmp_eq(and(x,c')) tests for non-uniform vectors (details)
  57. [AArch64][SVE] Add reg+imm addressing mode for unpredicated stores (details)
  58. [Alignment][NFC] VectorLayout now uses Align internally (details)
  59. [Alignment][NFC] Transition and simplify calls to DL::getABITypeAlignment (details)
  60. [NFC][clang] Add missing VALIDATE_DIAG_SIZE() (details)
  61. [clangd] Switch FindSymbolsTests to use TestTU (details)
  62. [analyzer][StdLibraryFunctionsChecker] Add POSIX file handling functions (details)
  63. [lldb] Skip TestLimitDebugInfo on windows (details)
  64. [clang] Fix a null-NSS-access crash in DependentNameType. (details)
  65. [BasicAA] Fix recursive phi MustAlias calculations (details)
  66. [flang] Add changes to codegen to convert it to tablegen passes. (details)
  67. [flang] Add inliner pass. (details)
  68. [clang][Serialization] Don't duplicate the body of LambdaExpr during deserialization (details)
  69. [AArch64][SVE] Put zeroing pseudos and patterns under flag. (details)
  70. Regenerate sext/trunc tests and replace %tmp variable names to silence update_test_checks warnings (details)
  71. call ::pthread_detach on llvm_execute_on_thread_impl (details)
  72. [lldb] Add a host-independent test for handling -flimit-debug-info (details)
  73. [ASTMatchers] Enhanced support for matchers taking Regex arguments (details)
  74. Fix missing build dependencies on omp_gen (details)
  75. [AMDGPU][CODEGEN] Added support of new inline assembler constraints (details)
  76. [MLIR] Exact integer emptiness checks for FlatAffineConstraints (details)
  77. [ASTImporter] Add unittest case for friend decl import (details)
  78. Preserve GlobalsAA analysis result in LowerConstantIntrinsics (details)
  79. [ELF][test] Add some additional .eh_frame/.eh_frame_hdr testing (details)
  80. [InstCombine] Add some (vXi1 trunc(lshr(x,c))) -> icmp_eq(and(x,c')) tests for vectors with undef elements (details)
  81. [InstCombine] Add (vXi1 trunc(lshr(x,c))) -> icmp_eq(and(x,c')) support for non-uniform vectors (details)
  82. [AArch64][SVE] NFC: Rename isOrig -> isReverseInstr (details)
  83. [lldb] Fix type conversion in the Scalar getters (details)
  84. [InstCombine] Add some sext/trunc tests to show missing support for non-uniform vectors (details)
  85. [MLIR][SPIRVToLLVM] Implementation of spv.BitFieldInsert pattern (details)
  86. [MLIR][SPIRVToLLVM] SPIR-V function call conversion pattern (details)
  87. [MLIR][SPIRV] Support two memory access attributes in OpCopyMemory. (details)
  88. [PowerPC] Remove undefs from splat input when changing shuffle mask (details)
  89. [LLD] Add required dependency after shared libs break due to ba5087f13025 (details)
  90. [OpenMP][CMake] Fix version detection of testing compiler (details)
  91. [OpenMPOpt][Fix] Remove double initialization of omp::types. (details)
  92. [NewPM][LSR] Rename strength-reduce -> loop-reduce (details)
  93. [gn build] make building on an arm mac work (details)
  94. [MLIR][SPIRVToLLVM] Convert spv.constant scalars and vectors (details)
  95. [NewPM] Add -basic-aa to pr33196.ll (details)
  96. [clang][NFC] Store a pointer to the ASTContext in ASTDumper and TextNodeDumper (details)
  97. [DebugInfo] Fix LineTest byteswap for cross-targeting builds (details)
  98. Revert "[clang][NFC] Store a pointer to the ASTContext in ASTDumper and TextNodeDumper" (details)
  99. [flang] Fix bug determining alternate return (details)
  100. [flang] Clean up binary dependences of runtime libraries (details)
  101. ld64.lld: Make janky support for tbd files actually work sometimes (details)
  102. [PowerPC]Implement Vector Permute Extended Builtin (details)
  103. Revert "[MLIR][SPIRV] Support two memory access attributes in OpCopyMemory." (details)
  104. [X86] Add test cases for v32i8 rotate with min-legal-vector-width=256 (details)
  105. [X86] Modify the conditions for when we stop making v16i8/v32i8 rotate Custom based on having avx512 features. (details)
  106. [x86] add tests for vector select with bit-test condition; NFC (details)
  107. [mlir] [VectorOps] Add choice between dot and axpy lowering of vector.contract (details)
  108. [InstSimplify] Add test for sext/zext comparisons (NFC) (details)
  109. [test] Deflake test/profile/ContinuousSyncMode/online-merging.c (details)
  110. [X86] Add test case for unfolding broadcast load from vpternlog. (details)
  111. [X86] Add vpternlog to the broadcast unfolding table. (details)
  112. [PowerPC]Add Vector Insert Instruction Definitions and MC Test (details)
  113. [SelectionDAG] don't split branch on logic-of-vector-compares (details)
  114. [x86] remove redundant tests with no check lines; NFC (details)
  115. Fix typo and check commit access. (details)
  116. [PowerPC] Implement Vector Blend Builtins in LLVM/Clang (details)
  117. [flang] External I/O runtime work, repackaged (part 1) (details)
  118. [X86] Teach lower512BitShuffle to try bitmask and bitblend before splitting v32i16/v64i8 on av512f only targets. (details)
  119. [gn build] get everything to build when llvm_targets_to_build is just AArch64 (details)
  120. [NFC][Scalarizer] Add some insertelement/extractelement tests (details)
  121. [NFC][Scalarizer] Also scalarize loads in newly-added tests (details)
  122. [flang] External I/O runtime work, repackaged (part 2) (details)
  123. [AMDGPU] Unify early PS termination blocks (details)
  124. [AMDGPU] Insert PS early exit at end of control flow (details)
  125. [PowerPC][NFC] Refactor lowerDynamicAlloc (details)
  126. Revert "[AMDGPU] Insert PS early exit at end of control flow" (details)
  127. [lld-macho] Support binding dysyms to any section (details)
  128. [PowerPC][NFC] Prevent unused error when assertion is disabled. (details)

Started by upstream project LLDB Incremental build number 22152
originally caused by:

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Started by user Azharuddin Mohammed

Rebuilds build #1,755

This run spent:

  • 3 ms waiting;
  • 3 hr 13 min build duration;
  • 3 hr 13 min total from scheduled to completion.
Revision: ac4c27ddd9bf6b75f4430476a1f63a3377b38f2c
  • refs/remotes/origin/master
Revision: d8921a80052575bb2b9cb345e81e8e22d6c6f516
  • refs/remotes/origin/master
Revision: ac4c27ddd9bf6b75f4430476a1f63a3377b38f2c
  • refs/remotes/origin/master
Test Result (no failures)
    Revision: 6a075b6de4cafebec9ca1ff9eec7229a617c93f6
    • llvmorg-5.0.2
    Revision: d0d8eb2e5415b8be29343e3c17a18e49e67b5551
    • llvmorg-7.0.1
    Revision: 0399d5a9682b3cef71c653373e38890c63c4c365
    • llvmorg-9.0.0