SuccessChanges

Summary

  1. [NFC][ScalarEvolution] Add udiv-disguised-as-sdiv test (details)
  2. Revert "[flang][openmp] Use common Directive and Clause enum from llvm/Frontend" (details)
  3. [AMDGPU] Limit promote alloca to vector with VGPR budget (details)
  4. AMDGPU: Fix missing tracksRegLiveness in tests (details)
  5. RegAllocGreedy: Use TargetInstrInfo already in the class (details)
  6. AMDGPU: Set more mov flags on V_ACCVGPR_{READ|WRITE}_B32 (details)
  7. [NFCI] Actually provide correct check lines in sdiv.ll (details)
  8. clang CoverageMapping tests bot cleanup (details)
  9. typo fixes to cycle bots (details)
  10. Update lto.ll test after 3367e9da enabled multibyte NOPs in 64-bit mode. (details)
  11. Revert "Update lto.ll test after 3367e9da enabled multibyte NOPs in 64-bit mode." (details)
  12. [gcov] Move llvm_writeout_files from atexit to a static destructor (details)
  13. [flang][NFC] Get formatting in sync with latest clang-format (details)
  14. [mlir][NFC] Move conversion of scf to spir-v ops in their own file (details)
  15. [mlir][spirv] Add support for lowering scf.for scf/if with return value (details)
  16. [PowerPC] Exploit xxspltiw and xxspltidp instructions (details)
  17. [flang] Add more support for alternate returns (details)
  18. [PowerPC][NFC] Update doc for FeatureISA3_1/FeatureISA3_0 definitions (details)
  19. [X86-64] Support Intel AMX instructions (details)
  20. [flang][openmp] Use common Directive and Clause enum from llvm/Frontend (details)
  21. [PowerPC]Implement Vector Shift Double Bit Immediate Builtins (details)
  22. [lld-macho] Make sure ZeroFill sections are at the end of their segments (details)
  23. [AMDGPU] Control num waves per EU for implicit work-group size (details)
  24. [lldb/ObjCRuntime] Implement support for small method lists (details)
  25. [lldb/ObjC] Add support for direct selector references (details)
  26. [lldb/build.py] Always pass an SDK to the compiler on Darwin (details)
  27. lld/MachO: Remove a useless temporary (details)
  28. ld64.lld: Add janky support for tbd files (details)
  29. [mlir][OpFormatGen] Add support for resolving variadic types from non-variadic (details)
  30. Add parenthesized expression to SyntaxTree (details)
  31. This patch adds basic debug info support with basic block sections. (details)
  32. [clang] Re-add deleted forward declaration. (details)
  33. [X86] Enable multibyte NOPs in 64-bit mode for padding/alignment. (details)
  34. [lldb][NFC] Fix a variable name in ClangDiagnosticManagerAdapter (details)
  35. Revert "[clang-tidy] For `run-clang-tidy.py` escape the paths that are used for analysis." (details)
  36. [CodeGen] Fix warnings in getCopyToPartsVector (details)
  37. Fix missing build dependency on omp_gen. (details)
  38. [ARM] Rearrange SizeReduction when using -Oz (details)
  39. [NFC] Fix typo in triples from unkown to unknown (details)
  40. [lldb][NFC] Don't pass around passthrough from ClangDiagnosticManagerAdapter (details)
  41. [SVE] ACLE: Fix builtins for svdup_lane_bf16 and svcvtnt_bf16_f32_x (details)
  42. [AArch64][SVE] Add unpred load/store patterns for bf16 types (details)
  43. [CodeGen][SVE] Don't drop scalable flag in DAGCombiner::visitEXTRACT_SUBVECTOR (details)
  44. [AMDGPU] Fix formatting in MIR tests (details)
  45. DSE: fix builtin function recognition to take decl into account (details)
  46. [Support][Windows] Prevent 2s delay when renaming a file that does not exist (details)
  47. [SVE] Add warnings checks in four more LLVM SVE tests (details)
  48. [VE] Rename VE toolchain source files (details)
  49. [gn build] Port 804d9687443 (details)
  50. [BasicAA] New basic-aa-recphi test. NFC (details)
  51. [ScalarEvolution] createSCEV(): recognize `udiv`/`urem` disguised as an `sdiv`/`srem` (details)
  52. Regenerate llvm/test/CodeGen/X86/optimize-max-0.ll (details)
  53. [LV] Enable the LoopVectorizer to create pointer inductions (details)
  54. Fix some typos (unkown -> unknown); NFC (details)
  55. Regenerate apint-shift tests and replace %tmp variable names to silence update_test_checks warnings (details)
  56. [InstCombine] Add some (vXi1 trunc(lshr(x,c))) -> icmp_eq(and(x,c')) tests for non-uniform vectors (details)
  57. [AArch64][SVE] Add reg+imm addressing mode for unpredicated stores (details)
  58. [Alignment][NFC] VectorLayout now uses Align internally (details)
  59. [Alignment][NFC] Transition and simplify calls to DL::getABITypeAlignment (details)
  60. [NFC][clang] Add missing VALIDATE_DIAG_SIZE() (details)
  61. [clangd] Switch FindSymbolsTests to use TestTU (details)
  62. [analyzer][StdLibraryFunctionsChecker] Add POSIX file handling functions (details)
  63. [lldb] Skip TestLimitDebugInfo on windows (details)
  64. [clang] Fix a null-NSS-access crash in DependentNameType. (details)
  65. [BasicAA] Fix recursive phi MustAlias calculations (details)
  66. [flang] Add changes to codegen to convert it to tablegen passes. (details)
  67. [flang] Add inliner pass. (details)
  68. [clang][Serialization] Don't duplicate the body of LambdaExpr during deserialization (details)
  69. [AArch64][SVE] Put zeroing pseudos and patterns under flag. (details)
  70. Regenerate sext/trunc tests and replace %tmp variable names to silence update_test_checks warnings (details)
  71. call ::pthread_detach on llvm_execute_on_thread_impl (details)
  72. [lldb] Add a host-independent test for handling -flimit-debug-info (details)
  73. [ASTMatchers] Enhanced support for matchers taking Regex arguments (details)
  74. Fix missing build dependencies on omp_gen (details)
  75. [AMDGPU][CODEGEN] Added support of new inline assembler constraints (details)
  76. [MLIR] Exact integer emptiness checks for FlatAffineConstraints (details)
  77. [ASTImporter] Add unittest case for friend decl import (details)
  78. Preserve GlobalsAA analysis result in LowerConstantIntrinsics (details)
  79. [ELF][test] Add some additional .eh_frame/.eh_frame_hdr testing (details)
  80. [InstCombine] Add some (vXi1 trunc(lshr(x,c))) -> icmp_eq(and(x,c')) tests for vectors with undef elements (details)
  81. [InstCombine] Add (vXi1 trunc(lshr(x,c))) -> icmp_eq(and(x,c')) support for non-uniform vectors (details)
  82. [AArch64][SVE] NFC: Rename isOrig -> isReverseInstr (details)
  83. [lldb] Fix type conversion in the Scalar getters (details)
  84. [InstCombine] Add some sext/trunc tests to show missing support for non-uniform vectors (details)
  85. [MLIR][SPIRVToLLVM] Implementation of spv.BitFieldInsert pattern (details)
  86. [MLIR][SPIRVToLLVM] SPIR-V function call conversion pattern (details)
  87. [MLIR][SPIRV] Support two memory access attributes in OpCopyMemory. (details)
  88. [PowerPC] Remove undefs from splat input when changing shuffle mask (details)
  89. [LLD] Add required dependency after shared libs break due to ba5087f13025 (details)
  90. [OpenMP][CMake] Fix version detection of testing compiler (details)
  91. [OpenMPOpt][Fix] Remove double initialization of omp::types. (details)
  92. [NewPM][LSR] Rename strength-reduce -> loop-reduce (details)
  93. [gn build] make building on an arm mac work (details)
  94. [MLIR][SPIRVToLLVM] Convert spv.constant scalars and vectors (details)
  95. [NewPM] Add -basic-aa to pr33196.ll (details)
  96. [clang][NFC] Store a pointer to the ASTContext in ASTDumper and TextNodeDumper (details)
  97. [DebugInfo] Fix LineTest byteswap for cross-targeting builds (details)
  98. Revert "[clang][NFC] Store a pointer to the ASTContext in ASTDumper and TextNodeDumper" (details)
  99. [flang] Fix bug determining alternate return (details)
  100. [flang] Clean up binary dependences of runtime libraries (details)
  101. ld64.lld: Make janky support for tbd files actually work sometimes (details)
  102. [PowerPC]Implement Vector Permute Extended Builtin (details)
  103. Revert "[MLIR][SPIRV] Support two memory access attributes in OpCopyMemory." (details)
  104. [X86] Add test cases for v32i8 rotate with min-legal-vector-width=256 (details)
  105. [X86] Modify the conditions for when we stop making v16i8/v32i8 rotate Custom based on having avx512 features. (details)
  106. [x86] add tests for vector select with bit-test condition; NFC (details)
  107. [mlir] [VectorOps] Add choice between dot and axpy lowering of vector.contract (details)
  108. [InstSimplify] Add test for sext/zext comparisons (NFC) (details)
  109. [test] Deflake test/profile/ContinuousSyncMode/online-merging.c (details)
  110. [X86] Add test case for unfolding broadcast load from vpternlog. (details)
  111. [X86] Add vpternlog to the broadcast unfolding table. (details)
  112. [PowerPC]Add Vector Insert Instruction Definitions and MC Test (details)
  113. [SelectionDAG] don't split branch on logic-of-vector-compares (details)
  114. [x86] remove redundant tests with no check lines; NFC (details)
  115. Fix typo and check commit access. (details)
  116. [PowerPC] Implement Vector Blend Builtins in LLVM/Clang (details)
  117. [flang] External I/O runtime work, repackaged (part 1) (details)
  118. [X86] Teach lower512BitShuffle to try bitmask and bitblend before splitting v32i16/v64i8 on av512f only targets. (details)
  119. [gn build] get everything to build when llvm_targets_to_build is just AArch64 (details)
  120. [NFC][Scalarizer] Add some insertelement/extractelement tests (details)
  121. [NFC][Scalarizer] Also scalarize loads in newly-added tests (details)
  122. [flang] External I/O runtime work, repackaged (part 2) (details)
  123. [AMDGPU] Unify early PS termination blocks (details)
  124. [AMDGPU] Insert PS early exit at end of control flow (details)
  125. [PowerPC][NFC] Refactor lowerDynamicAlloc (details)
  126. Revert "[AMDGPU] Insert PS early exit at end of control flow" (details)
  127. [lld-macho] Support binding dysyms to any section (details)
  128. [PowerPC][NFC] Prevent unused error when assertion is disabled. (details)
Commit 51ff7642a33f73518d60909e3fe4e6348dcc7b27 by lebedev.ri
[NFC][ScalarEvolution] Add udiv-disguised-as-sdiv test

Much like 25521150d7b577f6f1b402826f2afbb0ec5fb59b,
but with division instead of remainder.

See https://reviews.llvm.org/D82721
The file was addedllvm/test/Analysis/ScalarEvolution/sdiv.ll
Commit 5c37b2a5eee49df2545a6455eec64fb4b105df40 by clementval
Revert "[flang][openmp] Use common Directive and Clause enum from llvm/Frontend"

This reverts commit 7f1e7767952233d1b6af1feef1371d127de5fa50.
The file was modifiedflang/lib/Parser/unparse.cpp
The file was modifiedflang/include/flang/Parser/dump-parse-tree.h
The file was modifiedflang/lib/Parser/CMakeLists.txt
The file was modifiedflang/lib/Semantics/check-omp-structure.cpp
The file was modifiedflang/lib/Semantics/check-omp-structure.h
The file was modifiedflang/tools/f18-parse-demo/CMakeLists.txt
The file was modifiedflang/lib/Parser/openmp-parsers.cpp
The file was modifiedflang/include/flang/Common/enum-set.h
The file was modifiedflang/include/flang/Parser/parse-tree.h
The file was modifiedflang/lib/Semantics/resolve-names.cpp
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMP.td
The file was modifiedflang/lib/Evaluate/CMakeLists.txt
The file was modifiedflang/lib/Semantics/CMakeLists.txt
Commit 54e2dc7537dd62a70d76883197e3007cadf060aa by Stanislav.Mekhanoshin
[AMDGPU] Limit promote alloca to vector with VGPR budget

Allow only up to 1/4 of available VGPRs for the vectorization
of any given alloca.

Differential Revision: https://reviews.llvm.org/D82990
The file was addedllvm/test/CodeGen/AMDGPU/vector-alloca-limits.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
Commit a230f1db3f2a4c661308837859a4ed0513a9ceee by Matthew.Arsenault
AMDGPU: Fix missing tracksRegLiveness in tests

I have no idea why this is considered optional, or why it's not the
default. Also add uses of the copied registers for more useful
liveness testing.
The file was modifiedllvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
Commit afb3bd9914fd39476630dcb521496cfbff7e12c9 by Matthew.Arsenault
RegAllocGreedy: Use TargetInstrInfo already in the class
The file was modifiedllvm/lib/CodeGen/RegAllocGreedy.cpp
Commit d2e74fad20bf8cf66ff20a43fe2934d71e046528 by Matthew.Arsenault
AMDGPU: Set more mov flags on V_ACCVGPR_{READ|WRITE}_B32

This fixes extra copies when materializing constants in AGPRs. This
made it a lot harder to trigger the spilling in spill-agpr.ll
The file was modifiedllvm/lib/Target/AMDGPU/VOP3PInstructions.td
The file was addedllvm/test/CodeGen/AMDGPU/agpr-remat.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-agpr.ll
Commit e7da7d94282a940a62f20ecb9b9c827256810322 by lebedev.ri
[NFCI] Actually provide correct check lines in sdiv.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/sdiv.ll
Commit 9fc877213e075a76831fe71291d7c072c64c27e3 by xun
clang CoverageMapping tests bot cleanup

Summary:
D82928 generated unexpected tmp files in the CoverageMapping test directory. This patch cleans it up and remove the file in the test bots.
It will be revered after a week.

Reviewers: thakis

Reviewed By: thakis

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82992
The file was modifiedclang/test/CoverageMapping/coroutine.cpp
Commit ac8d059c8e80fc84d16ad79d08e25010ffa114c2 by thakis
typo fixes to cycle bots
The file was modifiedclang/docs/MatrixTypes.rst
Commit 79f6a814ab9383094a5ffea75bb7aca55292ff15 by douglas.yung
Update lto.ll test after 3367e9da enabled multibyte NOPs in 64-bit mode.

This should fix the PS4 linux build bot:
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/70409
The file was modifiedlld/test/COFF/lto.ll
Commit 6f13299c02d4c9d8a3f1cd81e8b02c91d5a2fe66 by douglas.yung
Revert "Update lto.ll test after 3367e9da enabled multibyte NOPs in 64-bit mode."

This reverts commit 79f6a814ab9383094a5ffea75bb7aca55292ff15.

Didn't notice that someone had reverted the commit that caused the problem.
The file was modifiedlld/test/COFF/lto.ll
Commit 48c196f5c8b339c347d0a4ecf944c942fa5df765 by maskray
[gcov] Move llvm_writeout_files from atexit to a static destructor

atexit registered functions run earlier so `__attribute__((destructor))`
annotated functions cannot be tracked.

Set a priority of 100 (compatible with GCC 7 onwards) to track
destructors and destructors whose priorities are greater than 100.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=7970

Reviewed By: calixte, marco-c

Differential Revision: https://reviews.llvm.org/D82253
The file was modifiedcompiler-rt/lib/profile/GCDAProfiling.c
The file was addedcompiler-rt/test/profile/Posix/gcov-destructor.c
Commit dd904082625b4fd83f90647952dabee93ef5e990 by tkeith
[flang][NFC] Get formatting in sync with latest clang-format

flang/module only contains Fortran files and one is a .h so disable
formatting on that directory.

Differential Revision: https://reviews.llvm.org/D82989
The file was modifiedflang/lib/Semantics/check-data.cpp
The file was modifiedflang/lib/Lower/ConvertType.cpp
The file was modifiedflang/runtime/edit-output.cpp
The file was modifiedflang/include/flang/Parser/characters.h
The file was modifiedflang/lib/Semantics/canonicalize-do.cpp
The file was modifiedflang/lib/Semantics/expression.cpp
The file was modifiedflang/include/flang/Semantics/scope.h
The file was modifiedflang/lib/Evaluate/fold-integer.cpp
The file was addedflang/module/.clang-format
The file was modifiedflang/runtime/memory.h
The file was modifiedflang/include/flang/Lower/AbstractConverter.h
Commit fbce9855e9d5483f724d231dd4ecc2b79807d217 by thomasraoux
[mlir][NFC] Move conversion of scf to spir-v ops in their own file

Move patterns for scf to spir-v ops in their own file/folder.

Differential Revision: https://reviews.llvm.org/D82914
The file was addedmlir/include/mlir/Conversion/SCFToSPIRV/SCFToSPIRV.h
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRVPass.cpp
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/CMakeLists.txt
The file was addedmlir/lib/Conversion/SCFToSPIRV/CMakeLists.txt
The file was addedmlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp
The file was modifiedmlir/lib/Conversion/CMakeLists.txt
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp
Commit 0670f855a7d8f48a86d67d83e6be45fab016f080 by thomasraoux
[mlir][spirv] Add support for lowering scf.for scf/if with return value

This allow lowering to support scf.for and scf.if with results. As right now
spv region operations don't have return value the results are demoted to
Function memory. We create one allocation per result right before the region
and store the yield values in it. Then we can load back the value from
allocation to be able to use the results.

Differential Revision: https://reviews.llvm.org/D82246
The file was modifiedmlir/include/mlir/Conversion/SCFToSPIRV/SCFToSPIRV.h
The file was modifiedmlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp
The file was modifiedmlir/test/Conversion/GPUToSPIRV/if.mlir
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVTypes.cpp
The file was modifiedmlir/test/Conversion/GPUToSPIRV/loop.mlir
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRVPass.cpp
Commit c5b4f03b53a48b7dc35ce6c345bb06871cd7699e by lei
[PowerPC] Exploit xxspltiw and xxspltidp instructions

Exploits the VSX Vector Splat Immediate Word and
VSX Vector Splat Immediate Double Precision instructions:

  xxspltiw XT,IMM32
  xxspltidp XT,IMM32

Differential Revision: https://reviews.llvm.org/D82911
The file was addedllvm/test/CodeGen/PowerPC/p10-splatImm.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.h
The file was addedllvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll
Commit 05756e6937d58c357b0b7e37ff3e9a8f7dd0d485 by tkeith
[flang] Add more support for alternate returns

Add `hasAlternateReturns` to `evaluate::ProcedureRef`.

Add `HasAlternateReturns` to test subprogram symbols.

Fix `label01.F90` test: It was checking that "error: " didn't appear in
the output. But that was erroneously matching a warning that ends
"would be in error:". So change it to check for ": error: " instead.

Differential Revision: https://reviews.llvm.org/D83007
The file was modifiedflang/lib/Semantics/expression.cpp
The file was modifiedflang/test/Semantics/label01.F90
The file was modifiedflang/include/flang/Semantics/tools.h
The file was modifiedflang/lib/Semantics/tools.cpp
The file was modifiedflang/include/flang/Evaluate/call.h
Commit 99c4207d428bc1e24fed677c67230e27dd3d508f by lei
[PowerPC][NFC] Update doc for FeatureISA3_1/FeatureISA3_0 definitions
The file was modifiedllvm/lib/Target/PowerPC/PPC.td
Commit aded4f0cc070fcef6763c9a3c2ba764d652b692e by xiang1.zhang
[X86-64] Support Intel AMX instructions

Summary:
INTEL ADVANCED MATRIX EXTENSIONS (AMX).
AMX is a new programming paradigm, it has a set of 2-dimensional registers
(TILES) representing sub-arrays from a larger 2-dimensional memory image and
operate on TILES.

Spec can be found in Chapter 3 here https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewers: LuoYuanke, annita.zhang, pengfei, RKSimon, xiangzhangllvm

Reviewed By: xiangzhangllvm

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82705
The file was modifiedllvm/lib/Target/X86/X86.td
The file was modifiedllvm/lib/Target/X86/X86Subtarget.h
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.td
The file was modifiedllvm/utils/TableGen/X86RecognizableInstr.h
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
The file was addedllvm/test/MC/Disassembler/X86/AMX/x86-64-amx-bf16-intel.txt
The file was addedllvm/test/MC/X86/AMX/x86-64-amx-tile-att.s
The file was addedllvm/test/MC/Disassembler/X86/AMX/x86-64-amx-bf16-att.txt
The file was modifiedllvm/lib/Support/Host.cpp
The file was addedllvm/test/MC/Disassembler/X86/AMX/x86-64-amx-int8-att.txt
The file was addedllvm/test/MC/X86/AMX/x86-64-amx-bf16-att.s
The file was addedllvm/test/MC/X86/AMX/x86-64-amx-int8-intel.s
The file was modifiedllvm/lib/Target/X86/X86RegisterInfo.td
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
The file was addedllvm/test/MC/X86/AMX/x86-64-amx-tile-intel.s
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
The file was addedllvm/test/MC/Disassembler/X86/AMX/x86-64-amx-tile-intel.txt
The file was modifiedllvm/tools/llvm-exegesis/lib/X86/Target.cpp
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
The file was modifiedllvm/utils/TableGen/X86DisassemblerTables.cpp
The file was modifiedllvm/lib/Target/X86/X86InstrFormats.td
The file was addedllvm/test/MC/Disassembler/X86/AMX/x86-64-amx-int8-intel.txt
The file was addedllvm/test/MC/X86/AMX/x86-64-amx-error.s
The file was modifiedllvm/lib/Target/X86/AsmParser/X86Operand.h
The file was addedllvm/test/MC/X86/AMX/x86-64-amx-bf16-intel.s
The file was addedllvm/test/MC/Disassembler/X86/AMX/x86-64-amx-tile-att.txt
The file was addedllvm/test/MC/X86/AMX/x86-64-amx-int8-att.s
The file was modifiedllvm/test/CodeGen/X86/ipra-reg-usage.ll
The file was modifiedllvm/utils/TableGen/X86ModRMFilters.h
The file was addedllvm/test/MC/Disassembler/X86/AMX/x86-64-amx-error.txt
The file was modifiedllvm/utils/TableGen/X86ModRMFilters.cpp
The file was modifiedllvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
The file was modifiedllvm/utils/TableGen/X86RecognizableInstr.cpp
The file was addedllvm/lib/Target/X86/X86InstrAMX.td
Commit 2ddba3082ca79080b14f372ebe4b5bdbc5f694ed by clementval
[flang][openmp] Use common Directive and Clause enum from llvm/Frontend

Summary:
This patch is removing the custom enumeration for OpenMP Directives and Clauses and replace them
with the newly tablegen generated one from llvm/Frontend. This is a first patch and some will follow to share the same
infrastructure where possible. The next patch should use the clauses allowance defined in the tablegen file.

Reviewers: jdoerfert, DavidTruby, sscalpone, kiranchandramohan, ichoyjx

Reviewed By: DavidTruby, ichoyjx

Subscribers: jholewinski, cfe-commits, dblaikie, MaskRay, ymandel, ichoyjx, mgorny, yaxunl, guansong, jfb, sstefan1, aaron.ballman, llvm-commits

Tags: #llvm, #flang, #clang

Differential Revision: https://reviews.llvm.org/D82906
The file was modifiedclang/lib/Serialization/ASTReader.cpp
The file was modifiedflang/include/flang/Common/enum-set.h
The file was modifiedflang/lib/Parser/openmp-parsers.cpp
The file was modifiedflang/lib/Semantics/check-omp-structure.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp
The file was modifiedflang/include/flang/Parser/dump-parse-tree.h
The file was modifiedclang/lib/Parse/ParseOpenMP.cpp
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMP.td
The file was modifiedclang/lib/Basic/OpenMPKinds.cpp
The file was modifiedflang/tools/f18-parse-demo/CMakeLists.txt
The file was modifiedflang/lib/Evaluate/CMakeLists.txt
The file was modifiedflang/lib/Parser/unparse.cpp
The file was modifiedflang/lib/Semantics/CMakeLists.txt
The file was modifiedflang/lib/Semantics/resolve-names.cpp
The file was modifiedclang/include/clang/AST/RecursiveASTVisitor.h
The file was modifiedclang/lib/AST/OpenMPClause.cpp
The file was modifiedclang/include/clang/AST/OpenMPClause.h
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedclang/lib/AST/ASTTypeTraits.cpp
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp
The file was modifiedflang/lib/Parser/CMakeLists.txt
The file was modifiedflang/lib/Semantics/check-omp-structure.h
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp
The file was modifiedflang/include/flang/Parser/parse-tree.h
Commit 88874f07464467f3852dd662d180f7738756649b by lei
[PowerPC]Implement Vector Shift Double Bit Immediate Builtins

Implement Vector Shift Double Bit Immediate Builtins in LLVM/Clang.
  * vec_sldb ();
  * vec_srdb ();

Differential Revision: https://reviews.llvm.org/D82440
The file was modifiedclang/test/CodeGen/builtins-ppc-p10vector.c
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def
The file was addedllvm/test/CodeGen/PowerPC/builtins-ppc-p10permute.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedclang/lib/Headers/altivec.h
The file was modifiedclang/lib/Sema/SemaChecking.cpp
Commit 7996a1ef7020e4bda1252f6f26c26e1c78aa3eac by jezng
[lld-macho] Make sure ZeroFill sections are at the end of their segments

Summary:
ld64 does this, and references an internal rdar:// number as an explanation. No
idea what that rdar issue is, but in practice, it seems that not putting a BSS
section at the end can cause subsequent sections in the same segment to be
overwritten with zeroes.

Reviewers: #lld-macho

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81888
The file was modifiedlld/test/MachO/bss.s
The file was modifiedlld/MachO/Writer.cpp
Commit e1a31f52cd79140ac0c72f203c518bc6adf9c7b2 by Pushpinder.Singh
[AMDGPU] Control num waves per EU for implicit work-group size

Summary:
If amdgpu-flat-work-group-size is not specified in LLVM IR, the backend
uses default value of 1024. For this, minimum waves per EU should be 4.
However, backend is still setting minimum value to 1 instead of calculated
value. This is not observed normally as frontend always provide
amdgpu-flat-work-group-size attribute.

Reviewers: rampitec, b-sumner, sameerds, msearles

Reviewed By: rampitec

Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81991
The file was modifiedllvm/test/CodeGen/AMDGPU/reserve-vgpr-for-sgpr-spill.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/InlineAsmCrash.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/waitcnt-overflow.mir
Commit 61d22ef236206f17d7abcdcdf9da3c99074432d5 by Fred Riss
[lldb/ObjCRuntime] Implement support for small method lists

On macOS 11 (and other aligned Apple OSs), the Objective-C runtime
has a new optimization which saves memory by making the method
lists smaller.
This patch adds support for this new method list encoding (while
also keeping backward compatibility). This is implicitely covered
by some existing Objective-C tests.
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCClassDescriptorV2.cpp
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCClassDescriptorV2.h
Commit 4a674b623796dc5c5778fc6998f788044137d61d by Fred Riss
[lldb/ObjC] Add support for direct selector references

On macOS 11 (and other aligned OSs), the shared cache method
lists get an additional optimization which removes one level
of indirection to get to the selector.
This patch supports this new optimization. Both codepaths are
covered byt the existing Objective-C tests.
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCClassDescriptorV2.cpp
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCClassDescriptorV2.h
Commit c9f251aa6f6221a45d926bc12bd25d1833e5d945 by Fred Riss
[lldb/build.py] Always pass an SDK to the compiler on Darwin

On macOS 11, system libraries which are part of the shared cache
are not present on the filesystem anymore. This causes issues
with build.py, because it fails to link binaries with libSystem
or libc++.

The real issue is that build.py was not passing an SDK to the
compiler. The script accepts an argument for the SDK, but it
is currently unused. This patch just threads the SDK through
to the compile and link steps and this fixes a bunch of Shell
test failures on very recent macOS builds.
The file was modifiedlldb/test/Shell/helper/build.py
Commit 7be1661fc6ed3f5c0d0365f5528717707757a382 by thakis
lld/MachO: Remove a useless temporary
The file was modifiedlld/MachO/Driver.cpp
Commit ba5087f13025a15662e164eb371fe0678258e03f by thakis
ld64.lld: Add janky support for tbd files

With this, a simple hello world links against libSystem.tbd and the
old ld64.lld linker kind of works again with newer SDKs.

The motivation here is to have an arm64 cross linker that's good
enough to be able to run simple configure link checks on non-mac
systems for generating config.h files. Once -flavor darwinnew can
link arm64, we'll switch to that.
The file was modifiedlld/lib/ReaderWriter/MachO/File.h
The file was addedlld/test/mach-o/stub-link.s
The file was modifiedlld/lib/ReaderWriter/MachO/MachONormalizedFileFromAtoms.cpp
The file was modifiedlld/lib/ReaderWriter/MachO/MachONormalizedFileBinaryReader.cpp
The file was modifiedlld/lib/ReaderWriter/MachO/MachONormalizedFileToAtoms.cpp
The file was addedlld/test/mach-o/Inputs/MacOSX.sdk/usr/lib/libSystem.tbd
The file was modifiedlld/lib/ReaderWriter/MachO/MachOLinkingContext.cpp
Commit c59aec0ca1edac409d8789956049ae13af24e370 by riddleriver
[mlir][OpFormatGen] Add support for resolving variadic types from non-variadic

This enables better support for traits such as SameOperandsAndResultType, and other situations in which a variadic operand may be resolved from a non-variadic.

Differential Revision: https://reviews.llvm.org/D83011
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
The file was modifiedmlir/tools/mlir-tblgen/OpFormatGen.cpp
The file was modifiedmlir/test/mlir-tblgen/op-format.mlir
Commit fdbd78333fc6f1deb3037d0961130f05dce059e7 by ecaldas
Add parenthesized expression to SyntaxTree

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82960
The file was modifiedclang/lib/Tooling/Syntax/BuildTree.cpp
The file was modifiedclang/include/clang/Tooling/Syntax/Nodes.h
The file was modifiedclang/lib/Tooling/Syntax/Nodes.cpp
The file was modifiedclang/unittests/Tooling/Syntax/TreeTest.cpp
Commit e4b3c138deb8b4e7fd6afbf301b85da7e812d505 by tmsriram
This patch adds basic debug info support with basic block sections.

This patch uses ranges for debug information when a function contains basic block sections rather than using [lowpc, highpc]. This is also the first in a series of patches for debug info and does not contain the support for linker relaxation. That will be done as a follow up patch.

Differential Revision: https://reviews.llvm.org/D78851
The file was modifiedllvm/include/llvm/CodeGen/DebugHandlerBase.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
The file was modifiedllvm/include/llvm/CodeGen/AsmPrinter.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/include/llvm/CodeGen/MachineBasicBlock.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp
The file was modifiedllvm/include/llvm/CodeGen/AsmPrinterHandler.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
The file was addedllvm/test/DebugInfo/X86/basicblock-sections_1.ll
Commit 2a36f29fce91b6242ebd926d7c08381c31138d2c by pifon
[clang] Re-add deleted forward declaration.
The file was modifiedclang/lib/CodeGen/ABIInfo.h
Commit 0aad82943af946d1a1821998c0804ae40227051d by craig.topper
[X86] Enable multibyte NOPs in 64-bit mode for padding/alignment.

The default CPU used by llvm-mc doesn't have the NOPL feature, but
if we know we're compiling in 64-bit mode we should be able to
use nopl.
The file was modifiedlld/test/COFF/lto.ll
The file was modifiedllvm/test/MC/X86/align-branch-bundle.s
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
The file was modifiedllvm/test/MC/X86/align-branch-pad-max-prefix.s
Commit 11b1eeeaec642052e7299181c6a087f68807ae8b by Raphael Isemann
[lldb][NFC] Fix a variable name in ClangDiagnosticManagerAdapter
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
Commit d3bf1f3af2f26a7c100c3aa6b8ae93feb7034cb8 by n.james93
Revert "[clang-tidy] For `run-clang-tidy.py` escape the paths that are used for analysis."

This reverts commit 068fa35746637fde29355a43d17d554a92b32cdf.

Based on a regression reported in https://bugs.llvm.org/show_bug.cgi?id=46536
The file was modifiedclang-tools-extra/clang-tidy/tool/run-clang-tidy.py
Commit c7df35d2b28eae824cded70663a2becf359a5402 by david.sherwood
[CodeGen] Fix warnings in getCopyToPartsVector

Whilst trying to assemble the following test:

  clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c

I discovered we were hitting some warnings about possible invalid
calls to getVectorNumElements() in getCopyToPartsVector(). I've
tried to fix these by using ElementCount types where possible and
I've made the assumption that we don't support using a fixed width
vector to copy parts of a scalable vector, and vice versa. Looking
at how the copy is implemented I think that's the right thing for
now.

Differential Revision: https://reviews.llvm.org/D82744
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Commit 9e6f19fd8390d39a0351941da1582f888d18c369 by simon.tatham
Fix missing build dependency on omp_gen.

Summary:
`include/llvm/Frontend/OpenMP/CMakeLists.txt` creates a new target
called `omp_gen` which builds the generated include file `OMP.h.inc`.
This target must therefore be a dependency of every compilation step
whose transitive #include dependencies contain `OMP.h.inc`, or else
it's possible for builds to fail if Ninja (or make or whatever)
schedules that compilation step before building `OMP.h.inc` at all.

A few of those dependencies are currently missing, which leads to
intermittent build failures, depending on the order that Ninja (or
whatever) happens to schedule its commands. As far as I can see,
compiles in `clang/lib/CodeGen`, `clang/lib/Frontend`, and
`clang/examples` all depend transitivily on `OMP.h.inc` (usually via
`clang/AST/AST.h`), but don't have the formal dependency in the ninja
graph.

Adding `omp_gen` to the dependencies of `clang-tablegen-targets` seems
to be the way to get the missing dependency into the `clang/examples`
subdirectory. This also fixes the other two clang subdirectories, as
far as I can see.

Reviewers: clementval, thakis, chandlerc, jdoerfert

Reviewed By: clementval

Subscribers: cfe-commits, jdenny, mgorny, sstefan1, llvm-commits

Tags: #llvm, #clang

Differential Revision: https://reviews.llvm.org/D82659
The file was modifiedclang/CMakeLists.txt
Commit dc8e4d856615806dc4c7bbd898cf0428b005e790 by nicholas.guy
[ARM] Rearrange SizeReduction when using -Oz

Move the Thumb2SizeReduce pass to before IfConversion when optimising
for minimal code size.

Running the Thumb2SizeReduction pass before IfConversionallows T1
instructions to propagate to the final output, rather than the
ifConverter modifying T2 instructions and preventing them from being
reduced later.

This change does introduce a regression regarding execution time, so
it's only applied when optimising for size.

Running the LLVM Test Suite with this change produces a geomean
difference of -0.1% for the size..text metric.

Differential Revision: https://reviews.llvm.org/D82439
The file was modifiedllvm/test/CodeGen/Thumb2/constant-hoisting.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/ARM/t2-shrink-ldrpost.ll
Commit aa4fd7d848d78611b4e6b6768edc6ab9d2b1efa5 by qiucofan
[NFC] Fix typo in triples from unkown to unknown
The file was modifiedllvm/test/CodeGen/PowerPC/preemption.ll
The file was modifiedllvm/test/MC/WebAssembly/tail-call-encodings.s
The file was modifiedllvm/test/CodeGen/X86/codegen-prepare-collapse.ll
The file was modifiedllvm/test/MC/WebAssembly/bulk-memory-encodings.s
The file was modifiedclang/test/SemaOpenCL/block-array-capturing.cl
The file was modifiedllvm/test/CodeGen/WebAssembly/simd-shuffle-bitcast.ll
The file was modifiedllvm/test/MC/WebAssembly/atomics-encodings.s
The file was modifiedllvm/test/MC/WebAssembly/simd-encodings.s
Commit 83aa58d795b92cd864c6c09d9a65817a14e63acc by Raphael Isemann
[lldb][NFC] Don't pass around passthrough from ClangDiagnosticManagerAdapter

The passthrough DiagnosticConsumer is an implementation detail of
ClangDiagnosticManagerAdapter and we can just hide it behind the normal
DiagnosticConsumer interface that ClangDiagnosticManagerAdapter is supposed
to implement.
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
Commit f255656a97f7c83f7e049fd916278bbf7446651e by sander.desmalen
[SVE] ACLE: Fix builtins for svdup_lane_bf16 and svcvtnt_bf16_f32_x

bfloat16 variants of svdup_lane were missing, and svcvtnt_bf16_x
was implemented incorrectly (it takes an operand for the inactive
lanes)

Reviewers: fpetrogalli, efriedma

Reviewed By: fpetrogalli

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82908
The file was modifiedclang/utils/TableGen/SveEmitter.cpp
The file was modifiedclang/include/clang/Basic/arm_sve.td
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c
Commit 07bda98b6afdef7bed0bf7d47f5a8f6cfc64d973 by sander.desmalen
[AArch64][SVE] Add unpred load/store patterns for bf16 types

Reviewers: kmclaughlin, c-rhodes, efriedma

Reviewed By: efriedma

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82909
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/test/CodeGen/AArch64/spillfill-sve.ll
Commit 143e324e7501e127ae1275c93c743cf06e9e18b1 by sander.desmalen
[CodeGen][SVE] Don't drop scalable flag in DAGCombiner::visitEXTRACT_SUBVECTOR

There was a rogue 'assert' in AArch64ISelLowering for the tuple.get intrinsics,
that shouldn't really have been there (I suspect this was a remnant from when
we expected the wider vector always to have come from a vector CONCAT).

When I tried to create a more minimal reproducer, I found a bug in
DAGCombiner where it drops the scalable flag when trying to fold:

      extract_subv (bitcast X), Index --> bitcast (extract_subv X, Index')

This patch fixes both issues.

Reviewers: david-arm, efriedma, spatel

Reviewed By: efriedma

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82910
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/sve-extract-subvector.ll
Commit 6f1694759cc0de5c7ade8b465be4bb71ca4021e2 by jay.foad
[AMDGPU] Fix formatting in MIR tests
The file was modifiedllvm/test/CodeGen/AMDGPU/phi-vgpr-input-moveimm.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/gws-hazards.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/phi-elimination-end-cf.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/merge-image-load.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.v2s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fold-imm-copy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.mir
Commit 7f903873b8a937acec2e2cc232e70cba53061352 by nunoplopes
DSE: fix builtin function recognition to take decl into account
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MSSA/libcalls.ll
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Commit a27478e54f5fa99ed17ad6ef149046f9d391f293 by Ben.Dunbobbin
[Support][Windows] Prevent 2s delay when renaming a file that does not exist

Differential Revision: https://reviews.llvm.org/D82542
The file was modifiedllvm/lib/Support/Windows/Path.inc
Commit 00f5921609a5eabcac2ca1300243291fbdd7721d by david.sherwood
[SVE] Add warnings checks in four more LLVM SVE tests

I have added CHECK lines to the following tests:

  llvm/test/CodeGen/AArch64/sve-breakdown-scalable-vectortype.ll
  llvm/test/CodeGen/AArch64/sve-calling-convention-tuple-types.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-create-tuple.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll

since they are now free of warnings related to invalid use of
EVT::getVectorNumElements() and VectorType::getNumElements().

Differential Revision: https://reviews.llvm.org/D82957
The file was modifiedllvm/test/CodeGen/AArch64/sve-breakdown-scalable-vectortype.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-calling-convention-tuple-types.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-intrinsics-create-tuple.ll
Commit 804d9687443e1132157a9bb3696cb5327ae0558c by marukawa
[VE] Rename VE toolchain source files

Summary:
Rename VE.cpp and VE.h to VEToolchain.cpp and VEToolchain.h respectively
in order to avoid link warning message.  Linker warns that VE.cpp.o and
Arch/VE.cpp.o have the same name.

Reviewers: simoll, k-ishizaka

Reviewed By: simoll

Subscribers: mgorny, cfe-commits

Tags: #llvm, #ve, #clang

Differential Revision: https://reviews.llvm.org/D82968
The file was removedclang/lib/Driver/ToolChains/VE.h
The file was addedclang/lib/Driver/ToolChains/VEToolchain.cpp
The file was modifiedclang/lib/Driver/Driver.cpp
The file was addedclang/lib/Driver/ToolChains/VEToolchain.h
The file was modifiedclang/lib/Driver/CMakeLists.txt
The file was removedclang/lib/Driver/ToolChains/VE.cpp
Commit 559685d0bbde50db6f71dc07eb5b7a8029d8b39c by llvmgnsyncbot
[gn build] Port 804d9687443
The file was modifiedllvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
Commit 68498ce8af375a97a87738676fc2917c0c9659d6 by david.green
[BasicAA] New basic-aa-recphi test. NFC
The file was addedllvm/test/Analysis/BasicAA/recphi.ll
Commit 2c16100e6f72075564ea1f67fa5a82c269dafcd3 by lebedev.ri
[ScalarEvolution] createSCEV(): recognize `udiv`/`urem` disguised as an `sdiv`/`srem`

Summary:
While InstCombine trivially converts that `srem` into a `urem`,
it might happen later than wanted, in particular i'd like
for that to happen on  https://godbolt.org/z/bwuEmJ test case
early in pipeline, before first instcombine run, just before `-mem2reg`.

SCEV should recognize this case natively.

Reviewers: mkazantsev, efriedma, nikic, reames

Reviewed By: efriedma

Subscribers: clementval, hiraditya, javed.absar, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82721
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Analysis/ScalarEvolution/sdiv.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/srem.ll
Commit 58a56ef4e7a8bcbbad377e820a23f0e8d95a0fbd by lebedev.ri
Regenerate llvm/test/CodeGen/X86/optimize-max-0.ll

It surprizingly appears to be affected by the last SCEV patch
The file was modifiedllvm/test/CodeGen/X86/optimize-max-0.ll
Commit a8fe12065ec8137e55a6a8b35dd5355477c2ac16 by anna.welker
[LV] Enable the LoopVectorizer to create pointer inductions

This patch enables the LoopVectorizer to build a phi of pointer
type and provide the vector loads and stores with vector type
getelementptrs built from the pointer induction variable, which
produces much less instructions than the previous approach of
creating scalar getelementpointers and glue them together to a
vector.

Differential Revision: https://reviews.llvm.org/D81267
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was addedllvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
Commit d4cf4c66b5b75393fd68e3aee8ab6c788bb628e3 by aaron
Fix some typos (unkown -> unknown); NFC
The file was modifiedclang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
The file was modifiedclang/test/Analysis/fuchsia_handle.cpp
The file was modifiedclang/lib/Parse/ParseStmtAsm.cpp
Commit 11c4bb0c7cbd91c1e58395363d4dec2b2a803450 by llvm-dev
Regenerate apint-shift tests and replace %tmp variable names to silence update_test_checks warnings
The file was modifiedllvm/test/Transforms/InstCombine/apint-shift.ll
Commit 421c02e5c6b376fbbd8cc61c20feb35f1cee7a5a by llvm-dev
[InstCombine] Add some (vXi1 trunc(lshr(x,c))) -> icmp_eq(and(x,c')) tests for non-uniform vectors

As noticed on PR46531
The file was modifiedllvm/test/Transforms/InstCombine/apint-shift.ll
The file was modifiedllvm/test/Transforms/InstCombine/icmp.ll
Commit fd6193d5ea4e4a021b9578b4271329f46b27e89c by kerry.mclaughlin
[AArch64][SVE] Add reg+imm addressing mode for unpredicated stores

Reviewers: sdesmalen, efriedma, david-arm

Reviewed By: efriedma

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82985
The file was addedllvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-imm.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Commit d2dcff60fe230bf5e5f7aeae931c982af4ef3721 by gchatelet
[Alignment][NFC] VectorLayout now uses Align internally

By rewritting `ScalarizerVisitor::getVectorLayout` in such a way it returns `VectorLayout` (or `None`) it becomes obvious that `VectorLayout::VecAlign` cannot be `0`.

This patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Differential Revision: https://reviews.llvm.org/D82981
The file was modifiedllvm/lib/Transforms/Scalar/Scalarizer.cpp
Commit 8dbafd24d6dad9ace4447084a517823ea1d6e6b4 by gchatelet
[Alignment][NFC] Transition and simplify calls to DL::getABITypeAlignment

This patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Differential Revision: https://reviews.llvm.org/D82977
The file was modifiedllvm/lib/Transforms/Scalar/SROA.cpp
The file was modifiedllvm/lib/Transforms/IPO/GlobalOpt.cpp
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLowering.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
The file was modifiedllvm/lib/Target/X86/X86FastISel.cpp
The file was modifiedllvm/lib/Transforms/IPO/Inliner.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LICM.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
Commit 4cf24cb868b9fe9e65d2e4b27b8ec5fd5d5fb599 by whisperity
[NFC][clang] Add missing VALIDATE_DIAG_SIZE()

Originally when libCrossTU was introduced in commit
e350b0a19629c4cce87f28913b3137f4c7015de3, the macro which thus had all
diagnostic kinds covered was not added.
The file was modifiedclang/lib/Basic/DiagnosticIDs.cpp
Commit 37cc3ee8c5553ec02c133e80e9ac98f5ffa525d1 by kadircet
[clangd] Switch FindSymbolsTests to use TestTU

Summary:
This gets rid of the dependency on ClangdServer and a bunch of extra
infrastructure coming with it. Also enables us to clear SyncAPI, as it was the
sole user of runWorkspace/DocumentSymbols.

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82944
The file was modifiedclang-tools-extra/clangd/unittests/FindSymbolsTests.cpp
The file was modifiedclang-tools-extra/clangd/unittests/SyncAPI.h
The file was modifiedclang-tools-extra/clangd/unittests/SyncAPI.cpp
Commit db4d5f7048a26a7708821e46095742aecfd8ba46 by gabor.marton
[analyzer][StdLibraryFunctionsChecker] Add POSIX file handling functions

Adding file handling functions from the POSIX standard (2017).
A new checker option is introduced to enable them.
In follow-up patches I am going to upstream networking, pthread, and other
groups of POSIX functions.

Differential Revision: https://reviews.llvm.org/D82288
The file was modifiedclang/test/Analysis/analyzer-config.c
The file was modifiedclang/include/clang/StaticAnalyzer/Checkers/Checkers.td
The file was addedclang/test/Analysis/std-c-library-functions-POSIX.c
The file was modifiedclang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
Commit d6343e607ac8fa71fa6d99f9c86369ae9e66e671 by pavel
[lldb] Skip TestLimitDebugInfo on windows

The test does not work on windows, because clang will emit full type
information for __declspec(dllexport) types even under
-flimit-debug-info. __declspec(dllexport) is needed to be able to use
the type across shared library boundaries on windows, which makes this a
pretty good heuristic, but defeats the purpose of this test.

I am going to create (in another patch) an basic assembly test, so that
the relevant code gets at least some coverage on windows hosts.

This also reverts commit 1276855f2b4485ec312b379c1b8eaf5510d9b157, which
added the __declspec annotations -- they are not necessary anymore, and
they needlessly complicate the test.
The file was modifiedlldb/test/API/functionalities/limit-debug-info/TestLimitDebugInfo.py
The file was modifiedlldb/test/API/functionalities/limit-debug-info/Makefile
The file was modifiedlldb/test/API/functionalities/limit-debug-info/onetwo.h
Commit 8c5133f1855767a16a6045777bed4652bd114d84 by hokein.wu
[clang] Fix a null-NSS-access crash in DependentNameType.

The DependentNameType must have a non-null NSS. This property could be
violated during typo correction.

Differential Revision: https://reviews.llvm.org/D82738
The file was modifiedclang/lib/Sema/SemaTemplate.cpp
The file was modifiedclang/test/Parser/cxx-template-decl.cpp
Commit 30bd66544d7a1e602dfaf412158d4bd759352e36 by david.green
[BasicAA] Fix recursive phi MustAlias calculations

With the option -basic-aa-recphi we can detect recursive phis that loop
through constant geps, which allows us to detect more no-alias case for
pointer IV's. If the other phi operand and the other alias value are
MustAlias though, we cannot presume that every element in the loop is
also MustAlias. We need to instead be conservative and return MayAlias.

Differential Revision: https://reviews.llvm.org/D82987
The file was modifiedllvm/test/Analysis/BasicAA/recphi.ll
The file was modifiedllvm/lib/Analysis/BasicAliasAnalysis.cpp
Commit ffa1f8198e6e8be6ca1044975a67e646188210da by eschweitz
[flang] Add changes to codegen to convert it to tablegen passes.

This upstreams changes to codegen to convert the passes to the new
tablegen pass support from MLIR.

Differential revision: https://reviews.llvm.org/D83018
The file was modifiedflang/include/flang/Optimizer/CodeGen/CodeGen.h
The file was addedflang/include/flang/Optimizer/CodeGen/CMakeLists.txt
The file was addedflang/include/flang/Optimizer/CodeGen/CGPasses.td
The file was modifiedflang/include/flang/Optimizer/CMakeLists.txt
Commit 5c02a2421b951a14d1294598d0082b32659c7082 by eschweitz
[flang] Add inliner pass.

This adds a minimalist inliner implementation. Along with the inliner, a
minimum number of support files are also included. These will pave the
way for future diffs to add more transformation passes to flang. A
future diff will add the inline test, which cannot be run successfully
quite yet as some components have not yet been upstreamed.

Differential revision:
The file was addedflang/include/flang/Optimizer/Transforms/Passes.td
The file was modifiedflang/lib/Optimizer/CMakeLists.txt
The file was addedflang/include/flang/Optimizer/Transforms/CMakeLists.txt
The file was addedflang/include/flang/Optimizer/Transforms/Passes.h
The file was addedflang/lib/Optimizer/Transforms/Inliner.cpp
The file was modifiedflang/include/flang/Optimizer/CMakeLists.txt
Commit e4d178a752444453f0ab8d2b9085087208aa8296 by riccibrun
[clang][Serialization] Don't duplicate the body of LambdaExpr during deserialization

05843dc6ab97a00cbde7aa4f08bf3692eb83109d changed the serialization of the body
of LambdaExpr to avoid a mutation in LambdaExpr::getBody and to avoid a missing
body in LambdaExpr::children.

Unfortunately this replaced one bug by another: we are now duplicating the body
during deserialization; that is after deserialization the identity:

E->getBody() == E->getCallOperator()->getBody() does not hold.

Fix that by instead lazily loading the body from the call operator when needed.

Differential Revision: https://reviews.llvm.org/D83009

Reviewed By: martong, aaron.ballman, vabridgers
The file was modifiedclang/lib/Serialization/ASTWriterStmt.cpp
The file was addedclang/test/AST/ast-dump-lambda-body-not-duplicated.cpp
The file was modifiedclang/include/clang/AST/ExprCXX.h
The file was modifiedclang/lib/Serialization/ASTReaderStmt.cpp
The file was modifiedclang/lib/AST/ExprCXX.cpp
Commit 075c440f7bc8f38b2e484a1f31c803f470dab7d4 by sander.desmalen
[AArch64][SVE] Put zeroing pseudos and patterns under flag.

This patch puts the _ZERO pseudos and corresponding patterns
under the predicate 'UseExperimentalZeroingPseudos', so that they
can be enabled/disabled through compile flags.

This is done because the zeroing pseudos use MOVPRFX to do merging of
the inactive lanes, but it depends on the uarch whether this operation
is actually merged with the destructive operation. If not, it may be
more profitable to use a SELECT and to give the compiler the freedom to
schedule these instructions as normal, rather than keeping them bundled
together. Additionally, this feature is not yet fully implemented and
there are still known bugs (see D80410) that need to be resolved before
the 'experimental' can be dropped from the name.

Reviewers: paulwalker-arm, cameron.mcinally, efriedma

Reviewed By: paulwalker-arm

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82780
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.h
The file was modifiedllvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith-merging.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-intrinsics-shifts-merging.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64.td
The file was modifiedllvm/test/CodeGen/AArch64/sve2-intrinsics-uniform-dsp-zeroing.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was modifiedllvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-merging.ll
Commit 23eeae552689ecf47dbb5c5dcc551a074c4e0110 by llvm-dev
Regenerate sext/trunc tests and replace %tmp variable names to silence update_test_checks warnings
The file was modifiedllvm/test/Transforms/InstCombine/sext.ll
The file was modifiedllvm/test/Transforms/InstCombine/trunc.ll
Commit e0968ad45948d5b7a89c468576e660381c88148f by n.james93
call ::pthread_detach on llvm_execute_on_thread_impl

Fixes all TSAN bugs in clangd

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D83039
The file was modifiedllvm/lib/Support/Unix/Threading.inc
Commit c1f1db8502f1fc788eefeafd3dc225bd287ee4b9 by pavel
[lldb] Add a host-independent test for handling -flimit-debug-info

This complements the existing TestLimitDebugInfo.py, which tests this
scenario more comprehensively, but is not able to run on all hosts.
Specifically, it's hard to trigger this code from windows because clang
tries hard to ensure that debug info for types marked with
__declspec(dllexport) is emitted even under -flimit-debug-info (and
dllexport is needed to use a type across shared libraries).

This assembly-based test serves two purposes:
- it tests that -flimit-debug-info code path works for windows binaries
  (even though the aforementioned feature means its less likely to be
  used there)
- it gives basic test coverage for the -flimit-debug-info handling code
  when running the test suite on windows hosts.
The file was addedlldb/test/Shell/SymbolFile/DWARF/limit-debug-info.s
Commit f51a319cacd44819b4fb9fa9f005c2445bcee984 by n.james93
[ASTMatchers] Enhanced support for matchers taking Regex arguments

Added new Macros `AST(_POLYMORPHIC)_MATCHER_REGEX(_OVERLOAD)` that define a matchers that take a regular expression string and optionally regular expression flags. This lets users match against nodes while ignoring the case without having to manually use `[Aa]` or `[A-Fa-f]` in their regex. The other point this addresses is in the current state, matchers that use regular expressions have to compile them for each node they try to match on, Now the regular expression is compiled once when you define the matcher and used for every node that it tries to match against. If there is an error while compiling the regular expression an error will be logged to stderr showing the bad regex string and the reason it couldn't be compiled. The old behaviour of this was down to the Matcher implementation and some would assert, whereas others just would never match. Support for this has been added to the documentation script as well. Support for this has been added to dynamic matchers ensuring functionality is the same between the 2 use cases.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D82706
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchersMacros.h
The file was modifiedclang/lib/ASTMatchers/ASTMatchersInternal.cpp
The file was modifiedclang/docs/tools/dump_ast_matchers.py
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchersInternal.h
The file was modifiedclang/lib/ASTMatchers/Dynamic/Marshallers.h
The file was modifiedclang/lib/ASTMatchers/Dynamic/Registry.cpp
The file was modifiedclang/docs/LibASTMatchersReference.html
The file was modifiedclang/lib/ASTMatchers/Dynamic/Marshallers.cpp
The file was modifiedllvm/include/llvm/Support/Regex.h
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h
The file was modifiedclang/unittests/ASTMatchers/Dynamic/ParserTest.cpp
The file was modifiedllvm/lib/Support/Regex.cpp
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
Commit 3c72cafdf407a5a74d98a025071019533a54a1e1 by jonathan_roelofs
Fix missing build dependencies on omp_gen

Differential Revision: https://reviews.llvm.org/D83003
The file was modifiedllvm/lib/Transforms/IPO/CMakeLists.txt
The file was modifiedllvm/unittests/Frontend/CMakeLists.txt
The file was modifiedllvm/cmake/modules/LLVMConfig.cmake.in
The file was modifiedllvm/CMakeLists.txt
The file was modifiedllvm/cmake/modules/CMakeLists.txt
The file was modifiedllvm/cmake/modules/AddLLVM.cmake
Commit 1c9d681092d18bac249f01c5d9055dce6898a861 by dmitry.preobrazhensky
[AMDGPU][CODEGEN] Added support of new inline assembler constraints

Added support for constraints 'I', 'J', 'B', 'C', 'DA', 'DB'.

See https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html#Machine-Constraints.

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D81651
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/test/CodeGen/AMDGPU/inline-constraints.ll
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit 10a898b3ecd638c58803e471b1ec239e58574635 by uday
[MLIR] Exact integer emptiness checks for FlatAffineConstraints

This patch adds the capability to perform exact integer emptiness checks for FlatAffineConstraints using the General Basis Reduction algorithm (GBR). Previously, only a heuristic was available for emptiness checks, which was not guaranteed to always give a conclusive result.

This patch adds a `Simplex` class, which can be constructed using a `FlatAffineConstraints`, and can find an integer sample point (if one exists) using the GBR algorithm. Additionally, it adds two classes `Matrix` and `Fraction`, which are used by `Simplex`.

The integer emptiness check functionality can be accessed through the new `FlatAffineConstraints::isIntegerEmpty()` function, which runs the existing heuristic first and, if that proves to be inconclusive, runs the GBR algorithm to produce a conclusive result.

Differential Revision: https://reviews.llvm.org/D80860
The file was addedmlir/lib/Analysis/Presburger/Matrix.cpp
The file was addedmlir/unittests/Analysis/CMakeLists.txt
The file was addedmlir/unittests/Analysis/Presburger/CMakeLists.txt
The file was addedmlir/lib/Analysis/Presburger/Simplex.cpp
The file was modifiedmlir/lib/Analysis/AffineStructures.cpp
The file was addedmlir/lib/Analysis/Presburger/CMakeLists.txt
The file was addedmlir/include/mlir/Analysis/Presburger/Fraction.h
The file was addedmlir/include/mlir/Analysis/Presburger/Matrix.h
The file was modifiedmlir/include/mlir/Analysis/AffineStructures.h
The file was modifiedmlir/unittests/CMakeLists.txt
The file was addedmlir/unittests/Analysis/AffineStructuresTest.cpp
The file was modifiedmlir/lib/Analysis/CMakeLists.txt
The file was addedmlir/unittests/Analysis/Presburger/SimplexTest.cpp
The file was addedmlir/include/mlir/Analysis/Presburger/Simplex.h
The file was addedmlir/unittests/Analysis/Presburger/MatrixTest.cpp
Commit 59f1bf46f8c258b9c784ff921b89fb6cb7a06612 by vince.a.bridgers
[ASTImporter] Add unittest case for friend decl import

Summary:
This change adds a matching test case for the recent bug fix to
VisitFriendDecl in ASTImporterLookup.cpp.

See https://reviews.llvm.org/D82882 for details.

Reviewers: martong, a.sidorin, shafik

Reviewed By: martong

Subscribers: rnkovacs, teemperor, cfe-commits, dkrupp

Tags: #clang

Differential Revision: https://reviews.llvm.org/D83006
The file was modifiedclang/unittests/AST/ASTImporterTest.cpp
Commit e6cf796bab7e02d2b8ac7fd495f14f5e21494270 by flo
Preserve GlobalsAA analysis result in LowerConstantIntrinsics

LowerConstantIntrinsics fails to preserve the analysis result of
GlobalsAA. Not preserving the analysis might affect benchmark
performance. This change fixes this issue.

Patch by Ryan Santhiraraja <rsanthir@quicinc.com>

Reviewers: fpetrogalli, joerg, fhahn

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D82342
The file was modifiedllvm/lib/Transforms/Scalar/LowerConstantIntrinsics.cpp
Commit 5012ddd5aff24e9963ed2073c7e3fc6991fd8b4c by james.henderson
[ELF][test] Add some additional .eh_frame/.eh_frame_hdr testing

This patch adds a few extra cases to the existing testing for eh_frame
and eh_frame_hdr behaviour in LLD. They all come from a private
testsuite we are trying to migrate to lit.

Reviewed by: grimar, MaskRay

Differential Revision: https://reviews.llvm.org/D82852
The file was addedlld/test/ELF/eh-frame-hdr-comdat.s
The file was modifiedlld/test/ELF/eh-frame-type.test
The file was modifiedlld/test/ELF/eh-frame-merge.s
Commit 103d62e1313d80f4a9f4285ad1280b793dfd9f9b by llvm-dev
[InstCombine] Add some (vXi1 trunc(lshr(x,c))) -> icmp_eq(and(x,c')) tests for vectors with undef elements

Suggested on D83035
The file was modifiedllvm/test/Transforms/InstCombine/icmp.ll
The file was modifiedllvm/test/Transforms/InstCombine/apint-shift.ll
Commit 769b9799307485aff87c562a8bafff828b166e2b by llvm-dev
[InstCombine] Add (vXi1 trunc(lshr(x,c))) -> icmp_eq(and(x,c')) support for non-uniform vectors

As noted on PR46531, we were only performing this transform on uniform vectors as we were using the m_APInt pattern matcher to extract the shift amount.

Differential Revision: https://reviews.llvm.org/D83035
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
The file was modifiedllvm/test/Transforms/InstCombine/apint-shift.ll
The file was modifiedllvm/test/Transforms/InstCombine/icmp.ll
Commit 8b7b0ad24c7323c629a76bb04305c698745be568 by sander.desmalen
[AArch64][SVE] NFC: Rename isOrig -> isReverseInstr

This is a non-functional to clarify some of the terminology in the
AArch64SVEInstrInfo/SVEInstrFormats.td files around the tables
for mapping an instruction to it's reverse instruction counter part,
and vice versa. e.g. DIV -> DIVR and DIVR -> DIV.

Reviewers: paulwalker-arm, cameron.mcinally, rengolin, efriedma

Reviewed By: paulwalker-arm, efriedma

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82979
The file was modifiedllvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Commit b725142c8db8584007cb1cd9149e8bcecaa88547 by pavel
[lldb] Fix type conversion in the Scalar getters

Summary:
The Scalar class claims to follow the C type conversion rules. This is
true for the Promote function, but it is not true for the implicit
conversions done in the getter methods.

These functions had a subtle bug: when extending the type, they used the
signedness of the *target* type in order to determine whether to do
sign-extension or zero-extension. This is not how things work in C,
which uses the signedness of the *source* type. I.e., C does
(sign-)extension before it does signed->unsigned conversion, and not the
other way around.

This means that: (unsigned long)(int)-1
      is equal to (unsigned long)0xffffffffffffffff
      and not (unsigned long)0x00000000ffffffff

Unsurprisingly, we have accumulated code which depended on this
inconsistent behavior. It mainly manifested itself as code calling
"ULongLong/SLongLong" as a way to get the value of the Scalar object in
a primitive type that is "large enough". Previously, the ULongLong
conversion did not do sign-extension, but now it does.

This patch makes the Scalar getters consistent with the declared
semantics, and fixes the couple of call sites that were using it
incorrectly.

Reviewers: teemperor, JDevlieghere

Subscribers: lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D82772
The file was modifiedlldb/source/Expression/IRInterpreter.cpp
The file was modifiedlldb/unittests/Utility/ScalarTest.cpp
The file was modifiedlldb/source/Utility/Scalar.cpp
The file was modifiedlldb/include/lldb/Utility/Scalar.h
The file was modifiedlldb/source/Core/ValueObject.cpp
The file was modifiedlldb/test/API/commands/expression/ir-interpreter/TestIRInterpreter.py
Commit 50b25e0679d4ffe073c3ca479e6ab1e3d29b7f59 by llvm-dev
[InstCombine] Add some sext/trunc tests to show missing support for non-uniform vectors
The file was modifiedllvm/test/Transforms/InstCombine/sext.ll
The file was modifiedllvm/test/Transforms/InstCombine/trunc.ll
Commit 03fe7eb16fa224a95d4ba252e2a03cbb3fa244af by antiagainst
[MLIR][SPIRVToLLVM] Implementation of spv.BitFieldInsert pattern

This patch introduces conversion pattern for `spv.BitFiledInsert` op,
as well as some utility functions to facilitate code reading.
Since `spv.BitFiledInsert` may take both vector and integer operands,
this case was specifically handled by broadcasting values (`count`
and `offset` here) to vectors. Moreover, the types had to be converted
to same bitwidth in order to conform with LLVM dialect rules.
This was done with `zext` when extending (Note that `count` and
`offset` are treated as unsigned) and `trunc` in the opposite case.
For the latter one, truncation is safe since the op is defined only when
`count`/`offset`/their sum is less than the bitwidth of the result.
This introduces a natural bound of the value of 64, which can be
expressed as `i8`.

Reviewed By: antiagainst, ftynse

Differential Revision: https://reviews.llvm.org/D82639
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/bitwise-ops-to-llvm.mlir
The file was modifiedmlir/lib/Conversion/SPIRVToLLVM/ConvertSPIRVToLLVM.cpp
Commit 8119a374bc3aa7ee7f135038a7c772762711d135 by antiagainst
[MLIR][SPIRVToLLVM] SPIR-V function call conversion pattern

Added conversion pattern for SPIR-V `FunctionCallOp`. Based on
specification, it returns no results or a single result, so
can be mapped directly to LLVM dialect's `llvm.call`.

Reviewed By: antiagainst, ftynse

Differential Revision: https://reviews.llvm.org/D83030
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/func-to-llvm.mlir
The file was modifiedmlir/lib/Conversion/SPIRVToLLVM/ConvertSPIRVToLLVM.cpp
Commit ef2f46e1f6a63040734c48ed53893298df14b6fa by antiagainst
[MLIR][SPIRV] Support two memory access attributes in OpCopyMemory.

This commit augments spv.CopyMemory's implementation to support 2 memory
access operands. Hence, more closely following the spec. The following
changes are introduces:

- Customize logic for spv.CopyMemory serialization and deserialization.
- Add 2 additional attributes for source memory access operand.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82710
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/Serializer.cpp
The file was modifiedmlir/test/Dialect/SPIRV/Serialization/memory-ops.mlir
The file was modifiedmlir/test/Dialect/SPIRV/ops.mlir
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVOps.td
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVOps.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/Deserializer.cpp
Commit a701dc5510ab8e977dcb797035475e641d6a353a by nemanja.i.ibm
[PowerPC] Remove undefs from splat input when changing shuffle mask

As of 1fed131660b2c5d3ea7007e273a7a5da80699445, we have code that
changes shuffle masks so that we can put the shuffle in a canonical
form that can be matched to a single instruction. However, it
does not properly account for undef elements in the BUILD_VECTOR
that is the RHS splat so we can end up with undefs where they
shouldn't be. This patch converts the splat input with undefs to
one without.
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
Commit 16989f6f5c69a62eb78c1ab297f64c8182d7604a by nemanja.i.ibm
[LLD] Add required dependency after shared libs break due to ba5087f13025

The dependency on TextAPI was not added and is required for shared
libs builds.
The file was modifiedlld/lib/ReaderWriter/MachO/CMakeLists.txt
Commit 0e0483bf5c383d5815b9f945fea7e347d4badc0e by hahnjo
[OpenMP][CMake] Fix version detection of testing compiler

When configuring in-tree, the correct names are LLVM_VERSION_MAJOR
and LLVM_VERSION_MINOR. This has been wrong since the code was added
in commits fc473dee98 and 821649229e.
The file was modifiedopenmp/cmake/OpenMPTesting.cmake
Commit 61238d2690a6ebdf3c4f3f68f39101fac30263a7 by sstipanovic
[OpenMPOpt][Fix] Remove double initialization of omp::types.
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
Commit 3d12e79094d2d3cb3d7e16dc16a456e1ec25ac1b by aeubanks
[NewPM][LSR] Rename strength-reduce -> loop-reduce

The legacy pass was called "loop-reduce".

This lowers the number of check-llvm failures under NPM by 83.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D82925
The file was modifiedllvm/test/Analysis/ScalarEvolution/depth-limit-overrun.ll
The file was modifiedllvm/lib/Passes/PassRegistry.def
The file was modifiedllvm/lib/FuzzMutate/FuzzerCLI.cpp
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/ivchain.ll
Commit 5416fc014ae5590fdef89630f3777d3216879fbb by thakis
[gn build] make building on an arm mac work

Currently requires `llvm_targets_to_build = [ "X86", "AArch64" ]`:
building just the host arch (i.e. aarch64) causes some linker errors.
The file was modifiedllvm/utils/gn/gn.py
The file was modifiedllvm/utils/gn/secondary/clang/test/BUILD.gn
The file was modifiedllvm/utils/gn/get.py
The file was modifiedllvm/utils/gn/secondary/llvm/test/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/triples.gni
Commit 1cfaaf645528cc2fed79617c8ca80945a1504021 by antiagainst
[MLIR][SPIRVToLLVM] Convert spv.constant scalars and vectors

This patch introduces conversion pattern for `spv.constant` with scalar
and vector types. There is a special case when the constant value is a
signed/unsigned integer (vector of integers). Since LLVM dialect does not
have signedness semantics, the types had to be converted to signless ints.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D82936
The file was modifiedmlir/lib/Conversion/SPIRVToLLVM/ConvertSPIRVToLLVM.cpp
The file was addedmlir/test/Conversion/SPIRVToLLVM/constant-op-to-llvm.mlir
Commit 0059f6ffe84241b9728e48c1eabdaf1a6abbef66 by aeubanks
[NewPM] Add -basic-aa to pr33196.ll

The legacy pass manager implicitly adds BasicAA, but the new PM does
not. This causes pr33196.ll to fail under NPM.

There are almost certainly lots of other failures like this, wanted to
get some input on if adding -basic-aa to tests makes sense at scale.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D82915
The file was modifiedllvm/test/Transforms/NewGVN/pr33196.ll
Commit aa7fd905e4e1bc510448431da9310e8cf5197523 by riccibrun
[clang][NFC] Store a pointer to the ASTContext in ASTDumper and TextNodeDumper

In general there is no way to get to the ASTContext from most AST nodes
(Decls are one of the exception). This will be a problem when implementing
the rest of APValue::dump since we need the ASTContext to dump some kinds of
APValues.

The ASTContext* in ASTDumper and TextNodeDumper is not always
non-null. This is because we still want to be able to use the various
dump() functions in a debugger.

No functional changes intended.
The file was modifiedclang/lib/AST/TextNodeDumper.cpp
The file was modifiedclang/unittests/AST/MatchVerifier.h
The file was modifiedclang/include/clang/AST/ASTDumper.h
The file was modifiedclang/lib/ASTMatchers/ASTMatchFinder.cpp
The file was modifiedclang/include/clang/AST/TextNodeDumper.h
The file was modifiedclang/include/clang/AST/Comment.h
The file was modifiedclang/include/clang/AST/ASTTypeTraits.h
The file was modifiedclang/include/clang/AST/Stmt.h
The file was modifiedclang/include/clang/AST/Type.h
The file was modifiedclang/unittests/AST/CommentParser.cpp
The file was modifiedclang/lib/AST/APValue.cpp
The file was modifiedclang/lib/Frontend/ASTConsumers.cpp
The file was modifiedclang/lib/CodeGen/CGExprScalar.cpp
The file was modifiedclang/include/clang/AST/APValue.h
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/DumpAST.cpp
The file was modifiedclang/lib/AST/ASTDumper.cpp
The file was modifiedclang/lib/AST/ASTTypeTraits.cpp
The file was modifiedclang/lib/CodeGen/CGExprComplex.cpp
The file was modifiedclang-tools-extra/clang-query/Query.cpp
Commit 670dbad473270a2bd46fc611bd48472685403ed6 by daltenty
[DebugInfo] Fix LineTest byteswap for cross-targeting builds

Summary:
The byte swap fix for big endian hosts in 9782c922cb21 (for D81570)
swaps based on the host endianess,  but for cross-targeting builds (i.e.
big endian host targeting little endian) the host-endianess won't
necessarily match the generated DWARF. This change updates the test
to use symmetrical constants so the results aren't endian dependent.

Reviewers: jhenderson, hubert.reinterpretcast, stevewan, ikudrin

Reviewed By: ikudrin

Subscribers: ikudrin, aprantl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82827
The file was modifiedllvm/unittests/DebugInfo/DWARF/DWARFDebugLineTest.cpp
Commit fcf4d5e4499a391dff42ea1a096f146db44147b6 by riccibrun
Revert "[clang][NFC] Store a pointer to the ASTContext in ASTDumper and TextNodeDumper"

This reverts commit aa7fd905e4e1bc510448431da9310e8cf5197523.

I missed some dump() functions.
The file was modifiedclang/include/clang/AST/APValue.h
The file was modifiedclang/unittests/AST/CommentParser.cpp
The file was modifiedclang/include/clang/AST/Stmt.h
The file was modifiedclang/lib/Frontend/ASTConsumers.cpp
The file was modifiedclang/lib/AST/ASTDumper.cpp
The file was modifiedclang/lib/AST/ASTTypeTraits.cpp
The file was modifiedclang/include/clang/AST/TextNodeDumper.h
The file was modifiedclang/lib/CodeGen/CGExprScalar.cpp
The file was modifiedclang-tools-extra/clang-query/Query.cpp
The file was modifiedclang/include/clang/AST/ASTDumper.h
The file was modifiedclang/include/clang/AST/Comment.h
The file was modifiedclang/unittests/AST/MatchVerifier.h
The file was modifiedclang/lib/AST/APValue.cpp
The file was modifiedclang/lib/ASTMatchers/ASTMatchFinder.cpp
The file was modifiedclang/include/clang/AST/ASTTypeTraits.h
The file was modifiedclang/lib/CodeGen/CGExprComplex.cpp
The file was modifiedclang/lib/AST/TextNodeDumper.cpp
The file was modifiedclang/include/clang/AST/Type.h
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/DumpAST.cpp
Commit 70f2bcc197ebc8d1c77c5efd5b822a9c9ccdccc4 by tkeith
[flang] Fix bug determining alternate return

The arguments have been moved out of the analyzer so we can't get the
expected number there. Instead use the argument count from the newly
built callee.

Differential Revision: https://reviews.llvm.org/D83063
The file was modifiedflang/lib/Semantics/expression.cpp
Commit 7cccd49a553b6381f57f0ad8545fd5ea9e329afd by pklausler
[flang] Clean up binary dependences of runtime libraries

There were dependences upon LLVM libraries in the Fortran
runtime support library binaries due to some indirect #includes
of llvm/Support/raw_ostream.h, which caused some kind of internal
ABI version consistency checking to get pulled in.  Fixed by
cleaning up some includes.

Reviewed By: tskeith, PeteSteinfeld, sscalpone

Differential Revision: https://reviews.llvm.org/D83060
The file was modifiedflang/lib/Semantics/mod-file.h
The file was modifiedflang/runtime/transformational.cpp
The file was modifiedflang/lib/Decimal/big-radix-floating-point.h
The file was modifiedflang/include/flang/Common/enum-set.h
The file was modifiedflang/lib/Decimal/binary-to-decimal.cpp
Commit 425fb21e03b0ec1cac40a415b6417ff5ba04d076 by thakis
ld64.lld: Make janky support for tbd files actually work sometimes

Also fix a bug in the test input that made the test miss this issue.
The file was modifiedlld/test/mach-o/Inputs/MacOSX.sdk/usr/lib/libSystem.tbd
The file was modifiedlld/test/MachO/Inputs/MacOSX.sdk/usr/lib/libSystem.tbd
The file was modifiedlld/lib/ReaderWriter/MachO/File.h
Commit 286073484f7d36c8d0481be2a2f436f973389f54 by lei
[PowerPC]Implement Vector Permute Extended Builtin

Implements vector permute builtin: vec_permx()

Differential Revision: https://reviews.llvm.org/D82869
The file was modifiedllvm/test/CodeGen/PowerPC/builtins-ppc-p10permute.ll
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def
The file was modifiedclang/test/CodeGen/builtins-ppc-p10vector.c
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
The file was modifiedclang/lib/Headers/altivec.h
Commit 08679af900c6274e9d0ec13f8ddd54a39cbefd90 by antiagainst
Revert "[MLIR][SPIRV] Support two memory access attributes in OpCopyMemory."

This reverts commit ef2f46e1f6a63040734c48ed53893298df14b6fa, which
likely triggers a compiler internal error for MSVC.

Differential Revision: https://reviews.llvm.org/D83075
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/Deserializer.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVOps.cpp
The file was modifiedmlir/test/Dialect/SPIRV/Serialization/memory-ops.mlir
The file was modifiedmlir/test/Dialect/SPIRV/ops.mlir
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVOps.td
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/Serializer.cpp
Commit cdf84c7b6b7a87949921ae23084f37ce74500800 by craig.topper
[X86] Add test cases for v32i8 rotate with min-legal-vector-width=256

We currently don't mark ROTL as custom when avx512bw is enabled
under the assumption we'll be able to promote the shifts in the
rotate idiom. But if we don't have 512-bit registers enabled we
can't promote.
The file was modifiedllvm/test/CodeGen/X86/min-legal-vector-width.ll
Commit 204a21317a33437e7b4746d0414e1dd24fd29053 by craig.topper
[X86] Modify the conditions for when we stop making v16i8/v32i8 rotate Custom based on having avx512 features.

The comments here indicate that we prefer to promote the shifts
instead of allowing rotate to be pattern matched. But we weren't
taking into account whether 512-bit registers are enabled or
whethever we have vpsllvw/vpsrlvw instructions.

splatvar_rotate_v32i8 is a slight regrssion, but the other cases
are neutral or improved.
The file was modifiedllvm/test/CodeGen/X86/min-legal-vector-width.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit b93e6650c8ac319e326d56d7553cb71c202ba6d8 by spatel
[x86] add tests for vector select with bit-test condition; NFC
The file was modifiedllvm/test/CodeGen/X86/vselect-pcmp.ll
The file was modifiedllvm/test/CodeGen/X86/vector-compare-combines.ll
Commit ee01c7a7406345a50176216216ca384fb60e0267 by ajcbik
[mlir] [VectorOps] Add choice between dot and axpy lowering of vector.contract

Default vector.contract lowering essentially yields a series of sdot/ddot
operations. However, for some layouts a series of saxpy/daxpy operations,
chained through fma are more efficient. This CL introduces a choice between
the two lowering paths. A default heuristic is to follow.

Some preliminary avx2 performance numbers for matrix-times-vector.
Here, dot performs best for 64x64 A x b and saxpy for 64x64 A^T x b.

```
------------------------------------------------------------
            A x b                          A^T x b
------------------------------------------------------------
GFLOPS    sdot (reassoc)    saxpy    sdot (reassoc)    saxpy
------------------------------------------------------------
1x1        0.6               0.9       0.6             0.9
2x2        2.5               3.2       2.4             3.5
4x4        6.4               8.4       4.9             11.8
8x8       11.7               6.1       5.0             29.6
16x16     20.7              10.8       7.3             43.3
32x32     29.3               7.9       6.4             51.8
64x64     38.9                                         79.3
128x128   32.4                                         40.7
------------------------------------------------------------
```

Reviewed By: nicolasvasilache, ftynse

Differential Revision: https://reviews.llvm.org/D83012
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.h
The file was addedmlir/test/Dialect/Vector/vector-contract-matvec-transforms.mlir
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorTransforms.h
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
The file was modifiedmlir/test/lib/Transforms/TestVectorTransforms.cpp
Commit 359345d609043543e6480954c535d8d5074a5a94 by nikita.ppv
[InstSimplify] Add test for sext/zext comparisons (NFC)
The file was addedllvm/test/Transforms/InstSimplify/cmp_ext.ll
Commit 47481cbffbefb399e672cf056c15323917bf43bf by Vedant Kumar
[test] Deflake test/profile/ContinuousSyncMode/online-merging.c

This test spawns 32 child processes which race to update counters on
shared memory pages. On some Apple-internal machines, two processes race
to perform an update in approximately 0.5% of the test runs, leading to
dropped counter updates. Deflake the test by using atomic increments.

Tested with:

```
$ for I in $(seq 1 1000); do echo ":: Test run $I..."; ./bin/llvm-lit projects/compiler-rt/test/profile/Profile-x86_64h/ContinuousSyncMode/online-merging.c -av || break; done
```

rdar://64956774
The file was modifiedcompiler-rt/test/profile/ContinuousSyncMode/online-merging.c
Commit e87a95b5c24bf2c47af3b90990ac559453266981 by craig.topper
[X86] Add test case for unfolding broadcast load from vpternlog.
The file was modifiedllvm/test/CodeGen/X86/avx512-broadcast-unfold.ll
Commit 912cd8a37f4628f63c2aec71c772f8935f70d0a8 by craig.topper
[X86] Add vpternlog to the broadcast unfolding table.
The file was modifiedllvm/test/CodeGen/X86/avx512-broadcast-unfold.ll
The file was modifiedllvm/lib/Target/X86/X86InstrFoldTables.cpp
Commit 6076fc698df4adb62b2496dcd5f84e778ddc60af by lei
[PowerPC]Add Vector Insert Instruction Definitions and MC Test

Adds td definitions and asm/disasm tests for the following instructions:

  VINSBVLX
  VINSBVRX
  VINSHVLX
  VINSHVRX
  VINSWVLX
  VINSWVRX
  VINSBLX
  VINSBRX
  VINSHLX
  VINSHRX
  VINSWLX
  VINSWRX
  VINSDLX
  VINSDRX
  VINSW
  VINSD

Differential Revision: https://reviews.llvm.org/D83052
The file was modifiedllvm/test/MC/PowerPC/ppc64-encoding-ISA31.s
The file was modifiedllvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ISA31.txt
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
Commit bc110de78a4bf47f63267eae07ef02f14bcc78e3 by spatel
[SelectionDAG] don't split branch on logic-of-vector-compares

SelectionDAGBuilder converts logic-of-compares into multiple branches based
on a boolean TLI setting in isJumpExpensive(). But that probably never
considered the pattern of extracted bools from a vector compare - it seems
unlikely that we would want to turn vector logic into control-flow.

The motivating x86 reduction case is shown in PR44565:
https://bugs.llvm.org/show_bug.cgi?id=44565
...and that test shows the expected improvement from using pmovmsk codegen.

For AArch64, I modified the test to include an extra op because the simpler
test gets transformed by a codegen invocation of SimplifyCFG.

Differential Revision: https://reviews.llvm.org/D82602
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/test/CodeGen/AArch64/vec-extract-branch.ll
The file was modifiedllvm/test/CodeGen/X86/setcc-logic.ll
Commit 4585e3509c2db8c92ceae64ad8d7b073c0090b8f by spatel
[x86] remove redundant tests with no check lines; NFC

These were accidentally included with:
rGb93e6650c8ac
The file was modifiedllvm/test/CodeGen/X86/vector-compare-combines.ll
Commit 0fd383e6566482cde8027f5db66ceca86823b771 by sameerarora101
Fix typo and check commit access.
The file was modifiedllvm/tools/llvm-objcopy/ELF/Object.cpp
Commit ca464639a1c9dd3944eb055ffd2796e8c2e7639f by lei
[PowerPC] Implement Vector Blend Builtins in LLVM/Clang

Implements vec_blendv()

Differential Revision: https://reviews.llvm.org/D82774
The file was modifiedclang/test/CodeGen/builtins-ppc-p10vector.c
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedllvm/test/CodeGen/PowerPC/builtins-ppc-p10permute.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def
The file was modifiedclang/lib/Headers/altivec.h
Commit 37f98f6f4c85010c786591e1f6bcacdf1bfb2b25 by pklausler
[flang] External I/O runtime work, repackaged (part 1)

Add a isFixedRecordLength flag member to Connection to
disambiguate the state of "record has known variable length"
from "record has fixed length".  Code that sets and tests this
flag will appear in later patches.  Rearrange data members to
reduce storage requirements, since Connection might indirectly
end up on a program stack frame.  Add a utility member function
BeginRecord(); use it in internal I/O processing.

Reviewed By: tskeith, sscalpone

Differential Revision: https://reviews.llvm.org/D83098
The file was modifiedflang/runtime/connection.h
The file was modifiedflang/runtime/internal-unit.cpp
Commit acf6c94a3881859988c4cb62172e5bc08ece7f9a by craig.topper
[X86] Teach lower512BitShuffle to try bitmask and bitblend before splitting v32i16/v64i8 on av512f only targets.

We consider v32i16/v64i8 to be legal types on avx512f, but we
don't have most operations until avx512bw. But we can use
and/or/xor operations. So try those before splitting.

This is especially helpful since we turn some ands with constant
masks into shuffles in early DAG combines. So we should make sure
we recover those back to AND.
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-avx512.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/avx512-mask-op.ll
The file was modifiedllvm/test/CodeGen/X86/combine-sdiv.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-512.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-512-v32.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-512.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
The file was modifiedllvm/test/CodeGen/X86/pr45443.ll
Commit 39f4b1c86eda23d8d91aaee4d73991b2d77069b4 by thakis
[gn build] get everything to build when llvm_targets_to_build is just AArch64
The file was modifiedllvm/utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/tools/llvm-mc/BUILD.gn
Commit 739c7a0a04d2728bfa9a92b30652ac3e2ae6047c by lebedev.ri
[NFC][Scalarizer] Add some insertelement/extractelement tests

See D82961/D82970/D83101/D83102.
The file was addedllvm/test/Transforms/Scalarizer/variable-insertelement.ll
The file was modifiedllvm/test/Transforms/Scalarizer/basic.ll
The file was addedllvm/test/Transforms/Scalarizer/constant-insertelement.ll
The file was addedllvm/test/Transforms/Scalarizer/constant-extractelement.ll
The file was addedllvm/test/Transforms/Scalarizer/variable-extractelement.ll
Commit e98030a55f9dd19aed4b763cc1eced54ae7e550e by lebedev.ri
[NFC][Scalarizer] Also scalarize loads in newly-added tests

Should help better showcase improvements
The file was modifiedllvm/test/Transforms/Scalarizer/constant-insertelement.ll
The file was modifiedllvm/test/Transforms/Scalarizer/constant-extractelement.ll
The file was modifiedllvm/test/Transforms/Scalarizer/variable-extractelement.ll
The file was modifiedllvm/test/Transforms/Scalarizer/variable-insertelement.ll
Commit 4e958c1748a98d700def115c034e3a863be269e3 by pklausler
[flang] External I/O runtime work, repackaged (part 2)

Clean up the input editing path so external input works better
when combined with further changes.  List-directed input needed
to allow for advancement to following records.

Reviewed By: tskeith, sscalpone

Differential Revision: https://reviews.llvm.org/D83104
The file was modifiedflang/runtime/edit-input.cpp
Commit a3daa3f75a01101790f39fb9d52bf1f8824655c9 by carl.ritson
[AMDGPU] Unify early PS termination blocks

Generate a single early exit block out-of-line and branch to this
if all lanes are killed. This avoids branching if lanes are active.

Reviewed By: nhaehnle

Differential Revision: https://reviews.llvm.org/D82641
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/insert-skips-kill-uncond.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/skip-if-dead.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertSkips.cpp
Commit 2bfcacf0ad362956277a1c2c9ba00ddc453a42ce by carl.ritson
[AMDGPU] Insert PS early exit at end of control flow

Exit early if the exec mask is zero at the end of control flow.
Mark the ends of control flow during control flow lowering and
convert these to exits during the insert skips pass.

Reviewed By: nhaehnle

Differential Revision: https://reviews.llvm.org/D82737
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/skip-if-dead.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertSkips.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
Commit 40e9e0826be8e7a80a5d0e3362311bc5c7d14e3d by lkail
[PowerPC][NFC] Refactor lowerDynamicAlloc

When performing dynamic stack allocation, calculation of frame pointer
and actual negsize can be separated. This patch refactors
`lowerDynamicAlloc` in preparation of supporting
`-fstack-clash-protection` which also has to calculate actual frame
pointer and negsize.

Differential Revision: https://reviews.llvm.org/D81354
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.h
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
Commit 7ec6927badecae0adf63eb72c42194deb68a9685 by carl.ritson
Revert "[AMDGPU] Insert PS early exit at end of control flow"

This reverts commit 2bfcacf0ad362956277a1c2c9ba00ddc453a42ce.

There appears to be an issue to analysis preservation.
The file was modifiedllvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/skip-if-dead.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertSkips.cpp
Commit 53eb7fda51f27b1b098fd6d5c9385948e891e800 by jezng
[lld-macho] Support binding dysyms to any section

Previously, we only supported binding dysyms to the GOT. This
diff adds support for binding them to any arbitrary section. C++
programs appear to use this, I believe for vtables and type_info.

This diff also makes our bind opcode encoding a bit smarter -- we now
encode just the differences between bindings, which will make things
more compact.

I was initially concerned about the performance overhead of iterating
over these relocations, but it turns out that the number of such
relocations is small. A quick analysis of my llvm-project build
directory showed that < 1.3% out of ~7M relocations are RELOC_UNSIGNED
bindings to symbols (including both dynamic and static symbols).

Reviewed By: #lld-macho, smeenai

Differential Revision: https://reviews.llvm.org/D83103
The file was modifiedlld/MachO/Arch/X86_64.cpp
The file was modifiedlld/MachO/SyntheticSections.cpp
The file was modifiedlld/MachO/SyntheticSections.h
The file was modifiedlld/MachO/Writer.cpp
The file was modifiedlld/MachO/Target.h
The file was modifiedlld/test/MachO/dylink.s
Commit d8921a80052575bb2b9cb345e81e8e22d6c6f516 by lkail
[PowerPC][NFC] Prevent unused error when assertion is disabled.
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.cpp