SuccessChanges

Summary

  1. Do not collapse build requests with different property sets. (details)
Commit acf138fae1adab346a4c967cc0b7e9247fbc83d8 by gkistanova
Do not collapse build requests with different property sets.
The file was modifiedzorg/buildbot/process/buildrequest.py (diff)

Summary

  1. [clangd] PopulateSwitch: disable on dependent enums. (details)
  2. [libc++] ADL-proof <variant> by adding _VSTD:: qualification on calls. (details)
  3. Fix case mismatch between definition and declaration (details)
  4. [PowerPC] Regenerate vec_select.ll tests and add <1 x i128> test case (details)
  5. [DAG] Legalize abs(x) -> smax(x,sub(0,x)) iff smax/sub are legal (details)
  6. [flang][openacc] Semantic check for cache directive (details)
  7. [AMDGPU] Emit stack frame size in metadata (details)
  8. [WebAssembly] Factor out WasmTableType in binary format (details)
  9. [PassManager] Run Induction Variable Simplification pass *after* Recognize loop idioms pass, not before (details)
  10. [MC][WebAssembly] Only emit indirect function table import if needed (details)
  11. [AMDGPU] Actually fully update opt-pipeline.ll test to account for -loop-idiom vs -indvars switch (details)
  12. [ELF] Add TargetInfo::adjustGotPcExpr for `R_GOT_PC` relaxations. NFC (details)
  13. [SVE] Fix TypeSize warning in RuntimePointerChecking::insert (details)
  14. [ELF] Rename adjustRelaxExpr to adjustTlsExpr and delete the unused `data` parameter. NFC (details)
  15. [clang][test] Fix prefix operator++ signature in iterators (details)
  16. [gn build] Download prebuilt mac-arm64 binary now that it exists (details)
  17. [OpenMP][OMPT] Implement verbose tool loading (details)
  18. [OpenMP][OMPT] Introduce a guard to handle OMPT return address (details)
  19. [OpenMP] libomp: fix non-X86, non-AARCH64 builds (details)
  20. [Flang][Docs] Update call information and add two more calls (details)
  21. [OpenMP][Docs] Add more content, call coordinates, FAQ entries, links (details)
  22. [RISCV] Custom type legalize i32 fshl/fshr on RV64 with Zbt. (details)
  23. [FastISel] Flush local value map on ever instruction (details)
  24. [DAG] Legalize abs(x) -> umin(x,sub(0,x)) iff umin/sub are legal (details)
  25. [clangd] Implement clang-tidy options from config (details)
  26. [gn build] Port 73fdd998701 (details)
  27. [CostModel][X86] Refresh ISD::ABS costs (details)
  28. Remove static function unused after cf1c774. (details)
  29. [RISCV] Add test cases showing that we don't recognize the select form of NABS in SelectionDAGBuilder so we end up with branches. NFC (details)
  30. [Hexagon] Add support for ISD::SMAX/SMIN/UMAX/UMIN instead of custom dag patterns (details)
  31. [MS] Fix double evaluation of MSVC builtin arguments (details)
  32. [MS] Add more 128bit cmpxchg intrinsics for AArch64 (details)
  33. [MLIR][Affine] Add custom builders for AffineVectorLoadOp/AffineVectorStoreOp (details)
  34. [clangd] Track deprecation of 'member' semantic token type in LSP. (details)
  35. [libc++] Factor out common logic for calling aligned allocation (details)
  36. [RISCV] Make SMIN/SMAX/UMIN/UMAX legal with Zbb extension. (details)
  37. [RISCV] Add test cases to check that we use (smax X, (neg X)) for abs with Zbb extension. (details)
  38. [mlir] Add build configuration for Quant unittest (details)
  39. [ms] [llvm-ml] Implement the expression expansion operator (details)
  40. [libc++] NFC: Reindent non-lockfree-atomics feature (details)
  41. DebugInfo: remove unnecessary mtriple from test/DebugInfo/X86/abstract_origin.ll (details)
  42. github actions: Use llvmbot token for main branch sync (details)
  43. [SelectionDAGBuilder] Add SPF_NABS support to visitSelect (details)
  44. [RISCV] Add an implementation of isFMAFasterThanFMulAndFAdd (details)
  45. [NFC] Fix pattern name. (details)
  46. Revert builtins fp16 support: tests do not pass on Mac (details)
  47. [CodeView] Avoid emitting empty debug globals subsection. (details)
  48. Refactor and simplify class scope name lookup. (details)
  49. Adding PoisonValue for representing poison value explicitly in IR (details)
  50. Part of C++ DR 39: a class member lookup is not ambiguous if it finds the (details)
  51. [gn build] (manually) port b534beabeed3ba (details)
  52. [mlir][sparse] add ability to select pointer/index storage type (details)
  53. [clangd] Collect main file refs by default (details)
  54. [gn build] sync script: handle multiple source lists if only deleting (details)
  55. [gn build] sync script: only compute tokloc when adding files (details)
  56. [gn build] sync script: try to make a loop clearer (details)
  57. [lld][WebAssembly] Ensure stub symbols always get address 0 (details)
  58. [mlir][Python] Add additional capsule interop types. (details)
  59. [LoopLoadElim] Make sure all loops are in simplify form. PR48150 (details)
  60. [LegalizerTypes] Add support for scalarizing the operand of an FP_EXTEND when the result type is legal. (details)
  61. [RISCV] Remove unused PatFrag argument from the tablegen class used for c.beqz/c.bnez. NFC (details)
  62. [IndVars] Use isLoopBackedgeGuardedByCond for last iteration check (details)
  63. [RISCV] Add isel pattern to match (i64 (sra (shl X, 32), C)) to SRAIW if C > 32. (details)
  64. [SCEV] Use isKnownPredicateAt in isLoopBackedgeGuardedByCond (details)
  65. [llvm-readobj] - Fix a warning. (details)
  66. [Support] Use llvm::is_contained (NFC) (details)
  67. [libc++] [libc++abi] Mark a few tests as unsupported/xfail on gcc-7/8/9. (details)
  68. [OpenMP][OMPT] Fix building with OMPT disabled after 6d3b81664a4b79 (details)
  69. [libc++] [www] Fix HTML. NFC. (details)
  70. Fix use-of-uninitialized-value in rG75f50e15bf8f (details)
  71. [clangd] Do not treat line as inactive if skipped range ends at character position 0 (details)
  72. [lldb] Fix TestThreadStepOut.py after "Flush local value map on every instruction" (details)
  73. [libc++] [docs] Migrate C++ status pages to RestructuredText (RST). (details)
  74. [AMDGPU] Introduce and use isGFX10Plus. NFC. (details)
  75. [libc++] [P0966] [C++20] Fix bug PR45368 by correctly implementing P0966: string::reserve should not shrink. (details)
  76. [libc++] Fix gcc warning -Wsign-compare. (details)
  77. [NFC][libc++] Mark LWG3296 as complete. (details)
  78. Revert "[SCEV] Use isKnownPredicateAt in isLoopBackedgeGuardedByCond" (details)
  79. [llvm-profgen] [docs] Fix invalid header. Add to ToC. NFC. (details)
  80. [RISCV] Add test cases for missed opportunities to use sbsetw/sbclrw/sbinvw when the result isn't known to be sign extended. (details)
  81. [RISCV] Add isel patterns for sbsetw/sbclrw/sbinvw with sext_inreg as the root. (details)
  82. [SCEV] Use isBasicBlockEntryGuardedByCond in isLoopBackedgeGuardedByCond (details)
  83. [llvm-readelf/obj] - Report a warning when the value of the DT_PLTREL dynamic tag is invalid. (details)
  84. Revert "[SCEV] Use isBasicBlockEntryGuardedByCond in isLoopBackedgeGuardedByCond" (details)
  85. Return "[SCEV] Use isBasicBlockEntryGuardedByCond in isLoopBackedgeGuardedByCond", 2nd try (details)
  86. [X86] Fix -DAG checks on gnux32 pic tests (details)
  87. Revert "Return "[SCEV] Use isBasicBlockEntryGuardedByCond in isLoopBackedgeGuardedByCond", 2nd try" (details)
  88. [SVE][CodeGen] Extend isConstantSplatValue to support ISD::SPLAT_VECTOR (details)
  89. [libc++] Mark a few more tests as unsupported on gcc-8/9. (details)
  90. [clang][Driver] Handle risvc in Baremetal.cpp. (details)
  91. [CostModel] Add basic implementation of getGatherScatterOpCost. (details)
  92. [X86] Extend neg-abs test coverage (details)
  93. [clangd][query-driver] Extract target (details)
  94. [mlir][bufferize] Add argument materialization for bufferization (details)
Commit f6970503d291b7cae70fe583bed392387f93f9e4 by adamcz
[clangd] PopulateSwitch: disable on dependent enums.

If the enum is a dependent type, we would crash somewhere in
getIntWidth(). -Wswitch diagnostic doesn't work on dependent enums
either.

Differential Revision: https://reviews.llvm.org/D92051
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/PopulateSwitch.cpp
The file was modifiedclang-tools-extra/clangd/unittests/TweakTests.cpp
Commit bbf8a9ca3ffedb7059194086bac490b6171cc474 by arthur.j.odwyer
[libc++] ADL-proof <variant> by adding _VSTD:: qualification on calls.

Differential Revision: https://reviews.llvm.org/D92036
The file was modifiedlibcxx/include/variant
The file was addedlibcxx/test/std/utilities/variant/variant.visit/robust_against_adl.pass.cpp
Commit d899f9970e51cb80114abdc4efb5c0d9ce435f80 by gchatelet
Fix case mismatch between definition and declaration
The file was modifiedlibc/benchmarks/MemorySizeDistributions.cpp
Commit 6588592684ff0ec455570e576f8351a36e4ead3a by llvm-dev
[PowerPC] Regenerate vec_select.ll tests and add <1 x i128> test case
The file was modifiedllvm/test/CodeGen/PowerPC/vec_select.ll
Commit 0637dfe88b02a68f27fbad16ea47b26f91a47c61 by llvm-dev
[DAG] Legalize abs(x) -> smax(x,sub(0,x)) iff smax/sub are legal

If smax() is legal, this is likely to result in smaller codegen expansion for abs(x) than the xor(add,ashr) method.

This is also what PowerPC has been doing for its abs implementation, so it lets us get rid of a load of custom lowering code there (and which was never updated when they added smax lowering).

Alive2: https://alive2.llvm.org/ce/z/xRk3cD

Differential Revision: https://reviews.llvm.org/D92095
The file was modifiedllvm/test/CodeGen/X86/viabs.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.h
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/abs.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/combine-abs.ll
Commit e73d8c793a5028b8ba93b9b9a82d059760c3ec4d by clementval
[flang][openacc] Semantic check for cache directive

Add semantic check for the cache directive. According to section 2.10 from the specification:
A var in a cache directive must be a single array element or a simple subarray.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D90184
The file was modifiedflang/lib/Semantics/check-acc-structure.h
The file was modifiedflang/test/Semantics/acc-clause-validity.f90
The file was modifiedflang/lib/Semantics/check-acc-structure.cpp
The file was modifiedflang/lib/Semantics/resolve-directives.cpp
Commit edd675643d5ff49e6ea01af2a2a9b40498b3226c by sebastian.neubauer
[AMDGPU] Emit stack frame size in metadata

Add .shader_functions to pal metadata, which contains the stack frame
size for all non-entry-point functions.

Differential Revision: https://reviews.llvm.org/D90036
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/amdpal-callable.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h
Commit 1933c9d41a08cfc4c5c0ae80eedf466b5ae7ef01 by sbc
[WebAssembly] Factor out WasmTableType in binary format

This commit factors out a WasmTableType definition from WasmTable, as is
the case for WasmGlobal and other data types.  Also add support for
extracting the SymbolName for a table from the linking section's symbol
table.

Differential Revision: https://reviews.llvm.org/D91849
The file was modifiedllvm/lib/MC/WasmObjectWriter.cpp
The file was modifiedlld/wasm/SyntheticSections.cpp
The file was modifiedllvm/tools/obj2yaml/wasm2yaml.cpp
The file was modifiedllvm/include/llvm/BinaryFormat/Wasm.h
The file was modifiedlld/wasm/WriterUtils.h
The file was modifiedllvm/lib/Object/WasmObjectFile.cpp
The file was modifiedlld/wasm/WriterUtils.cpp
Commit a8d74517dcff42d3300aa144820b2772c1560a96 by lebedev.ri
[PassManager] Run Induction Variable Simplification pass *after* Recognize loop idioms pass, not before

Currently, `-indvars` runs first, and then immediately after `-loop-idiom` does.
I'm not really sure if `-loop-idiom` requires `-indvars` to run beforehand,
but i'm *very* sure that `-indvars` requires `-loop-idiom` to run afterwards,
as it can be seen in the phase-ordering test.

LoopIdiom runs on two types of loops: countable ones, and uncountable ones.
For uncountable ones, IndVars obviously didn't make any change to them,
since they are uncountable, so for them the order should be irrelevant.
For countable ones, well, they should have been countable before IndVars
for IndVars to make any change to them, and since SCEV is used on them,
it shouldn't matter if IndVars have already canonicalized them.
So i don't really see why we'd want the current ordering.

Should this cause issues, it will give us a reproducer test case
that shows flaws in this logic, and we then could adjust accordingly.

While this is quite likely beneficial in-the-wild already,
it's a required part for the full motivational pattern
behind `left-shift-until-bittest` loop idiom (D91038).

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D91800
The file was modifiedllvm/test/Other/new-pm-defaults.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/opt-pipeline.ll
The file was modifiedllvm/test/Other/opt-O3-pipeline-enable-matrix.ll
The file was modifiedllvm/test/Other/opt-Os-pipeline.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
The file was modifiedllvm/test/Other/opt-O2-pipeline.ll
The file was modifiedllvm/lib/Transforms/IPO/PassManagerBuilder.cpp
The file was modifiedllvm/test/Other/new-pm-thinlto-defaults.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/ARM/arm_fill_q7.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
The file was modifiedllvm/test/Other/opt-O3-pipeline.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/loop-idiom-vs-indvars.ll
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
Commit feac819e50b2b62eeafdf1a7e6ecaa725d7bf08d by sbc
[MC][WebAssembly] Only emit indirect function table import if needed

The indirect function table, synthesized by the linker, is needed if and
only if there are TABLE_INDEX relocs.

Differential Revision: https://reviews.llvm.org/D91637
The file was modifiedllvm/test/MC/WebAssembly/wasm64.s
The file was modifiedllvm/test/MC/WebAssembly/data-section.s
The file was modifiedllvm/lib/MC/WasmObjectWriter.cpp
The file was modifiedllvm/test/MC/WebAssembly/assembler-binary.ll
The file was modifiedllvm/lib/Object/WasmObjectFile.cpp
The file was modifiedllvm/test/MC/WebAssembly/comdat.ll
The file was modifiedllvm/include/llvm/MC/MCSymbolWasm.h
The file was modifiedllvm/test/MC/WebAssembly/external-func-address.ll
The file was modifiedllvm/test/MC/WebAssembly/global-ctor-dtor.ll
The file was modifiedllvm/test/MC/WebAssembly/reloc-pic.s
The file was modifiedllvm/test/MC/WebAssembly/custom-sections.ll
The file was modifiedllvm/include/llvm/Object/Wasm.h
The file was modifiedllvm/test/MC/WebAssembly/tables.s
The file was modifiedllvm/test/MC/WebAssembly/type-index.s
The file was modifiedllvm/test/MC/WebAssembly/event-section.ll
Commit ba74fa244f4ca1b7ec187271fc145a968890441f by lebedev.ri
[AMDGPU] Actually fully update opt-pipeline.ll test to account for -loop-idiom vs -indvars switch
The file was modifiedllvm/test/CodeGen/AMDGPU/opt-pipeline.ll
Commit 572d18397cf0d8808ec85f9bd51471cd80266c27 by i
[ELF] Add TargetInfo::adjustGotPcExpr for `R_GOT_PC` relaxations. NFC

With this change, `TargetInfo::adjustRelaxExpr` is only related to TLS
relaxations and a subsequent clean-up can delete the `data` parameter.

Differential Revision: https://reviews.llvm.org/D92079
The file was modifiedlld/ELF/Target.h
The file was modifiedlld/ELF/Arch/PPC64.cpp
The file was modifiedlld/ELF/Arch/X86_64.cpp
The file was modifiedlld/ELF/Relocations.cpp
The file was modifiedlld/ELF/Target.cpp
Commit 06654a5348bfc510208514a30c552f4f2c4c0ee7 by joe.ellis
[SVE] Fix TypeSize warning in RuntimePointerChecking::insert

The TypeSize warning would occur because RuntimePointerChecking::insert
was not scalable vector aware. The fix is to use
ScalarEvolution::getSizeOfExpr to grab the size of types.

Differential Revision: https://reviews.llvm.org/D90171
The file was modifiedllvm/lib/Analysis/LoopAccessAnalysis.cpp
The file was addedllvm/test/Analysis/LoopAccessAnalysis/runtime-pointer-checking-insert-typesize.ll
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was addedllvm/test/Analysis/LoopAccessAnalysis/memcheck-store-vs-alloc-size.ll
Commit 50564ca075431f65c64abb97c01596c964a4cda0 by i
[ELF] Rename adjustRelaxExpr to adjustTlsExpr and delete the unused `data` parameter. NFC

Reviewed By: psmith

Differential Revision: https://reviews.llvm.org/D91995
The file was modifiedlld/ELF/Arch/PPC.cpp
The file was modifiedlld/ELF/Arch/PPC64.cpp
The file was modifiedlld/ELF/Target.cpp
The file was modifiedlld/ELF/Arch/AArch64.cpp
The file was modifiedlld/ELF/Relocations.cpp
The file was modifiedlld/ELF/Arch/X86.cpp
The file was modifiedlld/ELF/Target.h
Commit dc96cc33c13e1e38382118c25bf26de480eb2b12 by endre.fulop
[clang][test] Fix prefix operator++ signature in iterators

Prefix operator++ should return the iterator incremented by reference.

Differential Revision: https://reviews.llvm.org/D89528
The file was modifiedclang/test/Analysis/Inputs/system-header-simulator-cxx.h
Commit 9595a7ff55b6f3bf316ae182390fc74da65dda51 by thakis
[gn build] Download prebuilt mac-arm64 binary now that it exists

Sadly requires an ugly workaround for an ugly bug, but still nicer than
building locally.
The file was modifiedllvm/utils/gn/get.py
Commit b281a05dacb485d3c3c9cc7f7f5e8fb858ac67bc by protze
[OpenMP][OMPT] Implement verbose tool loading

OpenMP 5.1 introduces the new env variable
OMP_TOOL_VERBOSE_INIT=(disabled|stdout|stderr|<filename>) to enable verbose
loading and initialization of OMPT tools.
This env variable helps to understand the cause when loading of a tool fails
(e.g., undefined symbols or dependency not in LD_LIBRARY_PATH)
Output of OMP_TOOL_VERBOSE_INIT is added for OMP_DISPLAY_ENV

Tests for this patch are integrated into the different existing tool loading
tests, making these tests more verbose. An Archer specific verbose test is
integrated into an existing Archer test.

Patch prepared by: Isabel Thärigen

Differential Revision: https://reviews.llvm.org/D91464
The file was modifiedopenmp/runtime/src/kmp_settings.cpp
The file was modifiedopenmp/runtime/src/ompt-general.cpp
The file was modifiedopenmp/tools/archer/tests/parallel/parallel-simple.c
The file was modifiedopenmp/runtime/test/ompt/loadtool/tool_available/tool_available.c
The file was modifiedopenmp/runtime/test/ompt/loadtool/tool_not_available/tool_not_available.c
The file was modifiedopenmp/runtime/test/ompt/loadtool/tool_available_search/tool_available_search.c
Commit 6d3b81664a4b79b32ed2c2f46b21ab0dca9029cc by protze
[OpenMP][OMPT] Introduce a guard to handle OMPT return address

This is an alternative approach to address inconsistencies pointed out in: D90078
This patch makes sure that the return address is reset, when leaving the scope.
In some cases, I had to move the macro out of an if-statement to have it in the
right scope, in some cases I added an additional block to restrict the scope.

This patch does not handle inconsistencies, which might occur if the return
address is still set when we call into the application.

Test case (repeated_calls.c) provided by @hbae

Differential Revision: https://reviews.llvm.org/D91692
The file was modifiedopenmp/runtime/src/kmp_csupport.cpp
The file was modifiedopenmp/runtime/src/ompt-specific.h
The file was modifiedopenmp/runtime/src/kmp_gsupport.cpp
The file was addedopenmp/runtime/test/ompt/parallel/repeated_calls.c
Commit 9e3e332d273b80b5167ac35f8dcfa7178e45c5e9 by Andrey.Churbanov
[OpenMP] libomp: fix non-X86, non-AARCH64 builds

Commit https://reviews.llvm.org/rG7b5254223acbf2ef9cd278070c5a84ab278d7e5f
broke the build for some architectures, because macro KMP_PREFIX_UNDERSCORE
was defined only for x86, x86_64 and aarch64. This patch defines it for other
architectures (as a no-op).

Differential Revision: https://reviews.llvm.org/D92027
The file was modifiedopenmp/runtime/src/z_Linux_asm.S
Commit c557f549ba049131e444dd17dc326988158677ef by johannes
[Flang][Docs] Update call information and add two more calls

Call information have been updated and the OpenMP in LLVM as well as
Classic Flang call have been added.
The file was modifiedflang/docs/GettingInvolved.md
Commit 227c8ff189c3861c11f6e80c31274c5fa28a2ee9 by johannes
[OpenMP][Docs] Add more content, call coordinates, FAQ entries, links
The file was modifiedopenmp/docs/optimizations/OpenMPUnawareOptimizations.rst
The file was modifiedopenmp/docs/design/Overview.rst
The file was modifiedopenmp/docs/index.rst
The file was modifiedopenmp/docs/SupportAndFAQ.rst
The file was modifiedopenmp/docs/design/Runtimes.rst
The file was modifiedopenmp/docs/optimizations/OpenMPOpt.rst
Commit c26e8697d71eea5fa08944a2db039a2187abf27c by craig.topper
[RISCV] Custom type legalize i32 fshl/fshr on RV64 with Zbt.

This adds custom opcodes for FSLW/FSRW so we can type legalize
fshl/fshr without needing to match a sign_extend_inreg.

I've used the operand order from fshl/fshr to make the isel
pattern similar to the non-W form. It was also hard to decide
another order since the register instruction has the shift amount
as the second operand, but the immediate instruction has it as
the third operand.

Differential Revision: https://reviews.llvm.org/D91479
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbt.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit cf1c774d6ace59c5adc9ab71b31e762c1be695b1 by paul.robinson
[FastISel] Flush local value map on ever instruction

Local values are constants or addresses that can't be folded into
the instruction that uses them. FastISel materializes these in a
"local value" area that always dominates the current insertion
point, to try to avoid materializing these values more than once
(per block).

https://reviews.llvm.org/D43093 added code to sink these local
value instructions to their first use, which has two beneficial
effects. One, it is likely to avoid some unnecessary spills and
reloads; two, it allows us to attach the debug location of the
user to the local value instruction. The latter effect can
improve the debugging experience for debuggers with a "set next
statement" feature, such as the Visual Studio debugger and PS4
debugger, because instructions to set up constants for a given
statement will be associated with the appropriate source line.

There are also some constants (primarily addresses) that could be
produced by no-op casts or GEP instructions; the main difference
from "local value" instructions is that these are values from
separate IR instructions, and therefore could have multiple users
across multiple basic blocks. D43093 avoided sinking these, even
though they were emitted to the same "local value" area as the
other instructions. The patch comment for D43093 states:

  Local values may also be used by no-op casts, which adds the
  register to the RegFixups table. Without reversing the RegFixups
  map direction, we don't have enough information to sink these
  instructions.

This patch undoes most of D43093, and instead flushes the local
value map after(*) every IR instruction, using that instruction's
debug location. This avoids sometimes incorrect locations used
previously, and emits instructions in a more natural order.

This does mean materialized values are not re-used across IR
instruction boundaries; however, only about 5% of those values
were reused in an experimental self-build of clang.

(*) Actually, just prior to the next instruction. It seems like
it would be cleaner the other way, but I was having trouble
getting that to work.

Differential Revision: https://reviews.llvm.org/D91734
The file was modifiedllvm/include/llvm/CodeGen/FastISel.h
The file was modifiedllvm/test/CodeGen/PowerPC/mcm-1.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fast-isel-load-store.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll
The file was modifiedllvm/test/CodeGen/X86/lvi-hardening-loads.ll
The file was modifiedlldb/test/Shell/SymbolFile/NativePDB/disassembly.cpp
The file was modifiedllvm/test/CodeGen/X86/crash-O0.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-abi_align.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/icmpa.ll
The file was modifiedllvm/test/CodeGen/PowerPC/mcm-2.ll
The file was modifiedlldb/test/Shell/SymbolFile/NativePDB/load-pdb.cpp
The file was modifiedllvm/test/CodeGen/X86/pr32241.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-patchpoint-webkit_jscc.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/shftopm.ll
The file was modifiedllvm/test/CodeGen/AArch64/cfguard-checks.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/simplestore.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/logopm.ll
The file was modifiedllvm/test/CodeGen/X86/pr32284.ll
The file was modifiedllvm/test/CodeGen/X86/atomic64.ll
The file was modifiedllvm/test/CodeGen/X86/pr32256.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-gv.ll
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-select.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/overflt.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-elf-globals.ll
The file was modifiedllvm/test/CodeGen/X86/pr32340.ll
The file was modifiedllvm/test/CodeGen/PowerPC/mcm-default.ll
The file was modifiedllvm/test/CodeGen/X86/pr44749.ll
The file was modifiedllvm/test/CodeGen/PowerPC/elf-common.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/callabi.ll
The file was modifiedllvm/test/DebugInfo/X86/fission-ranges.ll
The file was modifiedllvm/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll
The file was modifiedllvm/test/CodeGen/PowerPC/mcm-6.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-call.ll
The file was modifiedllvm/test/CodeGen/PowerPC/mcm-3.ll
The file was modifiedllvm/test/CodeGen/AArch64/large-stack.ll
The file was modifiedllvm/test/CodeGen/PowerPC/mcm-9.ll
The file was removedllvm/test/CodeGen/X86/fast-isel-constant.ll
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-ldr-str-thumb-neg-index.ll
The file was modifiedllvm/test/CodeGen/X86/volatile.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-mem.ll
The file was modifiedllvm/test/CodeGen/X86/atomic-unordered.ll
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll
The file was modifiedllvm/test/CodeGen/ARM/fast-isel.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll
The file was modifiedlld/test/wasm/debug-removed-fn.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/FastISel.cpp
The file was modifiedllvm/test/CodeGen/X86/membarrier.ll
The file was modifiedllvm/test/CodeGen/PowerPC/mcm-13.ll
The file was modifiedllvm/test/DebugInfo/Mips/delay-slot.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-intrinsic.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-select.ll
The file was modifiedllvm/test/DebugInfo/COFF/lines-bb-start.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/fastalloca.ll
Commit 9c86c5e8add23a29fb19f7c0ac366a2063a5073a by llvm-dev
[DAG] Legalize abs(x) -> umin(x,sub(0,x)) iff umin/sub are legal

If umin() is legal, this is likely to result in smaller codegen expansion for abs(x) than the xor(add,ashr) method.

Followup to D92095

Alive2: https://alive2.llvm.org/ce/z/8nuX6s  https://alive2.llvm.org/ce/z/q2hB9w
The file was modifiedllvm/test/CodeGen/X86/combine-abs.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/viabs.ll
The file was modifiedllvm/test/CodeGen/X86/abs.ll
Commit 73fdd998701cce3aa6c4d8d2a73ab97351a0313b by n.james93
[clangd] Implement clang-tidy options from config

Added some new ClangTidyOptionsProvider like classes designed for clangd work flow.
These providers are designed to source the options on the worker thread but in a thread safe manner.
This is done through making the options getter take a pointer to the filesystem used by the worker thread which natuarally is from a ThreadsafeFS.
Internal caching in the providers is also guarded.

The providers don't inherit from `ClangTidyOptionsProvider` instead they share a base class which is able to create a provider for the `ClangTidyContext` using a specific FileSystem.
This approach means one provider can be used for multiple contexts even though `ClangTidyContext` owns its provider.

Depends on D90531

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D91029
The file was addedclang-tools-extra/clangd/TidyProvider.h
The file was modifiedclang-tools-extra/clangd/ClangdServer.h
The file was addedclang-tools-extra/clangd/TidyProvider.cpp
The file was modifiedclang-tools-extra/clangd/unittests/ParsedASTTests.cpp
The file was modifiedclang-tools-extra/clangd/tool/ClangdMain.cpp
The file was modifiedclang-tools-extra/clangd/ParsedAST.cpp
The file was modifiedclang-tools-extra/clangd/unittests/TestTU.cpp
The file was modifiedclang-tools-extra/clangd/Compiler.h
The file was modifiedclang-tools-extra/clangd/tool/Check.cpp
The file was modifiedclang-tools-extra/clangd/CMakeLists.txt
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp
The file was modifiedclang-tools-extra/clangd/unittests/TestTU.h
The file was modifiedclang-tools-extra/clangd/unittests/ClangdTests.cpp
The file was modifiedclang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
Commit 54038eeef4ac922059db32403c63ca79822f291d by llvmgnsyncbot
[gn build] Port 73fdd998701
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
Commit 385a27d6cdaddbb99da5518da3cb6713d9677df3 by llvm-dev
[CostModel][X86] Refresh ISD::ABS costs

Update costs now that D92095 and D92102 have tweaked the SSE2 implementation

The SSE42 BLENDVPD cost can actually be used on SSE41 as we don't attempt to generate PCMPGT anymore

Add scalar i16/i32/i64 costs as we can do this cheaply with CMOV
The file was modifiedllvm/test/Analysis/CostModel/X86/abs.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit dc35368ccf17a7dca0874ace7490cc3836fb063f by paul.robinson
Remove static function unused after cf1c774.

Caused some -Werror bot failures.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/FastISel.cpp
Commit 5654a3dd0add58984e2c3247c70946d2ae0175f6 by craig.topper
[RISCV] Add test cases showing that we don't recognize the select form of NABS in SelectionDAGBuilder so we end up with branches. NFC

There's a FIXME that it should produce (sub 0, (abs)).
The file was modifiedllvm/test/CodeGen/RISCV/neg-abs.ll
Commit a0156356296b54dc071405332a517695b1881bc1 by llvm-dev
[Hexagon] Add support for ISD::SMAX/SMIN/UMAX/UMIN instead of custom dag patterns

This should handle the basic integer min/max handling - the HVX ops are still TODO.

This is some necessary cleanup work for min/max ops to eventually help us move the add/sub sat patterns into DAGCombine - D91876.

Differential Revision: https://reviews.llvm.org/D92112
The file was modifiedllvm/test/CodeGen/Hexagon/isel-minmax-v64bit.ll
The file was modifiedllvm/lib/Target/Hexagon/HexagonPatterns.td
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLowering.cpp
Commit 3bd06727267184223464f11d4e2470048ac40cb1 by rnk
[MS] Fix double evaluation of MSVC builtin arguments

This code got quite twisted because we consider some MSVC builtins to be
target agnostic, and some to be target specific. Target specific
intrinsics have a pattern of doing up-front argument evaluation, while
general intrinsics do not evaluate their arguments up front. As we tried
to share codepaths between the target-specific and target-agnostic
handling, we ended up doing double evaluation.

Instead, have each target handle MSVC intrinsics consistently before up
front argument evaluation. This requires passing less data around and is
more consistent with target independent intrinsic handling.

See D50979 for past examples of this bug. I noticed this while looking
into adding some more intrinsics.

Differential Revision: https://reviews.llvm.org/D92061
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedclang/lib/CodeGen/CodeGenFunction.h
The file was modifiedclang/test/CodeGen/ms-intrinsics.c
Commit 1e843a987d847da48aaf41801b79cfb364937e8f by rnk
[MS] Add more 128bit cmpxchg intrinsics for AArch64

The MSVC STL for requires this on ARM64.
Requested in https://llvm.org/pr47099

Depends on D92061

Differential Revision: https://reviews.llvm.org/D92062
The file was modifiedclang/test/CodeGen/ms-intrinsics.c
The file was modifiedclang/include/clang/Basic/BuiltinsAArch64.def
The file was modifiedclang/lib/Headers/intrin.h
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
Commit 9ffba19e86ce234d7289b31b4a7b78cd8878f159 by frank.laub
[MLIR][Affine] Add custom builders for AffineVectorLoadOp/AffineVectorStoreOp

Adding missing custom builders for AffineVectorLoadOp & AffineVectorStoreOp. In practice, it is difficult to correctly construct these ops without these builders (because the AffineMap is not included at construction time).

Differential Revision: https://reviews.llvm.org/D86380
The file was modifiedmlir/include/mlir/Dialect/Affine/IR/AffineOps.td
The file was modifiedmlir/lib/Dialect/Affine/IR/AffineOps.cpp
Commit cbf336ad76cd619495b213e8364acaccb7a7c0d6 by sam.mccall
[clangd] Track deprecation of 'member' semantic token type in LSP.
The file was modifiedclang-tools-extra/clangd/SemanticHighlighting.cpp
Commit a78aaa1ad51214b2e04f41762e76bb43067ea1fd by Louis Dionne
[libc++] Factor out common logic for calling aligned allocation

There were a couple of places where we needed to call the underlying
platform's aligned allocation/deallocation function. Instead of having
the same logic all over the place, extract the logic into a pair of
helper functions __libcpp_aligned_alloc and __libcpp_aligned_free.

The code in libcxxabi/src/fallback_malloc.cpp looks like it could be
simplified after this change -- I purposefully did not simplify it
further to keep this change as straightforward as possible, since it
is touching very important parts of the library.

Also, the changes in libcxx/src/new.cpp and libcxxabi/src/stdlib_new_delete.cpp
are basically the same -- I just kept both source files in sync.

The underlying reason for this refactoring is to make it easier to support
platforms that provide aligned allocation through C11's aligned_alloc
function instead of posix_memalign. After this change, we'll only have
to add support for that in a single place.

Differential Revision: https://reviews.llvm.org/D91379
The file was modifiedlibcxxabi/src/stdlib_new_delete.cpp
The file was modifiedlibcxx/src/new.cpp
The file was modifiedlibcxxabi/src/fallback_malloc.cpp
The file was modifiedlibcxx/include/new
Commit 751b0d970e757aef055fb6e1a981a7c44185aa80 by craig.topper
[RISCV] Make SMIN/SMAX/UMIN/UMAX legal with Zbb extension.

This is the logically correct thing to do. But it generates worse
code for i32 umin/umax on the rv64 due to type legalize requesting
zext even though the arguments are sext. Maybe we can teach type
legalizer to use sext for umin/umax for RISCV.

It's also producing possibly worse code on i64 on RV32 since we
still end up with selects that become branches. But this seems
like something we could improve in type legalization or DAG combine.

Hopefully this makes D92095 work for RISCV with Zbb.
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbb.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbb.ll
Commit bd0527f3942d2045be4e3a6b5e7eb98752bf7200 by craig.topper
[RISCV] Add test cases to check that we use (smax X, (neg X)) for abs with Zbb extension.
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbb.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbb.ll
Commit c5d017267dea6c4e84b0e67f043bde94815052ac by marius.brehler
[mlir] Add build configuration for Quant unittest
The file was modifiedmlir/unittests/Dialect/CMakeLists.txt
The file was addedmlir/unittests/Dialect/Quant/CMakeLists.txt
Commit 35828b84a5232df020d6de250c3c268e2ccaaf11 by epastor
[ms] [llvm-ml] Implement the expression expansion operator

In text-item contexts, %expr expands to a string containing the results of evaluating `expr`.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D89736
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp
The file was modifiedllvm/test/tools/llvm-ml/macro_function.test
Commit e5cc7baf67dbd53d282bd9dff3f2241ca1d33f1d by Louis Dionne
[libc++] NFC: Reindent non-lockfree-atomics feature
The file was modifiedlibcxx/utils/libcxx/test/features.py
Commit 175ebad958a0ebaf6c56c20ab30b9d4347742c29 by dblaikie
DebugInfo: remove unnecessary mtriple from test/DebugInfo/X86/abstract_origin.ll

The test already specifies a triple in the IR itself.

Based on post-commit feedback from Luís Marques.
The file was modifiedllvm/test/DebugInfo/X86/abstract_origin.ll
Commit c9eae09251e3e7d5a77a5970dfd59a4e81c9b936 by noreply
github actions: Use llvmbot token for main branch sync

The default github actions token cannot push to restricted branches, so we need to use a token from the llvmbot user.
The file was modified.github/workflows/main-branch-sync.yml
Commit 2d6042937b04eef00672b5c4ce623bf8f7b9a201 by craig.topper
[SelectionDAGBuilder] Add SPF_NABS support to visitSelect

We currently don't match this which limits the effectiveness of D91120 until
InstCombine starts canonicalizing to llvm.abs. This should be easy to remove
if/when we remove the SPF_ABS handling.

Differential Revision: https://reviews.llvm.org/D92118
The file was modifiedllvm/test/CodeGen/RISCV/neg-abs.ll
The file was modifiedllvm/test/CodeGen/PowerPC/select.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Commit ed95cafbc5fa9efbfe3f38da0b17efdb3806598c by craig.topper
[RISCV] Add an implementation of isFMAFasterThanFMulAndFAdd

Start with an assumption that FMA is faster than Fmul+FAdd. If thats not true
on some particular implementation we can add a tuning parameter in the future.

I've update the fmuladd test cases and added new test cases for fast math flag
based contraction.

Differential Revision: https://reviews.llvm.org/D91987
The file was modifiedllvm/test/CodeGen/RISCV/float-arith.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/test/CodeGen/RISCV/double-arith.ll
The file was modifiedllvm/test/CodeGen/RISCV/float-intrinsics.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/double-intrinsics.ll
Commit 5488a6b0ffb1c34898db6bd50798be2472db93c8 by silvasean
[NFC] Fix pattern name.

It still had the old name from before ElementwiseMappable was added.
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ElementwiseToLinalg.cpp
Commit b534beabeed3ba1777cd0ff9ce552d077e496726 by rnk
Revert builtins fp16 support: tests do not pass on Mac

Revert "[compiler-rt] [builtins] Support conversion between fp16 and fp128" & dependency

Revert "[compiler-rt] [builtins] Use _Float16 on extendhfsf2, truncdfhf2 __truncsfhf2 if available"

This reverts commit 7a948298813c913841a36ed0b460db0856fe7082.

This reverts commit 1fb91fcf9cfe849c7e9996597c491306e34e7abc.
The file was modifiedcompiler-rt/test/builtins/Unit/truncsfhf2_test.c
The file was removedcompiler-rt/test/builtins/Unit/trunctfhf2_test.c
The file was modifiedcompiler-rt/test/builtins/Unit/truncdfhf2_test.c
The file was modifiedcompiler-rt/lib/builtins/extendhfsf2.c
The file was modifiedcompiler-rt/cmake/builtin-config-ix.cmake
The file was modifiedcompiler-rt/lib/builtins/truncdfhf2.c
The file was modifiedcompiler-rt/lib/builtins/truncsfhf2.c
The file was modifiedcompiler-rt/test/builtins/Unit/extendhfsf2_test.c
The file was modifiedcompiler-rt/test/builtins/Unit/fp_test.h
The file was modifiedcompiler-rt/lib/builtins/fp_trunc.h
The file was removedcompiler-rt/lib/builtins/trunctfhf2.c
The file was removedcompiler-rt/lib/builtins/extendhftf2.c
The file was removedcompiler-rt/test/builtins/Unit/extendhftf2_test.c
The file was modifiedcompiler-rt/test/builtins/CMakeLists.txt
The file was modifiedcompiler-rt/lib/builtins/fp_extend.h
The file was modifiedcompiler-rt/lib/builtins/CMakeLists.txt
Commit 1363dfaf3105470e1724ed1f17c6d9c0713f442e by akhuang
[CodeView] Avoid emitting empty debug globals subsection.

In https://reviews.llvm.org/D89072 I added static const data members
to the debug subsection for globals. It skipped emitting an S_CONSTANT if it
didn't have a value, which meant the subsection could be empty.

This patch fixes the empty subsection issue.

Differential Revision: https://reviews.llvm.org/D92049
The file was modifiedlld/COFF/PDB.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
The file was addedlld/test/COFF/empty-subsection.s
The file was addedllvm/test/DebugInfo/COFF/empty-globals-subsection.ll
Commit 3fb0879867d7039cb61ffb6287ac17ac949adfa9 by richard
Refactor and simplify class scope name lookup.

This is partly in preparation for an upcoming change that can change the
order in which DeclContext lookup results are presented.

In passing, fix some obvious errors where name lookup's notion of a
"static member function" missed static member function templates, and
where its notion of "same set of declarations" was confused by the same
declarations appearing in a different order.
The file was modifiedclang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
The file was modifiedclang/include/clang/AST/DeclCXX.h
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/test/SemaCXX/lookup-member.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
The file was modifiedclang/lib/Sema/SemaLookup.cpp
The file was modifiedclang/lib/AST/CXXInheritance.cpp
Commit 75f50e15bf8fff6fba1d4678adedd33ef6a945e5 by liuz
Adding PoisonValue for representing poison value explicitly in IR

Define ConstantData::PoisonValue.
Add support for poison value to LLLexer/LLParser/BitcodeReader/BitcodeWriter.
Add support for poison value to llvm-c interface.
Add support for poison value to OCaml binding.
Add m_Poison in PatternMatch.

Differential Revision: https://reviews.llvm.org/D71126
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
The file was modifiedllvm/include/llvm/IR/PatternMatch.h
The file was modifiedllvm/lib/IR/Core.cpp
The file was modifiedllvm/tools/llvm-c-test/echo.cpp
The file was modifiedllvm/lib/Bitcode/Reader/BitcodeReader.cpp
The file was modifiedllvm/bindings/ocaml/llvm/llvm.mli
The file was modifiedllvm/include/llvm/IR/Constants.h
The file was modifiedllvm/include/llvm-c/Core.h
The file was modifiedllvm/lib/AsmParser/LLParser.cpp
The file was modifiedllvm/lib/IR/Constants.cpp
The file was modifiedllvm/test/Bitcode/compatibility.ll
The file was modifiedllvm/include/llvm/Bitcode/LLVMBitCodes.h
The file was modifiedllvm/test/Bindings/OCaml/core.ml
The file was addedllvm/test/CodeGen/X86/poison-ops.ll
The file was modifiedllvm/bindings/ocaml/llvm/llvm_ocaml.c
The file was modifiedllvm/lib/AsmParser/LLToken.h
The file was modifiedllvm/lib/AsmParser/LLParser.h
The file was modifiedllvm/lib/IR/AsmWriter.cpp
The file was modifiedllvm/lib/IR/LLVMContextImpl.h
The file was modifiedllvm/bindings/ocaml/llvm/llvm.ml
The file was modifiedllvm/include/llvm/IR/Value.def
The file was modifiedllvm/lib/AsmParser/LLLexer.cpp
Commit 7c327db3ef73d771bc022d0723672fc356dc9017 by richard
Part of C++ DR 39: a class member lookup is not ambiguous if it finds the
same type in multiple base classes.

Not even if the type is introduced by distinct declarations (for
example, two typedef declarations, or a typedef and a class definition).
The file was modifiedclang/test/SemaTemplate/typename-specifier-4.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/test/SemaTemplate/dependent-base-classes.cpp
The file was modifiedclang/lib/Sema/SemaLookup.cpp
The file was modifiedclang/test/CXX/temp/temp.res/temp.local/p3.cpp
The file was modifiedclang/www/cxx_dr_status.html
The file was modifiedclang/test/SemaCXX/member-name-lookup.cpp
The file was modifiedclang/test/CXX/drs/dr3xx.cpp
The file was modifiedclang/test/SemaTemplate/ms-lookup-template-base-classes.cpp
The file was modifiedclang/test/SemaTemplate/temp.cpp
Commit da0aaedcd0cd7053fa38d56aca26fd035a7fe75c by thakis
[gn build] (manually) port b534beabeed3ba
The file was modifiedlld/COFF/InputFiles.h
The file was modifiedllvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
Commit d5f0d0c0c4117295d9e76bbafaf0597e01ef3c99 by ajcbik
[mlir][sparse] add ability to select pointer/index storage type

This change gives sparse compiler clients more control over selecting
individual types for the pointers and indices in the sparse storage schemes.
Narrower width obviously results in smaller memory footprints, but the
range should always suffice for the maximum number of entries or index value.

Reviewed By: penpornk

Differential Revision: https://reviews.llvm.org/D92126
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was modifiedmlir/test/lib/Transforms/TestSparsification.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
The file was addedmlir/test/Dialect/Linalg/sparse_storage.mlir
Commit c6cb47b640ffafda113581c488a73fb62b6ea38a by zeratul976
[clangd] Collect main file refs by default

This is needed for call hierarchy to be able to find callers of
main-file-only functions.

Differential Revision: https://reviews.llvm.org/D92000
The file was modifiedclang-tools-extra/clangd/unittests/BackgroundIndexTests.cpp
The file was modifiedclang-tools-extra/clangd/ClangdServer.h
The file was modifiedclang-tools-extra/clangd/tool/ClangdMain.cpp
Commit 48d10172453511b549dfb3b46c717c60dc9786f1 by thakis
[gn build] sync script: handle multiple source lists if only deleting

With this, changes like b534beabeed3ba can be merged automatically.
The file was modifiedllvm/utils/gn/build/sync_source_lists_from_cmake.py
Commit 12c2646feb10c3aa14f590bcf9f5a3f9fc7b41b7 by thakis
[gn build] sync script: only compute tokloc when adding files

No behavior change, but maybe a bit clearer.
The file was modifiedllvm/utils/gn/build/sync_source_lists_from_cmake.py
Commit 43afba0677d4630ee6a35308a4b227144b8f1d42 by thakis
[gn build] sync script: try to make a loop clearer

We want to find 'sources = [', but only if it's not the prefix
of 'sources = []' -- we're looking for a non-empty list.

No behavior change.
The file was modifiedllvm/utils/gn/build/sync_source_lists_from_cmake.py
Commit 48ddf5e182c61cb93d66325f5690312d9e9226eb by sbc
[lld][WebAssembly] Ensure stub symbols always get address 0

Without this extra flag we can't distingish between stub functions and
functions that happen to have address 0 (relative to __table_base).

Adding this flag bit the base symbol class actually avoids growing the
SymbolUnion struct which would not be true if we added it to the
FunctionSymbol subclass (due to bitbacking).

The previous approach of setting it's table index to zero worked for
normal static relocations but not for `-fPIC` code.

See https://github.com/emscripten-core/emscripten/issues/12819

Differential Revision: https://reviews.llvm.org/D92038
The file was addedlld/test/wasm/weak-undefined-pic.s
The file was modifiedlld/wasm/MarkLive.cpp
The file was modifiedlld/wasm/SymbolTable.cpp
The file was modifiedlld/wasm/SyntheticSections.cpp
The file was modifiedlld/wasm/Relocations.cpp
The file was modifiedlld/wasm/Driver.cpp
The file was modifiedlld/wasm/Symbols.h
Commit 2fb5f4a1cf41af31eaf31ea90cdda7f644794b99 by stellaraccident
[mlir][Python] Add additional capsule interop types.

Differential Revision: https://reviews.llvm.org/D92144
The file was modifiedmlir/include/mlir-c/Bindings/Python/Interop.h
Commit 664e1da485d244325947d056a271c3c733ad4c7c by mkazantsev
[LoopLoadElim] Make sure all loops are in simplify form. PR48150

LoopLoadElim may end up expanding an AddRec from a loop
which is not the current loop. This loop may not be in simplify
form. We figure it out after the no-return point, so cannot bail
in this case.

AddRec requires simplify form to expand. The only way to ensure
this does not crash is to simplify all loops beforehand.

The issue only exists in new PM. Old PM requests LoopSimplify
required pass and it simplifies all loops before the opt begins.

Differential Revision: https://reviews.llvm.org/D91525
Reviewed By: asbirlea, aeubanks
The file was modifiedllvm/test/Transforms/LoopLoadElim/pr-48150.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopLoadElimination.cpp
Commit aea130f7366bd7af5bdb68391f033cd5c051768c by craig.topper
[LegalizerTypes] Add support for scalarizing the operand of an FP_EXTEND when the result type is legal.
The file was addedllvm/test/CodeGen/AArch64/neon-fpextend_f16.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
Commit f78ad68b6d8ccfd6e082e6430528751376084726 by craig.topper
[RISCV] Remove unused PatFrag argument from the tablegen class used for c.beqz/c.bnez. NFC
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoC.td
Commit f10500e220e354a80c53490158933ca2ede3be20 by mkazantsev
[IndVars] Use isLoopBackedgeGuardedByCond for last iteration check

Use more context to prove contextual facts about the last iteration. It is
only executed when the backedge is taken, so we can use `isLoopBackedgeGuardedByCond`
to make this check.

Differential Revision: https://reviews.llvm.org/D91535
Reviewed By: skatkov
The file was modifiedllvm/test/Transforms/IndVarSimplify/predicated_ranges.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit 2254e014a9019bf17c3f5cb27c1dc40ca0f2ffce by craig.topper
[RISCV] Add isel pattern to match (i64 (sra (shl X, 32), C)) to SRAIW if C > 32.
The file was modifiedllvm/test/CodeGen/RISCV/alu64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.td
Commit 14f2ad0e3cc54d5eb254b545a469e8ffdb62b119 by mkazantsev
[SCEV] Use isKnownPredicateAt in isLoopBackedgeGuardedByCond

A piece of code in `isLoopBackedgeGuardedByCond` basically duplicates
the dominators traversal from `isBlockEntryGuardedByCond` called from
`isKnownPredicateAt`, but it's less powerful because it does not give context
to `isImpliedCond`. This patch reuses the `isKnownPredicateAt `function there,
reducing the amount of code duplication and making it more powerful.

Differential Revision: https://reviews.llvm.org/D92152
Reviewed By: skatkov
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit c3673ea65df576535c85397dfe36624bd09fe47b by grimar
[llvm-readobj] - Fix a warning.

This addresses post review comment for D92018.

The warning was:

```
error: loop variable 'Note' is always a copy because the range of type 'iterator_range<llvm::object::ELFFile<llvm::object::ELFType<llvm::support::big, true> >::Elf_Note_Iterator>' (aka 'iterator_range<Elf_Note_Iterator_Impl<ELFType<(llvm::support::endianness)0U, true> > >') does not return a reference [-Werror,-Wrange-loop-analysis]
      for (const typename ELFT::Note &Note : Obj.notes(S, Err))
```
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
Commit 728634d0cfaacc9a5aff3e974066cd125a21a088 by kazu
[Support] Use llvm::is_contained (NFC)
The file was modifiedllvm/include/llvm/Support/GenericDomTreeConstruction.h
Commit dde0fcd7a7da4066c18ab5e73e0477e856da158f by marek.kurdej
[libc++] [libc++abi] Mark a few tests as unsupported/xfail on gcc-7/8/9.

This should make the builder http://lab.llvm.org:8011/#/builders/101/ happy.
It uses gcc-9 and not Tip-Of-Trunk as its name indicates BTW.
GCC-10 passes all these tests.

Fix gcc warnings: -Wsign-compare, -Wparentheses, -Wpragmas.

Reviewed By: ldionne, #libc, #libc_abi

Differential Revision: https://reviews.llvm.org/D92099
The file was modifiedlibcxx/test/std/strings/basic.string/string.cons/string_view_size_size_deduction.fail.cpp
The file was modifiedlibcxx/test/std/experimental/simd/simd.access/default.pass.cpp
The file was modifiedlibcxxabi/test/dynamic_cast.pass.cpp
The file was modifiedlibcxx/test/std/strings/basic.string/string.cons/string_view_deduction.fail.cpp
The file was modifiedlibcxxabi/test/unwind_06.pass.cpp
The file was modifiedlibcxx/test/support/filesystem_test_helper.h
The file was modifiedlibcxxabi/test/dynamic_cast5.pass.cpp
The file was modifiedlibcxxabi/test/dynamic_cast3.pass.cpp
Commit 6b429668ded1aa7de4d586fc6dc8a469799b4d9c by martin
[OpenMP][OMPT] Fix building with OMPT disabled after 6d3b81664a4b79
The file was modifiedopenmp/runtime/src/ompt-specific.h
Commit 69d25676246d05a10ab0bbee72835e82a962e404 by marek.kurdej
[libc++] [www] Fix HTML. NFC.

Needed for a future automatic update to RST.
The file was modifiedlibcxx/www/cxx2a_status.html
The file was modifiedlibcxx/www/cxx1z_status.html
Commit 345fcccb33795600b9c159908c606c5027a4ce19 by liuz
Fix use-of-uninitialized-value in rG75f50e15bf8f

Differential Revision: https://reviews.llvm.org/D71126
The file was modifiedllvm/lib/IR/LLVMContextImpl.cpp
The file was modifiedllvm/lib/IR/Constants.cpp
The file was modifiedllvm/lib/Transforms/Utils/FunctionComparator.cpp
Commit d1fd91ddaf9de95428a25d001606c23703e14b31 by zeratul976
[clangd] Do not treat line as inactive if skipped range ends at character position 0

Fixes https://github.com/clangd/clangd/issues/602

Differential Revision: https://reviews.llvm.org/D92148
The file was modifiedclang-tools-extra/clangd/SemanticHighlighting.cpp
The file was modifiedclang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp
Commit 53a14a47ee89dadb8798ca8ed19848f33f4551d5 by Raphael Isemann
[lldb] Fix TestThreadStepOut.py after "Flush local value map on every instruction"

After cf1c774d6ace59c5adc9ab71b31e762c1be695b1, Clang seems to generate code
that is more similar to icc/Clang, so we can use the same line numbers for
all compilers in this test.
The file was modifiedlldb/test/API/functionalities/thread/step_out/main.cpp
The file was modifiedlldb/test/API/functionalities/thread/step_out/TestThreadStepOut.py
Commit a5f98b541948ad22f16ef499b6e10f65bc2466e5 by marek.kurdej
[libc++] [docs] Migrate C++ status pages to RestructuredText (RST).

Currently, papers and issues are in separate .csv files (that is easier to update), but I can put them inline.Transforming current html tables into rst are done by the script (attached to the patch FYI but I'll remove it before committing).
I'll of course update RST files before committing to match any modifications that may happen in master branch.

This patch moves the status pages in www/ to RST format in docs/.

It also does some other minor changes: fix copyright year and broken comment end, adds substitutions for coherence (and add colors, but that can be removed easily).
It adds as well redirects from old to new status pages.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D92076
The file was modifiedlibcxx/docs/index.rst
The file was addedlibcxx/docs/Cxx1zStatusPaperStatus.csv
The file was addedlibcxx/docs/Styles.rst
The file was addedlibcxx/docs/Cxx2aStatusIssuesStatus.csv
The file was addedlibcxx/docs/Cxx2aStatusPaperStatus.csv
The file was addedlibcxx/docs/Cxx1yStatusPaperStatus.csv
The file was addedlibcxx/docs/Cxx1zStatus.rst
The file was modifiedlibcxx/www/cxx1y_status.html
The file was addedlibcxx/docs/Cxx2aStatus.rst
The file was modifiedlibcxx/www/cxx2a_status.html
The file was modifiedlibcxx/docs/conf.py
The file was addedlibcxx/docs/Cxx1zStatusIssuesStatus.csv
The file was modifiedlibcxx/www/cxx1z_status.html
The file was addedlibcxx/docs/Cxx1yStatus.rst
The file was addedlibcxx/docs/Cxx1yStatusIssuesStatus.csv
Commit 4f87d30a06dd08cec45cb595e9dbed6345c9a7c5 by jay.foad
[AMDGPU] Introduce and use isGFX10Plus. NFC.

It's more future-proof to use isGFX10Plus from the start, on the
assumption that future architectures will be based on current
architectures.

Also make use of the existing isGFX9Plus in a few places.

Differential Revision: https://reviews.llvm.org/D92092
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
Commit 841132efda2157c5f9e07cf31469470a6481ffd9 by marek.kurdej
[libc++] [P0966] [C++20] Fix bug PR45368 by correctly implementing P0966: string::reserve should not shrink.

This patch fixes the implementation as well as the tests that didn't actually test the wanted behaviour.
You'll find all the details in the bug report.
It adds as well deprecation warning for reserve() (without argument) and adds a test.

http://wg21.link/P0966R1
https://bugs.llvm.org/show_bug.cgi?id=45368
https://reviews.llvm.org/D54992

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D91778
The file was modifiedlibcxx/include/string
The file was modifiedlibcxx/docs/Cxx2aStatusPaperStatus.csv
The file was addedlibcxx/test/std/strings/basic.string/string.capacity/reserve.deprecated_in_cxx20.verify.cpp
The file was modifiedlibcxx/test/std/strings/basic.string/string.capacity/reserve.pass.cpp
The file was addedlibcxx/test/std/strings/basic.string/string.capacity/reserve_size.pass.cpp
The file was modifiedlibcxx/include/__config
The file was addedlibcxx/test/libcxx/strings/basic.string/string.capacity/reserve.pass.cpp
The file was modifiedlibcxx/docs/Cxx2aStatus.rst
Commit 8db009d273676ef4c20254b75f8f8b54dca44d38 by marek.kurdej
[libc++] Fix gcc warning -Wsign-compare.
The file was modifiedlibcxx/test/support/filesystem_test_helper.h
Commit 83d26603e0402befe32186d2a2706bdf79d0a1cf by koraq
[NFC][libc++] Mark LWG3296 as complete.

I recalled Marshall had already made this change. The change is
committed in e3f89a989a23b9bfcb9f9d01172cebb63db627e1.
The file was modifiedlibcxx/docs/Cxx2aStatusIssuesStatus.csv
Commit 3b6481eae2597f656b9f5bb6a5eb5438eb8cb294 by mkazantsev
Revert "[SCEV] Use isKnownPredicateAt in isLoopBackedgeGuardedByCond"

This reverts commit 14f2ad0e3cc54d5eb254b545a469e8ffdb62b119.

Reverting to investigate compile time drop.

Differential Revision: https://reviews.llvm.org/D92152
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
Commit d8ffb1f6a7572b64d5fa6b821c5c143e0e90bb6d by marek.kurdej
[llvm-profgen] [docs] Fix invalid header. Add to ToC. NFC.
The file was modifiedllvm/docs/CommandGuide/index.rst
The file was modifiedllvm/docs/CommandGuide/llvm-profgen.rst
Commit 8fb8fb2c607794fe4cde69713f2fa556f613dab1 by craig.topper
[RISCV] Add test cases for missed opportunities to use sbsetw/sbclrw/sbinvw when the result isn't known to be sign extended.

If the input isn't sign extended, but the output of the or/xor/and
is used by a sign_inreg we can still use sbsetw/sbclrw/sbinvw.
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbs.ll
Commit d9500c2e230e9cc68d3d647864fa824cc3c06b3f by craig.topper
[RISCV] Add isel patterns for sbsetw/sbclrw/sbinvw with sext_inreg as the root.

This handles cases were the input isn't known to be sign extended.
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbs.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
Commit 3d4c0460ec6040fc071e56dc113afd181294591e by mkazantsev
[SCEV] Use isBasicBlockEntryGuardedByCond in isLoopBackedgeGuardedByCond

Previously we tried to using isKnownPredicateAt, but it makes an
extra query to isKnownPredicate, which has negative impact on compile
time. Let's try to use more lightweight isBasicBlockEntryGuardedByCond.

Differential Revision: https://reviews.llvm.org/D92152
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
Commit 54ec9bb5510de301d05e8b34bb8c2484e8c95eaa by grimar
[llvm-readelf/obj] - Report a warning when the value of the DT_PLTREL dynamic tag is invalid.

We report an error for unknown `DT_PLTREL` values.
This switches the error to warning.

Differential revision: https://reviews.llvm.org/D92087
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
The file was modifiedllvm/test/tools/llvm-readobj/ELF/dynamic-reloc.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/broken-dynamic-reloc.test
Commit 91d6b6b5fb94656dc12e1d760a3213a3cd72c8c5 by mkazantsev
Revert "[SCEV] Use isBasicBlockEntryGuardedByCond in isLoopBackedgeGuardedByCond"

This reverts commit 3d4c0460ec6040fc071e56dc113afd181294591e.

Compile time impact is still high. Need to understand why.

Differential Revision: https://reviews.llvm.org/D92153
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
Commit f690986f314fbf3f4b3ca9ec0b87b95166008dc1 by mkazantsev
Return "[SCEV] Use isBasicBlockEntryGuardedByCond in isLoopBackedgeGuardedByCond", 2nd try

Reverted because the compile time impact is still too high.

isKnownViaNonRecursiveReasoning is used twice, we can do it just once.

Differential Revision: https://reviews.llvm.org/D92152
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
Commit 40783839e63a602157665d7ae3d4c9eea8fe8c9f by llvm-dev
[X86] Fix -DAG checks on gnux32 pic tests

Differential Revision: https://reviews.llvm.org/D91339
The file was modifiedllvm/test/CodeGen/X86/pic.ll
Commit 035955f9254179b2034fac8b16777973453e00d6 by mkazantsev
Revert "Return "[SCEV] Use isBasicBlockEntryGuardedByCond in isLoopBackedgeGuardedByCond", 2nd try"

This reverts commit f690986f314fbf3f4b3ca9ec0b87b95166008dc1.

Compile time then and again...
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit 4bee3197f665a8c2336a6cdd4bf5c4575b9e5fe7 by kerry.mclaughlin
[SVE][CodeGen] Extend isConstantSplatValue to support ISD::SPLAT_VECTOR

Updated the affected scalable_of_scalable tests in sve-gep.ll, as isConstantSplatValue now returns true in DAGCombiner::visitMUL and folds `(mul x, 1) -> x`

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D91363
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/test/CodeGen/AArch64/sve-gep.ll
Commit 5641b1dfddff847f7f3edc484537f9314c283225 by marek.kurdej
[libc++] Mark a few more tests as unsupported on gcc-8/9.

This will fix remaining failures on gcc-9 buildbot: http://lab.llvm.org:8011/#/builders/101.
gcc-8 and gcc-9 do not support constexpr destructors nor constexpr allocation.

Fix gcc warnings: -Wconversion, -Wpragmas.
The file was modifiedlibcxx/test/std/utilities/memory/specialized.algorithms/specialized.destroy/destroy_at.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/deallocate.pass.cpp
The file was modifiedlibcxx/test/std/utilities/meta/meta.trans/meta.trans.other/result_of11.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/allocate_hint.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/construct.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/allocate.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/specialized.algorithms/specialized.destroy/destroy_n.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/destroy.pass.cpp
The file was modifiedlibcxx/test/std/utilities/memory/default.allocator/allocator.members/allocate.pass.cpp
The file was modifiedlibcxxabi/src/demangle/Utility.h
The file was modifiedlibcxx/test/std/utilities/memory/specialized.algorithms/specialized.destroy/destroy.pass.cpp
Commit 45ba2392d7e00aedd4d9fb04070dbae8a7fbbeeb by abidh
[clang][Driver] Handle risvc in Baremetal.cpp.

I am working on a baremetal riscv toolchain using LLVM runtime and
LLD linker. Baremetal.cpp provides most of the things needed for such
toolchain. So I have modified it to also handle riscv64/32-unknown-elf
targets alongside arm-none-eabi.

Currently, targets like riscv64-unknown-elf are handled by RISCVToolChain
which mostly expects a gcc toolchain to be present. If you dont
want the dependency on gcc-toolchain/libgloss or want to use LLD, then
RISCVToolChain is not a good fit.

So in the toolchain selection code, I have made this dependency of
RISCVToolChain on gcc toolchain explicit. It is created if gcc-toolchain
option is present. Otherwise Baremetal toolchain is created. I will be
happy to hear if there is a better way to choose between these two
toolchains.

Reviewed By: jroelofs

Differential Revision: https://reviews.llvm.org/D91442
The file was modifiedclang/test/Driver/riscv32-toolchain-extra.c
The file was modifiedclang/test/Driver/baremetal.cpp
The file was modifiedclang/test/Driver/riscv-gnutools.c
The file was modifiedclang/lib/Driver/ToolChains/RISCVToolchain.cpp
The file was modifiedclang/test/Driver/riscv64-toolchain.c
The file was modifiedclang/lib/Driver/ToolChains/RISCVToolchain.h
The file was modifiedclang/lib/Driver/Driver.cpp
The file was modifiedclang/test/Driver/riscv32-toolchain.c
The file was modifiedclang/test/Driver/riscv64-toolchain-extra.c
The file was modifiedclang/lib/Driver/ToolChains/BareMetal.cpp
Commit 926681b6be701176f4f806e28932e8013fe4dec1 by flo
[CostModel] Add basic implementation of getGatherScatterOpCost.

Add a basic implementation of getGatherScatterOpCost to BasicTTIImpl.

The implementation estimates the cost of scalarizing the loads/stores,
the cost of packing/extracting the individual lanes and the cost of
only selecting enabled lanes.

This more accurately reflects the current cost on targets like AArch64.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D91984
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll
The file was modifiedllvm/test/Analysis/CostModel/AArch64/mem-op-cost-model.ll
Commit 2da8fa4ebf1077b35c1bc618616ec902e737c11b by llvm-dev
[X86] Extend neg-abs test coverage

Add 32-bit tests and test i8/i16/i32/i64/i128 like we do for abs.ll
The file was modifiedllvm/test/CodeGen/X86/neg-abs.ll
Commit 1ca174b6420a49bcd3331d6f86e237b627163597 by platonov.aleksandr
[clangd][query-driver] Extract target

In some cases system includes extractions is not enough, we also need target specific defines.
The problems appears when clang default target is not the same as toolchain's one (GCC cross-compiler, MinGW on Windows).
After this patch `query-driver` also extracts target and adds `--target=<extracted target>` compile option.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D92012
The file was modifiedclang-tools-extra/clangd/test/system-include-extractor.test
The file was modifiedclang-tools-extra/clangd/QueryDriverDatabase.cpp
Commit 4dd5f79f07022dbbff547f4aff13b27134331215 by herhut
[mlir][bufferize] Add argument materialization for bufferization

This enables partial bufferization that includes function signatures. To test this, this
change also makes the func-bufferize partial and adds a dedicated finalizing-bufferize pass.

Differential Revision: https://reviews.llvm.org/D92032
The file was modifiedmlir/include/mlir/Transforms/Passes.td
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/FuncBufferize.cpp
The file was modifiedmlir/include/mlir/Dialect/StandardOps/Transforms/Passes.td
The file was modifiedmlir/include/mlir/Dialect/StandardOps/Transforms/FuncConversions.h
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/FuncConversions.cpp
The file was addedmlir/test/Dialect/Standard/func-bufferize-partial.mlir
The file was modifiedmlir/test/Dialect/Standard/func-bufferize.mlir
The file was modifiedmlir/include/mlir/Transforms/Passes.h
The file was modifiedmlir/lib/Transforms/Bufferize.cpp

Summary

  1. Do not collapse build requests with different property sets. (details)
Commit acf138fae1adab346a4c967cc0b7e9247fbc83d8 by gkistanova
Do not collapse build requests with different property sets.
The file was modifiedzorg/buildbot/process/buildrequest.py