AbortedChanges

Summary

  1. phab doc: Replace or remove references to svn (details)
  2. AMDGPU/GlobalISel: Widen 16-bit shift amount sources (details)
  3. AMDGPU/GlobalISel: Fix argument lowering for vectors of pointers (details)
  4. GlobalISel: Don't assert on MoreElements creating vectors (details)
  5. TableGen/GlobalISel: Address fixme (details)
  6. GlobalISel: Move getLLTForMVT/getMVTForLLT (details)
  7. Add gdb pretty printer for MutableArrayRef, remove ConstArrayRef. (details)
  8. Add builtins for aligning and checking alignment of pointers and (details)
  9. [mlir] mlir-cpu-runner test's cblas_interface should export functions on (details)
  10. [mlir] add a missing dependency for Linalg conversion (details)
  11. [AArch64][GlobalISel] Implement selection of <2 x float> vector splat. (details)
  12. CodeGen: Use LLT instead of EVT in getRegisterByName (details)
  13. GlobalISel: Fix else after return (details)
  14. DAG: Don't use unchecked dyn_cast (details)
  15. GlobalISel: Handle llvm.read_register (details)
  16. TableGen/GlobalISel: Add way for SDNodeXForm to work on timm (details)
  17. TableGen/GlobalISel: Fix pattern matching of immarg literals (details)
  18. [lldb/Lua] Add lua typemaps for INOUT params (details)
  19. [mlir] Use getDenseElementBitwidth instead of (details)
  20. When diagnosing the lack of a viable conversion function, also list (details)
  21. AVR: Update for getRegisterByName change (details)
  22. [lldb] Remove spurious file (details)
  23. [AMDGPU] Fix bundle scheduling (details)
  24. When reading Aux file in chunks, read consecutive byte ranges (details)
  25. [ELF] Fix includeInDynsym() when an undefined weak is merged with a lazy (details)
  26. AMDGPU/GlobalISel: Fix G_EXTRACT_VECTOR_ELT mapping for s-v case (details)
  27. AMDGPU/GlobalISel: Select G_EXTRACT_VECTOR_ELT (details)
  28. Relax opcode checks in test for G_READCYCLECOUNTER to check for only a (details)
  29. CWG2352: Allow qualification conversions during reference binding. (details)
  30. [NFC] Style cleanup (details)
  31. fix a few typos to cycle the bots (details)
  32. fix another typo to cycle bots (details)
  33. [ThinLTO] Pass CodeGenOpts like UnrollLoops/VectorizeLoop/VectorizeSLP (details)
  34. [xray] Remove cl::sub from alias options (details)
  35. clang-tidy doc - remove the widths (details)
  36. [Syntax] Update comment, remove stale FIXME. NFC (details)
  37. [LV] VPValues for memory operation pointers (NFCI) (details)
  38. Restore order in clang-tidy section of release notes (details)
  39. Allow system header to provide their own implementation of some builtin (details)
  40. [NFC] [PowerPC] Add isPredicable for basic instrs (details)
  41. [clangd] Improve type printing in hover (details)
  42. [clangd] Fix markdown rendering in VSCode (details)
  43. Fix several issues with compiler extensions (details)
  44. [SVEV] Recognise hardware-loop intrinsic loop.decrement.reg (details)
  45. Follow up of 67bf9a6154d4b82c, minor fix in test case, removed duplicate (details)
  46. [libcxx] Force-cache LIBCXX_CXX_ABI_LIBRARY_PATH (details)
  47. [CMake] Support running libc++abi tests in CrossWinToARMLinux cache file (details)
  48. XFAIL load_extension.ll test on macOS only (details)
  49. [MIR] Fix cyclic dependency of MIR formatter (details)
  50. [LV] Silence unused variable warning in Release builds. NFC. (details)
  51. Don't use dyn_cast_or_null if we know the pointer is nonnull. (details)
  52. [X86][AVX] Add tests for v8f32/v8i32 089abcde and 0189abcd shuffles (details)
  53. Fix Wdocumentation warning. NFCI. (details)
  54. Fix Wdocumentation warning. NFCI. (details)
  55. Data formatters: Look through array element typedefs (details)
  56. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  57. [ARM,MVE] Make `vqrshrun` generate the right instruction. (details)
  58. [ARM][Thumb2] Fix ADD/SUB invalid writes to SP (details)
  59. [lldb/lua] Make convenience_variables.test compatible with lua-5.1 (details)
  60. [lldb/DWARF] Don't automatically search dwo unit attributes (details)
  61. [CodeComplete] Suggest 'return nullptr' in functions returning pointers (details)
  62. [lldb] Surpress "bitfield too small" gcc warning (details)
  63. [Support] ThreadPoolExecutor fixes for Windows/MinGW (details)
  64. [lldb][tests] Take into account all parent's categories when traverse (details)
  65. [lldb][test] NFC, re-use _getTestPath() function (details)
  66. [FPEnv] Generate constrained FP comparisons from clang (details)
  67. [lldb][tests] Cleanup '.categories' (details)
  68. Reverting, broke some bots. Need further investigation. (details)
  69. Sprinkle some constexpr on default ctors so the compiler can diagnose (details)
  70. ARMLowOverheadLoops: a few more dbg msgs to better trace rejected TP (details)
  71. RangeDataVector: Support custom sorting for D63540 (details)
  72. [ARM][MVE] Tail predicate VMAX,VMAXA,VMIN,VMINA (details)
  73. [FPEnv] Invert sense of MIFlag::FPExcept flag (details)
  74. [lldb][tests][NFC] Unify variable naming convention (details)
  75. [lldb][tests] Make it possible to expect failure for a whole category (details)
  76. AMDGPU/GlobalISel: Clamp G_ZEXT source sizes (details)
  77. [LIBOMPTARGET]Ignore empty target descriptors. (details)
  78. [DebugInfo] Improve error message text (details)
  79. [DebugInfo][NFC] Remove unused variable/fix variable naming (details)
  80. [NFC] format unittest for ExprMutAnalyzer (details)
  81. [PowerPC] Handle constant zero bits in BitPermutationSelector (details)
  82. Add support for __declspec(guard(nocf)) (details)
  83. Add missing nullptr checks. (details)
  84. [analyzer] Add PlacementNewChecker (details)
  85. [mlir][spirv] Fix typos related to (de)serialization. (details)
  86. [InstCombine] add tests for fsub; NFC (details)
  87. [BPF] extend BTF_KIND_FUNC to cover global, static and extern funcs (details)
  88. [clangd] Fix targetDecl() on certain usage of ObjC properties. (details)
  89. [gn build] Port 5e7beb0a414 (details)
  90. [X86][AVX] lowerShuffleAsLanePermuteAndShuffle - consistently normalize (details)
  91. Fix "pointer is null" static analyzer warning. NFCI. (details)
  92. Fix "pointer is null" static analyzer warning. NFCI. (details)
  93. [examples] Add missing dependency in llvm examples (details)
  94. [AIX] Allow vararg calls when all arguments reside in registers (details)
  95. Fix "pointer is null" static analyzer warning. NFCI. (details)
  96. [AArch64] Add function attribute "patchable-function-entry" to add NOPs (details)
  97. [X86] Support function attribute "patchable-function-entry" (details)
  98. Support function attribute patchable_function_entry (details)
  99. [Driver][CodeGen] Add -fpatchable-function-entry=N[,0] (details)
  100. [ELF] Make TargetInfo::writeIgotPlt a no-op (details)
  101. [LegalizeVectorOps] Improve handling of multi-result operations. (details)
  102. [lldb] Remove FieldDecl stealing hack by rerouting indirect imports to (details)
  103. [lldb/Lua] Support loading Lua modules (details)
  104. Update the attribution policy to use the 'Author' property of a git (details)
  105. [analyzer] Move PlacementNewChecker to alpha (details)
  106. [TargetLowering][ARM][X86] Change softenSetCCOperands handling of ONE to (details)
  107. [lld][WebAssembly] Add libcall symbols to the link when LTO is being (details)
  108. [CMake] Fix modules build after DWARFLinker reorganization (details)
  109. [clang] Fix out-of-bounds memory access in ComputeLineNumbers (details)
  110. [Driver][PowerPC] Move powerpcspe logic from cc1 to Driver (details)
  111. [ASTMatchers] Make test more clear about what it is verifying (details)
  112. [Tests] Precommit tests showing default branch padding on skylake (details)
  113. [lldb] Make CompleteTagDeclsScope completion order deterministic (details)
  114. [lldb] Fix TestClangASTContext.TestFunctionTemplateInRecordConstruction (details)
  115. Implement new AST matcher hasAnyCapture to match on LambdaExpr captures. (details)
  116. MakeUniqueCheck.cpp: explicit the fact that there is an autofix for this (details)
  117. clang-tidy doc: Refresh the list of checkers and polish the script (details)
  118. [TargetLowering] Use SelectionDAG::getSetCC and remove a repeated call (details)
  119. clang-tidy doc: unbreak the CI (details)
  120. Summary: update macro for OFF_T so that sanitizer works on AARCH64. (details)
  121. [lldb/Scripts] Remove buildbot.py (details)
  122. [lldb/Scripts] Remove remote-build.py (details)
  123. [lldb/Scripts] Move android script from underneath Python dir (details)
  124. [AArch64] Add isAuthenticated predicate to MCInstDesc (details)
  125. [lldb/Test] Bypass LLDB_TEST_COMMON_ARGS for certain dotest args (NFC) (details)
  126. [lldb/Utils] Remove vim-lldb (details)
  127. lldbutil: Forward ASan launch info to test inferiors (details)
  128. Let targets adjust operand latency of bundles (details)
  129. [lldb/Reproducer] Add SBReproducer::Replay overload (again) (details)
  130. Only destroy static locals if they have non-trivial destructors. (details)
  131. [LockFileManager] Make default waitForUnlock timeout a parameter, NFC (details)
  132. [NFC][InlineCost] Factor cost modeling out of CallAnalyzer traversal. (details)
  133. [mlir] NFC: put C++ code emission classes in their own files (details)
  134. [mlir][ods] Support dialect specific content emission via hooks (details)
  135. Improve precision of documentation comment. (details)
  136. [AArch64] Don't generate libcalls for wide shifts on Darwin (details)
  137. Remove redundant implicit cast creation. (details)
  138. Add a FIXME and corresponding test coverage for some suspicious behavior (details)
  139. Clean up and slightly generalize implementation of composite pointer (details)
  140. driver: Allow -fdebug-compilation-dir=foo in joined form. (details)
  141. [Driver] Fix OptionClass of -fconvergent-functions and -fms-volatile (details)
  142. [Concepts] Fix MarkUsedTemplateParameters for exprs (details)
  143. Remove umask tests (details)
  144. [COFF] Align ARM64 range extension thunks at instruction boundary (details)
  145. [TargetLowering][ARM][Mips][WebAssembly] Remove the ordered FP compare (details)
  146. [SCEV] [NFC] add more test cases for range of addrecexpr with nsw flag (details)
  147. [NFC] [PowerPC] Update mi-peephole-splat test (details)
  148. [AMDGPU] Remove unnecessary v_mov from a register to itself in WQM (details)
  149. Mark the test/Feature/load_extension.ll test as unsupported on Darwin. (details)
  150. [X86] Use ReplaceAllUsesWith instead of ReplaceAllUsesOfValueWith to (details)
  151. [X86][Disassembler] Simplify readPrefixes (details)
  152. [X86] Preserve fpexcept property when turning strict_fp_extend and (details)
  153. [X86] Simplify code by removing an unreachable condition. NFCI (details)
  154. Add test for GDB pretty printers. (details)
  155. [X86] Remove dead code from X86DAGToDAGISel::Select that is no longer (details)
  156. [InstCombine] Preserve nuw on sub of geps (PR44419) (details)
  157. [LoopSimplify] Regenerate test checks; NFC (details)
  158. [LoopRotate] Add tests for rotate with switch; NFC (details)
  159. DSE: fix bug where we would only check libcalls for name rather than (details)
  160. [X86] Add more complex tests for vector masks used with AND/OR/XOR. (details)
  161. [X86][AVX] Add lowerShuffleAsLanePermuteAndSHUFP lowering (details)
  162. Fix copy+paste typo in shuffle test name (details)
  163. [Sema] Improve -Wrange-loop-analysis warnings. (details)
  164. [X86] Fix outdated comment (details)
  165. moveOperands - assert Src/Dst MachineOperands are non-null. (details)
  166. Remove copy ctors identical to the default one. NFC. (details)
  167. Fix uninitialized value clang static analyzer warning. NFC. (details)
  168. Fix "pointer is null" static analyzer warning. NFCI. (details)
  169. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  170. Fix "pointer is null" static analyzer warning. NFCI. (details)
  171. Fix "pointer is null" static analyzer warning. NFCI. (details)
  172. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  173. GlobalModuleIndex - Fix use-after-move clang static analyzer warning. (details)
  174. [X86AsmBackend] Be consistent about placing definitions out of line (details)
  175. [X86AsmBackend] Move static function before sole use [NFC] (details)
  176. [X86] Adjust nop emission by compiler to consider target decode (details)
  177. [mlir] NFC: Remove Value::operator* and Value::operator-> now that Value (details)
  178. [ASTMatchers] extract public matchers from const-analysis into own patch (details)
  179. Revert "[ASTMatchers] extract public matchers from const-analysis into (details)
  180. [ExecutionEngine] Re-enable FastISel for non-iOS arm targets. (details)
  181. Add -Wrange-loop-analysis changes to ReleaseNotes (details)
  182. [X86] Turn FP_ROUND/STRICT_FP_ROUND into (details)
  183. [X86][Disassembler] Simplify and optimize reader functions (details)
  184. [LegalizeVectorOps] Only pass SDNode* instead SDValue to all of the (details)
  185. [LegalizeVectorOps] Remove some of the simpler Expand methods. Pass (details)
  186. [X86][Disassembler] Replace custom logger with LLVM_DEBUG (details)
  187. [Support] Optionally call signal handlers when a function wrapped by the (details)
  188. [ORC] Fix argv handling in runAsMain / lli. (details)
  189. [Disassembler] Delete the VStream parameter of (details)
  190. [X86][Disassembler] Optimize argument passing and immediate reading (details)
  191. [X86][Disassembler] Shrink X86GenDisassemblerTables.inc from 36M to 6.1M (details)
  192. [LegalizeVectorOps] Expand vector MERGE_VALUES immediately. (details)
  193. [TargetLowering][X86] Connect the chain from STRICT_FSETCC in (details)
  194. [LegalizeVectorOps] Parallelize the lo/hi part of STRICT_UINT_TO_FLOAT (details)
  195. [SCEV] more accurate range for addrecexpr with nsw flag. (details)
  196. [X86] Don't call LowerSETCC from LowerSELECT for (details)
  197. [NFC] Refactor memory ops cluster method (details)
  198. [profile] Support merge pool size >= 10 (details)
  199. [X86][Disassembler] Simplify (details)
  200. [X86][Disassembler] Merge X86DisassemblerDecoder.cpp into (details)
  201. [X86][AVX] lowerShuffleAsLanePermuteAndSHUFP - only set the demanded (details)
  202. [X86][AVX] Use lowerShuffleAsLanePermuteAndSHUFP to lower binary v4f64 (details)
  203. [AMDGPU] Regenerate shl shift tests (details)
  204. [MIPS] Regenerate shl/lshr shift tests (details)
  205. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  206. [PowerPC] Delete PPCDarwinAsmPrinter and PPCMCAsmInfoDarwin (details)
  207. [NFC] Fix compilation of CrashRecoveryContext.cpp on mingw (details)
  208. __patchable_function_entries: don't use linkage field 'unique' with (details)
  209. [AMDGPU] Add gfx8 assembler and disassembler test cases (details)
  210. [MC][ELF] Emit a relocation if target is defined in the same section and (details)
  211. Fix "pointer is null" static analyzer warning. NFCI. (details)
  212. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  213. [RISCV] Check register class for AMO memory operands (details)
  214. [SCEV] accurate range for addrecexpr with nuw flag (details)
  215. [clangd] Assert that the testcases in FindExplicitReferencesTest.All (details)
  216. [clangd] Show template arguments in type hierarchy when possible (details)
  217. AMDGPU/GlobalISel: Copy type when inserting readfirstlane (details)
  218. AMDGPU/GlobalISel: Don't use XEXEC class for SGPRs (details)
  219. AMDGPU: Split test function (details)
  220. [X86] Use SDNPOptInGlue instead of SDNPInGlue on a couple SDNodes. (details)
  221. [DWARF5][DebugInfo]: Added support for DebugInfo generation for auto (details)
  222. [DWARF5][clang]: Added support for DebugInfo generation for auto return (details)
  223. [SCEV] Follow up of D71563: addressing post commit comment. NFC. (details)
  224. [NFC] Update loop.decrement.reg intrinsic comment (details)
  225. Add zero_extendi and sign_extendi to intrinsic namespace (details)
  226. [lldb] Mark several tests as not dependent on debug info (details)
  227. [RISCV] Collect Statistics on Compressed Instructions (details)
  228. [clangd] Publish xref for macros from Index and AST. (details)
  229. Revert "[DWARF5][clang]: Added support for DebugInfo generation for auto (details)
  230. [lldb] Fix eh-frame-small-fde test for changes in lld (details)
  231. This option allows selecting the TLS size in the local exec TLS model, (details)
  232. ARMLowOverheadLoops: return earlier to avoid printing irrelevant dbg (details)
  233. [DebugInfo][Support] Replace DWARFDataExtractor size function (details)
  234. [lldb][NFC] Use range-based for loops in IRInterpreter (details)
  235. [lldb] Fix lookup of symbols with the same address range but different (details)
  236. [X86] Fix MSVC "truncation from 'int' to 'bool'" warning. NFCI. (details)
  237. [SelectionDAG] ComputeKnownBits - minimum leading/trailing zero bits in (details)
  238. [llvm-exegesis][mips] Expand loadImmediate() (details)
  239. [clangd] Remove raw string literals in macros (details)
  240. [X86][SSE] Add knownbits test showing missing (details)
  241. [SelectionDAG] ComputeKnownBits add getValidMinimumShiftAmountConstant() (details)
  242. [clang] Remove raw string literals in macros (details)
  243. [lldb][NFC] Remove debug print statement from TestExprDiagnostics.py (details)
  244. [llvm-exegesis] Remove unneeded std::move() (details)
  245. GlobalISel: Fix assertion on wide G_ZEXT sources (details)
  246. [FPEnv] Fix chain handling for fpexcept.strict nodes (details)
  247. Revert "[libc++] Explicitly enumerate std::string external (details)
  248. [X86] Add knownbits tests showing missing shift amount demanded elts (details)
  249. [SelectionDAG] ComputeKnownBits - Add DemandedElts support to (details)
  250. [SelectionDAG] ComputeNumSignBits - Use getValidShiftAmountConstant for (details)
  251. [InstSimplify] move tests for select from InstCombine; NFC (details)
  252. [MIPS][ELF] Use PC-relative relocations in .eh_frame when possible (details)
  253. [MIPS] Don't emit R_(MICRO)MIPS_JALR relocations against data symbols (details)
  254. [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below (details)
  255. Add missing triples to tests in 0c29d3ff2233696f663ae34a8aeda23c750ac68f (details)
  256. Sema::getOwningModule - take const Decl* type. (details)
  257. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  258. Fix some cppcheck shadow variable warnings. NFCI. (details)
  259. Merge isVectorType() and getAs<VectorType> calls to silence clang static (details)
  260. Fix cppcheck uninitialized variable in DiffTree() constructor warning. (details)
  261. [RISCV] Handle globals and block addresses in asm operands (details)
  262. [Clang][Driver] Re-use the calling process instead of creating a new (details)
  263. [mlir][Linalg] Update ReshapeOp::build to be more idiomatic (details)
  264. [Inlining] Add PreInlineThreshold for the new pass manager (details)
  265. [mlir] Added missing GPU lowering ops. (details)
  266. [mlir] m_Constant() (details)
  267. [DebugInfo] Make debug line address size mismatch non-fatal to parsing (details)
  268. [ThinLTO] Add additional ThinLTO pipeline testing with new PM (details)
  269. [AArch64][SVE] Add patterns for some arith SVE instructions. (details)
  270. [Scheduler] Remove superfluous casts. NFC (details)
  271. [X86] Add AVX2 known signbits codegen tests (details)
  272. [X86][SSE] Add sitofp(ashr(x,y)) test case with non-uniform shift value (details)
  273. [SelectionDAG] ComputeNumSignBits add (details)
  274. [LegalizeTypes] Add SoftenFloatResult support for (details)
  275. [lldb/Scripts] Remove SWIG bot (details)
  276. Fix tests for builtbot failures (details)
  277. [lldb/Docs] Extend description section of the main page (details)
  278. [X86][SSE] Add sitofp(shl(sext(x),y)) test case with non-uniform shift (details)
  279. AMDGPU/GlobalISel: Simplify assert (details)
  280. AMDGPU/GlobalISel: Fix branch targets when emitting SI_IF (details)
  281. AMDGPU/GlobalISel: Add some baseline tests for vector extract (details)
  282. AMDGPU/GlobalISel: Set insert point after waterfall loop (details)
  283. [SelectionDAG] ComputeNumSignBits add (details)
  284. AMDGPU/GlobalISel: Select llvm.amdgcn.ds.ordered.{add|swap} (details)
  285. Try number 2 for fixing bot failures (details)
  286. Unbreak the mlir build after 202ab273e6eca134b69882f100c666fcd3affbcf (details)
  287. Fix readability-identifier-naming missing member variables (details)
  288. Hopefully last fix for bot failures (details)
  289. [llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex MachineOperands. (details)
  290. [X86][Disassembler] Fix a bug when disassembling an empty string (details)
  291. Add a couple of missed wildcards in debug-pass-manager output checking (details)
  292. Revert "[ThinLTO] Add additional ThinLTO pipeline testing with new PM" (details)
  293. [gn build] (manually) port b4a99a061f51 (details)
  294. [clangd] Render header of hover card as a heading (details)
  295. [clangd] Include expression in DecltypeTypeLoc sourcerange while (details)
  296. [lldb-server] Remove dead CMake code (details)
  297. [Clang] Always set -z now linker option on Fuchsia (details)
  298. Rework be15dfa88fb1 such that it works with GlobalISel which doesn't use (details)
  299. [LTO] Constify lto::Config reference passed to backends (NFC) (details)
  300. [Dsymutil][Debuginfo][NFC] #3 Refactor dsymutil to separate DWARF (details)
  301. [InstCombine] add tests for select --> copysign; NFC (details)
  302. Fix a test case by adding -fno-delayed-template-parsing. (details)
  303. [NFC][clang][IFS] Adding braces to if-statement as prep for D71301. (details)
  304. [clang][IFS] Prevent Clang-IFS from Leaking symbols from inside a block. (details)
  305. [lldb] Revert ddf044290ede for TestProcessAPI.py (details)
  306. [LegalizeIntegerTypes][X86] Add support for expanding input of (details)
  307. [mlir] Change the syntax of AffineMapAttr and IntegerSetAttr to avoid (details)
  308. Implement VectorType conditional operator GNU extension. (details)
  309. [InstCombine] add FMF to tests for more coverage; NFC (details)
  310. [ItaniumCXXABI] Make tls wrappers properly comdat (details)
  311. [ThinLTO/WPD] Fix index-based WPD for alias vtables (details)
  312. PR44514: Fix recovery from noexcept with non-convertible expressions (details)
  313. [mlir] Remove unnecessary assert for single region. (details)
  314. Revert "[DWARF5][DebugInfo]: Added support for DebugInfo generation for (details)
  315. [clang][IFS][test] Fixing mangled name of a test for Darwin. (details)
  316. [PGO][CHR] Guard against 0-to-0 branch weight and avoid division by zero (details)
  317. [lldb-server] Prefer target_include_directories (details)
  318. [mlir] Update the use-list algorithms in SymbolTable to support nested (details)
  319. [mlir] Update the CallGraph for nested symbol references, and simplify (details)
  320. [DebugInfo] Add another level to DebugInfoKind called Constructor (details)
  321. [mlir] Add support for attaching a visibility to symbols. (details)
  322. [mlir] NFC: Remove unused variable. (details)
  323. Re-enable testing of .s tests under test/CodeGen/X86. (details)
  324. [GlobalISel] Change representation of shuffle masks in MachineOperand. (details)
  325. [llvm-exegesis] Initialize const bitvector member (details)
  326. [LanguageRuntime] Retire an unused member function. NFCI. (details)
  327. try to fix InterfaceStubs/lambda.cpp on Windows after bd8c8827d96f0 (details)
  328. [lldb/Utility] Add std::move to make placate clang 3.8 (details)
  329. [mlir] [VectorOps] fixed typo in verifier of slice op (details)
  330. [clang] [test] Fix riscv-toolchain-extra to be less picky about paths (details)
  331. [X86] Add test to show that nofpexcept flag is not preserved by stack (details)
  332. [X86] Copy the nofpexcept flag when folding a load into an instruction (details)
  333. [MLIR] Fix broken link locations after move to monorepo (details)
  334. [PowerPC] [NFC] set instruction number as 1st priority of lsr cost (details)
  335. [MC] Don't resolve relocations referencing STB_LOCAL STT_GNU_IFUNC (details)
  336. [ELF] Add -z force-ibt and -z shstk for Intel Control-flow Enforcement (details)
  337. [OpenMP][Tool] Make tests for archer dependent on TSan (details)
  338. [ELF] Delete unintended --force-bti (details)
  339. [OpenMP][Tool] Improving stack trace for Archer (details)
  340. [AMDGPU] Add gfx9 assembler and disassembler test cases (details)
  341. [AMDGPU] Improve error checking in gfx10 assembler tests (details)
  342. [AMDGPU] Remove duplicate gfx10 assembler and disassembler tests (details)
  343. [lldb] Fix that SBThread.GetStopDescription is returning strings with (details)
  344. [lldb] Don't defend against internal LLVM errors in IRInterpreter (details)
  345. [mlir] Fix -Wunused (details)
  346. [AMDGPU] Fix getInstrLatency() always returning 1 (details)
  347. [lldb][NFC] Rewrite python_api/rdar-12481949 test (details)
  348. [libcxx] [test] Add casts to avoid signed/unsigned mismatch warnings on (details)
  349. [AMDGPU] Model distance to instruction in bundle (details)
  350. [llvm-readobj][test] - Fix grammar in comments. (details)
  351. [clang-tidy] Ignore implicit casts in modernize-use-default-member-init (details)
  352. [TableGen] Introduce a `defvar` statement. (details)
  353. [TableGen] Introduce an if/then/else statement. (details)
  354. [Target] Fix uninitialized value in (details)
  355. [ARM][MVE] Masked gathers from base + vector of offsets (details)
  356. [mlir] Add loop.parallel, loop.reduce and loop.reduce.return operations. (details)
  357. [mlir] Ran git-clang-format. (details)
  358. [lldb][NFC] Cleanup ClangASTContext::CompleteTagDeclarationDefinition (details)
  359. [mlir] Create a gpu.module operation for the GPU Dialect. (details)
  360. [RISCV] Fix ILP32D lowering for double+double/double+int return types (details)
  361. [mlir] Fix translation of splat constants to LLVM IR (details)
  362. [ARM][MVE] Disallow VPSEL for tail predication (details)
  363. [SelectionDAG] ComputeKnownBits - merge (details)
  364. [X86][SSE] Add add(shl(and(x,c1),c2),c3) test case with non-uniform (details)
  365. [ARM][Thumb2] Fix ADD/SUB invalid writes to SP (details)
  366. [ARM][LowOverheadLoops] Change predicate inspection (details)
  367. [SelectionDAG] ComputeKnownBits - merge (details)
  368. Fix "MIParser::getIRValue(unsigned int)’ defined but not used" warning. (details)
  369. [ARM][LowOverheadLoops] Allow all MVE instrs. (details)
  370. [lldb/Expression] Improve interpreter error message with a non-running (details)
  371. [ARM,MVE] Use the new Tablegen `defvar` and `if` statements. (details)
  372. [unittests] Fix "comparison of integers of different signs" warnings (details)
  373. Make helper functions static or move them into anonymous namespaces. (details)
  374. [FPEnv] Fix chain handling regression after 04a8696 (details)
  375. [RISCV][NFC] Deduplicate Atomic Intrinsic Definitions (details)
  376. [FPEnv] Add some comments to IRBuilder.h (details)
  377. [lldb][NFC] Make name parameter in AddMethodToCXXRecordType a StringRef (details)
  378. [TableGen] Update editor modes for new keywords. (details)
  379. [InstSimplify] add tests for vector select; NFC (details)
  380. AArch64: fix bitcode upgrade of @llvm.neon.addp. (details)
  381. Expression eval lookup speedup by not returning methods in (details)
  382. Fix "null pointer passed to nonnull argument" clang static analyzer (details)
  383. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  384. Merge isa<> and getAs<> calls to fix "pointer is null" static analyzer (details)
  385. Remove duplicate variable. NFCI. (details)
  386. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  387. Fix "pointer is null" static analyzer warning. NFCI. (details)
  388. [llvm-readobj][llvm-readelf][test] - Add a few more dynamic section (details)
  389. [lldb/DWARF] Move location list sections into DWARFContext (details)
  390. [AIX] ExternalSymbolSDNode lowering (details)
  391. [DBG][LIVEDEBUGVALUES][NFC] Add Targeted LiveDebugValues Behaviour (details)
  392. [OpenCL] Add MSAA sharing extension builtin functions (details)
  393. Revert "Recommit "[GlobalOpt] Pass DTU to removeUnreachableBlocks (details)
  394. [AArch64] Fix save register pairing for Windows AAPCS (details)
  395. Revert "[DBG][LIVEDEBUGVALUES][NFC] Add Targeted LiveDebugValues (details)
  396. [clang-tidy] Match InitListExpr in modernize-use-default-member-init (details)
  397. [Syntax] Assert invariants on tree structure and fix a bug in mutations (details)
  398. [Syntax] Mark synthesized nodes as modifiable (details)
  399. [DBG][LIVEDEBUGVALUES][NFC] Add Targeted LiveDebugValues Behaviour (details)
  400. [scudo][standalone] Fork support (details)
  401. [Syntax] Unset IsOriginal flag on nodes removed from the tree (details)
  402. [ARM][MVE] VTP Block Pass fix (details)
  403. [clang][OpenCL] Fix covered switch warning (details)
  404. Fix "pointer is null" clang static analyzer warnings. NFCI. (details)
  405. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  406. [IR] fix potential crash in Constant::isElementWiseEqual() (details)
  407. [lldb/Utility] Use assert instead of llvm_unreachable for LLDBAssert (details)
  408. [RISCV] Add Clang frontend support for Bitmanip extension (details)
  409. [test] Make data layout of load-bitcast64.ll explicit, use (details)
  410. Removed PointerUnion3 and PointerUnion4 aliases in favor of the variadic (details)
  411. [ELF] --exclude-libs: don't assign VER_NDX_LOCAL to undefined symbols (details)
  412. [InstCombine] Let combineLoadToNewType preserve ABI alignment of the (details)
  413. [AIX][XCOFF] Supporting the ReadOnlyWithRel SectionKnd (details)
  414. SCC: Allow ReplaceNode to safely support insertion (details)
  415. [X86] Directly emit a BROADCAST_LOAD from constant pool in (details)
  416. [ThinLTO] Handle variable with twice promoted name (Rust) (details)
  417. [ELF] Delete the RelExpr member R_HINT. NFC (details)
  418. [ThinLTO/WPD] Remove an overly-aggressive assert (details)
  419. [RISCV] Allow shrink wrapping for RISC-V (details)
  420. Added readability-qualified-auto check (details)
  421. [gn build] Port 36fcbb838c8 (details)
  422. [lldb/test] test_breakpoints_func_full from (details)
  423. [MachineScheduler] Reduce reordering due to mem op clustering (details)
  424. [InstCombine] add test for possible cast-of-select transform; NFC (details)
  425. Fix NetBSD bot after b4a99a061f517e60985667e39519f60186cbb469 (details)
  426. [nfc][libomptarget] Refactor amdgcn target_impl (details)
  427. [nfc][libomptarget] Refactor nvptx/target_impl.cu (details)
  428. [InstCombine] Add test for iterator invalidation bug; NFC (details)
  429. [InstCombine] Fix user iterator invalidation in bitcast of phi transform (details)
  430. [InstCombine] Make combineLoadToNewType a method; NFC (details)
  431. [InstCombine] Fix infinite loop due to bitcast <-> phi transforms (details)
  432. [OPENMP]Improve handling of possibly incorrectly mapped types. (details)
  433. [NewPM] Port MergeFunctions pass (details)
  434. [OpenMP][Tool] Runtime warning for missing TSan-option (details)
  435. [Driver] Ignore -fno-semantic-interposition (details)
  436. [SVE] Add patterns for MUL immediate instruction. (details)
  437. [libcxx] [Windows] Make a more proper implementation of strftime_l for (details)
  438. dotest.py: Add option to pass extra lldb settings to dotest (details)
  439. [analyzer] Fix SARIF column locations (details)
  440. [DebugInfo] Add option to clang to limit debug info that is emitted for (details)
  441. [InstCombine] Fix worklist management when removing guard intrinsic (details)
  442. [clang][test][NFC] Use more widely supported sanitizer for file (details)
  443. [GVN] fix comment/argument name to match actual implementation. NFC (details)
  444. [LegalizeTypes] Remove untested code from ExpandIntOp_UINT_TO_FP (details)
  445. [Driver][test] Fix Driver/hexagon-toolchain-elf.c for (details)
  446. [AArch64][GlobalISel]: Support @llvm.{return,frame}address selection. (details)
  447. Remove trailing `;`. NFC. (details)
  448. [mlir] Use double format when parsing bfloat16 hexadecimal values (details)
  449. [OPENMP]Do not emit special virtual function for NVPTX target. (details)
  450. [DAGCombine] Replace `getIntPtrConstant()` with `getVectorIdxTy()`. (details)
  451. [mlir][Linalg] Update the semantics, verifier and test for Linalg with (details)
  452. -fmodules-codegen should not emit extern templates (details)
  453. fix recent -fmodules-codegen fix test (details)
  454. make -fmodules-codegen and -fmodules-debuginfo work also with PCHs (details)
  455. [mlir] Enable printing of FuncOp in the generic form. (details)
  456. [OPENMP]Do not use RTTI by default for NVPTX devices. (details)
  457. [mlir] Refactor ModuleState into AsmState and expose it to users. (details)
  458. [remark][diagnostics] Using clang diagnostic handler for IR input files (details)
  459. [mlir][spirv] Properly support SPIR-V conversion target (details)
  460. [codegen,amdgpu] Enhance MIR DIE and re-arrange it for AMDGPU. (details)
  461. [LIBOMPTARGET] Do not increment/decrement the refcount for "declare (details)
  462. Fix windows bot failures in c410adb092c9cb51ddb0b55862b70f2aa8c5b16f (details)
  463. [libcxx] Use C11 thread API on Fuchsia (details)
  464. [mlir] : Fix ViewOp shape folder for identity affine maps (details)
  465. [X86] Swap the 0 and the fudge factor in the constant pool for the (details)
  466. [X86] Drop an unneeded FIXME. NFC (details)
  467. [amdgpu] Fix typos in a test case. (details)
  468. [Win64] Handle FP arguments more gracefully under -mno-sse (details)
  469. Allow /D flags absent during PCH creation under msvc-compat (details)
  470. [X86] ABI compat bugfix for MSVC vectorcall (details)
  471. [Concepts] Type Constraints (details)
  472. [BranchAlign] Add master --x86-branches-within-32B-boundaries flag (details)
  473. DWARFDebugLine.cpp: Restore LF line endings (details)
  474. Modify test to use -S instead of -c so that it works when an external (details)
  475. PR44540: Prefer an inherited default constructor over an initializer (details)
  476. CMake: Make most target symbols hidden by default (details)
  477. Relax the rules around objc_alloc and objc_alloc_init optimizations. (details)
  478. [PowerPC] Fix powerpcspe subtarget enablement in llvm backend (details)
  479. [ODRHash] Fix wrong error message with bitfields and mutable. (details)
  480. [Driver][X86] Add -malign-branch* and -mbranches-within-32B-boundaries (details)
  481. Fix up ms-pch-macro.c test to pass on non-Windows (details)
  482. [lldb/CommandInterpreter] Remove flag that's always true (NFC) (details)
  483. [lldb/test] Add test for CMTime data formatter (details)
  484. [Scheduler] Adjust interface of CreateTargetMIHazardRecognizer to use (details)
  485. [Attributor] AAValueConstantRange: Value range analysis using constant (details)
  486. [ARM] Reegenerate MVE tests. NFC (details)
  487. [X86] Don't call LowerUINT_TO_FP_i32 for i32->f80 on 32-bit targets with (details)
  488. [VE] Minimal codegen for empty functions (details)
  489. [AMDGPU] Invert the handling of skip insertion. (details)
  490. [MachO] Add a test for detecting reserved unit length. (details)
  491. [gn build] Port 0dc6c249bff (details)
  492. [DWARF] Fix DWARFDebugAranges to support 64-bit CU offsets. (details)
  493. [RISCV] Support ABI checking with per function target-features (details)
  494. [llvm-locstats][NFC] Support OOP concept (details)
  495. Revert "[RISCV] Add Clang frontend support for Bitmanip extension" (details)
  496. [yaml2obj/obj2yaml] - Add support for SHT_RELR sections. (details)
  497. [llvm-locstats] Add the --draw-plot option (details)
  498. [AArch64][SVE] Add ptest intrinsics (details)
  499. [Support] Replace Windows __declspec(thread) with thread_local for (details)
  500. Revert "[yaml2obj/obj2yaml] - Add support for SHT_RELR sections." (details)
  501. [Lexer] Allow UCN for dollar symbol '\u0024' in identifiers when using (details)
  502. [llvm-locstats] Fix the docs (details)
  503. [NFC] Adjust test cases numbering, test commit. (details)
  504. [AArch64][SVE] Fold variable into assert to silence unused variable (details)
  505. [lldb] Add expect_expr function for testing expression evaluation in (details)
  506. [yaml2obj/obj2yaml] - Add support for SHT_RELR sections. (details)
  507. Fix "pointer is null" static analyzer warning. NFCI. (details)
  508. RegisterClassInfo::computePSetLimit - assert that we actually find a (details)
  509. Fix Wdocumentation warning. NFC. (details)
  510. Revert "[RISCV] Support ABI checking with per function target-features" (details)
  511. [RISCV] Support ABI checking with per function target-features (details)
  512. Revert rG6078f2fedcac5797ac39ee5ef3fd7a35ef1202d5 - (details)
  513. Bump the trunk major version to 11 (details)
  514. [PowerPC] Legalize saturating vector add/sub (details)
  515. [llvm-locstats] Add the --compare option (details)
  516. Further implement CWG 2292 (details)
  517. [RISCV] Fix test for inline asm z constraint modifier (details)
  518. TableGen/GlobalISel: Don't reconstruct CodeGenRegBank (details)
  519. TableGen/GlobalISel: Don't take reference to temporary values (details)
  520. TableGen: Delete some copy constuctors (details)
  521. GlobalISel: Fix narrowScalar for G_ANYEXT results (details)
  522. AMDGPU: Partially directly select llvm.amdgcn.interp.p1.f16 (details)
  523. GlobalISel: Implement lower for G_BITCAST (details)
  524. [mlir] LLVM import: handle function-typed constants (details)
  525. [FPEnv] Address post-commit review comment for D71467 (details)
  526. [clangd] Show hower info for expressions (details)
  527. [ELF] Avoid false-positive assert in getErrPlace() (details)
  528. [mlir][EDSC] Refactor dependencies involving EDSCs. (details)
  529. [gn build] (manually) port b4a99a061f51 better (details)
  530. [clangd] Add a ruler after header in hover (details)
  531. [clangd] Rearrange type, returntype and parameters in hover card (details)
  532. [clang] New __attribute__((__clang_arm_mve_strict_polymorphism)). (details)
  533. [gn build] find mistakes like the one fixed in 72b5989e0d1 at build time (details)
  534. [clangd] Fix windows buildbots (details)
  535. Restore "[ThinLTO] Add additional ThinLTO pipeline testing with new PM" (details)
  536. [llvm-readobj][test] - Cleanup SHT_RELR sections testing. (details)
  537. [mlir][Linalg] NFC - Hotfix for gcc-5 build (details)
  538. [CMake] Enable -qfuncsect when building with IBM XL (details)
  539. DWARFDebugLine.cpp: Format unknown line number standard opcodes (details)
  540. [ORC] Update lazyReexports to support aliases with different symbol (details)
  541. [ORC] Simplify use of lazyReexports with LLJIT. (details)
  542. [mlir][Linalg] NFC - Cleanup Linalg Pass locations and namespacing (details)
  543. [mlir][Linalg] NFC - Hotfix for gcc-5 build (details)
  544. [InstCombine] reassociate fsub+fsub into fsub+fadd (details)
  545. [Loop Peeling] Add possibility to enable peeling on loop nests. (details)
  546. [ThinLTO] Always import constants (details)
  547. Fix bot by adjusting wildcard matching (details)
  548. Revert "[mlir] Create a gpu.module operation for the GPU Dialect." (details)
  549. [clangd] Extract string literals in macro arguments to unbreak gcc (details)
  550. [ARM][MVE][Intrinsics] Add VMINAQ, VMINNMAQ, VMAXAQ, VMAXNMAQ (details)
  551. Replace CLANG_SPAWN_CC1 env var with a driver mode flag (details)
  552. [gn build] Reformat all build files (details)
  553. Revert "Revert rG6078f2fedcac5797ac39ee5ef3fd7a35ef1202d5 - (details)
  554. [ORC] Set setCloneToNewContextOnEmit on LLJIT's transform layer when (details)
  555. [Mips] Add FileCheck to a test that just tested for a crash. (details)
  556. [gn build] make "gn format" comment slightly more concise (details)
  557. [gn build] add multi-line forcing comments in more places (details)
  558. [gn build] re-run "gn format" with trunk gn (details)
  559. [docs][ORC] Update the laziness section of the ORCv2 design doc. (details)
  560. [DWARF] Emit DW_AT_call_return_pc as an address (details)
  561. DebugInfo: Factor out logic to update locations in MD_loop metadata, NFC (details)
  562. Work around PR43337: don't try to use the vec_sel overloads for vector (details)
  563. PR17164: Change clang's default behavior from (details)
  564. [NFC][IndVarSimplify] remove duplicate code in (details)
  565. [mlir] Add shaped container component type interface (details)
  566. [NFC] Refactor InlineResult for readability (details)
  567. [MachineScheduler][NFC] Don't swap when we can't cluster (details)
  568. lldb: Run TestCrossDSOTailCalls.py and TestCrossObjectTailCalls.py on (details)
  569. [libc++] Make SFINAE'd member functions in string mutually exclusive. (details)
  570. [libc++] Explicitly mark basic_string<...>::npos with default (details)
  571. [libc++] Explicitly enumerate std::string external instantiations - (details)
  572. [BasicBlock] add helper getPostdominatingDeoptimizeCall (details)
  573. DWARF: Simplify the way the return PC is attached to call site tags, NFC (details)
  574. [test] Move call-site-entry-linking.test into test/tools/dsymutil/X86 (details)
  575. [libc++] Optimize basic_string::operator=(const basic_string&) for SSO (details)
  576. [libc++] Fix parsing <string> in C++03. (details)
  577. Revert "[OPENMP]Do not use RTTI by default for NVPTX devices." (details)
  578. [lldb/Debugger] Rename IO handler methods to be more meaningful (NFC) (details)
  579. Revert "Allow system header to provide their own implementation of some (details)
Commit 0c195ef7c62db1234e3854f8798e1ef413808b18 by sledru
phab doc: Replace or remove references to svn
The file was modifiedllvm/docs/Phabricator.rst
Commit 35ad66fae811c36823b2b91368f142c9d35b8414 by arsenm2
AMDGPU/GlobalISel: Widen 16-bit shift amount sources
This should be legal, but will require future selection work. 16-bit
shift amounts were already removed from being legal, but this didn't
adjust the transformation rules.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
Commit 767aa507a464e46b9a5aaed8cfec0a621f8fc599 by arsenm2
AMDGPU/GlobalISel: Fix argument lowering for vectors of pointers
When these arguments are broken down by the EVT based callbacks, the
pointer information is lost. Hack around this by coercing the register
types to be the expected pointer element type when building the remerge
operations.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
Commit fba1fbb9c7367990a0561a36dbf600fc51847246 by arsenm2
GlobalISel: Don't assert on MoreElements creating vectors
If the original type was a scalar, it should be valid to add elements to
turn it into a vector.
Tests included with following legalization change.
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
Commit f937b43fdb30b67facf616ad394976b08001ee89 by arsenm2
TableGen/GlobalISel: Address fixme
Don't call computeAvailableFunctionFeatures for every instruction.
The file was modifiedllvm/utils/TableGen/GlobalISelEmitter.cpp
The file was modifiedllvm/test/TableGen/GlobalISelEmitter.td
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
Commit 595ac8c46ea54c6d5dc96e2f35a5759988a657be by arsenm2
GlobalISel: Move getLLTForMVT/getMVTForLLT
As an intermediate step, some TLI functions can be converted to using
LLT instead of MVT. Move this somewhere out of GlobalISel so DAG
functions can use these.
The file was modifiedllvm/include/llvm/CodeGen/LowLevelType.h
The file was modifiedllvm/lib/CodeGen/LowLevelType.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/Utils.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/Utils.cpp
Commit 0f5f28d000f73b4d0282c579477a4e31402a863e by csigg
Add gdb pretty printer for MutableArrayRef, remove ConstArrayRef.
Reviewers: dblaikie
Reviewed By: dblaikie
Subscribers: merge_guards_bot, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72136
The file was modifiedllvm/utils/gdb-scripts/prettyprinters.py
Commit 8c387cbea76b169f1f8ecc7693797e96567ed896 by Alexander.Richardson
Add builtins for aligning and checking alignment of pointers and
integers
This change introduces three new builtins (which work on both pointers
and integers) that can be used instead of common bitwise arithmetic:
__builtin_align_up(x, alignment), __builtin_align_down(x, alignment) and
__builtin_is_aligned(x, alignment).
I originally added these builtins to the CHERI fork of LLVM a few years
ago to handle the slightly different C semantics that we use for CHERI
[1]. Until recently these builtins (or sequences of other builtins) were
required to generate correct code. I have since made changes to the
default C semantics so that they are no longer strictly necessary (but
using them does generate slightly more efficient code). However, based
on our experience using them in various projects over the past few
years, I believe that adding these builtins to clang would be useful.
These builtins have the following benefit over bit-manipulation and
casts via uintptr_t:
- The named builtins clearly convey the semantics of the operation.
While
checking alignment using __builtin_is_aligned(x, 16) versus
((x & 15) == 0) is probably not a huge win in readably, I personally
find
__builtin_align_up(x, N) a lot easier to read than (x+(N-1))&~(N-1).
- They preserve the type of the argument (including const qualifiers).
When
using casts via uintptr_t, it is easy to cast to the wrong type or
strip
qualifiers such as const.
- If the alignment argument is a constant value, clang can check that it
is
a power-of-two and within the range of the type. Since the semantics of
these builtins is well defined compared to arbitrary bit-manipulation,
it is possible to add a UBSAN checker that the run-time value is a
valid
power-of-two. I intend to add this as a follow-up to this change.
- The builtins avoids int-to-pointer casts both in C and LLVM IR.
In the future (i.e. once most optimizations handle it), we could use
the new
llvm.ptrmask intrinsic to avoid the ptrtoint instruction that would
normally
be generated.
- They can be used to round up/down to the next aligned value for both
integers and pointers without requiring two separate macros.
- In many projects the alignment operations are already wrapped in
macros (e.g.
roundup2 and rounddown2 in FreeBSD), so by replacing the macro
implementation
with a builtin call, we get improved diagnostics for many call-sites
while
only having to change a few lines.
- Finally, the builtins also emit assume_aligned metadata when used on
pointers.
This can improve code generation compared to the uintptr_t casts.
[1] In our CHERI compiler we have compilation mode where all pointers
are implemented as capabilities (essentially unforgeable 128-bit fat
pointers). In our original model, casts from uintptr_t (which is a
128-bit capability) to an integer value returned the "offset" of the
capability (i.e. the difference between the virtual address and the base
of the allocation). This causes problems for cases such as checking the
alignment: for example, the expression `if ((uintptr_t)ptr & 63) == 0`
is generally used to check if the pointer is aligned to a multiple of 64
bytes. The problem with offsets is that any pointer to the beginning of
an allocation will have an offset of zero, so this check always succeeds
in that case (even if the address is not correctly aligned). The same
issues also exist when aligning up or down. Using the alignment builtins
ensures that the address is used instead of the offset. While I have
since changed the default C semantics to return the address instead of
the offset when casting, this offset compilation mode can still be used
by passing a command-line flag.
Reviewers: rsmith, aaron.ballman, theraven, fhahn, lebedev.ri, nlopes,
aqjune Reviewed By: aaron.ballman, lebedev.ri Differential Revision:
https://reviews.llvm.org/D71499
The file was modifiedclang/docs/LanguageExtensions.rst
The file was addedclang/test/CodeGen/builtin-align-array.c
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedclang/lib/AST/ExprConstant.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticASTKinds.td
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was addedclang/test/SemaCXX/builtin-align-cxx.cpp
The file was modifiedclang/include/clang/Basic/Builtins.def
The file was modifiedclang/lib/CodeGen/CodeGenFunction.h
The file was addedclang/test/CodeGen/builtin-align-assumption.c
The file was addedclang/test/CodeGen/builtin-align.c
The file was addedclang/test/Sema/builtin-align.c
Commit ea67737b166fc6cb5fd98874fbd2b4639b2d7ecd by zinenko
[mlir] mlir-cpu-runner test's cblas_interface should export functions on
Windows
This change fixes the build on Windows, so that cblas_interface.dll
exports functions correctly and an implib is created and installed
correctly.
Currently, LLVM cannot be consumed on Windows after it has been
installed in a location because cblas_interface.lib is not
created/installed, thus failing the import check in `LLVMExports.cmake`.
Differential Revision: https://reviews.llvm.org/D72384
The file was modifiedmlir/test/mlir-cpu-runner/include/cblas.h
The file was addedmlir/test/mlir-cpu-runner/include/cblas_interface.h
The file was modifiedmlir/test/mlir-cpu-runner/cblas_interface.cpp
The file was modifiedmlir/test/mlir-cpu-runner/CMakeLists.txt
The file was modifiedmlir/test/mlir-cpu-runner/include/mlir_runner_utils.h
Commit 016bf03ef6fcd9dce43b0c17971f76323f07a684 by zinenko
[mlir] add a missing dependency for Linalg conversion
We were seeing some occasional build failures that would come and go. It
appeared to be this missing dependence.
Differential Revision: https://reviews.llvm.org/D72419
The file was modifiedmlir/lib/Conversion/LinalgToLLVM/CMakeLists.txt
Commit cc95bb1f57c674c0efdfc134eab8ed8c50f2a6e3 by Amara Emerson
[AArch64][GlobalISel] Implement selection of <2 x float> vector splat.
Also requires making G_IMPLICIT_DEF of v2s32 legal.
Differential Revision: https://reviews.llvm.org/D72422
The file was modifiedllvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/opt-shuffle-splat.mir
The file was modifiedllvm/test/CodeGen/AArch64/arm64-rev.ll
Commit 255cc5a7603fef251192daab2a3336acbcd9aa1c by arsenm2
CodeGen: Use LLT instead of EVT in getRegisterByName
Only PPC seems to be using it, and only checks some simple cases and
doesn't distinguish between FP. Just switch to using LLT to simplify use
from GlobalISel.
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
The file was modifiedllvm/lib/Target/Lanai/LanaiISelLowering.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.h
The file was modifiedllvm/lib/Target/Mips/MipsISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/lib/Target/Sparc/SparcISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLowering.cpp
The file was modifiedllvm/lib/Target/Mips/MipsISelLowering.h
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.h
The file was modifiedllvm/lib/Target/Lanai/LanaiISelLowering.h
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/lib/Target/Sparc/SparcISelLowering.h
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
Commit ac53a5f1dc21916f1072031703e0e1833e963454 by arsenm2
GlobalISel: Fix else after return
The file was modifiedllvm/lib/CodeGen/LowLevelType.cpp
Commit f33f3d98e9e6322846c3b997260faf3e1165e0dd by arsenm2
DAG: Don't use unchecked dyn_cast
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Commit 0ea3c7291fb8d463d9c7ae6aaec7a432ef366a51 by arsenm2
GlobalISel: Handle llvm.read_register
Compared to the attempt in bdcc6d3d2638b3a2c99ab3b9bfaa9c02e584993a,
this uses intermediate generic instructions.
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/include/llvm/Target/GenericOpcodes.td
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/read_register.ll
The file was modifiedllvm/include/llvm/Support/TargetOpcodes.def
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
Commit b4a647449fa01bd4e29bce5afef51770cddec664 by arsenm2
TableGen/GlobalISel: Add way for SDNodeXForm to work on timm
The current implementation assumes there is an instruction associated
with the transform, but this is not the case for
timm/TargetConstant/immarg values. These transforms should directly
operate on a specific MachineOperand in the source instruction. TableGen
would assert if you attempted to define an equivalent GISDNodeXFormEquiv
using timm when it failed to find the instruction matcher.
Specially recognize SDNodeXForms on timm, and pass the operand index to
the render function.
Ideally this would be a separate render function type that looks like
void renderFoo(MachineInstrBuilder, const MachineOperand&), but this
proved to be somewhat mechanically painful. Add an optional operand
index which will only be passed if the transform should only look at the
one source operand.
Theoretically it would also be possible to only ever pass the
MachineOperand, and the existing renderers would check the parent. I
think that would be somewhat ugly for the standard usage which may want
to inspect other operands, and I also think MachineOperand should
eventually not carry a pointer to the parent instruction.
Use it in one sample pattern. This isn't a great example, since the
transform exists to satisfy DAG type constraints. This could also be
avoided by just changing the MachineInstr's arbitrary choice of operand
type from i16 to i32. Other patterns have nontrivial uses, but this
serves as the simplest example.
One flaw this still has is if you try to use an SDNodeXForm defined for
imm, but the source pattern uses timm, you still see the "Failed to
lookup instruction" assert. However, there is now a way to avoid it.
The file was modifiedllvm/utils/TableGen/GlobalISelEmitter.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/TableGen/GlobalISelEmitter.td
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
The file was modifiedllvm/lib/Target/ARM/ARMInstructionSelector.cpp
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ds.swizzle.mir
The file was addedllvm/test/TableGen/GlobalISelEmitter-SDNodeXForm-timm.td
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was modifiedllvm/lib/Target/AMDGPU/DSInstructions.td
The file was modifiedllvm/include/llvm/Target/GlobalISel/Target.td
Commit 10edb1d0d4a15812a71f8953bba96a4f1fc9d0af by arsenm2
TableGen/GlobalISel: Fix pattern matching of immarg literals
For arguments that are not expected to be materialized with G_CONSTANT,
this was emitting predicates which could never match. It was first
adding a meaningless LLT check, which would always fail due to the
operand not being a register.
Infer the cases where a literal should check for an immediate operand,
instead of a register This avoids needing to invent a special way of
representing timm literal values.
Also handle immediate arguments in GIM_CheckLiteralInt. The comments
stated it handled isImm() and isCImm(), but that wasn't really true.
This unblocks work on the selection of all of the complicated AMDGPU
intrinsics in future commits.
The file was modifiedllvm/test/TableGen/Common/GlobalISelEmitterCommon.td
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
The file was addedllvm/test/TableGen/GlobalISelEmitter-immarg-literal-pattern.td
The file was modifiedllvm/utils/TableGen/CodeGenInstruction.cpp
The file was modifiedllvm/utils/TableGen/GlobalISelEmitter.cpp
The file was modifiedllvm/utils/TableGen/CodeGenIntrinsics.h
The file was modifiedllvm/utils/TableGen/CodeGenInstruction.h
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
Commit 58b3dec6c108eb9ae4af2cde5c831743d5605c79 by Jonas Devlieghere
[lldb/Lua] Add lua typemaps for INOUT params
The file was addedlldb/bindings/lua/lua-typemaps.swig
The file was modifiedlldb/bindings/lua.swig
Commit 68c8b6c4cd117cc962155298f0e1d45056ecc001 by riverriddle
[mlir] Use getDenseElementBitwidth instead of
Type::getElementTypeBitWidth.
Summary: Some data values have a different storage width than the
corresponding MLIR type, e.g. bfloat is currently stored as a double.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D72478
The file was modifiedmlir/lib/IR/Attributes.cpp
The file was modifiedmlir/unittests/IR/AttributeTest.cpp
Commit 25195541349b1d6dfc03bf7511483110bda69b29 by richard
When diagnosing the lack of a viable conversion function, also list
explicit functions that are not candidates.
It's not always obvious that the reason a conversion was not possible is
because the function you wanted to call is 'explicit', so explicitly say
if that's the case.
It would be nice to rank the explicit candidates higher in the
diagnostic if an implicit conversion sequence exists for their
arguments, but unfortunately we can't determine that without potentially
triggering non-immediate-context errors that we're not permitted to
produce.
The file was modifiedclang/include/clang/AST/DeclCXX.h
The file was modifiedclang/test/SemaCXX/explicit.cpp
The file was modifiedclang/test/PCH/cxx-explicit-specifier.cpp
The file was modifiedclang/lib/Sema/SemaInit.cpp
The file was modifiedclang/test/SemaCXX/copy-initialization.cpp
The file was modifiedclang/test/CXX/expr/expr.prim/expr.prim.lambda/p11-1y.cpp
The file was modifiedclang/test/CXX/special/class.inhctor/p3.cpp
The file was modifiedclang/include/clang/Sema/Overload.h
The file was modifiedclang/test/CXX/dcl.decl/dcl.init/p14-0x.cpp
The file was modifiedclang/test/SemaCXX/convert-to-bool.cpp
The file was modifiedclang/test/CXX/drs/dr1xx.cpp
The file was modifiedclang/test/CXX/drs/dr15xx.cpp
The file was modifiedclang/test/CXX/over/over.match/over.match.funcs/over.match.copy/p1.cpp
The file was modifiedclang/test/SemaCXX/cxx2a-explicit-bool.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/test/CXX/basic/basic.lookup/basic.lookup.qual/namespace.qual/p2.cpp
The file was modifiedclang/test/CXX/dcl.decl/dcl.init/dcl.init.ref/p5.cpp
The file was modifiedclang/test/SemaCXX/converting-constructor.cpp
The file was modifiedclang/lib/Sema/SemaOverload.cpp
The file was modifiedclang/test/SemaCXX/default1.cpp
The file was modifiedclang/test/SemaCXX/conversion-function.cpp
Commit 5fe4679cc9cfb4941b766db07bf3cd928075d204 by arsenm2
AVR: Update for getRegisterByName change
The file was modifiedllvm/lib/Target/AVR/AVRISelLowering.cpp
The file was modifiedllvm/lib/Target/AVR/AVRISelLowering.h
Commit b81c8c6976b987a25fc54fa2bf3524919759a898 by Jonas Devlieghere
[lldb] Remove spurious file
The file was removedlldb/lldb/cmake/modules/FindPythonInterpAndLibs.cmake
Commit cd69e4c74c174101817c9f6b7c02374ac6a7476f by Stanislav.Mekhanoshin
[AMDGPU] Fix bundle scheduling
Bundles coming to scheduler considered free, i.e. zero latency. Fixed.
Differential Revision: https://reviews.llvm.org/D72487
The file was modifiedllvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/scratch-simple.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/uint_to_fp.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/min.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/selectcc-opt.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/zero_extend.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/misched-killflags.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/wave32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/packed-op-sel.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/setcc-opt.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sint_to_fp.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sub.i16.ll
Commit 02113918ed6b5e514afd7d1e007131d36ac13f1d by Jason Molenda
When reading Aux file in chunks, read consecutive byte ranges
qemu has a very small maximum packet size (4096) and it actually only
uses half of that buffer for some implementation reason, so when lldb
asks for the register target definitions, the x86_64 definition is
larger than 4096/2 and we need to fetch it in two parts.
This patch and test is fixing a bug in
GDBRemoteCommunicationClient::ReadExtFeature when reading a target file
in multiple parts.  lldb was assuming that it would always get back the
maximum packet size response (4096) instead of using the actual size
received and asking for the next group of bytes.
We now have two tests in gdb_remote_client for unique features of qemu -
TestNestedRegDefinitions.py would test the ability of lldb to follow
multiple levels of xml includes; I opted to create a separate
TestRegDefinitionInParts.py test to test this wrinkle in qemu's gdb
remote serial protocol stub implementation. Instead of combining both
tests into a single test file.
<rdar://problem/49537922>
The file was addedlldb/packages/Python/lldbsuite/test/functionalities/gdb_remote_client/TestRegDefinitionInParts.py
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
Commit 375371cc8bff7ba02d0a2203f80de5e640fcadf1 by maskray
[ELF] Fix includeInDynsym() when an undefined weak is merged with a lazy
definition
An undefined weak does not fetch the lazy definition. A lazy weak symbol
should be considered undefined, and thus preemptible if .dynsym exists.
D71795 is not quite an NFC. It errors on an R_X86_64_PLT32 referencing
an undefined weak symbol. isPreemptible is false (incorrect) => R_PLT_PC
is optimized to R_PC => in isStaticLinkTimeConstant, an error is emitted
when an R_PC is applied on an undefined weak (considered absolute).
The file was modifiedlld/test/ELF/weak-undef-lib.s
The file was modifiedlld/ELF/Symbols.cpp
Commit 5cabb8357aeb3bbecaef4825c3a594f86ef94c8d by arsenm2
AMDGPU/GlobalISel: Fix G_EXTRACT_VECTOR_ELT mapping for s-v case
If an SGPR vector is indexed with a VGPR, the actual indexing will be
done on the SGPR and produce an SGPR. A copy needs to be inserted inside
the waterwall loop to the VGPR result.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir
Commit 35c3d101aee240f6c034f25ff6800fda22a89987 by arsenm2
AMDGPU/GlobalISel: Select G_EXTRACT_VECTOR_ELT
Doesn't try to do the fold into the base register of an add of a
constant in the index like the DAG path does.
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
Commit 3727ca313783e23696caeae53c688409555ab0fc by douglas.yung
Relax opcode checks in test for G_READCYCLECOUNTER to check for only a
number instead of a specific number.
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
Commit f041e9ad706aee7987c5299427c33424fcabbd0d by richard
CWG2352: Allow qualification conversions during reference binding.
The language wording change forgot to update overload resolution to rank
implicit conversion sequences based on qualification conversions in
reference bindings. The anticipated resolution for that oversight is
implemented here -- we order candidates based on qualification
conversion, not only on top-level cv-qualifiers, including ranking
reference bindings against non-reference bindings if they differ in
non-top-level qualification conversions.
For OpenCL/C++, this allows reference binding between pointers with
differing (nested) address spaces. This makes the behavior of reference
binding consistent with that of implicit pointer conversions, as is the
purpose of this change, but that pre-existing behavior for pointer
conversions is itself probably not correct. In any case, it's now
consistently the same behavior and implemented in only one place.
This reinstates commit de21704ba96fa80d3e9402f12c6505917a3885f4,
reverted in commit d8018233d1ea4234de68d5b4593abd773db79484, with
workarounds for some overload resolution ordering problems introduced by
CWG2352.
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/test/CXX/drs/dr4xx.cpp
The file was modifiedclang/lib/Sema/SemaInit.cpp
The file was modifiedclang/www/make_cxx_dr_status
The file was modifiedclang/test/CXX/drs/dr23xx.cpp
The file was modifiedclang/test/SemaOpenCL/address-spaces-conversions-cl2.0.cl
The file was modifiedclang/test/SemaObjCXX/arc-overloading.mm
The file was modifiedclang/lib/Sema/SemaOverload.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/test/SemaCXX/ref-init-ambiguous.cpp
The file was modifiedclang/www/cxx_dr_status.html
Commit 02c5983310dcd627aecb521e03a16122f42e8a01 by shengchen.kan
[NFC] Style cleanup
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Commit efabe427b27643839849ebb61fe2e5db37dff0de by thakis
fix a few typos to cycle the bots
The file was modifiedlld/docs/conf.py
The file was modifiedlld/docs/NewLLD.rst
The file was modifiedlld/docs/WebAssembly.rst
The file was modifiedlld/docs/ld.lld.1
Commit 01662aeb5d1fcef4f067caec633d0c85bb3062a7 by thakis
fix another typo to cycle bots
The file was modifiedmlir/docs/Dialects/SPIR-V.md
Commit 21a4710c67a97838dd75cf60ed24da11280800f8 by wmi
[ThinLTO] Pass CodeGenOpts like UnrollLoops/VectorizeLoop/VectorizeSLP
down to pass builder in ltobackend.
Currently CodeGenOpts like UnrollLoops/VectorizeLoop/VectorizeSLP in
clang are not passed down to pass builder in ltobackend when new pass
manager is used. This is inconsistent with the behavior when new pass
manager is used and thinlto is not used. Such inconsistency causes slp
vectorization pass not being enabled in ltobackend for O3 + thinlto
right now. This patch fixes that.
Differential Revision: https://reviews.llvm.org/D72386
The file was modifiedllvm/test/Other/new-pm-thinlto-defaults.ll
The file was modifiedllvm/test/Other/new-pm-defaults.ll
The file was modifiedlld/wasm/CMakeLists.txt
The file was addedclang/test/CodeGen/thinlto-slp-vectorize-pm.c
The file was addedlld/test/ELF/lto/slp-vectorize-pm.ll
The file was addedllvm/test/tools/llvm-lto2/X86/slp-vectorize-pm.ll
The file was modifiedllvm/tools/llvm-lto2/llvm-lto2.cpp
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was modifiedllvm/tools/llvm-lto2/CMakeLists.txt
The file was modifiedllvm/include/llvm/LTO/Config.h
The file was modifiedlld/COFF/CMakeLists.txt
The file was modifiedlld/ELF/LTO.cpp
The file was modifiedllvm/tools/gold/gold-plugin.cpp
The file was modifiedlld/ELF/CMakeLists.txt
The file was addedllvm/test/tools/gold/X86/slp-vectorize-pm.ll
The file was modifiedllvm/lib/LTO/LTOBackend.cpp
Commit 995c18fc5051850782b1c096233867b8e56e0dea by smeenai
[xray] Remove cl::sub from alias options
Currently running the xray tools generates a number of errors:
$ ./bin/llvm-xray
: for the   -k option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -d option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -o option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -f option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -s option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -r option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -p option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -m option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
<snip>
Patch by Ryan Mansfield.
Differential Revision: https://reviews.llvm.org/D69386
The file was modifiedllvm/tools/llvm-xray/xray-extract.cpp
The file was modifiedllvm/tools/llvm-xray/xray-account.cpp
The file was modifiedllvm/tools/llvm-xray/xray-converter.cpp
The file was modifiedllvm/tools/llvm-xray/xray-graph-diff.cpp
The file was modifiedllvm/tools/llvm-xray/xray-stacks.cpp
The file was modifiedllvm/tools/llvm-xray/xray-graph.cpp
Commit b38d0d5bdb353f8496a0fc38b9bbee419b41a321 by sylvestre
clang-tidy doc - remove the widths
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst
Commit 759c90456d418ffe69e1a2b4bcea2792491a6b5a by ibiryukov
[Syntax] Update comment, remove stale FIXME. NFC
The file was modifiedclang/include/clang/Tooling/Syntax/Tokens.h
Commit 8647a72c4a52e0386c0397ce3fbd38121c18b873 by gil.rapaport
[LV] VPValues for memory operation pointers (NFCI)
Memory instruction widening recipes use the pointer operand of their
load/store ingredient for generating the needed GEPs, making it
difficult to feed these recipes with pointers based on other ingredients
or none at all. This patch modifies these recipes to use a VPValue for
the pointer instead, in order to reduce ingredient def-use usage by ILV
as a step towards full VPlan-based def-use relations. The recipes are
constructed with VPValues bound to these ingredients, maintaining
current behavior.
Differential revision: https://reviews.llvm.org/D70865
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
Commit 164da673009ba6c100ce45b6fa9a5dfd3b0b8e38 by hans
Restore order in clang-tidy section of release notes
Major changes are introduction of subsubsections to prevent people
putting new entries in wrong places. I also polished line length and
highlighting.
Patch by Eugene Zelenko!
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst
Commit 921f871ac438175ca8fcfcafdfcfac4d7ddf3905 by sguelton
Allow system header to provide their own implementation of some builtin
If a system header provides an (inline) implementation of some of their
function, clang still matches on the function name and generate the
appropriate llvm builtin, e.g. memcpy. This behavior is in line with
glibc recommendation « users may not provide their own version of
symbols » but doesn't account for the fact that glibc itself can provide
inline version of some functions.
It is the case for the memcpy function when -D_FORTIFY_SOURCE=1 is on.
In that case an inline version of memcpy calls __memcpy_chk, a function
that performs extra runtime checks. Clang currently ignores the inline
version and thus provides no runtime check.
This code fixes the issue by detecting functions whose name is a builtin
name but also have an inline implementation.
Differential Revision: https://reviews.llvm.org/D71082
The file was modifiedclang/lib/AST/Decl.cpp
The file was modifiedclang/include/clang/AST/Decl.h
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was addedclang/test/CodeGen/memcpy-nobuiltin.c
The file was modifiedclang/lib/CodeGen/CGExpr.cpp
The file was addedclang/test/CodeGen/memcpy-nobuiltin.inc
Commit 45c4b08d8228f64b02b8a4df069aa37d5fa70829 by qiucofan
[NFC] [PowerPC] Add isPredicable for basic instrs
PowerPC uses a dedicated method to check if the machine instr is
predicable by opcode. However, there's a bit `isPredicable` in instr
definition. This patch removes the method and set the bit only to
opcodes referenced in it.
Differential Revision: https://reviews.llvm.org/D71921
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstr64Bit.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.h
Commit ffd0f116754c36146bb21a01b047782ce8a01e2e by kadircet
[clangd] Improve type printing in hover
Summary: Do not include tag keywords when printing types for symbol
names, as it will come from SymbolKind. Also suppress them while
printing definitions to prevent them occuring in template arguments.
Make use of `getAsString`, instead of `print` in all places to have a
consistent style across the file.
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72450
The file was modifiedclang-tools-extra/clangd/unittests/HoverTests.cpp
The file was modifiedclang-tools-extra/clangd/Hover.cpp
Commit abfa27e4f04dd84774bcfe15783942e21be391a5 by kadircet
[clangd] Fix markdown rendering in VSCode
Summary: Eventough it is OK to have a new line without any preceding
spaces in some markdown specifications, VSCode requires two spaces
before a new line to break a line inside a paragraph.
Reviewers: sammccall, ilya-biryukov
Subscribers: MaskRay, jkorous, arphaman, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72462
The file was modifiedclang-tools-extra/clangd/unittests/FormattedStringTests.cpp
The file was modifiedclang-tools-extra/clangd/FormattedString.cpp
Commit 346de9b67228f42eb9b55fa3b426b5dedfdb1d40 by sguelton
Fix several issues with compiler extensions
- Update documentation now that the move to monorepo has been made
- Do not tie compiler extension testing to LLVM_BUILD_EXAMPLES
- No need to specify LLVM libraries for plugins
- Add NO_MODULE option to match Polly specific requirements (i.e.
building the
module *and* linking it statically)
- Issue a warning when building the compiler extension with
LLVM_BYE_LINK_INTO_TOOLS=ON, as it modifies the behavior of clang,
which only
makes sense for testing purpose.
Still mark llvm/test/Feature/load_extension.ll as XFAIL because of a
ManagedStatic dependency that's going to be fixed in a seperate commit.
Differential Revision: https://reviews.llvm.org/D72327
The file was modifiedpolly/lib/CMakeLists.txt
The file was modifiedllvm/test/lit.cfg.py
The file was modifiedllvm/examples/Bye/CMakeLists.txt
The file was modifiedllvm/cmake/modules/AddLLVM.cmake
Commit 67bf9a6154d4b82c6c01aad01141bf08c1bbd0f6 by sjoerd.meijer
[SVEV] Recognise hardware-loop intrinsic loop.decrement.reg
Teach SCEV about the @loop.decrement.reg intrinsic, which has exactly
the same semantics as a sub expression. This allows us to query
hardware-loops, which contain this @loop.decrement.reg intrinsic, so
that we can calculate iteration counts, exit values, etc. of
hardwareloops.
This "int_loop_decrement_reg" intrinsic is defined as "IntrNoDuplicate".
Thus, while hardware-loops and tripcounts now become analysable by SCEV,
this prevents the usual loop transformations from applying
transformations on hardware-loops, which is what we want at this point,
for which I have added test cases for loopunrolling and IndVarSimplify
and LFTR.
Differential Revision: https://reviews.llvm.org/D71563
The file was modifiedllvm/test/Transforms/IndVarSimplify/lftr.ll
The file was addedllvm/test/Transforms/LoopUnroll/ARM/dont-unroll-loopdec.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/unittests/Analysis/ScalarEvolutionTest.cpp
Commit 356685a1d8972180f472c1333e8e89dbcc704c1d by sjoerd.meijer
Follow up of 67bf9a6154d4b82c, minor fix in test case, removed duplicate
option
The file was modifiedllvm/test/Transforms/LoopUnroll/ARM/dont-unroll-loopdec.ll
Commit 41f4dfd63ea0fe995ddfba1838aa5ed972cc1377 by jaskiewiczs
[libcxx] Force-cache LIBCXX_CXX_ABI_LIBRARY_PATH
Summary: The `LIBCXX_CXX_ABI_LIBRARY_PATH` CMake variable is cached once
in libcxx/cmake/Modules/HandleLibCXXABI.cmake in the `setup_abi_lib`
macro, and then cached again in libcxx/test/CMakeLists.txt. There, if it
is not set to a value, it is by default set to `LIBCXX_LIBRARY_DIR`.
However, this new value is not actually cached, because the old (empty)
value has been already cached. Use the `FORCE` CMake flag so that it is
saved to the cache.
This should not break anything, because the code changed here previously
had no effect, when it should have.
Reviewers: jroelofs, bcraig, ldionne, EricWF, mclow.lists, vvereschaka,
eastig
Reviewed By: vvereschaka
Subscribers: mgorny, christof, dexonsmith, libcxx-commits
Tags: #libc
Differential Revision: https://reviews.llvm.org/D69169
The file was modifiedlibcxx/test/CMakeLists.txt
Commit e44dedd3631c20bc4a1e62b68919a11168d39354 by jaskiewiczs
[CMake] Support running libc++abi tests in CrossWinToARMLinux cache file
Summary: Now that D71894 has landed, we're able to run libc++abi tests
remotely.
For that we can use the same CMake command as before. The tests can be
run using `ninja check-cxxabi`.
Reviewers: andreil99, vvereschaka, aorlov
Reviewed By: vvereschaka, aorlov
Subscribers: mgorny, kristof.beyls, ldionne, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72459
The file was modifiedclang/cmake/caches/CrossWinToARMLinux.cmake
Commit a1cc19b581443c84fff4c6e6d4e341351ef3203c by sguelton
XFAIL load_extension.ll test on macOS only
Other setup have been fixed by 346de9b67228f42eb9b55fa3b426b5dedfdb1d40
The file was modifiedllvm/test/Feature/load_extension.ll
Commit cfd849840134c4632c2f4fa498dfb93c47825b24 by benny.kra
[MIR] Fix cyclic dependency of MIR formatter
Summary: Move MIR formatter pointer from TargetMachine to
TargetInstrInfo to avoid cyclic dependency between target & codegen.
Reviewers: dsanders, bkramer, arsenm
Subscribers: wdng, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72485
The file was modifiedllvm/include/llvm/CodeGen/MachineMemOperand.h
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetInstrInfo.h
The file was modifiedllvm/include/llvm/Target/TargetMachine.h
The file was modifiedllvm/lib/CodeGen/MIRParser/MIParser.cpp
The file was modifiedllvm/lib/CodeGen/MIRPrinter.cpp
The file was modifiedllvm/lib/CodeGen/MachineOperand.cpp
The file was modifiedllvm/lib/Target/TargetMachine.cpp
Commit 498856fca5b9306f545554aeec93c7c058f03eb3 by benny.kra
[LV] Silence unused variable warning in Release builds. NFC.
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 2e66405d8d8ed818cb9310b6c33419bd8d803d96 by llvm-dev
Don't use dyn_cast_or_null if we know the pointer is nonnull.
Fix clang static analyzer null dereference warning by using dyn_cast
instead.
The file was modifiedllvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Commit 3804ac63d5d8443d0b6826b566e9cbb84d8898f3 by llvm-dev
[X86][AVX] Add tests for v8f32/v8i32 089abcde and 0189abcd shuffles
Mentioned in D66004
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
Commit b2cd273416f82b6c5efeb6138276d9e6b6f8256e by llvm-dev
Fix Wdocumentation warning. NFCI.
The file was modifiedllvm/lib/CodeGen/MachineOutliner.cpp
Commit f3849f739e52510871d11361125f0ef239f11603 by llvm-dev
Fix Wdocumentation warning. NFCI.
The file was modifiedclang/lib/Parse/ParseExpr.cpp
Commit 902974277d507a149e33487d32e4ba58c41451b6 by Raphael Isemann
Data formatters: Look through array element typedefs
Summary: Motivation: When formatting an array of typedefed chars, we
would like to display the array as a string.
The string formatter currently does not trigger because the formatter
lookup does not resolve typedefs for array elements (this behavior is
inconsistent with pointers, for those we do look through pointee
typedefs). This patch tries to make the array formatter lookup somewhat
consistent with the pointer formatter lookup.
Reviewers: teemperor, clayborg
Reviewed By: teemperor, clayborg
Subscribers: clayborg, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72133
The file was modifiedlldb/source/DataFormatters/FormatManager.cpp
The file was modifiedlldb/source/Symbol/ClangASTContext.cpp
The file was addedlldb/packages/Python/lldbsuite/test/functionalities/data-formatter/array_typedef/Makefile
The file was addedlldb/packages/Python/lldbsuite/test/functionalities/data-formatter/array_typedef/TestArrayTypedef.py
The file was addedlldb/packages/Python/lldbsuite/test/functionalities/data-formatter/array_typedef/main.cpp
The file was modifiedlldb/source/API/SBType.cpp
Commit 870f6917936fdb8050be3ca3c67d9259390c4326 by llvm-dev
Fix "pointer is null" static analyzer warnings. NFCI.
Assert that the pointers are non-null before dereferencing them.
The file was modifiedllvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
Commit 1ccee0e86386762bd742fd067391b6c4be089806 by simon.tatham
[ARM,MVE] Make `vqrshrun` generate the right instruction.
Summary: A copy-paste error in `arm_mve.td` meant that the MVE
`vqrshrun` intrinsic family was generating the `vqshrun` machine
instruction, because in the IR intrinsic call, the rounding flag
argument was set to 0 rather than 1.
Reviewers: dmgreen, MarkMurrayARM, miyuki, ostannard
Reviewed By: dmgreen
Subscribers: kristof.beyls, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72496
The file was modifiedclang/test/CodeGen/arm-mve-intrinsics/vector-shift-imm-dyadic.c
The file was modifiedclang/include/clang/Basic/arm_mve.td
Commit 8c12769f3046029e2a9b4e48e1645b1a77d28650 by diogo.sampaio
[ARM][Thumb2] Fix ADD/SUB invalid writes to SP
Summary: This patch fixes pr23772  [ARM] r226200 can emit illegal thumb2
instruction: "sub sp, r12, #80". The violation was that SUB and ADD
(reg, immediate) instructions can only write to SP if the source
register is also SP. So the above instructions was unpredictable. To
enforce that the instruction t2(ADD|SUB)ri does not write to SP we now
enforce the destination register to be rGPR (That exclude PC and SP).
Different than the ARM specification, that defines one instruction that
can read from SP, and one that can't, here we inserted one that can't
write to SP, and other that can only write to SP as to reuse most of the
hard-coded size optimizations. When performing this change, it uncovered
that emitting Thumb2 Reg plus Immediate could not emit all variants of
ADD SP, SP #imm instructions before so it was refactored to be able to.
(see test/CodeGen/Thumb2/mve-stacksplot.mir where we use a subw sp, sp,
Imm12 variant ) It also uncovered a disassembly issue of adr.w
instructions, that were only written as SUBW instructions (see
llvm/test/MC/Disassembler/ARM/thumb2.txt).
Reviewers: eli.friedman, dmgreen, carwil, olista01, efriedma
Reviewed By: efriedma
Subscribers: john.brawn, efriedma, ostannard, kristof.beyls, hiraditya,
dmgreen, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70680
The file was modifiedllvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/peephole-cmp.mir
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb2.td
The file was modifiedllvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
The file was modifiedllvm/test/MC/ARM/negative-immediates.s
The file was modifiedllvm/lib/Target/ARM/ARMAsmPrinter.cpp
The file was modifiedllvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir
The file was modifiedllvm/test/MC/ARM/invalid-addsub.s
The file was modifiedllvm/test/MC/Disassembler/ARM/thumb2-v8.txt
The file was modifiedllvm/test/MC/ARM/basic-thumb2-instructions.s
The file was modifiedllvm/test/MC/ARM/register-token-source-loc.s
The file was modifiedllvm/lib/Target/ARM/Thumb2InstrInfo.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/peephole-addsub.mir
The file was modifiedllvm/test/MC/ARM/thumb-diagnostics.s
The file was modifiedllvm/test/CodeGen/Thumb2/fp16-stacksplot.mir
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
The file was modifiedllvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-arithmetic-ops.mir
The file was modifiedllvm/test/MC/Disassembler/ARM/thumb2.txt
The file was modifiedllvm/test/MC/Disassembler/ARM/invalid-thumbv7.txt
The file was modifiedllvm/test/MC/Disassembler/ARM/thumb-tests.txt
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-load-store.mir
The file was modifiedllvm/test/CodeGen/Thumb2/mve-stacksplot.mir
The file was addedllvm/test/CodeGen/Thumb2/bug-subw.ll
Commit 5b7612792aeb5b161fdd69997db2a64b08f075b6 by pavel
[lldb/lua] Make convenience_variables.test compatible with lua-5.1
The file was modifiedlldb/test/Shell/ScriptInterpreter/Lua/convenience_variables.test
Commit e65282deca8455d1cc6d83b7016af9aa374f9f89 by pavel
[lldb/DWARF] Don't automatically search dwo unit attributes
This patch removes the code (deep inside DWARFDebugInfoEntry) which
automagically returned the attributes of the dwo unit DIE when asking
for the attributes of the skeleton unit.  This is fairly hacky, and not
consistent with how llvm DWARF parser operates.
Instead, I change the code the explicitly request (via
GetNonSkeletonUnit) the right unit to search (there were just two places
that needed this). If it turns out we need this more often, we can
create a utility function (external to DWARFUnit) for doing this.
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
Commit 57a51b689e7b99c694a028104b0b5a69b80fd002 by ibiryukov
[CodeComplete] Suggest 'return nullptr' in functions returning pointers
Reviewers: kadircet
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72497
The file was modifiedclang/lib/Sema/SemaCodeComplete.cpp
The file was modifiedclang/test/CodeCompletion/patterns.cpp
Commit c88e298b69409e35e35ab601592197f5a2bc1c30 by pavel
[lldb] Surpress "bitfield too small" gcc warning
Gcc produces this (technically correct) warning when storing an
explicitly-sized enum in a bitfield. Surpress that by changing the type
of the bitfield to an integer. The same approach is used elsewhere in
llvm (e.g. 56b5eab12).
The file was modifiedlldb/include/lldb/Symbol/DebugMacros.h
Commit 564481aebe18a723c9cfe9ea9ca5808771f7e9d8 by andrew.ng
[Support] ThreadPoolExecutor fixes for Windows/MinGW
Changed ThreadPoolExecutor to no longer use detached threads and instead
to join threads on destruction. This is to prevent intermittent crashing
on Windows when doing a normal full exit, e.g. via exit().
Changed ThreadPoolExecutor to be a ManagedStatic so that it can be
stopped on llvm_shutdown(). Without this, it would only be stopped in
the destructor when doing a full exit. This is required to avoid
intermittent crashing on Windows due to a race condition between the
ThreadPoolExecutor starting up threads and the process doing a fast
exit, e.g. via _exit().
The Windows crashes appear to only occur with the MSVC static runtimes
and are more frequent with the debug static runtime.
These changes also prevent intermittent deadlocks on exit with the MinGW
runtime.
Differential Revision: https://reviews.llvm.org/D70447
The file was modifiedlld/Common/ErrorHandler.cpp
The file was modifiedllvm/lib/Support/Parallel.cpp
Commit e4d672971030fe26dbb8237038038c3ff9ae7541 by Tatyana Krasnukha
[lldb][tests] Take into account all parent's categories when traverse
folders upwards
This is needed to not re-write parent's categories by categories of a
nested folder, e.g. commands/expression/completion specify "cmdline"
category, however it still belongs to parent's "expression" category.
The sentinel ".categories" in the test-suite root directory is no longer
needed.
Differential Revision: https://reviews.llvm.org/D71905
The file was removedlldb/packages/Python/lldbsuite/test/.categories
The file was modifiedlldb/packages/Python/lldbsuite/test/test_result.py
Commit 9ba151274869c377921a09ba0bd635412da755ef by Tatyana Krasnukha
[lldb][test] NFC, re-use _getTestPath() function
The file was modifiedlldb/packages/Python/lldbsuite/test/test_result.py
Commit 76e9c2a9870e36415eb343d28942a42296f85597 by ulrich.weigand
[FPEnv] Generate constrained FP comparisons from clang
Update the IRBuilder to generate constrained FP comparisons in
CreateFCmp when IsFPConstrained is true, similar to the other places in
the IRBuilder.
Also, add a new CreateFCmpS to emit signaling FP comparisons, and use it
in clang where comparisons are supposed to be signaling
(currently, only when emitting code for the <, <=, >, >= operators).
Note that there is currently no way to add fast-math flags to a
constrained FP comparison, since this is implemented as an intrinsic
call that returns a boolean type, and FMF are only allowed for calls
returning a floating-point type. However, given the discussion around
https://bugs.llvm.org/show_bug.cgi?id=42179, it seems that FCmp itself
really shouldn't have any FMF either, so this is probably OK.
Reviewed by: craig.topper
Differential Revision: https://reviews.llvm.org/D71467
The file was addedclang/test/CodeGen/fpconstrained-cmp-double.c
The file was addedclang/test/CodeGen/fpconstrained-cmp-float.c
The file was modifiedllvm/include/llvm/IR/IRBuilder.h
The file was modifiedclang/lib/CodeGen/CGExprScalar.cpp
Commit b3af8ab7f83c2a825c584ddedf5cc9207ca66b44 by Tatyana Krasnukha
[lldb][tests] Cleanup '.categories'
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/no-deadlock/.categories
The file was removedlldb/packages/Python/lldbsuite/test/commands/command/history/.categories
The file was addedlldb/packages/Python/lldbsuite/test/commands/command/.categories
The file was removedlldb/packages/Python/lldbsuite/test/commands/command/script_alias/.categories
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-objc/.categories
The file was removedlldb/packages/Python/lldbsuite/test/commands/command/script/.categories
The file was removedlldb/packages/Python/lldbsuite/test/commands/command/source/.categories
Commit b1bb5ce96d349689085eab38121c85737de1fcaa by diogo.sampaio
Reverting, broke some bots. Need further investigation.
Summary: This reverts commit 8c12769f3046029e2a9b4e48e1645b1a77d28650.
Reviewers:
Subscribers:
The file was modifiedllvm/test/MC/ARM/basic-thumb2-instructions.s
The file was modifiedllvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/peephole-addsub.mir
The file was modifiedllvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
The file was modifiedllvm/test/MC/Disassembler/ARM/invalid-thumbv7.txt
The file was modifiedllvm/test/MC/ARM/register-token-source-loc.s
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb2.td
The file was modifiedllvm/lib/Target/ARM/Thumb2InstrInfo.cpp
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-arithmetic-ops.mir
The file was removedllvm/test/CodeGen/Thumb2/bug-subw.ll
The file was modifiedllvm/test/MC/Disassembler/ARM/thumb-tests.txt
The file was modifiedllvm/test/MC/ARM/thumb-diagnostics.s
The file was modifiedllvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir
The file was modifiedllvm/test/CodeGen/Thumb2/peephole-cmp.mir
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-stacksplot.mir
The file was modifiedllvm/lib/Target/ARM/ARMAsmPrinter.cpp
The file was modifiedllvm/test/MC/ARM/invalid-addsub.s
The file was modifiedllvm/test/MC/ARM/negative-immediates.s
The file was modifiedllvm/test/CodeGen/Thumb2/fp16-stacksplot.mir
The file was modifiedllvm/test/MC/Disassembler/ARM/thumb2.txt
The file was modifiedllvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-load-store.mir
The file was modifiedllvm/test/MC/Disassembler/ARM/thumb2-v8.txt
Commit e49c3c8f2ef97bdf256ca76f3d001eeb79361d56 by benny.kra
Sprinkle some constexpr on default ctors so the compiler can diagnose
unused instances. NFCI.
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVOps.cpp
The file was modifiedmlir/lib/Dialect/VectorOps/VectorOps.cpp
The file was modifiedmlir/include/mlir/IR/Types.h
The file was modifiedmlir/include/mlir/IR/Value.h
The file was modifiedmlir/include/mlir/IR/Attributes.h
Commit 4569f63ae1cb520ce28f08f4800dfbcd5f255eed by sjoerd.meijer
ARMLowOverheadLoops: a few more dbg msgs to better trace rejected TP
loops. NFC.
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
Commit 2f2f41e12c5201b600d887d22ce5cb4afd2ff594 by jan.kratochvil
RangeDataVector: Support custom sorting for D63540
As suggested by @labath extended RangeDataVector so that user can
provide custom sorting of the Entry's `data' field for D63540.
       https://reviews.llvm.org/D63540
RangeData functions were used just by RangeDataVector (=after I removed
them LLDB still builds fine) which no longer uses them so I removed
them.
Differential revision: https://reviews.llvm.org/D72460
The file was modifiedlldb/include/lldb/Utility/RangeMap.h
The file was modifiedlldb/unittests/Utility/RangeMapTest.cpp
Commit 3772ea9dd9368cfdc73595854c143bc3f16a5ade by sam.parker
[ARM][MVE] Tail predicate VMAX,VMAXA,VMIN,VMINA
Add the MVE min and max instructions to our tail predication whitelist.
Differential Revision: https://reviews.llvm.org/D72502
The file was modifiedllvm/unittests/Target/ARM/MachineInstrTest.cpp
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
Commit f0fd11df7d5488e2747f26a3bfcf62459fee54ad by ulrich.weigand
[FPEnv] Invert sense of MIFlag::FPExcept flag
In D71841 we inverted the sense of the SDNode-level flag to ensure all
nodes default to potentially raising FP exceptions unless otherwise
specified -- i.e. if we forget to propagate the flag somewhere, the
effect is now only lost performance, not incorrect code.
However, the related flag at the MI level still defaults to nodes not
raising FP exceptions unless otherwise specified. To be fully on the
(conservatively) safe side, we should invert that flag as well.
This patch does so by replacing MIFlag::FPExcept with
MIFlag::NoFPExcept.
(Note that this does also introduce an incompatible change in the MIR
format.)
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D72466
The file was modifiedllvm/lib/CodeGen/MIRPrinter.cpp
The file was modifiedllvm/include/llvm/CodeGen/MachineInstr.h
The file was modifiedllvm/lib/Target/SystemZ/SystemZElimCompare.cpp
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
The file was modifiedllvm/test/CodeGen/X86/fp-intrinsics-flags-x86_64.ll
The file was modifiedllvm/test/CodeGen/X86/sqrt-fastmath-mir.ll
The file was modifiedllvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-flags.ll
The file was modifiedllvm/test/CodeGen/X86/fp-intrinsics-flags.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-select-sse.ll
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.cpp
The file was modifiedllvm/lib/CodeGen/MIRParser/MIParser.cpp
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
Commit e20a3b9b6c028ef3fea92ddb19e98db45e3d0509 by Tatyana Krasnukha
[lldb][tests][NFC] Unify variable naming convention
The file was modifiedlldb/packages/Python/lldbsuite/test/dotest.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbtest.py
The file was modifiedlldb/packages/Python/lldbsuite/test/test_result.py
The file was modifiedlldb/packages/Python/lldbsuite/test/configuration.py
The file was modifiedlldb/packages/Python/lldbsuite/test/dotest_args.py
Commit 3eea082535e232b35e6b2dab45dd81728b2ae7f4 by Tatyana Krasnukha
[lldb][tests] Make it possible to expect failure for a whole category
There already are decorators and "--excluded" option to mark
test-cases/files as expected to fail. However, when a new test file is
added and it which relates to a feature that a target doesn't support,
this requires either adding decorators to that file or modifying the
file provided as "--excluded" option value.
The purpose of this patch is to avoid any modifications in such cases.
E.g. if a target doesn't support "watchpoints" and passes
"--xfail-category watchpoint" to dotest, a testing job will not fail
after a new watchpoint-related test file is added.
Differential Revision: https://reviews.llvm.org/D71906
The file was modifiedlldb/packages/Python/lldbsuite/test/test_result.py
The file was modifiedlldb/packages/Python/lldbsuite/test/configuration.py
The file was modifiedlldb/packages/Python/lldbsuite/test/dotest.py
The file was modifiedlldb/packages/Python/lldbsuite/test/dotest_args.py
Commit bac995d97896c1e785d709da24c55f0e050eb899 by arsenm2
AMDGPU/GlobalISel: Clamp G_ZEXT source sizes
Also clamps G_SEXT/G_ANYEXT, but the implementation is more limited so
fewer cases actually work.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptrtoint.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
Commit b19c0810e56b552d31247dcff081643799fd97fb by a.bataev
[LIBOMPTARGET]Ignore empty target descriptors.
Summary: If the dynamically loaded module has been compiled with
-fopenmp-targets and has no target regions, it has empty target
descriptor. It leads to a crash at the runtime if another module has at
least one target region and at least one entry in its descriptor. The
runtime library is unable to load the empty binary descriptor and
terminates the execution. Caused by a clang-offload-wrapper.
Reviewers: grokos, jdoerfert
Subscribers: caomhin, kkwli0, openmp-commits
Tags: #openmp
Differential Revision: https://reviews.llvm.org/D72472
The file was modifiedopenmp/libomptarget/src/rtl.cpp
The file was addedopenmp/libomptarget/test/offloading/dynamic_module.c
Commit 6e3ca962fafb3d2a31279c49f0cde60eb626a002 by jh7370
[DebugInfo] Improve error message text
Unlike most of our errors in the debug line parser, the "no end of
sequence" message was missing any reference to which line table it
refererred to. This change adds the offset to this message.
Reviewed by: dblaikie
Differential Revision: https://reviews.llvm.org/D72443
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/debug_line_invalid.test
The file was modifiedlld/test/ELF/undef.s
The file was modifiedllvm/unittests/DebugInfo/DWARF/DWARFDebugLineTest.cpp
Commit 7e02406f6cf180a8c89ce64665660e7cc9dbc23e by jh7370
[DebugInfo][NFC] Remove unused variable/fix variable naming
Reviewed by: MaskRay
Differential Revision: https://reviews.llvm.org/D72159
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
Commit cdd05f2aea3b950a4e2c496175117e6b47b2a050 by development
[NFC] format unittest for ExprMutAnalyzer
This formatting is a preparation for review in
https://reviews.llvm.org/D54943 to separate pure formatting changes from
actual testing changes.
The file was modifiedclang/unittests/Analysis/ExprMutationAnalyzerTest.cpp
Commit d864d93496c5fd0cc473953ab825f07e3d4c4e86 by nemanja.i.ibm
[PowerPC] Handle constant zero bits in BitPermutationSelector
We currently crash when analyzing an AssertZExt node that has some bits
that are constant zeros (i.e. as a result of an and with a constant).
This issue was reported in https://bugs.llvm.org/show_bug.cgi?id=41088
and this patch fixes that.
Differential revision: https://reviews.llvm.org/D72038
The file was modifiedllvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
The file was addedllvm/test/CodeGen/PowerPC/pr41088.ll
Commit bdd88b7ed3956534a0a71b1ea2bc88c69d48f9b7 by David.Chisnall
Add support for __declspec(guard(nocf))
Summary: Avoid using the `nocf_check` attribute with Control Flow Guard.
Instead, use a new `"guard_nocf"` function attribute to indicate that
checks should not be added on indirect calls within that function. Add
support for
`__declspec(guard(nocf))` following the same syntax as MSVC.
Reviewers: rnk, dmajor, pcc, hans, aaron.ballman
Reviewed By: aaron.ballman
Subscribers: aaron.ballman, tomrittervg, hiraditya, cfe-commits,
llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D72167
The file was modifiedllvm/lib/Transforms/CFGuard/CFGuard.cpp
The file was modifiedllvm/test/CodeGen/AArch64/cfguard-checks.ll
The file was modifiedclang/include/clang/Basic/AttrDocs.td
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was addedclang/test/Sema/attr-guard_nocf.c
The file was modifiedllvm/test/CodeGen/X86/cfguard-checks.ll
The file was modifiedclang/include/clang/Basic/Attr.td
The file was addedclang/test/CodeGenCXX/guard_nocf.cpp
The file was modifiedclang/lib/CodeGen/CGCall.cpp
The file was addedclang/test/CodeGen/guard_nocf.c
The file was modifiedllvm/test/CodeGen/ARM/cfguard-checks.ll
Commit e9331a56fead1823d528d6412828fb9e16fd62ff by Adrian Prantl
Add missing nullptr checks.
GetPersistentExpressionStateForLanguage() can return a nullptr if it
cannot construct a typesystem. This patch adds missing nullptr checks at
all uses.
Inspired by rdar://problem/58317195
Differential Revision: https://reviews.llvm.org/D72413
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionSourceCode.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ASTResultSynthesizer.cpp
The file was modifiedlldb/source/Expression/REPL.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.cpp
The file was modifiedlldb/source/Expression/UserExpression.cpp
The file was modifiedlldb/source/Target/ABI.cpp
Commit 5e7beb0a4146267f1d65c57543e67ca158aca4aa by gabor.marton
[analyzer] Add PlacementNewChecker
Summary: This checker verifies if default placement new is provided with
pointers to sufficient storage capacity.
Noncompliant Code Example:
#include <new>
void f() {
   short s;
   long *lp = ::new (&s) long;
}
Based on SEI CERT rule MEM54-CPP
https://wiki.sei.cmu.edu/confluence/display/cplusplus/MEM54-CPP.+Provide+placement+new+with+properly+aligned+pointe
This patch does not implement checking of the alignment.
Reviewers: NoQ, xazax.hun
Subscribers: mgorny, whisperity, xazax.hun, baloghadamsoftware, szepet,
rnkovacs, a.sidorin, mikhail.ramalho, donat
Tags: #clang
Differential Revision: https://reviews.llvm.org/D71612
The file was addedclang/lib/StaticAnalyzer/Checkers/CheckPlacementNew.cpp
The file was addedclang/test/Analysis/placement-new.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
The file was addedclang/test/Analysis/placement-new-user-defined.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Checkers/Checkers.td
The file was modifiedclang/docs/analyzer/checkers.rst
Commit 0b032d7ba7157b62cd0d39f8d2dc0b0efa57a710 by antiagainst
[mlir][spirv] Fix typos related to (de)serialization.
Fix typos related to (de)serialization of spv.selection.
Differential Revision: https://reviews.llvm.org/D72503
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/Deserializer.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/Serializer.cpp
Commit 26cdaeb1f05ba140011a43ef1ea8a37d3cf416d9 by spatel
[InstCombine] add tests for fsub; NFC
Conflicting/missing canonicalizations are visible in PR44509:
https://bugs.llvm.org/show_bug.cgi?id=44509
The file was modifiedllvm/test/Transforms/InstCombine/fsub.ll
Commit fbb64aa69835c8e3e9efe0afc8a73058b5a0fb3c by yhs
[BPF] extend BTF_KIND_FUNC to cover global, static and extern funcs
Previously extern function is added as BTF_KIND_VAR. This does not work
well with existing BTF infrastructure as function expected to use
BTF_KIND_FUNC and BTF_KIND_FUNC_PROTO.
This patch added extern function to BTF_KIND_FUNC. The two bits 0:1 of
btf_type.info are used to indicate what kind of function it is:
0: static
1: global
2: extern
Differential Revision: https://reviews.llvm.org/D71638
The file was modifiedllvm/test/CodeGen/BPF/BTF/static-var-readonly.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/func-typedef.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-struct-array.ll
The file was modifiedllvm/lib/Target/BPF/BTFDebug.cpp
The file was modifiedllvm/test/CodeGen/BPF/BTF/static-var-derived-type.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-var-section.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/local-var.ll
The file was addedllvm/test/CodeGen/BPF/BTF/extern-builtin.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/static-var-sec.ll
The file was addedllvm/test/CodeGen/BPF/BTF/static-func.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/func-func-ptr.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/static-var.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-global-var.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/binary-format.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/static-var-inited.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-var-func-weak.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-union.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/static-var-inited-sec.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-multilevel.ll
The file was modifiedllvm/lib/Target/BPF/BTF.h
The file was modifiedllvm/test/CodeGen/BPF/BTF/func-non-void.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-basic.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-var-struct-weak.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-var-struct.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/func-source.ll
The file was addedllvm/test/CodeGen/BPF/BTF/extern-func-arg.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-var-weak-section.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/static-var-zerolen-array.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/filename.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/func-void.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-var-func.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/func-unused-arg.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/static-var-readonly-sec.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-var-func-weak-section.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-struct-anonymous.ll
The file was modifiedllvm/lib/Target/BPF/BTFDebug.h
Commit 4c5a4514d14537cae5459e03d1fea422664b3bc2 by sam.mccall
[clangd] Fix targetDecl() on certain usage of ObjC properties.
Summary: In particular there's a common chain:

OpaqueValueExpr->PseudoObjectExpr->ObjCPropertyRefExpr->ObjCPropertyDecl
and we weren't handling the first two edges
Reviewers: dgoldman, kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, jfb, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72494
The file was modifiedclang-tools-extra/clangd/unittests/FindTargetTests.cpp
The file was modifiedclang-tools-extra/clangd/FindTarget.cpp
Commit 504b3fe5bfed7ea24c7c74f563ef6a8214e24223 by llvmgnsyncbot
[gn build] Port 5e7beb0a414
The file was modifiedllvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Commit a5bdada09defc15d2b009314306f4fcb8fa8458d by llvm-dev
[X86][AVX] lowerShuffleAsLanePermuteAndShuffle - consistently normalize
multi-input shuffle elements
We only use lowerShuffleAsLanePermuteAndShuffle for unary shuffles at
the moment, but we should consistently handle lane index calculations
for multiple inputs in both the AVX1 and AVX2 paths.
Minor (almost NFC) tidyup as I'm hoping to use
lowerShuffleAsLanePermuteAndShuffle for binary shuffles soon.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit cdc9592bf1acb6d8012a4867d2a22458945dcceb by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
Use cast<> instead of dyn_cast<> since we know that the pointer should
be valid (and is dereferenced immediately).
The file was modifiedclang/lib/ARCMigrate/ObjCMT.cpp
Commit cce4676d6d78ba56e929bd37d65c2667390b68c7 by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately below and castAs will perform the null assertion for us.
The file was modifiedclang/lib/ARCMigrate/ObjCMT.cpp
Commit ff92e469caefff9f86e5e812c08b9bba582be5d3 by inouehrs
[examples] Add missing dependency in llvm examples
To fix build failure with BUILD_SHARED_LIBS=ON
The file was modifiedllvm/examples/Kaleidoscope/BuildingAJIT/Chapter5/Server/CMakeLists.txt
The file was modifiedllvm/examples/Kaleidoscope/BuildingAJIT/Chapter5/CMakeLists.txt
The file was modifiedllvm/examples/LLJITExamples/LLJITWithCustomObjectLinkingLayer/CMakeLists.txt
Commit dfed052fb3ecef53bf01612ec3fc7df73c2134b7 by jasonliu
[AIX] Allow vararg calls when all arguments reside in registers
Summary: This patch pushes the AIX vararg unimplemented error diagnostic
later and allows vararg calls so long as all the arguments can be passed
in register. This patch extends the AIX calling convention
implementation to initialize GPR(s) for vararg float arguments. On AIX,
both GPR(s) and FPR are allocated for floating point arguments. The
GPR(s) are only initialized for vararg calls, otherwise the callee is
expected to retrieve the float argument in the FPR.
f64 in AIX PPC32 requires special handling in order to allocated and
initialize 2 GPRs. This is performed with bitcast, SRL, truncation to
initialize one GPR for the MSW and bitcast, truncations to initialize
the other GPR for the LSW.
A future patch will follow to add support for arguments passed on the
stack.
Patch provided by: cebowleratibm
Reviewers: sfertile, ZarkoCA, hubert.reinterpretcast
Differential Revision: https://reviews.llvm.org/D71013
The file was addedllvm/test/CodeGen/PowerPC/aix-cc-altivec.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was removedllvm/test/CodeGen/PowerPC/aix_cc_abi.ll
The file was addedllvm/test/CodeGen/PowerPC/aix-cc-abi.ll
Commit fd8ded99fe6e9fcae2c98ccad25d6562c5fa8a14 by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately below and castAs will perform the null assertion for us.
The file was modifiedclang/lib/CodeGen/CGVTables.cpp
Commit 4d1e23e3b3cd7c72a8b24dc5acb7e13c58a8de37 by maskray
[AArch64] Add function attribute "patchable-function-entry" to add NOPs
at function entry
The Linux kernel uses -fpatchable-function-entry to implement
DYNAMIC_FTRACE_WITH_REGS for arm64 and parisc. GCC 8 implemented
-fpatchable-function-entry, which can be seen as a generalized form of
-mnop-mcount. The N,M form (function entry points before the Mth NOP) is
currently only used by parisc.
This patch adds N,0 support to AArch64 codegen. N is represented as the
function attribute "patchable-function-entry". We will use a different
function attribute for M, if we decide to implement it.
The patch reuses the existing patchable-function pass, and
TargetOpcode::PATCHABLE_FUNCTION_ENTER which is currently used by XRay.
When the integrated assembler is used, __patchable_function_entries will
be created for each text section with the SHF_LINK_ORDER flag to prevent
--gc-sections (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93197) and
COMDAT (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93195) issues.
Retrospectively, __patchable_function_entries should use a PC-relative
relocation type to avoid the SHF_WRITE flag and dynamic relocations.
"patchable-function-entry"'s interaction with Branch Target
Identification is still unclear (see
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92424 for GCC discussions).
Reviewed By: peter.smith
Differential Revision: https://reviews.llvm.org/D72215
The file was modifiedllvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
The file was modifiedllvm/include/llvm/CodeGen/AsmPrinter.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was addedllvm/test/CodeGen/AArch64/patchable-function-entry.ll
The file was modifiedllvm/lib/CodeGen/PatchableFunction.cpp
The file was addedllvm/test/Verifier/invalid-patchable-function-entry.ll
Commit a8fbdc576990653e92ce1d766659005678fd8514 by maskray
[X86] Support function attribute "patchable-function-entry"
For x86-64, we diverge from GCC -fpatchable-function-entry in that we
emit multi-byte NOPs.
Differential Revision: https://reviews.llvm.org/D72220
The file was addedllvm/test/CodeGen/X86/patchable-function-entry.ll
The file was modifiedllvm/lib/Target/X86/X86MCInstLower.cpp
Commit a44c434b68e515ce9f2627367c83ff6b22328261 by maskray
Support function attribute patchable_function_entry
This feature is generic. Make it applicable for AArch64 and X86 because
the backend has only implemented NOP insertion for AArch64 and X86.
Reviewed By: nickdesaulniers, aaron.ballman
Differential Revision: https://reviews.llvm.org/D72221
The file was addedclang/test/CodeGen/patchable-function-entry.c
The file was modifiedclang/include/clang/Basic/AttrDocs.td
The file was addedclang/test/Sema/patchable-function-entry-attr.c
The file was modifiedclang/test/Misc/pragma-attribute-supported-attributes-list.test
The file was modifiedclang/lib/CodeGen/CodeGenFunction.cpp
The file was addedclang/test/Sema/patchable-function-entry-attr.cpp
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was modifiedclang/include/clang/Basic/Attr.td
Commit f17ae668a96eeb69f0664f126cf672e1a05754d2 by maskray
[Driver][CodeGen] Add -fpatchable-function-entry=N[,0]
In the backend, this feature is implemented with the function attribute
"patchable-function-entry". Both the attribute and XRay use
TargetOpcode::PATCHABLE_FUNCTION_ENTER, so the two features are
incompatible.
Reviewed By: ostannard, MaskRay
Differential Revision: https://reviews.llvm.org/D72222
The file was modifiedclang/lib/CodeGen/CodeGenFunction.cpp
The file was modifiedclang/include/clang/Basic/CodeGenOptions.def
The file was modifiedclang/test/CodeGen/patchable-function-entry.c
The file was modifiedclang/include/clang/Driver/Options.td
The file was addedclang/test/Driver/fpatchable-function-entry.c
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/lib/Driver/XRayArgs.cpp
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticDriverKinds.td
Commit 2d077d6dfa7909a21293ebdac81488367628e0fa by maskray
[ELF] Make TargetInfo::writeIgotPlt a no-op
RELA targets don't read initial .got.plt entries. REL targets (ARM,
x86-32) write the address of the IFUNC resolver to the entry
(`write32le(buf, s.getVA())`).
The default writeIgotPlt() is not meaningful. Make it a no-op. AArch64
and x86-64 will have 0 as initial .got.plt entries associated with
IFUNC.
Reviewed By: peter.smith
Differential Revision: https://reviews.llvm.org/D72474
The file was modifiedlld/test/ELF/gnu-ifunc-plt.s
The file was modifiedlld/test/ELF/aarch64-gnu-ifunc-plt.s
The file was modifiedlld/ELF/Target.cpp
The file was modifiedlld/ELF/Target.h
Commit f678fc7660b36ce0ad6ce4f05eaa28f3e9fdedb5 by craig.topper
[LegalizeVectorOps] Improve handling of multi-result operations.
This system wasn't very well designed for multi-result nodes. As a
consequence they weren't consistently registered in the LegalizedNodes
map leading to nodes being revisited for different results.
I've removed the "Result" variable from the main LegalizeOp method and
used a SDNode* instead. The result number from the incoming Op SDValue
is only used for deciding which result to return to the caller. When
LegalizeOp is called it should always register a legalized result for
all of its results. Future calls for any other result should be pulled
for the LegalizedNodes map.
Legal nodes will now register all of their results in the map instead of
just the one we were called for.
The Expand and Promote handling to use a vector of results similar to
LegalizeDAG. Each of the new results is then re-legalized and logged in
the LegalizedNodes map for all of the Results for the node being
legalized. None of the handles register their own results now. And none
call ReplaceAllUsesOfValueWith now.
Custom handling now always passes result number 0 to LowerOperation.
This matches what LegalizeDAG does. Since the introduction of STRICT
nodes, I've encountered several issues with X86's custom handling being
called with an SDValue pointing at the chain and our custom handlers
using that to get a VT instead of result 0. This should prevent us from
having any more of those issues. On return we will update the
LegalizedNodes map for all results so we shouldn't call the custom
handler again for each result number.
I want to push SDNode* further into the Expand and Promote handlers, but
I've left that for a follow to keep this patch size down. I've created a
dummy SDValue(Node, 0) to keep the handlers working.
Differential Revision: https://reviews.llvm.org/D72224
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
The file was modifiedllvm/test/CodeGen/X86/avx512-cmp.ll
Commit ef239972614cc3c67006f9c298fcfa841818dc77 by Raphael Isemann
[lldb] Remove FieldDecl stealing hack by rerouting indirect imports to
the original AST
Summary: This is a port of D67803 that was about preventing indirect
importing to our scratch context when evaluating expressions.
D67803 already has a pretty long explanation of how this works, but the
idea is that instead of importing declarations indirectly over the
expression AST (i.e., Debug info AST -> Expression AST -> scratch AST)
we instead directly import the declaration from the debug info AST to
the scratch AST.
The difference from D67803 is that here we have to do this in the
ASTImporterDelegate (which is our ASTImporter subclass we use in LLDB).
It has the same information as the ExternalASTMerger in D67803 as it can
access the ClangASTImporter (which also keeps track of where Decls
originally came from).
With this patch we can also delete the FieldDecl stealing hack in the
ClangASTSource (this was only necessary as the indirect imports caused
the creation of duplicate Record declarations but we needed the fields
in the Record decl we originally found in the scratch ASTContext).
This also fixes the current gmodules failures where we fail to find
std::vector fields after an indirect import over the expression AST
(where it seems even our FieldDecl stealing hack can't save us from).
Reviewers: shafik, aprantl
Reviewed By: shafik
Subscribers: JDevlieghere, lldb-commits, mib, labath, friss
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72507
The file was modifiedlldb/source/Symbol/ClangASTImporter.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp
Commit 572b9f468ad6844795fec29a7e671ba64d82e8c2 by Jonas Devlieghere
[lldb/Lua] Support loading Lua modules
Implements the command script import command for Lua.
Differential revision: https://reviews.llvm.org/D71825
The file was addedlldb/test/Shell/ScriptInterpreter/Lua/command_script_import.test
The file was addedlldb/test/Shell/ScriptInterpreter/Lua/Inputs/testmodule.lua
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Lua/ScriptInterpreterLua.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Lua/ScriptInterpreterLua.h
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Lua/Lua.h
Commit a5230ac10b0dac9a1981838209b4cbc84870c08c by daniel_l_sanders
Update the attribution policy to use the 'Author' property of a git
commit
Summary: The older method of adding 'Patch by John Doe' is documented in
the
`Attribution of Changes` section to support correct attribution of
commits that pre-date the adoption of git.
Reviewers: hfinkel, aaron.ballman, mehdi_amini
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72468
The file was modifiedllvm/docs/DeveloperPolicy.rst
Commit 13ec473b9d4bd4f7a558272932b7c0806171c666 by gabor.marton
[analyzer] Move PlacementNewChecker to alpha
The file was modifiedclang/test/Analysis/placement-new-user-defined.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Checkers/Checkers.td
The file was modifiedclang/test/Analysis/placement-new.cpp
Commit b590e0fd810e4caf59ab83b04654d42e18faaafb by craig.topper
[TargetLowering][ARM][X86] Change softenSetCCOperands handling of ONE to
avoid spurious exceptions for QNANs with strict FP quiet compares
ONE is currently softened to OGT | OLT. But the libcalls for OGT and OLT
libcalls will trigger an exception for QNAN. At least for X86 with
libgcc. UEQ on the other hand uses UO | OEQ. The UO and OEQ libcalls
will not trigger an exception for QNAN.
This patch changes ONE to use the inverse of the UEQ lowering. So we now
produce O & UNE. Technically the existing behavior was correct for a
signalling ONE, but since I don't know how to generate one of those from
clang that seemed like something we can deal with later as we would need
to fix other predicates as well. Also removing spurious exceptions
seemed better than missing an exception.
There are also problems with quiet OGT/OLT/OLE/OGE, but those are harder
to fix.
Differential Revision: https://reviews.llvm.org/D72477
The file was modifiedllvm/test/CodeGen/X86/fp128-libcalls-strict.ll
The file was modifiedllvm/test/CodeGen/X86/fpcmp-soft-fp.ll
The file was modifiedllvm/test/CodeGen/X86/fp128-compare.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/float-cmp.ll
Commit 9cd985815abf88bd77bb67f7b9cc80f2032cbbc7 by sbc
[lld][WebAssembly] Add libcall symbols to the link when LTO is being
used.
This code is copied almost verbatim from the equivalent change to the
ELF linker:
- https://reviews.llvm.org/D50017
- https://reviews.llvm.org/D50475
The upshot is that libraries containing libcall (such as compiler-rt and
libc) can be compiled with LTO.
Fixes PR41384
Differential Revision: https://reviews.llvm.org/D71738
The file was modifiedlld/wasm/Symbols.cpp
The file was modifiedlld/wasm/Driver.cpp
The file was addedlld/test/wasm/lto/libcall-archive.ll
The file was addedlld/test/wasm/lto/Inputs/libcall-archive.ll
The file was modifiedlld/wasm/InputFiles.h
The file was modifiedlld/wasm/Symbols.h
Commit 815a3f54331c39f2b400776f448dd29b3b03243b by Jonas Devlieghere
[CMake] Fix modules build after DWARFLinker reorganization
Create a dedicate module for the DWARFLinker and make it depend on
intrinsics gen.
The file was modifiedllvm/include/llvm/module.modulemap
The file was modifiedllvm/lib/DWARFLinker/CMakeLists.txt
Commit f28972facc1fce9589feab9803e3e8cfad01891c by Jan Korous
[clang] Fix out-of-bounds memory access in ComputeLineNumbers
Differential Revision: https://reviews.llvm.org/D72409
The file was modifiedclang/unittests/Basic/SourceManagerTest.cpp
The file was modifiedclang/lib/Basic/SourceManager.cpp
Commit ba91dffafe4d348b469d8ae2b7b1cd00754f72f1 by maskray
[Driver][PowerPC] Move powerpcspe logic from cc1 to Driver
Follow-up of D72014. It is more appropriate to use a target feature
instead of a SubTypeArch to express the difference.
Reviewed By: #powerpc, jhibbits
Differential Revision: https://reviews.llvm.org/D72433
The file was modifiedclang/test/Driver/ppc-features.cpp
The file was modifiedclang/test/Preprocessor/init.c
The file was modifiedclang/lib/Basic/Targets/PPC.cpp
The file was modifiedclang/lib/Driver/ToolChains/Arch/PPC.cpp
Commit 55d7b22277e1c5e710bac7d4d4dc09db3a22dad8 by steveire
[ASTMatchers] Make test more clear about what it is verifying
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
Commit 0c29d3ff2233696f663ae34a8aeda23c750ac68f by listmail
[Tests] Precommit tests showing default branch padding on skylake
A follow up patch will change the default for the compiler, but not the
assembler, just making sure we have testing for each in place.
The file was addedllvm/test/CodeGen/X86/align-branch-boundary-default.s
The file was addedllvm/test/CodeGen/X86/align-branch-boundary-default.ll
Commit 77da826edad0a7b906c734c6bee3489ef495c746 by Raphael Isemann
[lldb] Make CompleteTagDeclsScope completion order deterministic
Summary: We iterate over `m_decls_to_complete` to complete declarations.
As
`m_decls_to_complete` is a set the iteration order can be
non-deterministic. The order is currently only non-deterministic when we
have a large set of decls that need to be completed (i.e. more than 32
decls, as otherwise the SmallPtrSet is just a linear-searched list).
This doesn't really fix any specific bug or has any really observable
change in behavior as the order in which we import should not influence
any semantics. However the order we create decls/types is now always
deterministic which should make debugging easier.
Reviewers: labath, mib, shafik, davide
Reviewed By: shafik, davide
Subscribers: davide, abidh, JDevlieghere, lldb-commits, mgrang
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72495
The file was modifiedlldb/source/Symbol/ClangASTImporter.cpp
Commit 9e13cff44d6b8b9c9c8420870132931c218707cb by Raphael Isemann
[lldb] Fix TestClangASTContext.TestFunctionTemplateInRecordConstruction
in Debug builds
Summary: In Debug builds we call VerifyDecl in
ClangASTContext::CreateFunctionDeclaration which in turn calls
`getAccess` on the created FunctionDecl. As we passed in a RecordDecl as
the DeclContext for the FunctionDecl, we end up hitting the assert in
`getAccess` that checks that we never have a Decl inside a Record
without a valid AccessSpecifier. FunctionDecls are never in RecordDecls
(that would be a CXXMethodDecl) so setting a access specifier would not
be the correct way to fix this.
Instead this patch does the same thing that
DWARFASTParserClang::ParseSubroutine is doing: We pass in the
FunctionDecl with the TranslationUnit as the DeclContext. That's not
ideal but it is how we currently do it when creating our debug info AST,
so the unit test should do the same.
Reviewers: shafik
Reviewed By: shafik
Subscribers: aprantl, JDevlieghere, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72359
The file was modifiedlldb/unittests/Symbol/TestClangASTContext.cpp
Commit 4ffcec40acebae7161ac7426edc68290bbaca2b8 by aaron
Implement new AST matcher hasAnyCapture to match on LambdaExpr captures.
Accepts child matchers cxxThisExpr to match on capture of this and also
on varDecl.
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
The file was modifiedclang/lib/ASTMatchers/Dynamic/Registry.cpp
The file was modifiedclang/docs/LibASTMatchersReference.html
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h
Commit f3db1aad2796c62f0d188a74f2901c18e51843c2 by sylvestre
MakeUniqueCheck.cpp: explicit the fact that there is an autofix for this
checker
The file was modifiedclang-tools-extra/clang-tidy/modernize/MakeUniqueCheck.cpp
Commit faeeb71a17344171f814144213ac4fbc93be28fd by sylvestre
clang-tidy doc: Refresh the list of checkers and polish the script
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst
The file was modifiedclang-tools-extra/clang-tidy/add_new_check.py
Commit 71cee218619033115f5e0c7656efc8cee93180e9 by craig.topper
[TargetLowering] Use SelectionDAG::getSetCC and remove a repeated call
to getSetCCResultType in softenSetCCOperands. NFCI
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit 68cd283f3b074e3b64b9f65e93ceb2de6807c72d by sylvestre
clang-tidy doc: unbreak the CI
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst
Commit a5a6fd3f95a9ecc3ef8732192ce0fd7749135311 by eugenis
Summary: update macro for OFF_T so that sanitizer works on AARCH64.
Reviewers: vitalybuka, eugenis, MaskRay
Reviewed By: eugenis, MaskRay
Subscribers: MaskRay, kristof.beyls, #sanitizers, llvm-commits, jkz, scw
Tags: #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D72367
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_netbsd.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_posix.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_linux_s390.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/symbolizer/sanitizer_wrappers.cpp
Commit 1a8c996a8894a6ae2bf3b98780972bc7bdb6b8e6 by Jonas Devlieghere
[lldb/Scripts] Remove buildbot.py
This file is outdated and still references SVN. Buildbots are configured
through the zorg repository.
The file was removedlldb/scripts/buildbot.py
Commit e6d219122d5a94fa8642c67c391aeb47fc032c89 by Jonas Devlieghere
[lldb/Scripts] Remove remote-build.py
With Xcode gone this is no longer relevant.
The file was removedlldb/scripts/Python/remote-build.py
Commit 7c47a3719a9e587fdf993637dc09d97b5397483b by Jonas Devlieghere
[lldb/Scripts] Move android script from underneath Python dir
The scripts root directory already contains python scripts. No need to
keep this one nested under a dedicated Python directory.
The file was removedlldb/scripts/Python/use_lldb_suite.py
The file was removedlldb/scripts/Python/android/host_art_bt.py
The file was addedlldb/scripts/android/host_art_bt.py
Commit a9052b4dfc1b25bd58480668d221365495fa9101 by Vedant Kumar
[AArch64] Add isAuthenticated predicate to MCInstDesc
Add a predicate to MCInstDesc that allows tools to determine whether an
instruction authenticates a pointer. This can be used by diagnostic
tools to hint at pointer authentication failures.
Differential Revision: https://reviews.llvm.org/D70329
rdar://55089604
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrFormats.td
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/utils/TableGen/CodeGenInstruction.cpp
The file was modifiedllvm/include/llvm/Target/Target.td
The file was modifiedllvm/utils/TableGen/CodeGenInstruction.h
The file was modifiedllvm/include/llvm/MC/MCInstrDesc.h
The file was modifiedllvm/utils/TableGen/InstrDocsEmitter.cpp
The file was modifiedllvm/unittests/Target/AArch64/InstSizes.cpp
The file was modifiedllvm/utils/TableGen/InstrInfoEmitter.cpp
Commit 7ce92dc0b4bcc1044052a06df3f07a94eb890823 by Jonas Devlieghere
[lldb/Test] Bypass LLDB_TEST_COMMON_ARGS for certain dotest args (NFC)
Rather than serializing every argument through LLDB_TEST_COMMON_ARGS, we
can pass some of them directly using their CMake variable. Although this
does introduce some code duplication between lit's site config and the
lldb-dotest utility, it also means that it becomes easier to override
these values (WIP).
The file was modifiedlldb/test/API/CMakeLists.txt
The file was modifiedlldb/utils/lldb-dotest/lldb-dotest.in
The file was modifiedlldb/test/API/lit.site.cfg.py.in
The file was modifiedlldb/test/API/lit.cfg.py
Commit c5adcdc5c88a89241b1150824fc44370c62c7132 by Jonas Devlieghere
[lldb/Utils] Remove vim-lldb
The vim-lldb plugin is unmaintained and doesn't work with a recent vim
installation that uses Python 3. This removes it from the LLDB
repository. The code is still available under lldb-tools on GitHub like
we did with for lldb-mi. (https://github.com/lldb-tools/vim-lldb)
Differential revision: https://reviews.llvm.org/D72541
The file was removedlldb/utils/vim-lldb/python-vim-lldb/import_lldb.py
The file was removedlldb/utils/vim-lldb/python-vim-lldb/plugin.py
The file was removedlldb/utils/vim-lldb/python-vim-lldb/lldb_controller.py
The file was removedlldb/utils/vim-lldb/python-vim-lldb/vim_ui.py
The file was removedlldb/utils/vim-lldb/plugin/lldb.vim
The file was removedlldb/utils/vim-lldb/python-vim-lldb/vim_panes.py
The file was removedlldb/utils/vim-lldb/doc/lldb.txt
The file was removedlldb/utils/vim-lldb/python-vim-lldb/vim_signs.py
The file was removedlldb/utils/vim-lldb/README
Commit 4c00dbf22d7f0ad005444b412b450ee4b4779b6a by Vedant Kumar
lldbutil: Forward ASan launch info to test inferiors
This allows an unsanitized test process which loads a sanitized DSO (the
motivating example is a Swift runtime dylib) to launch on Darwin.
rdar://57290132
Differential Revision: https://reviews.llvm.org/D71379
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbutil.py
The file was modifiedlldb/test/API/lit.cfg.py
Commit 987bf8b6c14613da907fa78330415e266b97a036 by Stanislav.Mekhanoshin
Let targets adjust operand latency of bundles
This reverts the AMDGPU DAG mutation implemented in D72487 and gives a
more general way of adjusting BUNDLE operand latency.
It also replaces FixBundleLatencyMutation with adjustSchedDependency
callback in the AMDGPU, fixing not only successor latencies but
predecessors' as well.
Differential Revision: https://reviews.llvm.org/D72535
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/lib/CodeGen/ScheduleDAGInstrs.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
Commit d3ba1e026dbc44e9097ce6ea1c92d065f1fe33e8 by Jonas Devlieghere
[lldb/Reproducer] Add SBReproducer::Replay overload (again)
I modified the SBAPI under the assumption that nobody was using the old
API yet. However, that turns out to be false. So instead of adding the
deafault argument I've reintroduced the old API and made the new one an
overload.
The file was modifiedlldb/source/API/SBReproducer.cpp
The file was modifiedlldb/include/lldb/API/SBReproducer.h
Commit 7a38468e34eeeb59e80b176b97213d205d8d9b41 by richard
Only destroy static locals if they have non-trivial destructors.
This fixes a regression introduced in
2b4fa5348ee157b6b1a1af44d0137ca8c7a71573 that caused us to emit
shutdown-time destruction for variables with ARC ownership, using
C++-specific functions that don't exist in C implementations.
The file was modifiedclang/lib/CodeGen/CGDecl.cpp
The file was addedclang/test/CodeGenObjC/initialize-function-static.m
Commit e05e219926f90ccab927b7b1af6d14aa6dd52571 by Vedant Kumar
[LockFileManager] Make default waitForUnlock timeout a parameter, NFC
Patch by Xi Ge!
The file was modifiedllvm/include/llvm/Support/LockFileManager.h
The file was modifiedllvm/lib/Support/LockFileManager.cpp
Commit 064087581ab98cca7254b4d0f12ecbed13da2692 by mtrofin
[NFC][InlineCost] Factor cost modeling out of CallAnalyzer traversal.
Summary: The goal is to simplify experimentation on the cost model.
Today, CallAnalyzer decides 2 things: legality, and benefit. The
refactoring keeps legality assessment in CallAnalyzer, and factors
benefit evaluation out, as an extension.
Reviewers: davidxl, eraman
Reviewed By: davidxl
Subscribers: kamleshbhalui, fedor.sergeev, hiraditya,
baloghadamsoftware, haicheng, a.sidorin, Szelethus, donat.nagy, dkrupp,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71733
The file was modifiedllvm/lib/Analysis/InlineCost.cpp
Commit ca4a55fabbbebef1752fd4e2913c28bb8b510621 by antiagainst
[mlir] NFC: put C++ code emission classes in their own files
This exposes thse classes so that they can be used in interfaces.
Differential Revision: https://reviews.llvm.org/D72514
The file was addedmlir/lib/TableGen/OpClass.cpp
The file was modifiedmlir/lib/TableGen/CMakeLists.txt
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
The file was addedmlir/include/mlir/TableGen/OpClass.h
Commit 397215cc309df1171a198b11cab3b241db9441db by antiagainst
[mlir][ods] Support dialect specific content emission via hooks
Thus far we can only generate the same set of methods even for
operations in different dialects. This is problematic for dialects that
want to generate additional operation class methods programmatically,
e.g., a special builder method or attribute getter method. Apparently we
cannot update the OpDefinitionsGen backend every time when such a need
arises. So this CL introduces a hook into the OpDefinitionsGen backend
to allow dialects to emit additional methods and traits to operation
classes.
Differential Revision: https://reviews.llvm.org/D72514
The file was modifiedmlir/include/mlir/TableGen/Operator.h
The file was addedmlir/include/mlir/TableGen/ODSDialectHook.h
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Commit 1b8c84b8dd5a4a294943a6a6f0631d2d3a1f9f27 by richard
Improve precision of documentation comment.
The file was modifiedclang/include/clang/AST/Decl.h
Commit ceb801612a678bdffe7e7bf163bd0eed9c9b73a2 by Jessica Paquette
[AArch64] Don't generate libcalls for wide shifts on Darwin
Similar to cff90f07cb5cc3.
Darwin doesn't always use compiler-rt, and so we can't assume that these
functions are available (at least on arm64).
The file was modifiedllvm/test/CodeGen/AArch64/shift_minsize.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit f4df7f4701d80ce6a2f5674db50f87fbd2dad82f by richard
Remove redundant implicit cast creation.
FindCompositePointerType has already cast the operands to the composite
type for us in the case where it succeeds.
The file was modifiedclang/lib/Sema/SemaExpr.cpp
Commit fbf915f01d46e005146f01553a5d7c6619d19597 by richard
Add a FIXME and corresponding test coverage for some suspicious behavior
forming composite ObjC pointer types in comparisons.
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/test/SemaObjC/arc.m
The file was modifiedclang/test/SemaObjCXX/arc-ptr-comparison.mm
Commit 9a6f4d451ca7aa06b94a407015fbadb456bc09ef by richard
Clean up and slightly generalize implementation of composite pointer
type computation, in preparation for P0388R4, which adds another few
cases here.
We now properly handle forming multi-level composite pointer types
involving nested Objective-C pointer types (as is consistent with
including them as part of the notion of 'similar types' on which this
rule is based). We no longer lose non-CVR qualifiers on nested pointer
types.
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was addedclang/test/SemaOpenCLCXX/address-space-cond.cl
The file was modifiedclang/test/SemaObjCXX/composite-objc-pointertype.mm
Commit 44e0daf16e6985eb44ea9a629402852dbff9cb0b by thakis
driver: Allow -fdebug-compilation-dir=foo in joined form.
All 130+ f_Group flags that take an argument allow it after a '=',
except for fdebug-complation-dir. Add a Joined<> alias so that it
behaves consistently with all the other f_Group flags.
(Keep the old Separate flag for backwards compat.)
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/test/CodeGen/debug-info-compilation-dir.c
The file was modifiedclang/test/Driver/fembed-bitcode.c
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/test/Driver/integrated-as.s
The file was modifiedclang/test/Driver/clang_f_opts.c
The file was modifiedclang/test/Driver/cl-options.c
Commit 1d2cd2c0b7d978e22a50e918af708ba67e87c2c1 by maskray
[Driver] Fix OptionClass of -fconvergent-functions and -fms-volatile
(Joined -> Flag)
The file was modifiedclang/include/clang/Driver/Options.td
Commit 9b23407063ca41901e9e272bacf8b33eee8251c4 by saar
[Concepts] Fix MarkUsedTemplateParameters for exprs
D41910 introduced a recursive visitor to MarkUsedTemplateParameters, but
disregarded the 'Depth' parameter, and had incorrect assertions. This
fixes the visitor and removes the assertions.
The file was modifiedclang/lib/Sema/SemaTemplateDeduction.cpp
Commit de0a2247115729eade8249267a47f96f070a7666 by alexandre.ganea
Remove umask tests
These tests were added in 18627115f4d2db5dc73207e0b5312f52536be7dd and
e08b59f81d950bd5c8b8528fcb3ac4230c7b736c for validating a refactoring.
Removing because they break on ACL-controlled folders on Ubuntu, and
their added value is low.
Differential Revision: https://reviews.llvm.org/D70854
The file was removedclang/test/Misc/permissions.cpp
The file was removedllvm/test/Other/umask.ll
Commit 7c816492197aefbaa2ea3ba0e391f7c6905956bc by Tom.Tan
[COFF] Align ARM64 range extension thunks at instruction boundary
RangeExtensionThunkARM64 is created for out-of-range branches on Windows
ARM64 because branch instructions has limited bits to encode target
address. Currently, RangeExtensionThunkARM64 is appended to its
referencing COFF section from object file at link time without any
alignment requirement, so if size of the preceding COFF section is not
aligned to instruction boundary (4 bytes), RangeExtensionThunkARM64 will
emit thunk instructions at unaligned address which is never a valid
branch target on ARM64, and usually triggers invalid instruction
exception when branching to it.
This PR fixes it by requiring such thunks to align at 4 bytes.
Differential revision: https://reviews.llvm.org/D72473
The file was modifiedlld/test/COFF/arm64-thunks.s
The file was modifiedlld/COFF/Chunks.h
Commit bb2553175ac3cc6223ff379b266ee1c23a468d66 by craig.topper
[TargetLowering][ARM][Mips][WebAssembly] Remove the ordered FP compare
from RunttimeLibcalls.def and all associated usages
Summary: This always just used the same libcall as unordered, but the
comparison predicate was different. This change appears to have been
made when targets were given the ability to override the predicates.
Before that they were hardcoded into the type legalizer. At that time we
never inverted predicates and we handled ugt/ult/uge/ule compares by
emitting an unordered check ORed with a ogt/olt/oge/ole checks. So only
ordered needed an inverted predicate. Later ugt/ult/uge/ule were
optimized to only call a single libcall and invert the compare.
This patch removes the ordered entries and just uses the inverting logic
that is now present. This removes some odd things in both the Mips and
WebAssembly code.
Reviewers: efriedma, ABataev, uweigand, cameron.mcinally, kpn
Reviewed By: efriedma
Subscribers: dschuff, sdardis, sbc100, arichardson, jgravelle-google,
kristof.beyls, hiraditya, aheejin, sunfish, atanasyan, Petar.Avramovic,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72536
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/include/llvm/IR/RuntimeLibcalls.def
The file was modifiedllvm/lib/Target/Mips/Mips16ISelLowering.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/lib/Target/ARM/ARMLegalizerInfo.cpp
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
Commit a701be8f036accef9a3dab62fa4baa70ea330a80 by czhengsz
[SCEV] [NFC] add more test cases for range of addrecexpr with nsw flag
The file was modifiedllvm/test/Analysis/ScalarEvolution/range_nw_flag.ll
Commit 4134d706d9bc48d1634e0d95a5c1698f5fcfd06e by qiucofan
[NFC] [PowerPC] Update mi-peephole-splat test
Use script to re-generate the test case, for easier comparison with
future patches.
The file was modifiedllvm/test/CodeGen/PowerPC/mi-peephole-splat.ll
Commit 4a32cd11acd7c38f5e0b587d724935ab7a9938a6 by mjbedy
[AMDGPU] Remove unnecessary v_mov from a register to itself in WQM
lowering.
Summary:
- SI Whole Quad Mode phase is replacing WQM pseudo instructions with
v_mov instructions. While this is necessary for the special handling of
moving results out of WWM live ranges, it is not necessary for WQM live
ranges. The result is a v_mov from a register to itself after every WQM
operation. This change uses a COPY psuedo in these cases, which allows
the register allocator to coalesce the moves away.
Reviewers: tpr, dstuttard, foad, nhaehnle
Reviewed By: nhaehnle
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl,
dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71386
The file was modifiedllvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/wqm.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/wqm.ll
Commit 695804508db048fe3403f2b8bc690633a471a40b by Amara Emerson
Mark the test/Feature/load_extension.ll test as unsupported on Darwin.
With plugins and examples enabled, this XPASSes. Mark it as unsupported
until the owner investigates what's going on.
The file was modifiedllvm/test/Feature/load_extension.ll
Commit 69806808b918adc9b24bee05654b1d6dad91ef74 by craig.topper
[X86] Use ReplaceAllUsesWith instead of ReplaceAllUsesOfValueWith to
simplify some code. NFCI
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Commit fcad5b298c7859d7f10908fab7b82983e286bb8d by maskray
[X86][Disassembler] Simplify readPrefixes
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
Commit 5fe5c0a60f9a5f32da4316ba0d1732a1e439703b by craig.topper
[X86] Preserve fpexcept property when turning strict_fp_extend and
strict_fp_round into stack operations.
We use the stack for X87 fp_round and for moving from SSE f32/f64 to X87
f64/f80. Or from X87 f64/f80 to SSE f32/f64.
Note for the SSE<->X87 conversions the conversion always happens in the
X87 domain. The load/store ops in the X87 instructions are able to
signal exceptions.
The file was modifiedllvm/lib/Target/X86/X86InstrFPStack.td
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Commit c2ddfa876fa90008f1b4ff611256ad5dd4b36d96 by craig.topper
[X86] Simplify code by removing an unreachable condition. NFCI
For X87<->SSE conversions, the SSE type is always smaller than the X87
type. So we can always use the smallest type for the memory type.
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Commit 60346bdbd73da9c944d50ea5dcecad71a05105ac by csigg
Add test for GDB pretty printers.
Reviewers: dblaikie, aprantl, davide, JDevlieghere
Reviewed By: aprantl
Subscribers: jmorse, aprantl, merge_guards_bot, mgorny, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72321
The file was modifieddebuginfo-tests/CMakeLists.txt
The file was addeddebuginfo-tests/llvm-prettyprinters/gdb/lit.local.cfg
The file was addeddebuginfo-tests/llvm-prettyprinters/gdb/prettyprinters.gdb
The file was modifieddebuginfo-tests/lit.cfg.py
The file was addeddebuginfo-tests/llvm-prettyprinters/gdb/prettyprinters.cpp
Commit 81a3d987ced0905bef2e3055bf77ec174bb631c7 by craig.topper
[X86] Remove dead code from X86DAGToDAGISel::Select that is no longer
needed now that we don't mutate strict fp nodes. NFC
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Commit 0e322c8a1f20ab04ce4f6bc538846859707f2d69 by nikita.ppv
[InstCombine] Preserve nuw on sub of geps (PR44419)
Fix https://bugs.llvm.org/show_bug.cgi?id=44419 by preserving the nuw on
sub of geps. We only do this if the offset has a multiplication as the
final operation, as we can't be sure the operations is nuw in the other
cases without more thorough analysis.
Differential Revision: https://reviews.llvm.org/D72048
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
The file was modifiedllvm/test/Transforms/InstCombine/sub-gep.ll
Commit ad36d29eaed62e33eabab8ffd2006b9ff5fbd719 by nikita.ppv
[LoopSimplify] Regenerate test checks; NFC
For D72519.
The file was modifiedllvm/test/Transforms/LoopSimplify/basictest.ll
Commit 142ba7d76af4a66037fd180db371da19f35ef5f3 by nikita.ppv
[LoopRotate] Add tests for rotate with switch; NFC
For D72420.
The file was addedllvm/test/Transforms/LoopRotate/switch.ll
Commit 87407fc03c82d880cc42330a8e230e7a48174e3c by nunoplopes
DSE: fix bug where we would only check libcalls for name rather than
whole decl
The file was modifiedllvm/test/Transforms/DeadStoreElimination/libcalls.ll
The file was addedllvm/test/Transforms/DeadStoreElimination/libcalls2.ll
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Commit 5d069f4314a0d8b124a563e61d161c3c3d3b0536 by flo
[X86] Add more complex tests for vector masks used with AND/OR/XOR.
Additional test cases for D72524.
The file was modifiedllvm/test/CodeGen/X86/v8i1-masks.ll
Commit ce35010d782cb5a69102ad7785eb747f6d747eb4 by llvm-dev
[X86][AVX] Add lowerShuffleAsLanePermuteAndSHUFP lowering
Add initial support for lowering v4f64 shuffles to SHUFPD(VPERM2F128(V1,
V2), VPERM2F128(V1, V2)), eventually this could be used for v8f32 (and
maybe v8f64/v16f32) but I'm being conservative for the initial
implementation as only v4f64 can always succeed.
This currently is only called from lowerShuffleAsLanePermuteAndShuffle
so only gets used for unary shuffles, and we limit this to cases where
we use upper elements as otherwise concating 2 xmm shuffles is probably
the better case.
Helps with poor shuffles mentioned in D66004.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
Commit 08275a52d83e623f0347fd9396c18f4d21a15c90 by llvm-dev
Fix copy+paste typo in shuffle test name
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
Commit 9c74fb402e1b7aad4a509a49ab4792154b8ba2c8 by koraq
[Sema] Improve -Wrange-loop-analysis warnings.
No longer generate a diagnostic when a small trivially copyable type is
used without a reference. Before the test looked for a POD type and had
no size restriction. Since the range-based for loop is only available in
C++11 and POD types are trivially copyable in C++11 it's not required to
test for a POD type.
Since copying a large object will be expensive its size has been
restricted. 64 bytes is a common size of a cache line and if the object
is aligned the copy will be cheap. No performance impact testing has
been done.
Differential Revision: https://reviews.llvm.org/D72212
The file was modifiedclang/test/SemaCXX/warn-range-loop-analysis.cpp
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was addedclang/test/SemaCXX/warn-range-loop-analysis-trivially-copyable.cpp
Commit 24763734e7f45e3b60118b28987685d42e7a761f by llvm-dev
[X86] Fix outdated comment
The generic saturated math opcodes are no longer widened inside
X86TargetLowering
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit a8ed86b5c705cf1d2f3ca55b0640cf0f2fe01abc by llvm-dev
moveOperands - assert Src/Dst MachineOperands are non-null.
Fixes static-analyzer warnings.
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
Commit 7c7ca515837305f5d14033aee1191c254b86063c by benny.kra
Remove copy ctors identical to the default one. NFC.
Those do nothing but make the type no longer trivial to the compiler.
The file was modifiedmlir/include/mlir/IR/AffineMap.h
The file was modifiedmlir/include/mlir/IR/AffineExpr.h
The file was modifiedmlir/include/mlir/IR/IntegerSet.h
Commit 2740b2d5d5f0f56c87024555bdcae4f91e595ddb by llvm-dev
Fix uninitialized value clang static analyzer warning. NFC.
The file was modifiedllvm/lib/Transforms/Utils/CodeExtractor.cpp
Commit ded237b58d56299f90ef44853ef79b039248b85e by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately below and castAs will perform the null assertion for us.
The file was modifiedclang/lib/Sema/SemaDecl.cpp
Commit 16c53ffcb9d040f0396bf1ab42ca366f7e1f1e4d by llvm-dev
Fix "pointer is null" static analyzer warnings. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately below and castAs will perform the null assertion for us.
The file was modifiedclang/lib/CodeGen/CGExprScalar.cpp
The file was modifiedclang/lib/CodeGen/CGExprCXX.cpp
The file was modifiedclang/lib/CodeGen/CGExpr.cpp
Commit d87a76c9dae38b2a1ef63584aee82e74490dc83b by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately within mangleCallingConvention and castAs will perform the
null assertion for us.
The file was modifiedclang/lib/AST/MicrosoftMangle.cpp
Commit 93431f96a7b14ff03036bae77cc0197fdc98ad52 by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
Use cast<> instead of dyn_cast<> since we know that the pointer should
be valid (and is dereferenced immediately).
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp
Commit bf03944d5d9a7e7c8105c69dfa0d7e0d345644df by llvm-dev
Fix "pointer is null" static analyzer warnings. NFCI.
Use castAs<> instead of getAs<> since the pointers are dereferenced
immediately and castAs will perform the null assertion for us.
The file was modifiedclang/lib/Sema/SemaCodeComplete.cpp
Commit fce887beb79780d0e0b19e8ab6176978a3dce9b8 by llvm-dev
GlobalModuleIndex - Fix use-after-move clang static analyzer warning.
Shadow variable names meant we were referencing the Buffer input
argument, not the GlobalModuleIndex member that its std::move()'d it.
The file was modifiedclang/lib/Serialization/GlobalModuleIndex.cpp
Commit 6cb3957730e9085bb7c37d871c790f910efdd6a7 by listmail
[X86AsmBackend] Be consistent about placing definitions out of line
[NFC]
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Commit 563d3e344452c8923db09b043b8db471fc413b1e by listmail
[X86AsmBackend] Move static function before sole use [NFC]
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Commit 1d641daf260308815d014d1bf1b424a1ed1e7277 by listmail
[X86] Adjust nop emission by compiler to consider target decode
limitations
The primary motivation of this change is to bring the code more closely
in sync behavior wise with the assembler's version of nop emission.  I'd
like to eventually factor them into one, but that's hard to do when one
has features the other doesn't.
The longest encodeable nop on x86 is 15 bytes, but many processors - for
instance all intel chips - can't decode the 15 byte form efficiently.
On those processors, it's better to use either a 10 byte or 11 byte
sequence depending.
The file was modifiedllvm/test/CodeGen/X86/align-branch-boundary-suppressions.ll
The file was modifiedllvm/test/CodeGen/X86/stackmap-nops.ll
The file was modifiedllvm/test/MC/X86/stackmap-nops.ll
The file was modifiedllvm/lib/Target/X86/X86MCInstLower.cpp
Commit 2bdf33cc4c733342fc83081bc7410ac5e9a24f55 by riverriddle
[mlir] NFC: Remove Value::operator* and Value::operator-> now that Value
is properly value-typed.
Summary: These were temporary methods used to simplify the transition.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D72548
The file was modifiedmlir/examples/toy/Ch4/mlir/ToyCombine.td
The file was modifiedmlir/test/mlir-tblgen/op-result.td
The file was modifiedmlir/include/mlir/IR/OpBase.td
The file was modifiedmlir/include/mlir/Quantizer/Support/ConstraintAnalysisGraph.h
The file was modifiedmlir/lib/Analysis/CallGraph.cpp
The file was modifiedmlir/lib/Analysis/Dominance.cpp
The file was modifiedmlir/include/mlir/IR/Operation.h
The file was modifiedmlir/lib/Transforms/LoopFusion.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgTraits.h
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/Serializer.cpp
The file was modifiedmlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp
The file was modifiedmlir/lib/Transforms/PipelineDataTransfer.cpp
The file was modifiedmlir/examples/toy/Ch3/mlir/ToyCombine.cpp
The file was modifiedmlir/lib/EDSC/Helpers.cpp
The file was modifiedmlir/include/mlir/Dialect/StandardOps/Ops.td
The file was modifiedmlir/include/mlir/Dialect/StandardOps/Ops.h
The file was modifiedmlir/lib/Transforms/Utils/Utils.cpp
The file was modifiedmlir/lib/Quantizer/Configurations/FxpMathConfig.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/LinalgTransforms.cpp
The file was modifiedmlir/lib/Analysis/LoopAnalysis.cpp
The file was modifiedmlir/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedmlir/lib/Transforms/Vectorize.cpp
The file was modifiedmlir/lib/EDSC/Builders.cpp
The file was modifiedmlir/examples/toy/Ch6/mlir/ToyCombine.td
The file was modifiedmlir/test/lib/TestDialect/TestPatterns.cpp
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
The file was modifiedmlir/include/mlir/Dialect/AffineOps/AffineOps.h
The file was modifiedmlir/examples/toy/Ch4/mlir/Dialect.cpp
The file was modifiedmlir/lib/Dialect/FxpMathOps/Transforms/UniformKernelUtils.h
The file was modifiedmlir/lib/Transforms/Utils/FoldUtils.cpp
The file was modifiedmlir/include/mlir/IR/OpImplementation.h
The file was modifiedmlir/lib/Transforms/MemRefDataFlowOpt.cpp
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp
The file was modifiedmlir/lib/IR/Operation.cpp
The file was modifiedmlir/docs/Tutorials/Toy/Ch-4.md
The file was modifiedmlir/lib/Conversion/GPUToCUDA/ConvertLaunchFuncToCudaCalls.cpp
The file was modifiedmlir/test/lib/TestDialect/TestOps.td
The file was modifiedmlir/lib/Analysis/Verifier.cpp
The file was modifiedmlir/lib/Transforms/Utils/InliningUtils.cpp
The file was modifiedmlir/examples/toy/Ch6/mlir/Dialect.cpp
The file was modifiedmlir/examples/toy/Ch7/mlir/ToyCombine.td
The file was modifiedmlir/lib/Quantizer/Transforms/InferQuantizedTypesPass.cpp
The file was modifiedmlir/lib/Conversion/StandardToLLVM/ConvertStandardToLLVM.cpp
The file was modifiedmlir/tools/mlir-tblgen/LLVMIRConversionGen.cpp
The file was modifiedmlir/lib/Dialect/Traits.cpp
The file was modifiedmlir/examples/toy/Ch4/mlir/ToyCombine.cpp
The file was modifiedmlir/lib/Transforms/DialectConversion.cpp
The file was modifiedmlir/examples/toy/Ch5/mlir/ToyCombine.td
The file was modifiedmlir/examples/toy/Ch5/mlir/Dialect.cpp
The file was modifiedmlir/lib/IR/TypeUtilities.cpp
The file was modifiedmlir/lib/IR/AsmPrinter.cpp
The file was modifiedmlir/tools/mlir-tblgen/RewriterGen.cpp
The file was modifiedmlir/include/mlir/IR/OpDefinition.h
The file was modifiedmlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/Transforms/DecorateSPIRVCompositeTypeLayoutPass.cpp
The file was modifiedmlir/lib/IR/Function.cpp
The file was modifiedmlir/lib/Dialect/QuantOps/IR/QuantOps.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/EDSC/Builders.h
The file was modifiedmlir/lib/Analysis/Utils.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
The file was modifiedmlir/examples/toy/Ch6/mlir/ToyCombine.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVOps.cpp
The file was modifiedmlir/lib/Analysis/AffineAnalysis.cpp
The file was modifiedmlir/include/mlir/Dialect/QuantOps/QuantOps.td
The file was modifiedmlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
The file was modifiedmlir/include/mlir/EDSC/Builders.h
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
The file was modifiedmlir/lib/Dialect/Linalg/EDSC/Builders.cpp
The file was modifiedmlir/lib/Transforms/LoopTiling.cpp
The file was modifiedmlir/docs/QuickstartRewrites.md
The file was modifiedmlir/lib/IR/Region.cpp
The file was modifiedmlir/include/mlir/Dialect/VectorOps/VectorTransformPatterns.td
The file was modifiedmlir/lib/Transforms/LoopInvariantCodeMotion.cpp
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/LegalizeStandardForSPIRV.cpp
The file was modifiedmlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
The file was modifiedmlir/examples/toy/Ch3/mlir/ToyCombine.td
The file was modifiedmlir/lib/Dialect/LoopOps/LoopOps.cpp
The file was modifiedmlir/lib/IR/Block.cpp
The file was modifiedmlir/lib/Dialect/FxpMathOps/Transforms/LowerUniformRealMath.cpp
The file was modifiedmlir/examples/toy/Ch7/mlir/MLIRGen.cpp
The file was modifiedmlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
The file was modifiedmlir/lib/Analysis/AffineStructures.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/Deserializer.cpp
The file was modifiedmlir/lib/Dialect/VectorOps/VectorOps.cpp
The file was modifiedmlir/include/mlir/Dialect/VectorOps/VectorOps.td
The file was modifiedmlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp
The file was modifiedmlir/lib/Dialect/GPU/IR/GPUDialect.cpp
The file was modifiedmlir/lib/Dialect/QuantOps/Transforms/ConvertConst.cpp
The file was modifiedmlir/lib/Transforms/Utils/LoopFusionUtils.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
The file was modifiedmlir/lib/Transforms/Utils/RegionUtils.cpp
The file was modifiedmlir/test/lib/TestDialect/TestDialect.cpp
The file was modifiedmlir/include/mlir/EDSC/Intrinsics.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/LinalgTransformPatterns.td
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVDialect.cpp
The file was modifiedmlir/docs/OpDefinitions.md
The file was modifiedmlir/test/lib/Transforms/TestMemRefStrideCalculation.cpp
The file was modifiedmlir/examples/toy/Ch3/mlir/Dialect.cpp
The file was modifiedmlir/examples/toy/Ch7/mlir/ToyCombine.cpp
The file was modifiedmlir/lib/Parser/Parser.cpp
The file was modifiedmlir/examples/toy/Ch5/mlir/ToyCombine.cpp
The file was modifiedmlir/test/lib/Transforms/TestInlining.cpp
The file was modifiedmlir/include/mlir/Transforms/RegionUtils.h
The file was modifiedmlir/lib/Analysis/Liveness.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Analysis/DependenceAnalysis.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp
The file was modifiedmlir/lib/Transforms/AffineLoopInvariantCodeMotion.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
The file was modifiedmlir/include/mlir/Dialect/AffineOps/AffineOps.td
The file was modifiedmlir/docs/DeclarativeRewrites.md
The file was modifiedmlir/lib/Dialect/StandardOps/Ops.cpp
The file was modifiedmlir/docs/Tutorials/Toy/Ch-3.md
The file was modifiedmlir/lib/Transforms/LoopUnrollAndJam.cpp
The file was modifiedmlir/lib/Quantizer/Support/ConstraintAnalysisGraph.cpp
The file was modifiedmlir/test/lib/Transforms/TestVectorizationUtils.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/include/mlir/IR/Matchers.h
The file was modifiedmlir/examples/toy/Ch2/mlir/Dialect.cpp
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/ConvertStandardToSPIRV.cpp
The file was modifiedmlir/lib/Quantizer/Transforms/AddDefaultStatsTestPass.cpp
The file was modifiedmlir/lib/Analysis/VectorAnalysis.cpp
The file was modifiedmlir/lib/Dialect/VectorOps/VectorTransforms.cpp
The file was modifiedmlir/include/mlir/Analysis/Dominance.h
The file was modifiedmlir/include/mlir/IR/Value.h
The file was modifiedmlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
The file was modifiedmlir/lib/IR/Builders.cpp
The file was modifiedmlir/lib/IR/Value.cpp
The file was modifiedmlir/test/mlir-tblgen/predicate.td
The file was modifiedmlir/lib/IR/PatternMatch.cpp
The file was modifiedmlir/lib/Analysis/SliceAnalysis.cpp
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
The file was modifiedmlir/lib/Dialect/AffineOps/AffineOps.cpp
The file was modifiedmlir/examples/toy/Ch7/mlir/Dialect.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
Commit 4c48ea68e491cb42f1b5d43ffba89f6a7f0dadc4 by development
[ASTMatchers] extract public matchers from const-analysis into own patch
Summary: The analysis for const-ness of local variables required a view
generally useful matchers that are extracted into its own patch.
They are `decompositionDecl` and `forEachArgumentWithParamType`, that
works for calls through function pointers as well.
Reviewers: aaron.ballman
Reviewed By: aaron.ballman
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72505
The file was modifiedclang/docs/LibASTMatchersReference.html
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h
The file was modifiedclang/lib/ASTMatchers/Dynamic/Registry.cpp
Commit 23a799adf0abbe9a7be1494d5efd1ab3215ee4fb by development
Revert "[ASTMatchers] extract public matchers from const-analysis into
own patch"
This reverts commit 4c48ea68e491cb42f1b5d43ffba89f6a7f0dadc4. The
powerpc buildbots had an internal compiler error after this patch. This
requires some inspection.
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h
The file was modifiedclang/docs/LibASTMatchersReference.html
The file was modifiedclang/lib/ASTMatchers/Dynamic/Registry.cpp
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
Commit d2751f8fdf6c072045bab62f6035511e028f46ee by Lang Hames
[ExecutionEngine] Re-enable FastISel for non-iOS arm targets.
Patch by Nicolas Capens. Thanks Nicolas!
https://reviews.llvm.org/D65015
The file was modifiedllvm/lib/ExecutionEngine/TargetSelect.cpp
Commit dc422e968e73790178e500f506e8fb7cfa1e62ea by koraq
Add -Wrange-loop-analysis changes to ReleaseNotes
This reflects the recent changes done.
The file was modifiedclang/docs/ReleaseNotes.rst
Commit 9cc9120969fd9f7f6a99321c7d94133a32927a3a by craig.topper
[X86] Turn FP_ROUND/STRICT_FP_ROUND into
X86ISD::VFPROUND/STRICT_VFPROUND during PreprocessISelDAG to remove some
duplicate isel patterns.
The file was modifiedllvm/lib/Target/X86/X86InstrSSE.td
The file was modifiedllvm/lib/Target/X86/X86InstrAVX512.td
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Commit a5994c789a2982a770254ae1607b5b4cb641f73c by maskray
[X86][Disassembler] Simplify and optimize reader functions
llvm-objdump -d on clang is decreased from 8.2s to 7.8s.
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
Commit 9fe6f36c1a909e381275f897b780a9c878fab94a by craig.topper
[LegalizeVectorOps] Only pass SDNode* instead SDValue to all of the
Expand* and Promote* methods.
All the Expand* and Promote* function assume they are being called with
result 0 anyway. Just hardcode result 0 into them.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
Commit 5a9954c02a7d6e60da26b2feec0837695846aeed by craig.topper
[LegalizeVectorOps] Remove some of the simpler Expand methods. Pass
Results vector to a couple. NFCI
Some of the simplest handlers just call TLI and if that fails, they fall
back to unrolling. For those just inline the TLI call and share the
unrolling call with the default case of Expand.
For ExpandFSUB and ExpandBITREVERSE so that its obvious they don't
return results sometimes and want to defer to LegalizeDAG.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
Commit 179abb091d8a1d67115d21b54001d10250756042 by maskray
[X86][Disassembler] Replace custom logger with LLVM_DEBUG
llvm-objdump -d on clang is decreased from 7.8s to 7.4s.
The improvement is likely due to the elimination of logger setup and
dbgprintf(), which has a large overhead.
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
Commit a1f16998f371870ca4da8b3c00a093c607a36ddd by alexandre.ganea
[Support] Optionally call signal handlers when a function wrapped by the
the CrashRecoveryContext fails
This patch allows for handling a failure inside a CrashRecoveryContext
in the same way as the global exception/signal handler. A failure will
have the same side-effect, such as cleanup of temporarty file, printing
callstack, calling relevant signal handlers, and finally returning an
exception code. This is an optional feature, disabled by default. This
is a support patch for D69825.
Differential Revision: https://reviews.llvm.org/D70568
The file was modifiedllvm/lib/Support/Windows/Signals.inc
The file was modifiedllvm/include/llvm/Support/Signals.h
The file was modifiedllvm/lib/Support/CrashRecoveryContext.cpp
The file was modifiedllvm/include/llvm/Support/CrashRecoveryContext.h
The file was modifiedllvm/unittests/Support/CrashRecoveryTest.cpp
The file was modifiedllvm/lib/Support/Unix/Signals.inc
Commit 2cdb18afda841392002feafda21af31854c195b3 by Lang Hames
[ORC] Fix argv handling in runAsMain / lli.
This fixes an off-by-one error in the argc value computed by runAsMain,
and switches lli back to using the input bitcode (rather than the string
"lli") as the effective program name.
Thanks to Stefan Graenitz for spotting the bug.
The file was modifiedllvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
The file was modifiedllvm/tools/lli/lli.cpp
The file was addedllvm/test/ExecutionEngine/OrcLazy/printargv.ll
Commit 6fdd6a7b3f696972edc244488f59532d05136a27 by maskray
[Disassembler] Delete the VStream parameter of
MCDisassembler::getInstruction()
The argument is llvm::null() everywhere except llvm::errs() in
llvm-objdump in -DLLVM_ENABLE_ASSERTIONS=On builds. It is used by no
target but X86 in -DLLVM_ENABLE_ASSERTIONS=On builds.
If we ever have the needs to add verbose log to disassemblers, we can
record log with a member function, instead of passing it around as an
argument.
The file was modifiedllvm/lib/MC/MCDisassembler/Disassembler.cpp
The file was modifiedllvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp
The file was modifiedllvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
The file was modifiedllvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp
The file was modifiedllvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
The file was modifiedlldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
The file was modifiedlldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
The file was modifiedllvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
The file was modifiedllvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
The file was modifiedllvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp
The file was modifiedllvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.h
The file was modifiedllvm/lib/MC/MCDisassembler/MCDisassembler.cpp
The file was modifiedllvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
The file was modifiedllvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was modifiedllvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
The file was modifiedllvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp
The file was modifiedllvm/include/llvm/MC/MCDisassembler/MCDisassembler.h
The file was modifiedlldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
The file was modifiedllvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
The file was modifiedllvm/tools/sancov/sancov.cpp
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.cpp
The file was modifiedllvm/tools/llvm-mc/Disassembler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
The file was modifiedllvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
The file was modifiedllvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
The file was modifiedllvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
The file was modifiedllvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
The file was modifiedllvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
The file was modifiedllvm/tools/llvm-exegesis/lib/Analysis.cpp
The file was modifiedllvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.h
The file was modifiedllvm/tools/llvm-objdump/MachODump.cpp
Commit 1e8ce7492e91aa6db269334d12187c7ae854dccb by maskray
[X86][Disassembler] Optimize argument passing and immediate reading
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
Commit f719c540bb09cb5bfe37bc6283ea68e31949b3f4 by maskray
[X86][Disassembler] Shrink X86GenDisassemblerTables.inc from 36M to 6.1M
In x86Disassembler{OneByte,TwoByte,...}Codes,
"/* EmptyTable */" is very common. Omitting it saves lots of space.
Also, there is no need to display a table entry in multiple lines.
It is also common that the whole OpcodeDecision is { MODRM_ONEENTRY, 0}.
Make use of zero-initialization.
The file was modifiedllvm/utils/TableGen/X86DisassemblerTables.cpp
Commit ddfcd82bdc219dd2dc04d6826c417cea3da65d12 by craig.topper
[LegalizeVectorOps] Expand vector MERGE_VALUES immediately.
Custom legalization can produce MERGE_VALUES to return multiple results.
We can expand them immediately instead of leaving them around for DAG
combine to clean up.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
Commit ed679804d5e34dcb1046c5087acaf5d1dbb9b582 by craig.topper
[TargetLowering][X86] Connect the chain from STRICT_FSETCC in
TargetLowering::expandFP_TO_UINT and X86TargetLowering::FP_TO_INTHelper.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit efb674ac2f2b0f06adc3f00df3134dadf1c875df by craig.topper
[LegalizeVectorOps] Parallelize the lo/hi part of STRICT_UINT_TO_FLOAT
legalization.
The lo and hi computation are independent. Give them the same input
chain and TokenFactor the results together.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
Commit 569ccfc384a5434c35c09adba8c44c46014297e6 by czhengsz
[SCEV] more accurate range for addrecexpr with nsw flag.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D72436
The file was modifiedllvm/test/Analysis/ScalarEvolution/range_nw_flag.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit d692f0f6c8c12316d559b9a638a2cb9fbd0c263d by craig.topper
[X86] Don't call LowerSETCC from LowerSELECT for
STRICT_FSETCC/STRICT_FSETCCS nodes.
This causes the STRICT_FSETCC/STRICT_FSETCCS nodes to lowered early
while lowering SELECT, but the output chain doesn't get connected. Then
we visit the node again when it is its turn because we haven't replaced
the use of the chain result. In the case of the fp128 libcall lowering,
after D72341 this will cause the libcall to be emitted twice.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit f33fd43a7c91f1774a9512bbdb78c367cd23d233 by qiucofan
[NFC] Refactor memory ops cluster method
Current implementation of BaseMemOpsClusterMutation is a little bit
obscure. This patch directly uses a map from store chain ID to set of
memory instrs to make it simpler, so that future improvements are easier
to read, update and review.
Reviewed By: evandro
Differential Revision: https://reviews.llvm.org/D72070
The file was modifiedllvm/lib/CodeGen/MachineScheduler.cpp
Commit c5b94ea265133a4a28006929643155fc8fbeafe6 by maskray
[profile] Support merge pool size >= 10
The executable acquires an advisory record lock (`fcntl(fd, F_SETLKW,
*)`) on a profile file. Merge pool size >= 10 may be beneficial when the
concurrency is large.
Also fix a small problem about snprintf. It can cause the filename to be
truncated after %m.
Reviewed By: davidxl
Differential Revision: https://reviews.llvm.org/D71970
The file was modifiedcompiler-rt/test/profile/instrprof-basic.c
The file was modifiedcompiler-rt/lib/profile/InstrProfilingFile.c
Commit 51c1d7c4bec025f70679284060b82c05242759b2 by maskray
[X86][Disassembler] Simplify
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
Commit 60cc095ecc34d72a9ac6947f39c6e2a0cdf5449f by maskray
[X86][Disassembler] Merge X86DisassemblerDecoder.cpp into
X86Disassembler.cpp and refactor
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
The file was removedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/CMakeLists.txt
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/X86/Disassembler/BUILD.gn
Commit b375f28b0ec1129a4b94770a9c55ba49222ea1dd by llvm-dev
[X86][AVX] lowerShuffleAsLanePermuteAndSHUFP - only set the demanded
elements of the lane mask.
Fixes an cyclic dependency issue with an upcoming patch where
getVectorShuffle canonicalizes masks with splat build vector sources.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 66e39067edbfdb1469be001ebb053530a608b532 by llvm-dev
[X86][AVX] Use lowerShuffleAsLanePermuteAndSHUFP to lower binary v4f64
shuffles.
Only perform this if we are shuffling lower and upper lane elements
across the lanes (otherwise splitting to lower xmm shuffles would be
better).
This is a regression if we shuffle build_vectors due to getVectorShuffle
canonicalizing 'blend of splat' build vectors, for now I've set this not
to shuffle build_vector nodes at all to avoid this.
The file was modifiedllvm/test/CodeGen/X86/avx-unpack.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
The file was modifiedllvm/test/CodeGen/X86/subvector-broadcast.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 065eefcfe969249a7df9d1ef4a0e468606b25359 by llvm-dev
[AMDGPU] Regenerate shl shift tests
The file was modifiedllvm/test/CodeGen/AMDGPU/shl.ll
Commit a888277897f75b2952d96de229fff57519cfc363 by llvm-dev
[MIPS] Regenerate shl/lshr shift tests
The file was modifiedllvm/test/CodeGen/Mips/llvm-ir/shl.ll
The file was modifiedllvm/test/CodeGen/Mips/llvm-ir/lshr.ll
Commit ad201691d5cc0f15f6f885f3847dcc6440ee3de5 by llvm-dev
Fix "pointer is null" static analyzer warnings. NFCI.
Use cast<> instead of dyn_cast<> and move into its users where its
dereferenced immediately.
The file was modifiedclang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
Commit ebd26cc8c434f40fe8079ee823e7657b5138769f by maskray
[PowerPC] Delete PPCDarwinAsmPrinter and PPCMCAsmInfoDarwin
Darwin support has been removed.
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D72063
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
The file was modifiedllvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
The file was removedllvm/test/MC/MachO/PowerPC/lit.local.cfg
The file was removedllvm/test/CodeGen/PowerPC/hello-reloc.s
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
The file was removedllvm/test/MC/MachO/PowerPC/coal-sections-powerpc.s
The file was removedllvm/test/MC/PowerPC/ppc-separator.s
Commit de797ccdd74f46d5f637ccf66c78da9905a46f42 by alexandre.ganea
[NFC] Fix compilation of CrashRecoveryContext.cpp on mingw
Patch by Markus Böck.
Differential Revision: https://reviews.llvm.org/D72564
The file was modifiedllvm/lib/Support/CrashRecoveryContext.cpp
Commit 7fa5290d5bd5632d7a36a4ea9f46e81e04fb819e by maskray
__patchable_function_entries: don't use linkage field 'unique' with
-no-integrated-as
.section name, "flags"G, @type, GroupName[, linkage]
As of binutils 2.33, linkage cannot be 'unique'.  For integrated
assembler, we use both 'o' flag and 'unique' linkage to support
--gc-sections and COMDAT with lld.
https://sourceware.org/ml/binutils/2019-11/msg00266.html
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/test/CodeGen/AArch64/patchable-function-entry.ll
Commit 241f330d6bab52ab4e3a01cbb9a3edd417d07c59 by jay.foad
[AMDGPU] Add gfx8 assembler and disassembler test cases
Summary: This adds assembler tests for cases that were previously only
in the disassembler tests, and vice versa.
Reviewers: rampitec, arsenm, nhaehnle
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye,
jfb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72561
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt
The file was modifiedllvm/test/MC/AMDGPU/gfx8_asm_all.s
Commit 2bfee35cb860859b436de0b780fbd00d68e198a4 by maskray
[MC][ELF] Emit a relocation if target is defined in the same section and
is non-local
For a target symbol defined in the same section, currently we don't emit
a relocation if VariantKind is VK_None (with few exceptions like RISC-V
relaxation), while GNU as emits one. This causes program behavior
differences with and without -ffunction-sections, and can break intended
symbol interposition in a -shared link.
```
.globl foo foo:
call foo      # no relocation. On other targets, may be written as b
foo, etc
call bar      # a relocation if bar is in another section (e.g.
-ffunction-sections)
call foo@plt  # a relocation
```
Unify these cases by always emitting a relocation. If we ever want to
optimize `call foo` in -shared links, we should emit a STB_LOCAL alias
and call via the alias.
ARM/thumb2-beq-fixup.s: we now emit a relocation to global_thumb_fn as
GNU as does. X86/Inputs/align-branch-64-2.s: we now emit R_X86_64_PLT32
to foo as GNU does.
ELF/relax.s: rewrite the test as target-in-same-section.s . We omitted
relocations to `global` and now emit R_X86_64_PLT32. Note, GNU as does
not emit a relocation for `jmp global` (maybe its own bug). Our new
behavior is compatible except `jmp global`.
Reviewed By: peter.smith
Differential Revision: https://reviews.llvm.org/D72197
The file was modifiedllvm/test/MC/ARM/thumb2-beq-fixup.s
The file was modifiedllvm/test/MC/X86/align-branch-64-2b.s
The file was modifiedllvm/test/MC/ARM/thumb1-branch-reloc.s
The file was modifiedllvm/lib/MC/ELFObjectWriter.cpp
The file was modifiedlld/test/ELF/global-offset-table-position-aarch64.s
The file was removedllvm/test/MC/ELF/relax.s
The file was addedllvm/test/MC/ELF/target-in-same-section.s
The file was modifiedllvm/test/MC/X86/align-branch-64-2a.s
The file was modifiedllvm/test/MC/X86/align-branch-64-2c.s
Commit ada22c804cd956f3ee7cc9dc82e6d54ead8a4ffe by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
The file was modifiedclang/include/clang/Basic/SourceManager.h
Commit 54b2914accb4f5c9b58305fd6da405d20a47c452 by llvm-dev
Fix "pointer is null" static analyzer warnings. NFCI.
Use castAs<> instead of getAs<> since the pointers are dereferenced
immediately and castAs will perform the null assertion for us.
The file was modifiedclang/lib/AST/VTableBuilder.cpp
Commit 0113cf193f0610bb1a5dfa0bcd29c41a8965938a by jrtc27
[RISCV] Check register class for AMO memory operands
Summary: AMO memory operands use a custom parser in order to accept both
(reg) and 0(reg). However, the validation predicate used for these
operands was only checking that they were registers, and not the
register class, so non-GPRs (such as FPRs) were also accepted. Thus, fix
this by making the predicate check that they are GPRs.
Reviewers: asb, lenary
Reviewed By: asb, lenary
Subscribers: hiraditya, rbar, johnrusso, simoncook, sabuasal, niosHD,
kito-cheng, shiva0217, MaskRay, zzheng, edward-jones, rogfer01,
MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna,
Jim, s.egerton, pzheng, sameer.abuasal, apazos, luismarques,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72471
The file was modifiedllvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
The file was modifiedllvm/test/MC/RISCV/rva-aliases-invalid.s
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoA.td
Commit a6342c247a17fb270e0385bd1deb463b7309a43b by czhengsz
[SCEV] accurate range for addrecexpr with nuw flag
If addrecexpr has nuw flag, the value should never be less than its
start value and start value does not required to be SCEVConstant.
Reviewed By: nikic, sanjoy
Differential Revision: https://reviews.llvm.org/D71690
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Analysis/ScalarEvolution/range_nw_flag.ll
Commit 1ad1308b69b89cc87533c16957189a84e1dd9754 by zeratul976
[clangd] Assert that the testcases in FindExplicitReferencesTest.All
have no diagnostics
Reviewers: kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72355
The file was modifiedclang-tools-extra/clangd/unittests/FindTargetTests.cpp
Commit 79a09d8bf4d508b0ae6a1e3c90907488092678c5 by zeratul976
[clangd] Show template arguments in type hierarchy when possible
Summary: Fixes https://github.com/clangd/clangd/issues/31
Reviewers: kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet,
usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D71533
The file was modifiedclang-tools-extra/clangd/XRefs.cpp
The file was modifiedclang-tools-extra/clangd/unittests/TypeHierarchyTests.cpp
Commit a10527cd3731e2ef246c4797fb099385a948f62f by arsenm2
AMDGPU/GlobalISel: Copy type when inserting readfirstlane
getDefIgnoringCopies will fail to find any def if no type is set if we
try to use it on the use's operand, so propagate the type.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsg.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readlane.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsghalt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.add.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.swap.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.writelane.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
Commit 555e7ee04cb5c44e0b11a2eda999e6910b4b27e1 by arsenm2
AMDGPU/GlobalISel: Don't use XEXEC class for SGPRs
We don't use the xexec register classes for arbitrary values anymore.
Avoids a test variance beween GlobalISel and SelectionDAG>
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-merge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-inttoptr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-concat-vectors.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-mask.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrtoint.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-add.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
Commit 3c868cbbda7e2ff66b8ed92b632a609aaac324ba by arsenm2
AMDGPU: Split test function
This avoids slightly different scheduling/regalloc behavior, and avoids
a test diff between GlobalISel and SelectionDAG.
The file was modifiedllvm/test/CodeGen/AMDGPU/write_register.ll
Commit 52aaf4a27576607dfc0833f5f88e5a15a30ceadb by craig.topper
[X86] Use SDNPOptInGlue instead of SDNPInGlue on a couple SDNodes.
At least one of these is used without a Glue. This doesn't seem to
change the X86GenDAGISel.inc output so maybe it doesn't matter?
The file was modifiedllvm/lib/Target/X86/X86InstrFPStack.td
Commit c958639098a8702b831952b1a1a677ae19190a55 by SourabhSingh.Tomar
[DWARF5][DebugInfo]: Added support for DebugInfo generation for auto
return type for C++ member functions.
Summary: This patch will provide support for auto return type for the
C++ member functions. Before this return type of the member function is
deduced and stored in the DIE. This patch includes llvm side
implementation of this feature.
Patch by: Awanish Pandey <Awanish.Pandey@amd.com>
Reviewers: dblaikie, aprantl, shafik, alok, SouraVX, jini.susan.george
Reviewed by: dblaikie
Differential Revision: https://reviews.llvm.org/D70524
The file was addedllvm/test/DebugInfo/X86/debug-info-auto-return.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
Commit 6d6a4590c5d4c7fc7445d72fe685f966b0a8cafb by SourabhSingh.Tomar
[DWARF5][clang]: Added support for DebugInfo generation for auto return
type for C++ member functions.
Summary: This patch will provide support for auto return type for the
C++ member functions.
This patch includes clang side implementation of this feature.
Patch by: Awanish Pandey <Awanish.Pandey@amd.com>
Reviewers: dblaikie, aprantl, shafik, alok, SouraVX, jini.susan.george
Reviewed by: dblaikie
Differential Revision: https://reviews.llvm.org/D70524
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was addedclang/test/CodeGenCXX/debug-info-auto-return.cpp
The file was modifiedclang/lib/CodeGen/CGDebugInfo.h
Commit 07028b5a87803a3a857d6dd6320a0f7de4db23ad by sjoerd.meijer
[SCEV] Follow up of D71563: addressing post commit comment. NFC.
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit 9d3e78e704fa6201bceb48f45fb061f572c5aa2e by sam.parker
[NFC] Update loop.decrement.reg intrinsic comment
Note that the intrinsic is now understood by SCEV and that other
optimisations can treat it as a sub.
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
Commit 3cad8ada4947dc6793e5af56d6dd0e6eed9e570f by zinenko
Add zero_extendi and sign_extendi to intrinsic namespace
Summary:
- update zero_extendi and sign_extendi in edsc/intrinsic namespace
- Builder API test for zero_extendi and sign_extendi
Differential Revision: https://reviews.llvm.org/D72298
The file was modifiedmlir/include/mlir/EDSC/Intrinsics.h
The file was modifiedmlir/test/EDSC/builder-api-test.cpp
Commit ddf044290ede7d7fd47f4f673e3e628f551a8aac by Raphael Isemann
[lldb] Mark several tests as not dependent on debug info
Summary: This just adds `NO_DEBUG_INFO_TESTCASE` to tests that don't
really exercise anything debug information specific and therefore don't
need to be rerun for all debug information variants.
Reviewers: labath, jingham, aprantl, mib, jfb
Reviewed By: aprantl
Subscribers: dexonsmith, JDevlieghere, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72447
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/watchpoints/hello_watchpoint/TestMyFirstWatchpoint.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lang/cpp/offsetof/TestOffsetofCpp.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/watchpoints/watchpoint_set_command/TestWatchLocationWithWatchSet.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/process/attach-resume/TestAttachResume.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/watchpoints/watchpoint_commands/condition/TestWatchpointConditionCmd.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/apropos/with-process/TestAproposWithProcess.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/command/nested_alias/TestNestedAlias.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/default-constructor/TestDefaultConstructorForAPIObjects.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/rdar-12481949/Test-rdar-12481949.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/watchpoints/watchpoint_commands/command/TestWatchpointCommandPython.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/sbvalue_persist/TestSBValuePersist.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/watchpoints/watchpoint_on_vectors/TestValueOfVectorVariable.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/watchpoints/watchpoint_disable/TestWatchpointDisable.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/formatters/TestFormattersSBAPI.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/debugger/TestDebuggerAPI.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/statistics/basic/TestStats.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/sbdata/TestSBData.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lang/c/offsetof/TestOffsetof.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/watchpoint/watchlocation/TestTargetWatchAddress.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/signals/TestSignalsAPI.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/watchpoint/watchlocation/TestSetWatchlocation.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/watchpoints/watchpoint_commands/command/TestWatchpointCommandLLDB.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/process/io/TestProcessIO.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/watchpoints/hello_watchlocation/TestWatchLocation.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/event/TestEvents.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/findvalue_duplist/TestSBFrameFindValue.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/watchpoint/condition/TestWatchpointConditionAPI.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/watchpoints/watchpoint_commands/TestWatchpointCommands.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/watchpoints/step_over_watchpoint/TestStepOverWatchpoint.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/command/script_alias/TestCommandScriptAlias.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/process/launch-with-shellexpand/TestLaunchWithShellExpand.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/target/create-no-such-arch/TestNoSuchArch.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/calculator_mode/TestCalculatorMode.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/watchpoint/TestSetWatchpoint.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/watchpoint/TestWatchpointIter.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/watchpoint/TestWatchpointIgnoreCount.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/value/linked_list/TestValueAPILinkedList.py
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/process/TestProcessAPI.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/watchpoints/variable_out_of_scope/TestWatchedVarHitWhenInScope.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/watchpoints/watchpoint_events/TestWatchpointEvents.py
Commit c9babcbda77e69698825cfb9ce771352be93acee by selliott
[RISCV] Collect Statistics on Compressed Instructions
Summary: It is useful to keep statistics on how many instructions we
have compressed, so we can see if future changes are increasing or
decreasing this number.
Reviewers: asb, luismarques
Reviewed By: asb, luismarques
Subscribers: xbolva00, sameer.abuasal, hiraditya, rbar, johnrusso,
simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27,
MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult,
the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67495
The file was modifiedllvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
The file was modifiedllvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Commit 734aa1d133f264746f721a244d2c66bc99648ee5 by usx
[clangd] Publish xref for macros from Index and AST.
Summary: With this patch the `findReferences` API will return Xref for
macros. If the symbol under the cursor is a macro then we collect the
references to it from: 1. Main file by looking at the ParsedAST. (These
were added to the ParsedAST in https://reviews.llvm.org/D70008) 2. Files
other than the mainfile by looking at the:
* static index (Added in https://reviews.llvm.org/D70489)
* file index (Added in https://reviews.llvm.org/D71406) This patch
collects all the xref from the above places and outputs it in
`findReferences` API.
Reviewers: kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72395
The file was modifiedclang-tools-extra/clangd/XRefs.cpp
The file was modifiedclang-tools-extra/clangd/unittests/XRefsTests.cpp
Commit e45fcfc3aa57bb237fd4fd694d0c257be66d5482 by sam.mccall
Revert "[DWARF5][clang]: Added support for DebugInfo generation for auto
return type for C++ member functions."
This reverts commit 6d6a4590c5d4c7fc7445d72fe685f966b0a8cafb, which
introduces a crash.
See https://reviews.llvm.org/D70524 for details.
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was removedclang/test/CodeGenCXX/debug-info-auto-return.cpp
The file was modifiedclang/lib/CodeGen/CGDebugInfo.h
Commit 96b8e1ac4674dd3035b6cc7b1b7ed8b946208ab1 by pavel
[lldb] Fix eh-frame-small-fde test for changes in lld
lld in 2bfee35 started emitting relocations for some intra-section jumps
between global symbols. This shifted the code around a bit, invalidating
text expectations.
Change the symbols to local to keep the previous behavior.
The file was modifiedlldb/test/Shell/Unwind/Inputs/eh-frame-small-fde.s
Commit 10c11e4e2d05cf0e8f8251f50d84ce77eb1e9b8d by peter.smith
This option allows selecting the TLS size in the local exec TLS model,
which is the default TLS model for non-PIC objects. This allows large/
many thread local variables or a compact/fast code in an executable.
Specification is same as that of GCC. For example, the code model option
precedes the TLS size option.
TLS access models other than local-exec are not changed. It means
supoort of the large code model is only in the local exec TLS model.
Patch By KAWASHIMA Takahiro (kawashima-fj <t-kawashima@fujitsu.com>)
Reviewers: dmgreen, mstorsjo, t.p.northover, peter.smith, ostannard
Reviewd By: peter.smith Committed by: peter.smith
Differential Revision: https://reviews.llvm.org/D71688
The file was modifiedllvm/include/llvm/Target/TargetOptions.h
The file was removedllvm/test/CodeGen/AArch64/arm64-tls-execs.ll
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedclang/include/clang/Basic/CodeGenOptions.def
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetMachine.cpp
The file was modifiedclang/include/clang/Driver/Options.td
The file was addedllvm/test/CodeGen/AArch64/arm64-tls-local-exec.ll
The file was addedclang/test/Driver/tls-size.c
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedllvm/include/llvm/CodeGen/CommandFlags.inc
The file was addedllvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
Commit add04b9653848de583c542e0596737f7d7c21553 by sjoerd.meijer
ARMLowOverheadLoops: return earlier to avoid printing irrelevant dbg
msg. NFC
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
Commit b6ffa2fe1250a8f506cc66044275b0bced56059e by james.henderson
[DebugInfo][Support] Replace DWARFDataExtractor size function
This patch adds a new size function to the base DataExtractor class,
which removes the need for the DWARFDataExtractor size function.
It is unclear why DWARFDataExtractor's size function returned zero in
some circumstances (i.e. when it is constructed without a section, and
with a different data source instead), so that behaviour has changed.
The old behaviour could cause an assertion in the debug line parser, as
the size did not reflect the actual data available, and could be lower
than the current offset being parsed.
Reviewed by: dblaikie
Differential Revision: https://reviews.llvm.org/D72337
The file was modifiedllvm/include/llvm/Support/DataExtractor.h
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFDataExtractor.h
The file was modifiedllvm/unittests/Support/DataExtractorTest.cpp
Commit af4adb07cd18b7081ec5818aee385654c8454356 by Raphael Isemann
[lldb][NFC] Use range-based for loops in IRInterpreter
The file was modifiedlldb/source/Expression/IRInterpreter.cpp
Commit bf7225888a99f49afac0b95a8996d0a942b6b0e3 by jan.kratochvil
[lldb] Fix lookup of symbols with the same address range but different
binding
This fixes a failing testcase on Fedora 30 x86_64 (regression Fedora
29->30):
PASS:
./bin/lldb
./lldb-test-build.noindex/functionalities/unwind/noreturn/TestNoreturnUnwind.test_dwarf/a.out
-o 'settings set symbols.enable-external-lookup false' -o r -o bt -o
quit
* frame #0: 0x00007ffff7aa6e75 libc.so.6`__GI_raise + 325
   frame #1: 0x00007ffff7a91895 libc.so.6`__GI_abort + 295
   frame #2: 0x0000000000401140 a.out`func_c at main.c:12:2
   frame #3: 0x000000000040113a a.out`func_b at main.c:18:2
   frame #4: 0x0000000000401134 a.out`func_a at main.c:26:2
   frame #5: 0x000000000040112e a.out`main(argc=<unavailable>,
argv=<unavailable>) at main.c:32:2
   frame #6: 0x00007ffff7a92f33 libc.so.6`__libc_start_main + 243
   frame #7: 0x000000000040106e a.out`_start + 46
vs.
FAIL - unrecognized abort() function:
./bin/lldb
./lldb-test-build.noindex/functionalities/unwind/noreturn/TestNoreturnUnwind.test_dwarf/a.out
-o 'settings set symbols.enable-external-lookup false' -o r -o bt -o
quit
* frame #0: 0x00007ffff7aa6e75 libc.so.6`.annobin_raise.c + 325
   frame #1: 0x00007ffff7a91895
libc.so.6`.annobin_loadmsgcat.c_end.unlikely + 295
   frame #2: 0x0000000000401140 a.out`func_c at main.c:12:2
   frame #3: 0x000000000040113a a.out`func_b at main.c:18:2
   frame #4: 0x0000000000401134 a.out`func_a at main.c:26:2
   frame #5: 0x000000000040112e a.out`main(argc=<unavailable>,
argv=<unavailable>) at main.c:32:2
   frame #6: 0x00007ffff7a92f33 libc.so.6`.annobin_libc_start.c + 243
   frame #7: 0x000000000040106e a.out`.annobin_init.c.hot + 46
The extra ELF symbols are there due to Annobin (I did not investigate
why this problem happened specifically since F-30 and not since F-28).
It is due to:
Symbol table '.dynsym' contains 2361 entries: Valu e          Size Type
Bind   Vis     Name 0000000000022769   5 FUNC   LOCAL  DEFAULT
_nl_load_domain.cold 000000000002276e   0 NOTYPE LOCAL  HIDDEN
.annobin_abort.c.unlikely
... 000000000002276e   0 NOTYPE LOCAL  HIDDEN
.annobin_loadmsgcat.c_end.unlikely
... 000000000002276e   0 NOTYPE LOCAL  HIDDEN
.annobin_textdomain.c_end.unlikely 000000000002276e 548 FUNC   GLOBAL
DEFAULT abort 000000000002276e 548 FUNC   GLOBAL DEFAULT
abort@@GLIBC_2.2.5 000000000002276e 548 FUNC   LOCAL  DEFAULT __GI_abort
0000000000022992   0 NOTYPE LOCAL  HIDDEN  .annobin_abort.c_end.unlikely
GDB has some more complicated preferences between overlapping and/or
sharing address symbols, I have made here so far the most simple fix for
this case.
Differential revision: https://reviews.llvm.org/D63540
The file was addedlldb/test/Shell/SymbolFile/Inputs/symbol-binding.s
The file was modifiedlldb/include/lldb/Symbol/Symtab.h
The file was addedlldb/test/Shell/SymbolFile/symbol-binding.test
The file was modifiedlldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
The file was modifiedlldb/source/Symbol/Symtab.cpp
Commit 7f1cf7d5f658b15abb8bd6840fc01e6d44487a23 by llvm-dev
[X86] Fix MSVC "truncation from 'int' to 'bool'" warning. NFCI.
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
Commit 8f49204f26ea8856b870d4c2344b98f4b706bea0 by llvm-dev
[SelectionDAG] ComputeKnownBits - minimum leading/trailing zero bits in
LSHR/SHL (PR44526)
As detailed in https://blog.regehr.org/archives/1709 we don't make use
of the known leading/trailing zeros for shifted values in cases where we
don't know the shift amount value.
This patch adds support to SelectionDAG::ComputeKnownBits to use
KnownBits::countMinTrailingZeros and countMinLeadingZeros to set the
minimum guaranteed leading/trailing known zero bits.
Differential Revision: https://reviews.llvm.org/D72573
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-128.ll
The file was modifiedllvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shl.v2i16.ll
The file was modifiedllvm/test/CodeGen/ARM/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
The file was modifiedllvm/test/CodeGen/ARM/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-lshr-128.ll
The file was modifiedllvm/test/CodeGen/BPF/shifts.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shl.ll
The file was modifiedllvm/test/CodeGen/Mips/llvm-ir/lshr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
The file was modifiedllvm/test/CodeGen/X86/avx2-vector-shifts.ll
The file was modifiedllvm/test/CodeGen/X86/avx2-shift.ll
The file was modifiedllvm/test/CodeGen/X86/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-128.ll
The file was modifiedllvm/test/CodeGen/AArch64/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-128.ll
Commit 804dd6722762040e7ce7e04bf97b19d9596fee20 by Milos.Stojanovic
[llvm-exegesis][mips] Expand loadImmediate()
Add support for loading 32-bit immediates and enable the use of GPR64
registers.
Differential Revision: https://reviews.llvm.org/D71873
The file was addedllvm/test/tools/llvm-exegesis/Mips/latency-GPR64.s
The file was modifiedllvm/tools/llvm-exegesis/lib/Mips/Target.cpp
The file was modifiedllvm/unittests/tools/llvm-exegesis/Mips/TargetTest.cpp
Commit b96ec492d34ecf31fd2c8d2f0033f00e36cc2b9c by oliver.stannard
[clangd] Remove raw string literals in macros
Older (but still supported) versions of GCC don't handle C++11 raw
string literals in macro parameters correctly.
The file was modifiedclang-tools-extra/clangd/unittests/FormattedStringTests.cpp
Commit 7efc7ca8edf6762dc64472417dabfbbdd838ceeb by llvm-dev
[X86][SSE] Add knownbits test showing missing
getValidMinimumShiftAmountConstant() ISD::SHL support
As mentioned on D72573
The file was modifiedllvm/test/CodeGen/X86/combine-shl.ll
Commit ef5debac4302cd479ddd9e784a5b5acc8c2b9804 by llvm-dev
[SelectionDAG] ComputeKnownBits add getValidMinimumShiftAmountConstant()
ISD::SHL support
As mentioned on D72573
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/test/CodeGen/X86/combine-shl.ll
Commit 6c203149b60e92e802df0c7a431744c337830a09 by oliver.stannard
[clang] Remove raw string literals in macros
Older (but still supported) versions of GCC don't handle C++11 raw
string literals in macro parameters correctly.
The file was modifiedclang/unittests/AST/ASTTraverserTest.cpp
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
Commit c1fbede984ec1eb87b35218d3b8161d3a6e92318 by Raphael Isemann
[lldb][NFC] Remove debug print statement from TestExprDiagnostics.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/diagnostics/TestExprDiagnostics.py
Commit a70b993239a829f30ff1e5991670a0b28bf51459 by Milos.Stojanovic
[llvm-exegesis] Remove unneeded std::move()
Caught by buildbot breakage:
/home/docker/worker_env/ppc64le-clang-rhel-test/clang-ppc64le-rhel/llvm/llvm/tools/llvm-exegesis/lib/Mips/Target.cpp:89:12:
error: moving a local object in a return statement prevents copy elision
[-Werror,-Wpessimizing-move]
   return std::move(Instructions);
          ^
/home/docker/worker_env/ppc64le-clang-rhel-test/clang-ppc64le-rhel/llvm/llvm/tools/llvm-exegesis/lib/Mips/Target.cpp:89:12:
note: remove std::move call here
   return std::move(Instructions);
          ^~~~~~~~~~            ~
The file was modifiedllvm/tools/llvm-exegesis/lib/Mips/Target.cpp
Commit d7d88b9d8b3efd8b4b07074aa64b5b4136a35b2c by arsenm2
GlobalISel: Fix assertion on wide G_ZEXT sources
It's possible to have a type that needs a mask greater than 64-bits.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
Commit 04a86966fbf46809d7a165b1f089e4d076f0f8a5 by ulrich.weigand
[FPEnv] Fix chain handling for fpexcept.strict nodes
We need to ensure that fpexcept.strict nodes are not optimized away even
if the result is unused. To do that, we need to chain them into the
block's terminator nodes, like already done for PendingExcepts.
This patch adds two new lists of pending chains, PendingConstrainedFP
and PendingConstrainedFPStrict to hold constrained FP intrinsic nodes
without and with fpexcept.strict markers. This allows not only to solve
the above problem, but also to relax chains a bit further by no longer
flushing all FP nodes before a store or other memory access. (They are
still flushed before nodes with other side effects.)
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D72341
The file was modifiedllvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
The file was modifiedllvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
The file was modifiedllvm/test/CodeGen/X86/fp-intrinsics.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
The file was modifiedllvm/test/CodeGen/X86/fp128-libcalls-strict.ll
The file was modifiedllvm/test/CodeGen/X86/fp128-cast-strict.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
The file was modifiedllvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-flags.ll
The file was modifiedllvm/test/CodeGen/SystemZ/fp-strict-alias.ll
Commit 6a634a5dba847e1c1d81bf59f76dfa7d76ac3c4c by oliver.stannard
Revert "[libc++] Explicitly enumerate std::string external
instantiations."
This is causing failures for multiple buildbots and bootstrap builds,
details at https://reviews.llvm.org/rG61bd1920.
This reverts commit 61bd19206f61ace4b007838a2ff8884a13ec0374.
The file was modifiedlibcxx/src/string.cpp
The file was modifiedlibcxx/include/__string
The file was modifiedlibcxx/include/__config
The file was modifiedlibcxx/include/string
Commit 89ba150240a45cac88216b6127efb523fb9506b0 by llvm-dev
[X86] Add knownbits tests showing missing shift amount demanded elts
handling.
The file was modifiedllvm/test/CodeGen/X86/combine-shl.ll
The file was modifiedllvm/test/CodeGen/X86/known-bits-vector.ll
Commit 6d1a8fd447934387605ea11d35e1b62866b7d093 by llvm-dev
[SelectionDAG] ComputeKnownBits - Add DemandedElts support to
getValidShiftAmountConstant/getValidMinimumShiftAmountConstant()
The file was modifiedllvm/test/CodeGen/X86/known-bits-vector.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/test/CodeGen/X86/combine-shl.ll
Commit 376bc39c829fab7ad14424c5418c03ed6649d839 by llvm-dev
[SelectionDAG] ComputeNumSignBits - Use getValidShiftAmountConstant for
shift opcodes
getValidShiftAmountConstant handles out of bounds shift amounts for us,
allowing us to remove the local handling.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Commit 26d2ace9e2305266be888e15392be29e3145163d by spatel
[InstSimplify] move tests for select from InstCombine; NFC
InstCombine has transforms that would enable these simplifications in an
indirect way, but those transforms are unsafe and likely to be removed.
The file was modifiedllvm/test/Transforms/InstSimplify/select.ll
The file was modifiedllvm/test/Transforms/InstCombine/select.ll
Commit 894f742acb977a09285dcab024e50c2cf6bce578 by Alexander.Richardson
[MIPS][ELF] Use PC-relative relocations in .eh_frame when possible
When compiling position-independent executables, we now use
DW_EH_PE_pcrel | DW_EH_PE_sdata4. However, the MIPS ABI does not define
a 64-bit PC-relative ELF relocation so we cannot use sdata8 for the
large code model case. When using the large code model, we fall back to
the previous behaviour of generating absolute relocations.
With this change clang-generated .o files can be linked by LLD without
having to pass -Wl,-z,notext (which creates text relocations). This is
simpler than the approach used by ld.bfd, which rewrites the
.eh_frame section to convert absolute relocations into relative
references.
I saw in D13104 that apparently ld.bfd did not accept pc-relative
relocations for MIPS ouput at some point. However, I also checked that
recent ld.bfd can process the clang-generated .o files so this no longer
seems true.
Reviewed By: atanasyan Differential Revision:
https://reviews.llvm.org/D72228
The file was modifiedllvm/lib/MC/MCObjectFileInfo.cpp
The file was addedlld/test/ELF/mips-eh_frame-pic.s
The file was modifiedllvm/lib/Object/RelocationResolver.cpp
The file was modifiedllvm/test/MC/Mips/eh-frame.s
The file was modifiedllvm/test/DebugInfo/Mips/eh_frame.ll
Commit 8e8ccf4712cf58562a91c197da3efd4f9963ce0d by Alexander.Richardson
[MIPS] Don't emit R_(MICRO)MIPS_JALR relocations against data symbols
The R_(MICRO)MIPS_JALR optimization only works when used against
functions. Using the relocation against a data symbol (e.g. function
pointer) will cause some linkers that don't ignore the hint in this case
(e.g. LLD prior to commit 5bab291b7b) to generate a relative branch to
the data symbol which crashes at run time. Before this patch, LLVM was
erroneously emitting these relocations against local-dynamic TLS
function pointers and global function pointers with internal visibility.
Reviewers: atanasyan, jrtc27, vstefanovic Reviewed By: atanasyan
Differential Revision: https://reviews.llvm.org/D72571
The file was modifiedllvm/test/CodeGen/Mips/reloc-jalr.ll
The file was modifiedllvm/lib/Target/Mips/MipsISelLowering.cpp
Commit da33762de8531914d4d0dae16bfce2192f02bc79 by pablo.barrio
[AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below
Summary: The Pointer Authentication Extension (PAC) was added in
Armv8.3-A. Some instructions are implemented in the HINT space to allow
compiling code common to CPUs regardless of whether they feature PAC or
not, and still benefit from PAC protection in the PAC-enabled CPUs.
The 8.3-specific mnemonics were currently enabled in any architecture,
and LLVM was emitting them in assembly files when PAC code generation
was enabled. This was ok for compilations where both LLVM codegen and
the integrated assembler were used. However, the LLVM codegen was not
compatible with other assemblers (e.g. GAS). Given the fact that the
approach from these assemblers (i.e. to disallow Armv8.3-A mnemonics if
compiling for Armv8.2-A or lower) is entirely reasonable, this patch
makes LLVM to emit HINT when building for Armv8.2-A and below, instead
of PACIASP, AUTIASP and friends. Then, LLVM assembly should be
compatible with other assemblers.
Reviewers: samparker, chill, LukeCheeseman
Subscribers: kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71658
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-b.ll
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-a.ll
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
The file was modifiedllvm/test/CodeGen/AArch64/speculation-hardening-dagisel.ll
The file was modifiedllvm/test/MC/AArch64/armv8.3a-signed-pointer.s
The file was modifiedllvm/test/CodeGen/AArch64/speculation-hardening-loads.ll
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
The file was modifiedllvm/test/CodeGen/AArch64/sign-return-address.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
Commit 0b91e78a719065c67b33bf82b0cde3d4ecfe3b7d by sam.mccall
Add missing triples to tests in 0c29d3ff2233696f663ae34a8aeda23c750ac68f
so they target the right arch.
The file was modifiedllvm/test/CodeGen/X86/align-branch-boundary-default.ll
The file was modifiedllvm/test/CodeGen/X86/align-branch-boundary-default.s
Commit 7af67259cdd66811941514a263dd0f81c491d8f1 by llvm-dev
Sema::getOwningModule - take const Decl* type.
Fixes static analyzer warning that const_cast was being used despite
only const methods being called.
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Sema/SemaOverload.cpp
Commit 40311f9724953541ab7b755fb6a96b31c1e63f00 by llvm-dev
Fix "pointer is null" static analyzer warnings. NFCI.
Use castAs<> instead of getAs<> since the pointers are always
dereferenced and castAs will perform the null assertion for us.
The file was modifiedclang/lib/AST/ASTContext.cpp
Commit 025941785faf25a3d9ba2c1e7682ca6c2ad063af by llvm-dev
Fix some cppcheck shadow variable warnings. NFCI.
The file was modifiedclang/lib/AST/ASTContext.cpp
Commit 4647aae72f33b8742eb42c1fb869ebd4fdbb3038 by llvm-dev
Merge isVectorType() and getAs<VectorType> calls to silence clang static
analyzer warning. NFCI.
The file was modifiedclang/lib/AST/ASTDiagnostic.cpp
Commit b11027a08620dce2887377c830be239a4af478b6 by llvm-dev
Fix cppcheck uninitialized variable in DiffTree() constructor warning.
NFCI.
The file was modifiedclang/lib/AST/ASTDiagnostic.cpp
Commit 043c5eafa8789d76b06b93d157c928830c4d0814 by luismarques
[RISCV] Handle globals and block addresses in asm operands
Summary: These seem to be the machine operand types currently needed by
the RISC-V target.
Reviewers: asb, lenary Reviewed By: lenary Tags: #llvm Differential
Revision: https://reviews.llvm.org/D72275
The file was modifiedllvm/test/CodeGen/RISCV/inline-asm.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
Commit b4a99a061f517e60985667e39519f60186cbb469 by alexandre.ganea
[Clang][Driver] Re-use the calling process instead of creating a new
process for the cc1 invocation
With this patch, the clang tool will now call the -cc1 invocation
directly inside the same process. Previously, the -cc1 invocation was
creating, and waiting for, a new process. This patch therefore reduces
the number of created processes during a build, thus it reduces build
times on platforms where process creation can be costly (Windows) and/or
impacted by a antivirus. It also makes debugging a bit easier, as
there's no need to attach to the secondary -cc1 process anymore,
breakpoints will be hit inside the same process.
Crashes or signaling inside the -cc1 invocation will have the same
side-effect as before, and will be reported through the same means.
This behavior can be controlled at compile-time through the
CLANG_SPAWN_CC1 cmake flag, which defaults to OFF. Setting it to ON will
revert to the previous behavior, where any -cc1 invocation will
create/fork a secondary process. At run-time, it is also possible to
tweak the CLANG_SPAWN_CC1 environment variable. Setting it and will
override the compile-time setting. A value of 0 calls -cc1 inside the
calling process; a value of 1 will create a secondary process, as
before.
Differential Revision: https://reviews.llvm.org/D69825
The file was modifiedclang/include/clang/Driver/Job.h
The file was modifiedclang/lib/Driver/Job.cpp
The file was modifiedclang/test/CMakeLists.txt
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/CMakeLists.txt
The file was addedclang/test/Driver/cc1-spawnprocess.c
The file was modifiedclang/tools/driver/driver.cpp
The file was modifiedclang/include/clang/Driver/Driver.h
The file was modifiedclang/test/Driver/warning-options_pedantic.cpp
The file was modifiedclang/test/Driver/clang_f_opts.c
The file was modifiedclang/test/Driver/fsanitize-blacklist.c
The file was modifiedclang/test/Driver/unknown-arg.c
The file was modifiedclang/include/clang/Config/config.h.cmake
Commit e653d306ce90e5612796d8adce9eb34b1c10e85a by ntv
[mlir][Linalg] Update ReshapeOp::build to be more idiomatic
Summary: This diff makes it easier to create a `linalg.reshape` op and
adds an EDSC builder api test to exercise the new builders.
Reviewers: ftynse, jpienaar
Subscribers: mehdi_amini, rriddle, burmako, shauheen, antiagainst,
arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72580
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/EDSC/Intrinsics.h
The file was modifiedmlir/test/EDSC/builder-api-test.cpp
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
Commit 6b686703e63f0e992438ce445cbe4b3e78b94ea4 by kazu
[Inlining] Add PreInlineThreshold for the new pass manager
Summary: This patch makes it easy to try out different preinlining
thresholds with a command-line switch just like -preinline-threshold for
the legacy pass manager.
Reviewers: davidxl
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72618
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
Commit 202ab273e6eca134b69882f100c666fcd3affbcf by julian.gross
[mlir] Added missing GPU lowering ops.
Summary: This diff adds missing GPU lowering ops to MLIR.
Reviewers: herhut, pifon2a, ftynse
Tags: #pre-merge_beta_testing, #llvm
Differential Revision: https://reviews.llvm.org/D72439
The file was modifiedmlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
The file was modifiedmlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
The file was modifiedmlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
The file was modifiedmlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
Commit 81e7922e83cf9782a39f4072e20eab8ab1e99828 by zinenko
[mlir] m_Constant()
Summary: Introduce m_Constant() which allows matching a constant
operation without forcing the user also to capture the attribute value.
Differential Revision: https://reviews.llvm.org/D72397
The file was modifiedmlir/include/mlir/IR/Matchers.h
The file was modifiedmlir/test/lib/IR/TestMatchers.cpp
The file was modifiedmlir/lib/IR/Builders.cpp
The file was modifiedmlir/test/IR/test-matchers.mlir
Commit 07804f75a6cc506fada40c474f1e60840ce737d8 by james.henderson
[DebugInfo] Make debug line address size mismatch non-fatal to parsing
Reasonable assumptions can be made when a parsed address length does not
match the expected length, so there's no need for this to be fatal.
Reviewed by: ikudrin
Differential Revision: https://reviews.llvm.org/D72154
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
The file was modifiedllvm/unittests/DebugInfo/DWARF/DWARFDebugLineTest.cpp
Commit 2af97be8027a0823b88d4b6a07fc5eedb440bc1f by tejohnson
[ThinLTO] Add additional ThinLTO pipeline testing with new PM
Summary: I've added some more extensive ThinLTO pipeline testing with
the new PM, motivated by the bug fixed in D72386.
I beefed up llvm/test/Other/new-pm-pgo.ll a little so that it tests
ThinLTO pre and post link with PGO, similar to the testing for the
default pipelines with PGO.
Added new pre and post link PGO tests for both instrumentation and
sample PGO that exhaustively test the pipelines at different
optimization levels via opt.
Added a clang test to exhaustively test the post link pipeline invoked
for distributed builds. I am currently only testing O2 and O3 since
these are the most important for performance.
It would be nice to add similar exhaustive testing for full LTO, and for
the old PM, but I don't have the bandwidth now and this is a start to
cover some of the situations that are not currently default and were
under tested.
Reviewers: wmi
Subscribers: mehdi_amini, inglorion, hiraditya, steven_wu, dexonsmith,
jfb, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D72538
The file was addedllvm/test/Other/Inputs/new-pm-thinlto-samplepgo-defaults.prof
The file was addedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
The file was addedllvm/test/Other/Inputs/new-pm-thinlto-prelink-pgo-defaults.proftext
The file was addedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-pgo.ll
The file was addedclang/test/CodeGen/thinlto-distributed-newpm.ll
The file was addedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
The file was addedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
Commit 2d7e757a836abb54590daa25fce626283adafadf by danilo.carvalho.grael
[AArch64][SVE] Add patterns for some arith SVE instructions.
Summary: Add patterns for the following instructions:
- smax, smin, umax, umin
Reviewers: sdesmalen, huntergr, rengolin, efriedma, c-rhodes, mgudim,
kmclaughlin
Subscribers: amehsan
Differential Revision: https://reviews.llvm.org/D71779
The file was addedllvm/test/CodeGen/AArch64/sve-int-arith-imm.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrFormats.td
Commit 90555d9253437d53fe03c26db73faf9c0ca14c82 by david.green
[Scheduler] Remove superfluous casts. NFC
The file was modifiedllvm/lib/CodeGen/TargetInstrInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
Commit ee4aa1a228b31ec8b8bd3c4a793c7fa92fec88d6 by llvm-dev
[X86] Add AVX2 known signbits codegen tests
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll
Commit 7afaa0099b907842b281c25c2a57937a2c307d3b by llvm-dev
[X86][SSE] Add sitofp(ashr(x,y)) test case with non-uniform shift value
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll
Commit 38e2c01221a9751c0b797417747200d2e9513b9f by llvm-dev
[SelectionDAG] ComputeNumSignBits add
getValidMinimumShiftAmountConstant() ISD::SRA support
Allows us to handle more non-uniform SRA sign bits cases
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Commit 05366870eed154c7eb48c7cc3873ea5188f54cc9 by weiwei64
[LegalizeTypes] Add SoftenFloatResult support for
STRICT_SINT_TO_FP/STRICT_UINT_TO_FP
Some target like arm/riscv with soft-float will have compiling crash
when using -fno-unsafe-math-optimization option. This patch will add the
missing strict FP support to SoftenFloatRes_XINT_TO_FP.
Differential Revision: https://reviews.llvm.org/D72277
The file was modifiedllvm/test/CodeGen/ARM/fp-intrinsics.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
Commit f2bbe8ede057af13b56949f24bbfb436f8a55f97 by Jonas Devlieghere
[lldb/Scripts] Remove SWIG bot
This is no longer used or maintained.
Differential revision: https://reviews.llvm.org/D72539
The file was removedlldb/scripts/swig_bot.py
The file was removedlldb/scripts/swig_bot_lib/server.py
The file was removedlldb/scripts/swig_bot_lib/client.py
The file was removedlldb/scripts/swig_bot_lib/local.py
The file was removedlldb/scripts/swig_bot_lib/remote.py
Commit bb2e5f5e454245c8e7e9e4c9bf7a463c64604292 by tejohnson
Fix tests for builtbot failures
Should fix most of the buildbot failures from
2af97be8027a0823b88d4b6a07fc5eedb440bc1f, by loosening up the matching
on the AnalysisProxy output.
Added in --dump-input=fail on the one test that appears to be something
different, so I can hopefully debug it better.
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
The file was modifiedclang/test/CodeGen/thinlto-distributed-newpm.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
Commit 9d30d769041b14c0ff29770d59027e679e6b7edc by Jonas Devlieghere
[lldb/Docs] Extend description section of the main page
The current description is a bit terse. I've copy/pasted the
introduction form the website.
The file was modifiedlldb/docs/man/lldb.rst
Commit ffc05d0dbc88b89756d553ff32abefe720d27742 by llvm-dev
[X86][SSE] Add sitofp(shl(sext(x),y)) test case with non-uniform shift
value
Shows that for non-uniform SHL shifts we fail to determine the minimum
number of sign bits remaining (based off the maximum shift amount value)
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll
Commit 7d9b0a61c32b95fdc73228266d3f14687a8ada95 by arsenm2
AMDGPU/GlobalISel: Simplify assert
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
Commit ca19d7a3993c69633826ae388155c9ad176b11df by arsenm2
AMDGPU/GlobalISel: Fix branch targets when emitting SI_IF
The branch target needs to be changed depending on whether there is an
unconditional branch or not.
Loops also need to be similarly fixed, but compiling a simple testcase
end to end requires another set of patches that aren't upstream yet.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
Commit 2f090cc8f1a3144c81b024bdc52ec1ae49dc0def by arsenm2
AMDGPU/GlobalISel: Add some baseline tests for vector extract
A future change will try to fold constant offsets into the loop which
these will stress.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir
Commit 3d8f1b2d22be79aab3d246fa5bc9c24b911b0bd2 by arsenm2
AMDGPU/GlobalISel: Set insert point after waterfall loop
The current users of the waterfall loop utility functions do not make
use of the restored original insert point. The insertion is either done,
or they set the insert point somewhere else. A future change will want
to insert instructions after the waterfall loop, but figuring out the
point after the loop is more difficult than ensuring the insert point is
there after the loop.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
Commit c6fcd5d115b62280669719c5ead436904c93d6cb by llvm-dev
[SelectionDAG] ComputeNumSignBits add
getValidMaximumShiftAmountConstant() for ISD::SHL support
Allows us to handle non-uniform SHL shifts to determine the minimum
number of sign bits remaining (based off the maximum shift amount value)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll
Commit 203801425d222555fa2617fff19ecd861525429f by arsenm2
AMDGPU/GlobalISel: Select llvm.amdgcn.ds.ordered.{add|swap}
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.ordered.swap.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.ordered.add.gfx10.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.ordered.add.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
Commit 292562c0046c72ea1ed229dbe13a89dca73e5b89 by tejohnson
Try number 2 for fixing bot failures
Additional fixes for bot failures from
2af97be8027a0823b88d4b6a07fc5eedb440bc1f. Remove more exact matching on
AnalyisManagers, as they can vary. Also allow different orders between
LoopAnalysis and BranchProbabilityAnalysis as that can vary due to both
being accessed in the parameter list of a call.
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
The file was modifiedclang/test/CodeGen/thinlto-distributed-newpm.ll
Commit a2cd4fe6bf2a4e37d5f69b0b19cb1134a14e2970 by benny.kra
Unbreak the mlir build after 202ab273e6eca134b69882f100c666fcd3affbcf
The file was modifiedmlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
The file was modifiedmlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
Commit fb79ef524171c96a9f3df025ac7a8a3e00fdc0b4 by aaron
Fix readability-identifier-naming missing member variables
Fixes PR41122 (missing fixes for member variables in a destructor) and
PR29005 (does not rename class members in all locations).
The file was modifiedclang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/readability-identifier-naming-member-decl-usage.cpp
Commit 7aed43b60739653b13b8503f9df4c958c44feed8 by tejohnson
Hopefully last fix for bot failures
Hopefully final bot fix for last few failures from
2af97be8027a0823b88d4b6a07fc5eedb440bc1f.
Looks like sometimes the "llvm::" preceeding objects get printed in the
debug pass manager output and sometimes they don't. Replace with
wildcard matching.
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
The file was modifiedclang/test/CodeGen/thinlto-distributed-newpm.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
Commit 484a7472f1aa6906f2b66dc33bcf69cc8d5b9f29 by puyan
[llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex MachineOperands.
This patch makes it so that cases where multiple instructions that
differ only in their FrameIndex MachineOperand values no longer collide.
For instance:
%1:_(p0) = G_FRAME_INDEX %stack.0
%2:_(p0) = G_FRAME_INDEX %stack.1
Prior to this patch these instructions would collide together.
Differential Revision: https://reviews.llvm.org/D71583
The file was modifiedllvm/lib/CodeGen/MIRVRegNamerUtils.cpp
The file was addedllvm/test/CodeGen/MIR/X86/mir-namer-hash-frameindex.mir
Commit 64a93afc3c630c39e5c583e4f67aef5821d635b6 by maskray
[X86][Disassembler] Fix a bug when disassembling an empty string
readPrefixes() assumes insn->bytes is non-empty. The code path is not
exercised in llvm-mc because llvm-mc does not feed empty input to
MCDisassembler::getInstruction().
This bug is uncovered by a5994c789a2982a770254ae1607b5b4cb641f73c. An
empty string did not crash before because the deleted regionReader()
allowed UINT64_C(-1) as insn->readerCursor.
  Bytes.size() <= Address -> R->Base
0 <= UINT64_C(-1) - UINT32_C(-1)
The file was modifiedllvm/unittests/MC/Disassembler.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
Commit cb988a858abbaf1a1ae0fe03f2a1dae692131ea9 by tejohnson
Add a couple of missed wildcards in debug-pass-manager output checking
Along with the previous fix for bot failures from
2af97be8027a0823b88d4b6a07fc5eedb440bc1f, need to add a wildcard in a
couple of places where my local output did not print "llvm::" but the
bot is.
The file was modifiedclang/test/CodeGen/thinlto-distributed-newpm.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
Commit 6288f86e870c7bb7fe47cc138320b9eb34c93941 by tejohnson
Revert "[ThinLTO] Add additional ThinLTO pipeline testing with new PM"
This reverts commit 2af97be8027a0823b88d4b6a07fc5eedb440bc1f.
After attempting to fix bot failures from matching issues (mostly due to
inconsistent printing of "llvm::" prefixes on objects, and
AnalysisManager objects being printed differntly, I am now seeing some
differences I don't understand (real differences in the passes being
printed). Giving up at this point to allow the bots to recover. Will
revisit later.
The file was removedclang/test/CodeGen/thinlto-distributed-newpm.ll
The file was removedllvm/test/Other/Inputs/new-pm-thinlto-samplepgo-defaults.prof
The file was removedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
The file was removedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
The file was removedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-pgo.ll
The file was removedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
The file was removedllvm/test/Other/Inputs/new-pm-thinlto-prelink-pgo-defaults.proftext
Commit 2b530053e9d696ada9269e7396180fc6262d2861 by thakis
[gn build] (manually) port b4a99a061f51
The file was modifiedllvm/utils/gn/secondary/clang/include/clang/Config/BUILD.gn
Commit 15078d7202b410fd15eedc49d2ab2e4fe9a9f177 by kadircet
[clangd] Render header of hover card as a heading
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72625
The file was modifiedclang-tools-extra/clangd/unittests/FormattedStringTests.cpp
The file was modifiedclang-tools-extra/clangd/unittests/HoverTests.cpp
The file was modifiedclang-tools-extra/clangd/FormattedString.cpp
The file was modifiedclang-tools-extra/clangd/FormattedString.h
The file was modifiedclang-tools-extra/clangd/Hover.cpp
Commit f5465e74ef4c9e24f867002aa598dc9e6481ead3 by kadircet
[clangd] Include expression in DecltypeTypeLoc sourcerange while
building SelectionTree
Summary: Currently AST only contains the location for `decltype`
keyword, therefore we were skipping expressions inside decltype while
building selection tree.
This patch extends source range in such cases to contain the expression
as well. A proper fix would require changes to Sema and DecltypeTypeLoc
to contain these location information.
Fixes https://github.com/clangd/clangd/issues/250.
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72594
The file was modifiedclang-tools-extra/clangd/unittests/SelectionTests.cpp
The file was modifiedclang-tools-extra/clangd/Selection.cpp
Commit 2bb154591fab6c1d3a99d63ef03c234f0a363410 by apl
[lldb-server] Remove dead CMake code
No files in lldb-server are including a header from a plugin without the
whole path to the header relative to the lldb source directory. There is
no need to include the specific directories as a result.
The file was modifiedlldb/tools/lldb-server/CMakeLists.txt
Commit 231875e111facf6d15553dff9d7c04d3e9e4a404 by phosek
[Clang] Always set -z now linker option on Fuchsia
This should be the default on Fuchsia.
Differential Revision: https://reviews.llvm.org/D70576
The file was modifiedclang/test/Driver/fuchsia.cpp
The file was modifiedclang/test/Driver/fuchsia.c
The file was modifiedclang/lib/Driver/ToolChains/Fuchsia.cpp
Commit a0f4600f4f0ece1d4779544513f5a70c6f0d78bf by daniel_l_sanders
Rework be15dfa88fb1 such that it works with GlobalISel which doesn't use
EVT
Summary: be15dfa88fb1 broke GlobalISel's usage of getSetCCInverse()
which currently appears to be limited to our out-of-tree backend.
GlobalISel doesn't use EVT's and isn't able to derive them from the
information it has as it doesn't distinguish between integer and
floating point types (that distinction is made by operations rather than
values). Bring back the bool version of getSetCCInverse() in a way that
doesn't break the intent of be15dfa88fb1 but also allows GlobalISel to
continue using it.
Reviewers: spatel, bogner, arichardson
Reviewed By: arichardson
Subscribers: rovka, hiraditya, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72309
The file was modifiedllvm/include/llvm/CodeGen/ISDOpcodes.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Commit d0aad9f56e1588effa94b15804b098e6307da6b4 by tejohnson
[LTO] Constify lto::Config reference passed to backends (NFC)
The lto::Config object saved on the global LTO object should not be
updated by any of the LTO backends. Otherwise we could run into
interference between threads utilizing it. Motivated by some proposed
changes that would have caused it to get modified in the ThinLTO
backends.
The file was modifiedllvm/lib/LTO/LTOBackend.cpp
The file was modifiedllvm/include/llvm/LTO/LTO.h
The file was modifiedllvm/include/llvm/LTO/LTOBackend.h
The file was modifiedllvm/lib/LTO/LTO.cpp
Commit f163755eb0a86508d3bfe1822b7f635952b66104 by a.v.lapshin
[Dsymutil][Debuginfo][NFC] #3 Refactor dsymutil to separate DWARF
optimizing part.
Summary: This is the next portion of patches for dsymutil.
Create DwarfEmitter interface to generate all debug info tables. Put
DwarfEmitter into DwarfLinker library and make
tools/dsymutil/DwarfStreamer to be child of DwarfEmitter.
It passes check-all testing. MD5 checksum for clang .dSYM bundle matches
for the dsymutil with/without that patch.
Reviewers: JDevlieghere, friss, dblaikie, aprantl
Reviewed By: JDevlieghere
Subscribers: merge_guards_bot, hiraditya, thegameg, probinson,
llvm-commits
Tags: #llvm, #debug-info
Differential Revision: https://reviews.llvm.org/D72476
The file was modifiedllvm/tools/dsymutil/DwarfLinkerForBinary.cpp
The file was modifiedllvm/tools/dsymutil/DwarfStreamer.h
The file was modifiedllvm/include/llvm/DWARFLinker/DWARFLinker.h
The file was modifiedllvm/tools/dsymutil/DwarfLinkerForBinary.h
The file was modifiedllvm/tools/dsymutil/DwarfStreamer.cpp
The file was modifiedllvm/lib/DWARFLinker/DWARFLinker.cpp
Commit 69f4cea413991a2a96635c58272bd4205f3e0c36 by spatel
[InstCombine] add tests for select --> copysign; NFC
This is testing for another (possibly final) transform suggested in:
https://bugs.llvm.org/show_bug.cgi?id=44153
The file was modifiedllvm/test/Transforms/InstCombine/select.ll
Commit c1b13a1b17719aebace1b3be7a6ac7f90b1901a6 by aaron
Fix a test case by adding -fno-delayed-template-parsing.
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/readability-identifier-naming-member-decl-usage.cpp
Commit b7526cc21ce55c8b53250df3d659fbdae3f894a7 by puyan
[NFC][clang][IFS] Adding braces to if-statement as prep for D71301.
Just trying to make https://reviews.llvm.org/D71301 look cleaner.
The file was modifiedclang/lib/Frontend/InterfaceStubFunctionsConsumer.cpp
Commit bd8c8827d96f09be502f0da6897c1aef89e45c30 by puyan
[clang][IFS] Prevent Clang-IFS from Leaking symbols from inside a block.
Built libdispatch with clang interface stubs. Ran into some block
related issues. Basically VarDecl symbols can leak out because I wasn't
checking the case where a VarDecl is contained inside a BlockDecl
(versus a method or function).
This patch checks that a VarDecl is not a child decl of a BlockDecl.
This patch also does something very similar for c++ lambdas as well.
Differential Revision: https://reviews.llvm.org/D71301
The file was modifiedclang/lib/Frontend/InterfaceStubFunctionsConsumer.cpp
The file was addedclang/test/InterfaceStubs/lambda.cpp
The file was addedclang/test/InterfaceStubs/blocks.c
Commit 577efd09e3b7b3a1ec7fcf0597397f137da99843 by Raphael Isemann
[lldb] Revert ddf044290ede for TestProcessAPI.py
It seems ddf044290ede7d7fd47f4f673e3e628f551a8aac caused the test to
time out on the Windows bot, but it's unclear to me why.
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/process/TestProcessAPI.py
Commit 26c7a4ed101fae85d2041ee1c8e8483b96e4460e by craig.topper
[LegalizeIntegerTypes][X86] Add support for expanding input of
STRICT_SINT_TO_FP/STRICT_UINT_TO_FP into a libcall.
Needed to support i128->fp128 on 32-bit X86.
Add full set of strict sint_to_fp/uint_to_fp conversion tests for fp128.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
The file was modifiedllvm/test/CodeGen/X86/fp128-cast-strict.ll
Commit 4268e4f4b84b85266426e99050d31ec63f3ce8aa by riverriddle
[mlir] Change the syntax of AffineMapAttr and IntegerSetAttr to avoid
conflicts with function types.
Summary: The current syntax for AffineMapAttr and IntegerSetAttr
conflict with function types, making it currently impossible to
round-trip function types(and e.g. FuncOp) in the IR. This revision
changes the syntax for the attributes by wrapping them in a keyword.
AffineMapAttr is wrapped with `affine_map<>` and IntegerSetAttr is
wrapped with `affine_set<>`.
Reviewed By: nicolasvasilache, ftynse
Differential Revision: https://reviews.llvm.org/D72429
The file was modifiedmlir/test/Dialect/VectorOps/vector-transforms.mlir
The file was modifiedmlir/test/Transforms/memref-dependence-check.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile_indexed_generic.mlir
The file was modifiedmlir/test/Transforms/loop-fusion.mlir
The file was modifiedmlir/test/Transforms/Vectorize/vectorize_1d.mlir
The file was modifiedmlir/test/Transforms/memref-dataflow-opt.mlir
The file was modifiedmlir/lib/Parser/Parser.cpp
The file was modifiedmlir/test/Transforms/Vectorize/vectorize_transpose_2d.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile.mlir
The file was modifiedmlir/test/Dialect/SPIRV/composite-ops.mlir
The file was modifiedmlir/test/Transforms/cse.mlir
The file was modifiedmlir/test/Transforms/simplify-affine-structures.mlir
The file was modifiedmlir/test/IR/locations.mlir
The file was modifiedmlir/test/Dialect/Linalg/tile_conv.mlir
The file was modifiedmlir/test/Transforms/Vectorize/normalize_maps.mlir
The file was modifiedmlir/include/mlir/IR/OpImplementation.h
The file was modifiedmlir/test/AffineOps/dma.mlir
The file was modifiedmlir/test/mlir-cpu-runner/linalg_integration_test.mlir
The file was modifiedmlir/test/Transforms/loop-fusion-slice-computation.mlir
The file was modifiedmlir/lib/IR/AsmPrinter.cpp
The file was modifiedmlir/test/Transforms/constant-fold.mlir
The file was modifiedmlir/test/Transforms/Vectorize/vectorize_2d.mlir
The file was modifiedmlir/test/Conversion/VectorToLoops/vector-to-loops.mlir
The file was modifiedmlir/test/Transforms/memref-normalize.mlir
The file was modifiedmlir/test/Dialect/Linalg/invalid.mlir
The file was modifiedmlir/test/Transforms/Vectorize/vectorize_outer_loop_transpose_2d.mlir
The file was modifiedmlir/test/Transforms/affine-loop-invariant-code-motion.mlir
The file was modifiedmlir/test/Transforms/canonicalize.mlir
The file was modifiedmlir/test/Transforms/lower-affine.mlir
The file was modifiedmlir/test/Transforms/memref-bound-check.mlir
The file was modifiedmlir/test/IR/affine-map.mlir
The file was modifiedmlir/test/AffineOps/ops.mlir
The file was modifiedmlir/test/Transforms/dma-generate.mlir
The file was modifiedmlir/test/Transforms/loop-invariant-code-motion.mlir
The file was modifiedmlir/test/IR/invalid-affinemap.mlir
The file was modifiedmlir/test/AffineOps/memref-stride-calculation.mlir
The file was modifiedmlir/test/IR/opaque_locations.mlir
The file was modifiedmlir/test/Transforms/affine-data-copy.mlir
The file was modifiedmlir/test/IR/print-op-local-scope.mlir
The file was modifiedmlir/lib/Parser/TokenKinds.def
The file was modifiedmlir/test/IR/invalid.mlir
The file was modifiedmlir/docs/Dialects/Standard.md
The file was modifiedmlir/test/Dialect/Linalg/loops.mlir
The file was modifiedmlir/test/Transforms/Vectorize/compose_maps.mlir
The file was modifiedmlir/test/Transforms/loop-tiling.mlir
The file was modifiedmlir/test/Conversion/StandardToLLVM/standard-to-llvm.mlir
The file was modifiedmlir/test/AffineOps/invalid.mlir
The file was modifiedmlir/test/Dialect/Linalg/affine.mlir
The file was modifiedmlir/test/Transforms/pipeline-data-transfer.mlir
The file was modifiedmlir/docs/LangRef.md
The file was modifiedmlir/test/AffineOps/inlining.mlir
The file was modifiedmlir/test/Transforms/strip-debuginfo.mlir
The file was modifiedmlir/test/Dialect/Linalg/fusion.mlir
The file was modifiedmlir/test/Transforms/Vectorize/vectorize_3d.mlir
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir
The file was modifiedmlir/test/Dialect/Linalg/llvm.mlir
The file was modifiedmlir/test/IR/parser.mlir
The file was modifiedmlir/test/Dialect/Linalg/roundtrip.mlir
The file was modifiedmlir/test/Dialect/VectorOps/invalid.mlir
The file was modifiedmlir/test/Transforms/unroll.mlir
The file was modifiedmlir/docs/Dialects/Affine.md
The file was modifiedmlir/test/Transforms/slicing-utils.mlir
The file was modifiedmlir/test/Dialect/Linalg/transform-patterns.mlir
The file was modifiedmlir/test/AffineOps/load-store.mlir
The file was modifiedmlir/test/Dialect/Linalg/promote.mlir
The file was modifiedmlir/test/AffineOps/load-store-invalid.mlir
The file was modifiedmlir/include/mlir/IR/DialectImplementation.h
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/test/IR/memory-ops.mlir
The file was modifiedmlir/test/AffineOps/canonicalize.mlir
The file was modifiedmlir/test/EDSC/builder-api-test.cpp
The file was modifiedmlir/test/Transforms/unroll-jam.mlir
The file was modifiedmlir/test/Transforms/Vectorize/vectorize_outer_loop_2d.mlir
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-memref-ops.mlir
The file was modifiedmlir/test/IR/core-ops.mlir
The file was modifiedmlir/test/Dialect/VectorOps/ops.mlir
The file was modifiedmlir/test/IR/invalid-ops.mlir
The file was modifiedmlir/test/IR/pretty-locations.mlir
Commit 349636d2bfc39a5c81a835a95d203a42d9f9301a by erich.keane
Implement VectorType conditional operator GNU extension.
GCC supports the conditional operator on VectorTypes that acts as a
'select' in C++ mode. This patch implements the support. Types are
converted as closely to GCC's behavior as possible, though in a few
places consistency with our existing vector type support was preferred.
Note that this implementation is different from the OpenCL version in a
number of ways, so it unfortunately required a different implementation.
First, the SEMA rules and promotion rules are significantly different.
Secondly, GCC implements COND[i] != 0 ? LHS[i] : RHS[i] (where i is in
the range 0- VectorSize, for each element).  In OpenCL, the condition is
COND[i] < 0 ? LHS[i]: RHS[i].
In the process of implementing this, it was also required to make the
expression COND ? LHS : RHS type dependent if COND is type dependent,
since the type is now dependent on the condition.  For example:
    T ? 1 : 2;
Is not typically type dependent, since the result can be deduced from
the operands.  HOWEVER, if T is a VectorType now, it could change this
to a 'select' (basically a swizzle with a non-constant mask) with the 1
and 2 being promoted to vectors themselves.
While this is a change, it is NOT a standards incompatible change. Based
on my (and D. Gregor's, at the time of writing the code) reading of the
standard, the expression is supposed to be type dependent if ANY
sub-expression is type dependent.
Differential Revision: https://reviews.llvm.org/D71463
The file was addedclang/test/SemaCXX/vector-conditional.cpp
The file was modifiedclang/test/Sema/vector-gcc-compat.cpp
The file was modifiedclang/include/clang/AST/Expr.h
The file was modifiedclang/docs/LanguageExtensions.rst
The file was modifiedclang/lib/CodeGen/CGExprScalar.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/lib/AST/ExprConstant.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was addedclang/test/CodeGenCXX/vector-conditional.cpp
Commit 80a094e1348ae850cd996e947d70e34abf331685 by spatel
[InstCombine] add FMF to tests for more coverage; NFC
The file was modifiedllvm/test/Transforms/InstCombine/select.ll
Commit 810b28edb3f64569054d49d6ddf18a4d802d9b11 by martin
[ItaniumCXXABI] Make tls wrappers properly comdat
Just marking a symbol as weak_odr/linkonce_odr isn't enough for actually
tolerating multiple copies of it at linking on windows, it has to be
made a proper comdat; make it comdat for all platforms for consistency.
This should hopefully fix
https://bugzilla.mozilla.org/show_bug.cgi?id=1566288.
Differential Revision: https://reviews.llvm.org/D71572
The file was modifiedclang/test/OpenMP/threadprivate_codegen.cpp
The file was modifiedclang/test/CodeGenCXX/cxx11-thread-local-reference.cpp
The file was modifiedclang/test/CodeGenCXX/cxx11-thread-local.cpp
The file was modifiedclang/lib/CodeGen/ItaniumCXXABI.cpp
The file was modifiedclang/test/CodeGenCXX/tls-init-funcs.cpp
Commit 31441a3e007833a180b0112550eddb78547771f2 by tejohnson
[ThinLTO/WPD] Fix index-based WPD for alias vtables
Summary: A recent fix in D69452 fixed index based WPD in the presence of
available_externally vtables. It added a cast of the vtable def summary
to a GlobalVarSummary. However, in some cases one def may be an alias,
in which case we need to get the base object before casting, otherwise
we will crash.
Reviewers: evgeny777, steven_wu, aganea
Subscribers: mehdi_amini, inglorion, hiraditya, dexonsmith, arphaman,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71040
The file was addedllvm/test/ThinLTO/X86/Inputs/devirt_alias.ll
The file was addedllvm/test/ThinLTO/X86/devirt_alias.ll
The file was modifiedllvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
Commit f0719bf2196c807351137ff30e39fd12aa5aa884 by erich.keane
PR44514: Fix recovery from noexcept with non-convertible expressions
We currently treat noexcept(not-convertible-to-bool) as 'none', which
results in the typeloc info being a different size, and causing an
assert later on in the process.  In order to make recovery less
destructive, replace this with noexcept(false) and a constructed 'false'
expression.
Bug Report: https://bugs.llvm.org/show_bug.cgi?id=44514
Differential Revision: https://reviews.llvm.org/D72621
The file was modifiedclang/lib/Sema/SemaExceptionSpec.cpp
The file was modifiedclang/test/SemaCXX/cxx0x-noexcept-expression.cpp
Commit cb89c7e3f744c1fede60f7d1c43528654de676bd by riverriddle
[mlir] Remove unnecessary assert for single region.
This was left over debugging.
The file was modifiedmlir/lib/Transforms/Utils/RegionUtils.cpp
Commit 328e0f3dcac52171b8cdedeaba22c98e7fbb75ea by akhuang
Revert "[DWARF5][DebugInfo]: Added support for DebugInfo generation for
auto return type for C++ member functions."
This reverts commit c958639098a8702b831952b1a1a677ae19190a55, which
causes a crash. See https://reviews.llvm.org/D70524 for details.
The file was removedllvm/test/DebugInfo/X86/debug-info-auto-return.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
Commit a506f7f9105eec4baac296d21c922457d6f4b52a by puyan
[clang][IFS][test] Fixing mangled name of a test for Darwin.
Darwin adds an extra '_' before every C/global function mangled name and
because of this, this test was breaking on Darwin.
This is a fix for commit: https://reviews.llvm.org/D71301
The file was modifiedclang/test/InterfaceStubs/lambda.cpp
Commit 7b9f8e17d15d7516b186c0a85de71133b780f939 by yamauchi
[PGO][CHR] Guard against 0-to-0 branch weight and avoid division by zero
crash.
Summary: This fixes a crash in internal builds under SamplePGO.
Reviewers: davidxl
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72653
The file was modifiedllvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
The file was modifiedllvm/test/Transforms/PGOProfile/chr.ll
Commit 6d57511e0b6f95a369efe7274923a36de3489e7b by apl
[lldb-server] Prefer target_include_directories
In the documentation of `include_directories`, it notes that
`target_include_directories` is preferred because it affects specific
targets intead of propagating include search paths to the entire
project.
The file was modifiedlldb/tools/lldb-server/CMakeLists.txt
Commit 6fca03f0cae77c275870c4569bfeeb7ca0f561a6 by riverriddle
[mlir] Update the use-list algorithms in SymbolTable to support nested
references.
Summary: This updates the use list algorithms to support querying from a
specific symbol, allowing for the collection and detection of nested
references. This works by walking the parent "symbol scopes" and
applying the existing algorithm at each level.
Reviewed By: jpienaar
Differential Revision: https://reviews.llvm.org/D72042
The file was modifiedmlir/test/lib/IR/TestSymbolUses.cpp
The file was modifiedmlir/lib/IR/SymbolTable.cpp
The file was modifiedmlir/test/IR/test-symbol-uses.mlir
The file was modifiedmlir/include/mlir/IR/SymbolTable.h
The file was modifiedmlir/test/IR/test-symbol-rauw.mlir
Commit c7748404920b3674e79059cbbe73b6041a214444 by riverriddle
[mlir] Update the CallGraph for nested symbol references, and simplify
CallableOpInterface
Summary: This enables tracking calls that cross symbol table boundaries.
It also simplifies some of the implementation details of
CallableOpInterface, i.e. there can only be one region within the
callable operation.
Depends On D72042
Reviewed By: jpienaar
Differential Revision: https://reviews.llvm.org/D72043
The file was modifiedmlir/lib/Transforms/Inliner.cpp
The file was modifiedmlir/lib/Transforms/Utils/InliningUtils.cpp
The file was modifiedmlir/lib/Analysis/CallGraph.cpp
The file was modifiedmlir/test/lib/TestDialect/TestOps.td
The file was modifiedmlir/test/Analysis/test-callgraph.mlir
The file was modifiedmlir/include/mlir/IR/Function.h
The file was modifiedmlir/include/mlir/Analysis/CallInterfaces.td
Commit 53539bb032d162e0147c0e9650a5d1c7ca77dae0 by akhuang
[DebugInfo] Add another level to DebugInfoKind called Constructor
The option will limit debug info by only emitting complete class type
information when its constructor is emitted. This patch changes
comparisons with LimitedDebugInfo to use the new level instead.
Differential Revision: https://reviews.llvm.org/D72427
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was modifiedclang/lib/CodeGen/CGStmt.cpp
The file was modifiedclang/lib/CodeGen/CodeGenFunction.cpp
The file was modifiedclang/include/clang/Basic/CodeGenOptions.h
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/include/clang/Basic/DebugInfoOptions.h
The file was modifiedclang/lib/CodeGen/CGBlocks.cpp
The file was modifiedclang/lib/CodeGen/CGDecl.cpp
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
Commit 9b92e4fbdb5bc4fdd21702e0ce104dfcac6a54a7 by riverriddle
[mlir] Add support for attaching a visibility to symbols.
Summary: The visibility defines the structural reachability of the
symbol within the IR. Symbols can define one of three visibilities:
* Public The symbol \may be accessed from outside of the visible IR. We
cannot assume that we can observe all of the uses of this symbol.
* Private The symbol may only be referenced from within the operations
in the current symbol table, via SymbolRefAttr.
* Nested The symbol may be referenced by operations in symbol tables
above the current symbol table, as long as each symbol table parent also
defines a non-private symbol. This allows or referencing the symbol from
outside of the defining symbol table, while retaining the ability for
the compiler to see all uses.
These properties help to reason about the properties of a symbol, and
will be used in a follow up to implement a dce pass on dead symbols.
A few examples of what this would look like in the IR are shown below:
  module @public_module {
   // This function can be accessed by 'live.user'
   func @nested_function() attributes { sym_visibility = "nested" }
    // This function cannot be accessed outside of 'public_module'
  func @private_function() attributes { sym_visibility = "private" }
}
  // This function can only be accessed from within this module.
func @private_function() attributes { sym_visibility = "private" }
  // This function may be referenced externally.
func @public_function()
  "live.user"() {uses = [@public_module::@nested_function,
                                     @private_function,
                                     @public_function]} : () -> ()
Depends On D72043
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D72044
The file was modifiedmlir/lib/IR/Module.cpp
The file was modifiedmlir/test/lib/TestDialect/TestOps.td
The file was modifiedmlir/test/IR/traits.mlir
The file was modifiedmlir/lib/IR/SymbolTable.cpp
The file was modifiedmlir/include/mlir/IR/SymbolTable.h
Commit 03edd6d6a693e5bc7b0df488c4d4901cc55d3566 by riverriddle
[mlir] NFC: Remove unused variable.
The file was modifiedmlir/test/lib/IR/TestSymbolUses.cpp
Commit 989bed989a41732d1b70314bd9063ccd6e74fe5c by richard
Re-enable testing of .s tests under test/CodeGen/X86.
These were temporarily disabled in 2013 and we apparently forgot to ever
turn them back on again.
Fix spelling of flag to llvm-mc in recently-added test that wasn't
actually being run due to this.
The file was modifiedllvm/test/CodeGen/X86/align-branch-boundary-default.s
The file was modifiedllvm/test/CodeGen/X86/lit.local.cfg
Commit e68e4cbcc50ba7ab8df5e09023f15e6cc2223bef by efriedma
[GlobalISel] Change representation of shuffle masks in MachineOperand.
We're planning to remove the shufflemask operand from ShuffleVectorInst
(D72467); fix GlobalISel so it doesn't depend on that Constant.
The change to prelegalizercombiner-shuffle-vector.mir happens because
the input contains a literal "-1" in the mask (so the parser/verifier
weren't really handling it properly). We now treat it as equivalent to
"undef" in all contexts.
Differential Revision: https://reviews.llvm.org/D72663
The file was modifiedllvm/include/llvm/CodeGen/MachineOperand.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuffle-vector.mir
The file was modifiedllvm/lib/CodeGen/MIRParser/MIParser.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/lib/CodeGen/MachineOperand.cpp
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
The file was modifiedllvm/include/llvm/CodeGen/MachineFunction.h
The file was modifiedllvm/include/llvm/CodeGen/MachineInstrBuilder.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was modifiedllvm/lib/CodeGen/MachineFunction.cpp
Commit 09db6e320985f2bee22634049857224e0a5e58f8 by Jonas Devlieghere
[llvm-exegesis] Initialize const bitvector member
This causes an error with older versions of clang: constructor for
'llvm::exegesis::InstructionsCache' must explicitly initialize the const
member 'BVC'
The file was modifiedllvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
Commit fb51ce10d7dcab9209d0cd059d907810dbd0197d by ditaliano
[LanguageRuntime] Retire an unused member function. NFCI.
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.cpp
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.h
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.h
Commit 84baf123a5213512e92e7deca2d111e00c2b97da by thakis
try to fix InterfaceStubs/lambda.cpp on Windows after bd8c8827d96f0
The file was modifiedclang/test/InterfaceStubs/lambda.cpp
Commit d1e3b23be46ac3ada8f5fe844629ad5bc233c24d by Jonas Devlieghere
[lldb/Utility] Add std::move to make placate clang 3.8
This fixes an error thrown by clang 3.8 that no viable conversion from
returned value to the function return type.
The file was modifiedlldb/source/Utility/StructuredData.cpp
Commit 3818101f7f8a631f4d2e4c639420fa9d6ab325e9 by ajcbik
[mlir] [VectorOps] fixed typo in verifier of slice op
Reviewers: nicolasvasilache, andydavis1, rriddle
Reviewed By: nicolasvasilache, rriddle
Subscribers: merge_guards_bot, mehdi_amini, rriddle, jpienaar, burmako,
shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester,
lucyrfox, liufengdb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72664
The file was modifiedmlir/lib/Dialect/VectorOps/VectorOps.cpp
Commit 1ab13f8cc3f79d67c9b337cc0f4ac1dde0460be8 by mgorny
[clang] [test] Fix riscv-toolchain-extra to be less picky about paths
Fix riscv-toolchain-extra tests to pass when CLANG_RESOURCE_DIR is set
to another value than the default.
Differential Revision: https://reviews.llvm.org/D72591
The file was modifiedclang/test/Driver/riscv32-toolchain-extra.c
The file was modifiedclang/test/Driver/riscv64-toolchain-extra.c
Commit 1768ed7f8b1f53b5b4b3ff80da6ae2dce22b74a9 by craig.topper
[X86] Add test to show that nofpexcept flag is not preserved by stack
reload folding.
The file was addedllvm/test/CodeGen/X86/stack-folding-fp-nofpexcept.mir
Commit b1dcd84c7ea3c97ddd73f629441be24791f23624 by craig.topper
[X86] Copy the nofpexcept flag when folding a load into an instruction
using the load folding tables./
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.cpp
The file was modifiedllvm/test/CodeGen/X86/stack-folding-fp-nofpexcept.mir
Commit a7cac2bd4b6812ea6b59b5fa0298eadf3815a3b0 by aminim
[MLIR] Fix broken link locations after move to monorepo
I used the codemod python tool to do this with the following commands:
codemod 'tensorflow/mlir/blob/master/include'
'llvm/llvm-project/blob/master/mlir/include' codemod
'tensorflow/mlir/blob/master' 'llvm/llvm-project/blob/master/mlir'
codemod 'tensorflow/mlir' 'llvm-project/llvm'
Differential Revision: https://reviews.llvm.org/D72244
The file was modifiedmlir/examples/toy/Ch7/include/toy/Dialect.h
The file was modifiedmlir/docs/Dialects/Vector.md
The file was modifiedmlir/examples/toy/Ch5/include/toy/Dialect.h
The file was modifiedmlir/examples/toy/Ch3/include/toy/Dialect.h
The file was modifiedmlir/examples/toy/Ch2/include/toy/Dialect.h
The file was modifiedmlir/examples/toy/Ch6/include/toy/Dialect.h
The file was modifiedmlir/examples/toy/Ch4/include/toy/Dialect.h
The file was modifiedmlir/docs/Tutorials/Toy/Ch-7.md
The file was modifiedmlir/examples/toy/README.md
Commit 671544c25b1215433bc22d475db7eaef51096ea5 by czhengsz
[PowerPC] [NFC] set instruction number as 1st priority of lsr cost
model.
The file was addedllvm/test/CodeGen/PowerPC/lsr-insns-cost.ll
Commit 0136f226c4e46258ea73fcb994f6559cec4a9aa2 by maskray
[MC] Don't resolve relocations referencing STB_LOCAL STT_GNU_IFUNC
The file was modifiedllvm/lib/MC/ELFObjectWriter.cpp
The file was modifiedllvm/test/MC/ELF/target-in-same-section.s
Commit 7cd429f27d4886bb841ed0e3702e970f5f6cccd1 by maskray
[ELF] Add -z force-ibt and -z shstk for Intel Control-flow Enforcement
Technology
This patch is a joint work by Rui Ueyama and me based on D58102 by Xiang
Zhang.
It adds Intel CET (Control-flow Enforcement Technology) support to lld.
The implementation follows the draft version of psABI which you can
download from https://github.com/hjl-tools/x86-psABI/wiki/X86-psABI.
CET introduces a new restriction on indirect jump instructions so that
you can limit the places to which you can jump to using indirect jumps.
In order to use the feature, you need to compile source files with
-fcf-protection=full.
* IBT is enabled if all input files are compiled with the flag. To force
enabling ibt, pass -z force-ibt.
* SHSTK is enabled if all input files are compiled with the flag, or if
-z shstk is specified.
IBT-enabled executables/shared objects have two PLT sections, ".plt" and
".plt.sec".  For the details as to why we have two sections, please read
the comments.
Reviewed By: xiangzhangllvm
Differential Revision: https://reviews.llvm.org/D59780
The file was modifiedlld/docs/ld.lld.1
The file was modifiedlld/ELF/Writer.cpp
The file was removedlld/test/ELF/x86-64-cet.s
The file was modifiedlld/ELF/Config.h
The file was modifiedlld/ELF/Target.h
The file was addedlld/test/ELF/x86-64-feature-cet.s
The file was modifiedlld/ELF/Arch/X86.cpp
The file was modifiedlld/ELF/Options.td
The file was modifiedlld/ELF/Arch/X86_64.cpp
The file was modifiedlld/ELF/Driver.cpp
The file was modifiedlld/ELF/SyntheticSections.h
The file was addedlld/test/ELF/i386-feature-cet.s
The file was modifiedlld/ELF/SyntheticSections.cpp
The file was removedlld/test/ELF/i386-cet.s
Commit 84637408f2e63821014974dac08dee50bb197c1b by protze
[OpenMP][Tool] Make tests for archer dependent on TSan
If the openmp project is built standalone, the test compiler is feature
tested for an available -fsanitize=thread flag. If the openmp project is
built as part of llvm, the target tsan is needed to test archer.
An additional line (requires tsan) was introduced to the tests, this
patch updates the line numbers for the race.
Follow-up for 77ad98c
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D71914
The file was modifiedopenmp/tools/archer/tests/races/task-taskwait-nested.c
The file was modifiedopenmp/tools/archer/tests/lit.cfg
The file was modifiedopenmp/cmake/DetectTestCompiler/CMakeLists.txt
The file was modifiedopenmp/tools/archer/tests/races/task-two.c
The file was modifiedopenmp/tools/archer/tests/CMakeLists.txt
The file was modifiedopenmp/tools/archer/tests/races/lock-nested-unrelated.c
The file was modifiedopenmp/tools/archer/tests/races/parallel-simple.c
The file was modifiedopenmp/tools/archer/tests/races/lock-unrelated.c
The file was modifiedopenmp/cmake/OpenMPTesting.cmake
The file was modifiedopenmp/tools/archer/tests/races/critical-unrelated.c
The file was modifiedopenmp/tools/archer/tests/races/task-taskgroup-unrelated.c
The file was modifiedopenmp/tools/archer/tests/races/task-dependency.c
The file was modifiedopenmp/tools/archer/tests/lit.site.cfg.in
Commit d9819f366233e53427d0929729a58f85dc748cfb by maskray
[ELF] Delete unintended --force-bti
The file was modifiedlld/ELF/Options.td
Commit ed810da73270267082c347bc2919eebb7978a2fe by protze
[OpenMP][Tool] Improving stack trace for Archer
The OpenMP runtime is not instrumented, so entering the runtime leaves
no hint on the source line of the pragma on ThreadSanitizer's function
stack.
This patch adds function entry/exit annotations for OpenMP parallel
regions, and synchronization regions (barrier, taskwait, taskgroup).
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D70408
The file was modifiedopenmp/tools/archer/ompt-tsan.cpp
Commit 63c3691f79179db9a16f260f1cf81475fdfef060 by jay.foad
[AMDGPU] Add gfx9 assembler and disassembler test cases
Summary: This adds assembler tests for cases that were previously only
in the disassembler tests, and vice versa.
Reviewers: rampitec, arsenm, nhaehnle
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye,
jfb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72592
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt
The file was modifiedllvm/test/MC/AMDGPU/gfx9_asm_all.s
Commit 0950de264e37264b9f767a898bd839d9fcb7328f by jay.foad
[AMDGPU] Improve error checking in gfx10 assembler tests
Summary: This adds checks that the expected error was actually reported
against the correct instruction, and fixes a couple of problems that
that showed up: one incorrect W32-ERR:
v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD
// W64: encoding: [0xf9,0x04,0x1e,0x7d,0x01,0x00,0x06,0x06]
-// W32-ERR: error: invalid operand for instruction
+// W32-ERR: error: {{instruction not supported on this GPU|invalid
operand for instruction}}
and one missing W32-ERR:
v_cmp_class_f16_sdwa s[6:7], v1, v2 src0_sel:DWORD src1_sel:DWORD
// W64: encoding: [0xf9,0x04,0x1e,0x7d,0x01,0x86,0x06,0x06]
+// W32-ERR: error: invalid operand for instruction
Reviewers: rampitec, arsenm
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr,
t-tye, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72611
The file was modifiedllvm/test/MC/AMDGPU/gfx10_asm_all.s
Commit 440ce5164f52a6b7cdf70322cc1c95656cac9aa9 by jay.foad
[AMDGPU] Remove duplicate gfx10 assembler and disassembler tests
Summary: Depends on D72611.
Reviewers: rampitec, arsenm
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr,
t-tye, jfb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72616
The file was modifiedllvm/test/MC/AMDGPU/gfx10_asm_all.s
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
Commit 61b6a4e82653e1209126404d33ad20a268f55db1 by Raphael Isemann
[lldb] Fix that SBThread.GetStopDescription is returning strings with
uninitialized memory at the end.
Summary:
`SBThread.GetStopDescription` is a curious API as it takes a buffer
length as a parameter that specifies how many bytes the buffer we pass
has. Then we fill the buffer until the specified length (or the length
of the stop description string) and return the string length. If the
buffer is a nullptr however, we instead return how many bytes we would
have written to the buffer so that the user can allocate a buffer with
the right size and pass that size to a subsequent
`SBThread.GetStopDescription` call.
Funnily enough, it is not possible to pass a nullptr via the Python SWIG
bindings, so that might be the first API in LLDB that is not only hard
to use correctly but impossible to use correctly. The only way to call
this function via Python is to throw in a large size limit that is
hopefully large enough to contain the stop description (otherwise we
only get the truncated stop description).
Currently passing a size limit that is smaller than the returned stop
description doesn't cause the Python bindings to return the stop
description but instead the truncated stop description + uninitialized
characters at the end of the string. The reason for this is that we
return the result of `snprintf` from the method which returns the amount
of bytes that *would* have been written (which is larger than the
buffer). This causes our Python bindings to return a string that is as
large as full stop description but the buffer that has been filled is
only as large as the passed in buffer size.
This patch fixes this issue by just recalculating the string length in
our buffer instead of relying on the wrong return value. We also have to
do this in a new type map as the old type map is also used for all
methods with the given argument pair `char *dst, size_t dst_len` (e.g.
SBProcess.GetSTDOUT`). These methods have different semantics for these
arguments and don't null-terminate the returned buffer (they instead
return the size in bytes) so we can't change the existing typemap
without breaking them.
Reviewers: labath, jingham
Reviewed By: labath
Subscribers: clayborg, shafik, abidh, JDevlieghere, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72086
The file was modifiedlldb/bindings/interface/SBThread.i
The file was modifiedlldb/bindings/python/python-typemaps.swig
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/thread/TestThreadAPI.py
Commit f18370fe0e7576fb9947e49d66f7a6962c6822ce by Raphael Isemann
[lldb] Don't defend against internal LLVM errors in IRInterpreter
Summary: Whenever we cast an LLVM instruction to one of its subclasses,
we do a double check if the RTTI enum value actually allows us to cast
the class. I don't see a way this can ever happen as even when LLVM's
RTTI system has some corrupt internal state (which we probably should
not test in the first place) we just reuse LLVM RTTI to do the second
check.
This also means that if we ever make an actual programming error in this
function (e.g., have a enum value and then cast it to a different
subclass), we just silently fall back to the JIT in our tests.
We also can't test this code in any reasonable way.
This removes the checks and uses `llvm::cast` instead which will raise a
fatal error when casting fails.
Reviewers: labath, mib
Reviewed By: labath
Subscribers: abidh, JDevlieghere, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72596
The file was modifiedlldb/source/Expression/IRInterpreter.cpp
Commit 547abdd921e45fd65a2fa60f21715facb4af31b2 by sam.mccall
[mlir] Fix -Wunused
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
Commit eca44745871bc46728903aaa262abc6344d4f959 by Stanislav.Mekhanoshin
[AMDGPU] Fix getInstrLatency() always returning 1
We do not have InstrItinerary so generic getInstLatency() was always
defaulting to return 1 cycle. We need to use TargetSchedModel instead to
compute an instruction's latency.
Differential Revision: https://reviews.llvm.org/D72655
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/max.i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/scheduler-handle-move-bundle.mir
Commit d8ffd601d523fa0c0a55e25e62af9ffaa618629d by Raphael Isemann
[lldb][NFC] Rewrite python_api/rdar-12481949 test
Summary: This renames the test `rdar-12481949` to `get-value-32bit-int`
as it just tests that we return the correct result get calling
GetValueAsSigned/GetValueAsUnsigned on 32-bit integers.
It also deletes all the strange things going on in this test including
resetting the data formatters (which are to my knowledge not used to
calculate scalar values) and testing Python's long integers (let's just
assume that our Python distribution works correctly). Also modernises
the setup code.
Reviewers: labath, aprantl
Reviewed By: aprantl
Subscribers: JDevlieghere, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72593
The file was removedlldb/packages/Python/lldbsuite/test/python_api/rdar-12481949/main.cpp
The file was addedlldb/packages/Python/lldbsuite/test/python_api/get-value-32bit-int/TestGetValue32BitInt.py
The file was removedlldb/packages/Python/lldbsuite/test/python_api/rdar-12481949/Test-rdar-12481949.py
The file was addedlldb/packages/Python/lldbsuite/test/python_api/get-value-32bit-int/main.cpp
The file was addedlldb/packages/Python/lldbsuite/test/python_api/get-value-32bit-int/Makefile
The file was removedlldb/packages/Python/lldbsuite/test/python_api/rdar-12481949/Makefile
Commit 6d8abe424a77f736fbed114eeac574b9bfe6b0c1 by bion
[libcxx] [test] Add casts to avoid signed/unsigned mismatch warnings on
MSVC++
A bug was filed that these warnings should not be emitted as
DevCom-883961. (
https://developercommunity.visualstudio.com/content/problem/883961/c4389-signedunsigned-mismatch-should-not-be-emitte.html
)
The file was modifiedlibcxx/test/std/algorithms/alg.modifying.operations/alg.remove/remove_copy.pass.cpp
The file was modifiedlibcxx/test/std/algorithms/alg.modifying.operations/alg.remove/remove_copy_if.pass.cpp
The file was modifiedlibcxx/test/std/algorithms/alg.modifying.operations/alg.reverse/reverse_copy.pass.cpp
Commit ad741853c38880dff99cd5b5035b8965c5a73011 by Stanislav.Mekhanoshin
[AMDGPU] Model distance to instruction in bundle
This change allows to model the height of the instruction within a
bundle for latency adjustment purposes.
Differential Revision: https://reviews.llvm.org/D72669
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was addedllvm/test/CodeGen/AMDGPU/bundle-latency.mir
Commit ec6579fc047f9ac18588b833dfde0b69064e013a by grimar
[llvm-readobj][test] - Fix grammar in comments.
This addresses post commit review comments for D71766.
The file was modifiedllvm/test/tools/llvm-readobj/ELF/file-header-abi-version.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/file-header-os-abi.test
Commit 45924eb4671692b3fa9fd52fe39c81ec0647a848 by malcolm.parsons
[clang-tidy] Ignore implicit casts in modernize-use-default-member-init
Summary: Initialising a pointer from nullptr involves an implicit cast.
Ignore it after getting initialiser from InitListExpr.
Fixes: PR44440
Reviewers: aaron.ballman, alexfh, JonasToth
Reviewed By: JonasToth
Subscribers: xazax.hun, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72630
The file was modifiedclang-tools-extra/clang-tidy/modernize/UseDefaultMemberInitCheck.cpp
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/modernize-use-default-member-init.cpp
Commit 3388b0f59dcc7813278c753f96b66229f290cc59 by simon.tatham
[TableGen] Introduce a `defvar` statement.
Summary: This allows you to define a global or local variable to an
arbitrary value, and refer to it in subsequent definitions.
The main use I anticipate for this is if you have to compute some
difficult function of the parameters of a multiclass, and then use it
many times. For example:
  multiclass Foo<int i, string s> {
   defvar op = !cast<BaseClass>("whatnot_" # s # "_" # i);
   def myRecord {
     dag a = (op this, (op that, the other), (op x, y, z));
     int b = op.subfield;
   }
   def myOtherRecord<"template params including", op>;
}
There are a couple of ways to do this already, but they're not really
satisfactory. You can replace `defvar x = y` with a loop over a
singleton list, `foreach x = [y] in { ... }` - but that's unintuitive to
someone who hasn't seen that workaround idiom before, and requires an
extra pair of braces that you often didn't really want. Or you can
define a nested pair of multiclasses, with the inner one taking `x` as a
template parameter, and the outer one instantiating it just once with
the desired value of `x` computed from its other parameters - but that
makes it awkward to sequentially compute each value based on the
previous ones. I think `defvar` makes things considerably easier.
You can also use `defvar` at the top level, where it inserts globals
into the same map used by `defset`. That allows you to define global
constants without having to make a dummy record for them to live in:
  defvar MAX_BUFSIZE = 512;
  // previously:
// def Dummy { int MAX_BUFSIZE = 512; }
// and then refer to Dummy.MAX_BUFSIZE everywhere
Reviewers: nhaehnle, hfinkel
Reviewed By: hfinkel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71407
The file was modifiedllvm/lib/TableGen/TGParser.h
The file was modifiedllvm/docs/TableGen/LangRef.rst
The file was addedllvm/test/TableGen/defvar.td
The file was modifiedllvm/lib/TableGen/TGParser.cpp
The file was modifiedllvm/lib/TableGen/TGLexer.cpp
The file was modifiedllvm/lib/TableGen/TGLexer.h
Commit ddbc0b1e516407a24d986a1998026f1ac5864270 by simon.tatham
[TableGen] Introduce an if/then/else statement.
Summary: This allows you to make some of the defs in a multiclass or
`foreach` conditional on an expression computed from the parameters or
iteration variables.
It was already possible to simulate an if statement using a `foreach`
with a dummy iteration variable and a list constructed using `!if` so
that it had length 0 or 1 depending on the condition, e.g.
  foreach unusedIterationVar = !if(condition, [1], []<int>) in { ... }
But this syntax is nicer to read, and also more convenient because it
allows an else clause.
To avoid upheaval in the implementation, I've implemented `if` as pure
syntactic sugar on the `foreach` implementation: internally, `ParseIf`
actually does construct exactly the kind of foreach shown above (and
another reversed one for the else clause if present).
Reviewers: nhaehnle, hfinkel
Reviewed By: hfinkel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71474
The file was modifiedllvm/lib/TableGen/TGLexer.h
The file was modifiedllvm/docs/TableGen/LangRef.rst
The file was modifiedllvm/test/TableGen/defvar.td
The file was modifiedllvm/lib/TableGen/TGLexer.cpp
The file was addedllvm/test/TableGen/ifstmt.td
The file was modifiedllvm/lib/TableGen/TGParser.h
The file was modifiedllvm/lib/TableGen/TGParser.cpp
Commit 41b520188820a732e6de4865c08704f412013209 by sam.mccall
[Target] Fix uninitialized value in
10c11e4e2d05cf0e8f8251f50d84ce77eb1e9b8d
The file was modifiedllvm/include/llvm/Target/TargetOptions.h
Commit 72ca86fd34ecc5f7ccbaf923d2d508dad2a6a64c by anna.welker
[ARM][MVE] Masked gathers from base + vector of offsets
Enables the masked gather pass to create a masked gather loading from a
base and vector of offsets. This also enables v8i16 and v16i8 gather
loads.
Differential Revision: https://reviews.llvm.org/D72330
The file was addedllvm/test/CodeGen/Thumb2/mve-gather-ind8-unscaled.ll
The file was addedllvm/test/CodeGen/Thumb2/mve-gather-ind16-unscaled.ll
The file was modifiedllvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
The file was addedllvm/test/CodeGen/Thumb2/mve-gather-ind16-scaled.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ind32-scaled.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ind32-unscaled.ll
Commit 018b042593f007456b0695421942ec84ec816a30 by Adrian Prantl
[mlir] Add loop.parallel, loop.reduce and loop.reduce.return operations.
Summary: These operations can be used to specify a loop nest with a body
that can contain reductions. The iteration space can be iterated in any
order.
RFC:
https://groups.google.com/a/tensorflow.org/d/topic/mlir/pwtSgiKFPis/discussion
Differential Revision: https://reviews.llvm.org/D72394
The file was modifiedmlir/test/Dialect/Loops/ops.mlir
The file was modifiedmlir/lib/Dialect/LoopOps/LoopOps.cpp
The file was modifiedmlir/include/mlir/Dialect/LoopOps/LoopOps.td
The file was modifiedmlir/test/Dialect/Loops/invalid.mlir
Commit 5a6eae3dea2342c2a83e4502de43927808f8ca21 by Adrian Prantl
[mlir] Ran git-clang-format.
Summary: I forgot to ran git-clang-format before committing.
The file was modifiedmlir/lib/Dialect/LoopOps/LoopOps.cpp
Commit 9492e9d8cfd356109276da5aa926b297db0e16db by Raphael Isemann
[lldb][NFC] Cleanup ClangASTContext::CompleteTagDeclarationDefinition
Makes this function exit early instead of nesting if statements.
Also removed all the if (tag_type->getDecl()) checks. If we created a
TagType with a nullptr as a Decl then Clang would have already
deferenced that nullptr during TagType creation so there is no point in
gracefully handling a nullptr here.
The file was modifiedlldb/source/Symbol/ClangASTContext.cpp
Commit 4624a1e8ac8a3f69cc887403b976f538f587744a by herhut
[mlir] Create a gpu.module operation for the GPU Dialect.
Summary: This is based on the use of code constantly checking for an
attribute on a model and instead represents the distinct operaion with a
different op. Instead, this op can be used to provide better filtering.
Reviewers: herhut, mravishankar, antiagainst, rriddle
Reviewed By: herhut, antiagainst, rriddle
Subscribers: liufengdb, aartbik, jholewinski, mgorny, mehdi_amini,
rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache,
csigg, arpith-jacob, mgester, lucyrfox, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72336
The file was modifiedmlir/test/Conversion/GPUToSPIRV/simple.mlir
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRVPass.cpp
The file was modifiedmlir/test/Conversion/GPUToCUDA/lower-launch-func-to-cuda.mlir
The file was modifiedmlir/include/mlir/Conversion/GPUToCUDA/GPUToCUDAPass.h
The file was modifiedmlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
The file was modifiedmlir/tools/mlir-cuda-runner/mlir-cuda-runner.cpp
The file was modifiedmlir/test/Conversion/GPUToNVVM/memory-attrbution.mlir
The file was addedmlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.td
The file was modifiedmlir/lib/Conversion/GPUToCUDA/ConvertLaunchFuncToCudaCalls.cpp
The file was modifiedmlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
The file was modifiedmlir/test/Dialect/GPU/ops.mlir
The file was modifiedmlir/include/mlir/Dialect/GPU/GPUOps.td
The file was modifiedmlir/test/Conversion/GPUToSPIRV/loop.mlir
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/CMakeLists.txt
The file was modifiedmlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
The file was modifiedmlir/test/Dialect/GPU/outlining.mlir
The file was modifiedmlir/lib/Conversion/GPUToCUDA/ConvertKernelFuncToCubin.cpp
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp
The file was modifiedmlir/lib/Dialect/GPU/IR/GPUDialect.cpp
The file was modifiedmlir/test/Conversion/GPUToSPIRV/builtins.mlir
The file was modifiedmlir/test/Dialect/GPU/invalid.mlir
The file was modifiedmlir/test/Conversion/GPUToCUDA/lower-nvvm-kernel-to-cubin.mlir
The file was modifiedmlir/test/Conversion/GPUToSPIRV/load-store.mlir
The file was modifiedmlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h
Commit 3d6c492d7a9830a1a39b85dfa215743581d52715 by jrtc27
[RISCV] Fix ILP32D lowering for double+double/double+int return types
Summary: Previously, since these aggregates are > 2*XLen, Clang would
think they were being returned indirectly and thus would decrease the
number of available GPRs available by 1. For long argument lists this
could lead to a struct argument incorrectly being passed indirectly.
Reviewers: asb, lenary
Reviewed By: asb, lenary
Subscribers: luismarques, rbar, johnrusso, simoncook, apazos, sabuasal,
niosHD, kito-cheng, shiva0217, zzheng, edward-jones, rogfer01,
MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna,
Jim, lenary, s.egerton, pzheng, sameer.abuasal, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69590
The file was modifiedclang/test/CodeGen/riscv32-ilp32d-abi.c
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
Commit d6ea8ff0d74bfe5cd181ccfe91c2c300c5f7a35d by zinenko
[mlir] Fix translation of splat constants to LLVM IR
Summary: When converting splat constants for nested sequential LLVM IR
types wrapped in MLIR, the constant conversion was erroneously assuming
it was always possible to recursively construct a constant of a
sequential type given only one value. Instead, wait until all sequential
types are unpacked recursively before constructing a scalar constant and
wrapping it into the surrounding sequential type.
Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen,
antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik,
liufengdb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72688
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
The file was modifiedmlir/test/Target/llvmir.mlir
Commit e73b20c57dc7a8c847ebadeb7e19c08ec84f5bd7 by sam.parker
[ARM][MVE] Disallow VPSEL for tail predication
Due to the current way that we collect predicated instructions, we can't
easily handle vpsel in tail predicated loops. There are a couple of
issues: 1) It will use the VPR as a predicate operand, but doesn't have
to be
  instead a VPT block, which means we can assert while building up
  the VPT block because we don't find another VPST to being a new
  one. 2) VPSEL still requires a VPR operand even after tail
predicating,
  which means we can't remove it unless there is another
  instruction, such as vcmp, that can provide the VPR def.
The first issue should be a relatively simple fix in the logic of the
LowOverheadLoops pass, whereas the second will require us to represent
the 'implicit' tail predication with an explicit value.
Differential Revision: https://reviews.llvm.org/D72629
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpsel-2.mir
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpnot-3.mir
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpsel-1.mir
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpnot-2.mir
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpnot-1.mir
Commit a43b0065c5c78eba3fb83881fb628f5b8182db64 by llvm-dev
[SelectionDAG] ComputeKnownBits - merge
getValidMinimumShiftAmountConstant() and generic ISD::SRL handling.
As mentioned by @nikic on rGef5debac4302 (although that was just about
SHL), we can merge the guaranteed top zero bits from the shifted value,
and then, if a min shift amount is known, zero out the top bits as well.
SHL tests / handling will be added in a follow up patch.
The file was modifiedllvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Commit fd42a4ac7a69adb92f87c7fa927509f177dcc6ca by llvm-dev
[X86][SSE] Add add(shl(and(x,c1),c2),c3) test case with non-uniform
shift value
As mentioned by @nikic on rGef5debac4302, we should merge the guaranteed
top zero bits from the shifted value and min shift amount code so they
can both set the high bits to zero.
The file was modifiedllvm/test/CodeGen/X86/combine-shl.ll
Commit d94d079a6a5b12156e4b818c8ba46eb143f335b9 by diogo.sampaio
[ARM][Thumb2] Fix ADD/SUB invalid writes to SP
Summary: This patch fixes pr23772  [ARM] r226200 can emit illegal thumb2
instruction: "sub sp, r12, #80". The violation was that SUB and ADD
(reg, immediate) instructions can only write to SP if the source
register is also SP. So the above instructions was unpredictable. To
enforce that the instruction t2(ADD|SUB)ri does not write to SP we now
enforce the destination register to be rGPR (That exclude PC and SP).
Different than the ARM specification, that defines one instruction that
can read from SP, and one that can't, here we inserted one that can't
write to SP, and other that can only write to SP as to reuse most of the
hard-coded size optimizations. When performing this change, it uncovered
that emitting Thumb2 Reg plus Immediate could not emit all variants of
ADD SP, SP #imm instructions before so it was refactored to be able to.
(see test/CodeGen/Thumb2/mve-stacksplot.mir where we use a subw sp, sp,
Imm12 variant ) It also uncovered a disassembly issue of adr.w
instructions, that were only written as SUBW instructions (see
llvm/test/MC/Disassembler/ARM/thumb2.txt).
Reviewers: eli.friedman, dmgreen, carwil, olista01, efriedma, andreadb
Reviewed By: efriedma
Subscribers: gbedwell, john.brawn, efriedma, ostannard, kristof.beyls,
hiraditya, dmgreen, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70680
The file was modifiedllvm/test/CodeGen/Thumb2/peephole-cmp.mir
The file was modifiedllvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/fp16-stacksplot.mir
The file was modifiedllvm/test/MC/Disassembler/ARM/thumb2-v8.txt
The file was addedllvm/test/CodeGen/Thumb2/bug-subw.ll
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-load-store.mir
The file was modifiedllvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
The file was modifiedllvm/test/MC/Disassembler/ARM/thumb2.txt
The file was modifiedllvm/test/MC/ARM/thumb-diagnostics.s
The file was modifiedllvm/test/CodeGen/Thumb2/mve-stacksplot.mir
The file was modifiedllvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
The file was addedllvm/test/tools/llvm-mca/ARM/simple-cortex-m33.s
The file was modifiedllvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir
The file was modifiedllvm/test/MC/ARM/register-token-source-loc.s
The file was modifiedllvm/lib/Target/ARM/Thumb2InstrInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMAsmPrinter.cpp
The file was modifiedllvm/test/MC/Disassembler/ARM/thumb-tests.txt
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-arithmetic-ops.mir
The file was modifiedllvm/test/MC/ARM/basic-thumb2-instructions.s
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb2.td
The file was modifiedllvm/test/MC/Disassembler/ARM/invalid-thumbv7.txt
The file was modifiedllvm/test/MC/ARM/negative-immediates.s
The file was modifiedllvm/test/MC/ARM/invalid-addsub.s
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/peephole-addsub.mir
The file was addedllvm/test/CodeGen/Thumb2/t2peephole-t2ADDrr-to-t2ADDri.ll
Commit bad6032bc15fa8d16b67b86ef2b2fe48724e756e by sam.parker
[ARM][LowOverheadLoops] Change predicate inspection
Use the already provided helper function to get the operand type so that
we can detect whether the vpr is being used as a predicate or not. Also
use existing helpers to get the predicate indices when we converting the
vpt blocks. This enables us to support both types of vpr predicate
operand.
Differential Revision: https://reviews.llvm.org/D72504
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vmaxmin_vpred_r.mir
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
Commit c05a11108b9a9deb266c3c1758677462df61e05e by llvm-dev
[SelectionDAG] ComputeKnownBits - merge
getValidMinimumShiftAmountConstant() and generic ISD::SHL handling.
As mentioned by @nikic on rGef5debac4302, we can merge the guaranteed
bottom zero bits from the shifted value, and then, if a min shift amount
is known, zero out the bottom bits as well.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/test/CodeGen/X86/combine-shl.ll
Commit 31aed2e0dad25d43039a9b933b1b95fbdeb27704 by llvm-dev
Fix "MIParser::getIRValue(unsigned int)’ defined but not used" warning.
NFCI.
The file was modifiedllvm/lib/CodeGen/MIRParser/MIParser.cpp
Commit e27632c3026328e41b0d7dbf25631041e979a2f9 by sam.parker
[ARM][LowOverheadLoops] Allow all MVE instrs.
We have a whitelist of instructions that we allow when tail predicating,
since these are trivial ones that we've deemed need no special handling.
Now change ARMLowOverheadLoops to allow the non-trivial instructions if
they're contained within a valid VPT block. Since a valid block is one
that is predicated upon the VCTP so we know that these non-trivial
instructions will still behave as expected once the implicit predication
is used instead.
This also fixes a previous test failure.
Differential Revision: https://reviews.llvm.org/D72509
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
The file was modifiedllvm/unittests/Target/ARM/MachineInstrTest.cpp
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/add_reduce.mir
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vmldava_in_vpt.mir
Commit 877723b7ce813d25fc4a358b7d2cb90468733a72 by medismail.bennani
[lldb/Expression] Improve interpreter error message with a non-running
target
When trying to interpret an expression with a function call, if the
process hasn't been launched, the expression fails to be interpreted and
the user gets the following  error message:
```error: Can't run the expression locally```
This message doesn't explain why the expression failed to be
interpreted, that's why this patch improves the error message that is
displayed when trying to run an expression while no process is running.
rdar://11991708
Differential Revision: https://reviews.llvm.org/D72510
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/dont_allow_jit/TestAllowJIT.py
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
Commit 71d5454b377239213874a0d762860e6a3e60bf54 by simon.tatham
[ARM,MVE] Use the new Tablegen `defvar` and `if` statements.
Summary: This cleans up a lot of ugly `foreach` bodges that I've been
using to work around the lack of those two language features. Now they
both exist, I can make then all into something more legible!
In particular, in the common pattern in `ARMInstrMVE.td` where a
multiclass defines an `Instruction` instance plus one or more `Pat` that
select it, I've used a `defvar` to wrap `!cast<Instruction>(NAME)` so
that the patterns themselves become a little more legible.
Replacing a `foreach` with a `defvar` removes a level of block
structure, so several pieces of code have their indentation changed by
this patch. Best viewed with whitespace ignored.
NFC: the output of `llvm-tblgen -print-records` on the two affected
Tablegen sources is exactly identical before and after this change, so
there should be no effect at all on any of the other generated files.
Reviewers: MarkMurrayARM, miyuki
Reviewed By: MarkMurrayARM
Subscribers: kristof.beyls, hiraditya, dmgreen, cfe-commits,
llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D72690
The file was modifiedclang/include/clang/Basic/arm_mve.td
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
Commit bff33bd5c83b947cccb4d6cf6ebca9dc021f716b by Milos.Stojanovic
[unittests] Fix "comparison of integers of different signs" warnings
A warning is sent because `std::distance()` returns a signed type so
`CmpHelperEQ()` gets instantiated into a function that compares
differently signed arguments.
Differential Revision: https://reviews.llvm.org/D72632
The file was modifiedllvm/unittests/ExecutionEngine/JITLink/LinkGraphTests.cpp
The file was modifiedllvm/unittests/Object/MinidumpTest.cpp
Commit df186507e1d07c3ddba091a076ba7a33dbdc5867 by benny.kra
Make helper functions static or move them into anonymous namespaces. 
NFC.
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedmlir/lib/ExecutionEngine/ExecutionEngine.cpp
The file was modifiedmlir/lib/IR/SymbolTable.cpp
The file was modifiedmlir/lib/Dialect/VectorOps/VectorOps.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/LinalgToLoops.cpp
The file was modifiedmlir/test/lib/TestDialect/TestPatterns.cpp
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedllvm/lib/Target/Mips/MipsLegalizerInfo.cpp
The file was modifiedllvm/lib/CodeGen/MIRParser/MIParser.cpp
The file was modifiedmlir/lib/Analysis/AffineAnalysis.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/FuchsiaHandleChecker.cpp
The file was modifiedmlir/lib/Dialect/QuantOps/Transforms/ConvertSimQuant.cpp
The file was modifiedmlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp
The file was modifiedmlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp
The file was modifiedmlir/lib/Analysis/Utils.cpp
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/TranslateRegistration.cpp
The file was modifiedmlir/lib/Dialect/GPU/IR/GPUDialect.cpp
The file was modifiedclang/lib/AST/ASTImporter.cpp
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/ConvertStandardToSPIRV.cpp
The file was modifiedmlir/lib/Analysis/Liveness.cpp
The file was modifiedmlir/lib/Dialect/AffineOps/AffineOps.cpp
The file was modifiedmlir/lib/Dialect/LoopOps/LoopOps.cpp
The file was modifiedmlir/lib/Dialect/VectorOps/VectorTransforms.cpp
The file was modifiedmlir/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedclang/lib/Driver/ToolChains/Arch/ARM.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVDialect.cpp
The file was modifiedmlir/lib/Analysis/AffineStructures.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
The file was modifiedmlir/lib/Pass/PassStatistics.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/CheckPlacementNew.cpp
The file was modifiedmlir/lib/Dialect/SDBM/SDBMExpr.cpp
Commit 81ee484484a0be59da8f749a9b4cf56bb8d37402 by ulrich.weigand
[FPEnv] Fix chain handling regression after 04a8696
Code in getRoot made the assumption that every node in PendingLoads must
always itself have a dependency on the current DAG root node.
After the changes in 04a8696, it turns out that this assumption no
longer holds true, causing wrong codegen in some cases (e.g. stores
after constrained FP intrinsics might get deleted).
To fix this, we now need to make sure that the TokenFactor created by
getRoot always includes the previous root, if there is no implicit
dependency already present.
The original getControlRoot code already has exactly this check, so this
patch simply reuses that code now for getRoot as well. This fixes the
regression.
NFC if no constrained FP intrinsic is present.
The file was modifiedllvm/test/CodeGen/SystemZ/fp-strict-alias.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
Commit dee6e39c7561a8b733cc260738ff7ea3ae78ee0c by selliott
[RISCV][NFC] Deduplicate Atomic Intrinsic Definitions
Summary: This is a slight cleanup, to use multiclasses to avoid the
duplication between the different atomic intrinsic definitions. The
produced intrinsics are unchanged, they're just generated in a more
succinct way.
Reviewers: asb, luismarques, jrtc27
Reviewed By: luismarques, jrtc27
Subscribers: Jim, rbar, johnrusso, simoncook, sabuasal, niosHD,
kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01,
MartinMosbeck, brucehoult, the_o, rkruppe, jfb, PkmX, jocewei, psnobl,
benna, s.egerton, pzheng, sameer.abuasal, apazos, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71777
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
Commit 6aca3e8dfa228fb75e410e34db74982a0ab3939f by ulrich.weigand
[FPEnv] Add some comments to IRBuilder.h
As requested via post-commit comment for D71467, this adds comments
documenting CreateFCmp vs. CreateFCmpS to the header file.
The file was modifiedllvm/include/llvm/IR/IRBuilder.h
Commit 3f944a8b8ca895667f04748f62d350f07ee1416b by Raphael Isemann
[lldb][NFC] Make name parameter in AddMethodToCXXRecordType a StringRef
The file was modifiedlldb/source/Symbol/ClangASTContext.cpp
The file was modifiedlldb/include/lldb/Symbol/ClangASTContext.h
Commit e3ed63e83ab6194aaf6711b97bdf09f16dcf2401 by simon.tatham
[TableGen] Update editor modes for new keywords.
Summary: D71407 and D71474 added new keywords to the Tablegen language:
`defvar`, `if`, `then` and `else`. This commit updates the various
editor modes to highlight them appropriately.
Some of the modes also didn't include `defset`, so I've added that too
while I was there.
Reviewers: MaskRay, lebedev.ri, plotfi
Reviewed By: lebedev.ri
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72693
The file was modifiedllvm/utils/kate/llvm-tablegen.xml
The file was modifiedllvm/utils/vscode/tablegen/syntaxes/TableGen.tmLanguage
The file was modifiedllvm/utils/emacs/tablegen-mode.el
The file was modifiedllvm/utils/vim/syntax/tablegen.vim
Commit cfe2fab708de3a1d8e05a829a132f335a189acc9 by spatel
[InstSimplify] add tests for vector select; NFC
The file was modifiedllvm/test/Transforms/InstSimplify/select.ll
The file was modifiedllvm/test/Transforms/InstCombine/select.ll
Commit 77cc690bae310f4cba0a34f2da8a37a7c9a10a82 by Tim Northover
AArch64: fix bitcode upgrade of @llvm.neon.addp.
We were upgrading it to faddp, but a version taking two type parameters
instead of one. This then got upgraded a second time to the version with
just one parameter, but occasionally (for reasons I don't understand)
this unusual two-stage process corrupted a use-list, leading to a crash
when the two faddp declarations didn't match.
The file was addedllvm/test/Bitcode/aarch64-addp-upgrade.ll
The file was addedllvm/test/Bitcode/aarch64-addp-upgrade.bc
The file was modifiedllvm/lib/IR/AutoUpgrade.cpp
Commit a705cf1acbe94498f7fcca4e89be6d4820271227 by pavel
Expression eval lookup speedup by not returning methods in
ManualDWARFIndex::GetFunctions
Summary: This change is connected with https://reviews.llvm.org/D69843
In large codebases, we sometimes see Module::FindFunctions (when called
from ClangExpressionDeclMap::FindExternalVisibleDecls) returning huge
amounts of functions.
In current fix I trying to return only function_fullnames from
ManualDWARFIndex::GetFunctions when eFunctionNameTypeFull is passed as
argument.
Reviewers: labath, jarin, aprantl
Reviewed By: labath
Subscribers: shafik, clayborg, teemperor, arphaman, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D70846
The file was modifiedlldb/packages/Python/lldbsuite/test/lang/cpp/printf/TestPrintf.py
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/find-basic-function.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.cpp
Commit 7ec7a6e5bfa745c285d5c651af02b93f2cb923e1 by llvm-dev
Fix "null pointer passed to nonnull argument" clang static analyzer
warnings. NFCI.
Assert that the memcpy arguments are valid.
The file was modifiedclang/lib/AST/NestedNameSpecifier.cpp
Commit 25dc5c7cd159522ec2375544f473c757ee13a03b by llvm-dev
Fix "pointer is null" static analyzer warnings. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately below and castAs will perform the null assertion for us.
The file was modifiedclang/lib/CodeGen/CGObjC.cpp
Commit cc8a1504283731f05f937464b631f170d748b7b0 by llvm-dev
Merge isa<> and getAs<> calls to fix "pointer is null" static analyzer
warnings. NFCI.
The file was modifiedclang/lib/Sema/SemaExprObjC.cpp
Commit 9d905e8ceddda8b103e208ed43a117cb4445e682 by llvm-dev
Remove duplicate variable. NFCI.
The file was modifiedclang/lib/Sema/SemaExprObjC.cpp
Commit 591cd40584300a1d5d33bfaefa4698c02ef56887 by llvm-dev
Fix "pointer is null" static analyzer warnings. NFCI.
Use cast<> instead of cast_or_null<> since the pointers are always
dereferenced and cast<> will perform the null assertion for us.
The file was modifiedclang/lib/Sema/SemaTemplate.cpp
Commit 1d6b964ed1f7a77b178e86bef7d569611f2c0983 by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
Remove Ctx null test as clang static analyzer assumes that this can fail
- replace it with an assertion as the pointer is always dereferenced
below.
The file was modifiedclang/lib/Sema/SemaTemplate.cpp
Commit e1f524ea43f920767259c47e201405091d7e76fd by grimar
[llvm-readobj][llvm-readelf][test] - Add a few more dynamic section
tests.
This adds a few more tests for dynamic section.
We only had tests for simple unknown values for 64-bits target, in this
patch I've added OS specific and processor specific tags. Also it tests
both 32 and 64-bits targets now.
It will help to fix the formatting issues we have and diagnose a
possible new ones.
Differential revision: https://reviews.llvm.org/D71896
The file was modifiedllvm/test/tools/llvm-readobj/ELF/dynamic-tags.test
The file was modifiedllvm/test/tools/llvm-objdump/elf-dynamic-section.test
Commit 4b5bc38802dcc7d2c6d7f5af1eca1755bd0fd9cb by pavel
[lldb/DWARF] Move location list sections into DWARFContext
These are the last sections not managed by the DWARFContext object. I
also introduce separate SectionType enums for dwo section variants, as
this is necessary for proper handling of single-file split dwarf.
The file was modifiedlldb/source/Core/Section.cpp
The file was modifiedlldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFContext.h
The file was modifiedlldb/source/Symbol/ObjectFile.cpp
The file was modifiedlldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
The file was modifiedlldb/include/lldb/lldb-enumerations.h
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFContext.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
The file was modifiedlldb/test/Shell/ObjectFile/ELF/section-types.yaml
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/debug_loclists-dwo.s
Commit 25a8aec7f37b970849ccf5f2893431e2ca858709 by Xiangling.Liao
[AIX] ExternalSymbolSDNode lowering
For memcpy/memset/memmove etc., replace ExternalSymbolSDNode with a
MCSymbolSDNode, which have a prefix dot before function name as entry
point symbol.
Differential Revision: https://reviews.llvm.org/D70718
The file was addedllvm/test/CodeGen/PowerPC/aix-external-sym-sdnode-lowering.ll
The file was addedllvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
Commit 35787e3a062a4a21c145137552d20cb1169c74fc by Tom.Weaver
[DBG][LIVEDEBUGVALUES][NFC] Add Targeted LiveDebugValues Behaviour
Tests.
Adds 22 distinct tests that exercise the live-debug-values passes
expected behaviour.
reviewers: aprantl, vsk
Differential revision: https://reviews.llvm.org/D72515
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_clobber.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_move.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge_clobbered.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_move.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_outer_moved.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_loop.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_move.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_clobbered.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_move_to_clobber.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_clobbered.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_clobbered.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_clobber.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_moved.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_clobber.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break_clobbered.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_early_clobber.mir
Commit 92451f0904ceab1d81d71a9f17ab366bf57eddc7 by sven.vanhaastregt
[OpenCL] Add MSAA sharing extension builtin functions
Add the MSAA sharing builtin functions from the OpenCL Extension
Specification.
Patch by Pierre Gondois and Sven van Haastregt.
The file was modifiedclang/lib/Sema/OpenCLBuiltins.td
Commit 192cce10f67e4f22be6d9b8c0975f78ad246d1bd by flo
Revert "Recommit "[GlobalOpt] Pass DTU to removeUnreachableBlocks
instead of recomputing.""
This reverts commit a03d7b0f24b65d69721dbbbc871df0629efcf774.
As discussed in D68298, this causes a compile-time regression, in case
the DTs requested are not used elsewhere in GlobalOpt. We should only
get the DTs if they are available here, but this seems not possible with
the legacy pass manager from a module pass.
The file was modifiedllvm/lib/Transforms/IPO/GlobalOpt.cpp
Commit 1cc8fff420a76ae869f73ce2b19e7c1fc73da3ed by Sanne.Wouda
[AArch64] Fix save register pairing for Windows AAPCS
Summary: On Windows, when a function does not have an unwind table (for
example, EH filtering funclets), we don't correctly pair FP and LR to
form the frame record in all circumstances.
Fix this by invalidating a pair when the second register is FP when
compiling for Windows, even when CFI is not needed.
Fixes PR44271 introduced by D65653.
Reviewers: efriedma, sdesmalen, rovka, rengolin, t.p.northover,
thegameg, greened
Reviewed By: rengolin
Subscribers: kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71754
The file was addedllvm/test/CodeGen/AArch64/win64-no-uwtable.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
Commit b10f6b7112278ba91d57173466bff7fc85d4bf0d by Tom.Weaver
Revert "[DBG][LIVEDEBUGVALUES][NFC] Add Targeted LiveDebugValues
Behaviour Tests."
This reverts commit 35787e3a062a4a21c145137552d20cb1169c74fc.
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_clobber.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_move_to_clobber.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_clobbered.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_clobber.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_move.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_clobbered.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_loop.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_outer_moved.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_clobber.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_early_clobber.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_move.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_clobbered.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_moved.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_move.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break_clobbered.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond.mir
The file was removedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge_clobbered.mir
Commit 9738c757bd9bc2fdca935f2b4e356f1d5e5f3682 by malcolm.parsons
[clang-tidy] Match InitListExpr in modernize-use-default-member-init
Summary: modernize-use-default-member-init wasn't warning about
redundant initialisers when the initialiser was an InitListExpr.  Add
initListExpr to the matcher.
Fixes: PR44439
Reviewers: aaron.ballman, alexfh, JonasToth
Reviewed By: aaron.ballman
Subscribers: xazax.hun, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72691
The file was modifiedclang-tools-extra/clang-tidy/modernize/UseDefaultMemberInitCheck.cpp
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/modernize-use-default-member-init.cpp
Commit 3b929fe7763570fc1d4a4691a53257a4a0b7760e by ibiryukov
[Syntax] Assert invariants on tree structure and fix a bug in mutations
Add checks for some structural invariants when building and mutating the
syntax trees.
Fix a bug failing the invariants after mutations: the parent of nodes
added into the tree was null.
The file was modifiedclang/lib/Tooling/Syntax/Synthesis.cpp
The file was modifiedclang/lib/Tooling/Syntax/Tree.cpp
The file was modifiedclang/lib/Tooling/Syntax/Mutations.cpp
The file was modifiedclang/lib/Tooling/Syntax/BuildTree.cpp
The file was modifiedclang/include/clang/Tooling/Syntax/Tree.h
Commit 07a41018e9d27f67f7b4295eb7e00e0345c0aacf by ibiryukov
[Syntax] Mark synthesized nodes as modifiable
This was an oversight in the original patch. Also add corresponding
tests.
The file was modifiedclang/include/clang/Tooling/Syntax/Tree.h
The file was modifiedclang/lib/Tooling/Syntax/Synthesis.cpp
The file was modifiedclang/unittests/Tooling/Syntax/TreeTest.cpp
Commit e7b2d9f4702cb8882aa275bcb8eab37be17601e1 by Tom.Weaver
[DBG][LIVEDEBUGVALUES][NFC] Add Targeted LiveDebugValues Behaviour
Tests.
Adds 22 distinct tests that exercise the live-debug-values passes
expected behaviour.
reviewers: aprantl, vsk
Differential revision: https://reviews.llvm.org/D72515
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_loop.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_clobbered.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_clobber.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_clobbered.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_clobbered.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_early_clobber.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_move.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_two_backedge_clobbered.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_outer_moved.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_move.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_match_clobber.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond_one_clobber.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_break_clobbered.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop_moved.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_bb_to_bb_move_to_clobber.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_basic_diamond.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_diamond_move.mir
The file was addedllvm/test/DebugInfo/MIR/X86/livedebugvalues_loop_within_loop.mir
Commit 9ef6faf49670e18eb1ba04105a7c70b450cdaa71 by kostyak
[scudo][standalone] Fork support
Summary: fork() wasn't well (or at all) supported in Scudo. This
materialized in deadlocks in children.
In order to properly support fork, we will lock the allocator pre-fork
and unlock it post-fork in parent and child. This is done via a
`pthread_atfork` call installing the necessary handlers.
A couple of things suck here: this function allocates - so this has to
be done post initialization as our init path is not reentrance, and it
doesn't allow for an extra pointer - so we can't pass the allocator we
are currently working with.
In order to work around this, I added a post-init template parameter
that gets executed once the allocator is initialized for the current
thread. Its job for the C wrappers is to install the atfork handlers.
I reorganized a bit the impacted area and added some tests, courtesy of
cferris@ that were deadlocking prior to this fix.
Subscribers: jfb, #sanitizers, llvm-commits
Tags: #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D72470
The file was modifiedcompiler-rt/lib/scudo/standalone/wrappers_cpp.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/wrappers_c.inc
The file was modifiedcompiler-rt/lib/scudo/standalone/tsd_exclusive.h
The file was modifiedcompiler-rt/lib/scudo/standalone/wrappers_c_bionic.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/bytemap.h
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/CMakeLists.txt
The file was modifiedcompiler-rt/lib/scudo/standalone/tsd.h
The file was modifiedcompiler-rt/lib/scudo/standalone/combined.h
The file was modifiedcompiler-rt/lib/scudo/standalone/primary64.h
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/tsd_test.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/primary32.h
The file was modifiedcompiler-rt/lib/scudo/standalone/CMakeLists.txt
The file was modifiedcompiler-rt/lib/scudo/standalone/quarantine.h
The file was modifiedcompiler-rt/lib/scudo/standalone/tsd_shared.h
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/wrappers_cpp_test.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/wrappers_c.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/stats.h
Commit 013c07f697886649b068cd97127e528b4fe7c03e by ibiryukov
[Syntax] Unset IsOriginal flag on nodes removed from the tree
And add a corresponding test. Only nodes inside the TranslationUnit
subtree can be marked as original, computeReplacements() relies on this.
The file was modifiedclang/lib/Tooling/Syntax/Tree.cpp
The file was modifiedclang/unittests/Tooling/Syntax/TreeTest.cpp
Commit a08c0adee072226179736c4f6caf3dd0b7a7c9af by sjoerd.meijer
[ARM][MVE] VTP Block Pass fix
Fix a missing and broken test: 2 VPT blocks predicated on the same VCMP
instruction that can be folded. The problem was that for each VPT block,
we record the predicate statements with a list, but the same instruction
was added twice. Thus, we were running in an assert trying to remove the
same instruction twice. To avoid this the instructions are now recorded
with a set.
Differential Revision: https://reviews.llvm.org/D72699
The file was addedllvm/test/CodeGen/Thumb2/mve-vpt-2-blocks-1-pred.mir
The file was modifiedllvm/lib/Target/ARM/MVEVPTBlockPass.cpp
Commit e2b8e2113a4929027a237b67f7be86db4ec103d3 by Jinsong Ji
[clang][OpenCL] Fix covered switch warning
-Werror clang build is broken now.
tools/clang/lib/Sema/OpenCLBuiltins.inc:11824:5: error: default label in
switch which covers all enumeration values
[-Werror,-Wcovered-switch-default]
   default:
We don't need default now, since all enumeration values are covered.
Reviewed By: svenvh
Differential Revision: https://reviews.llvm.org/D72707
The file was modifiedclang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
Commit ab9dbc1d124cdf288474073f5233e3fd6ee8e9c3 by llvm-dev
Fix "pointer is null" clang static analyzer warnings. NFCI.
Use cast<>/castAs<> instead of dyn_cast<>/getAs<> since the pointers are
always dereferenced and cast<>/castAs<> will perform the null assertion
for us.
The file was modifiedclang/lib/Sema/SemaOverload.cpp
Commit cfd366ba74c566038c6f417da9c9becc321fd737 by llvm-dev
Fix "pointer is null" static analyzer warnings. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately in all cases and castAs will perform the null assertion for
us.
The file was modifiedclang/lib/Sema/SemaDeclCXX.cpp
Commit c8a14c2d4773841daa303736332d0038ead6f36a by spatel
[IR] fix potential crash in Constant::isElementWiseEqual()
There's only one user of this API currently, and it seems impossible
that it would compare values with different types.
But that's not true in general, so we need to make sure the types are
the same.
As denoted by the FIXME comments, we will also crash on FP values.
That's what brought me here, but we can make that a follow-up patch.
The file was modifiedllvm/lib/IR/Constants.cpp
The file was modifiedllvm/unittests/IR/ConstantsTest.cpp
Commit fd19ffc6a502f8e647696d550abb04a6c8c1b182 by Jonas Devlieghere
[lldb/Utility] Use assert instead of llvm_unreachable for LLDBAssert
llvm_unreachable is marked noreturn so the compiler can assume the code
for printing the error message in release builds isn't hit which defeats
the purpose.
The file was modifiedlldb/source/Utility/LLDBAssert.cpp
Commit 57cf6ee9c84434161088c39a6f8dd2aae14eb12d by scott.egerton
[RISCV] Add Clang frontend support for Bitmanip extension
Summary: This adds the __riscv_bitmanip macro and the 'b' target feature
to enable it.
Reviewers: asb, simoncook, lewis-revill, PaoloS, lenary
Reviewed By: lenary
Subscribers: Jim, rbar, johnrusso, sabuasal, niosHD, kito-cheng,
shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01,
MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna,
pzheng, sameer.abuasal, apazos, luismarques, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D71553
The file was modifiedclang/lib/Driver/ToolChains/Arch/RISCV.cpp
The file was modifiedclang/lib/Basic/Targets/RISCV.cpp
The file was modifiedclang/test/Preprocessor/riscv-target-features.c
The file was modifiedclang/lib/Basic/Targets/RISCV.h
Commit 0877843ddacca0bea049b65d8a328e5038c72b66 by aqjune
[test] Make data layout of load-bitcast64.ll explicit, use
update_test_checks.py
The file was modifiedllvm/test/Transforms/InstCombine/load-bitcast64.ll
Commit 2948ec5ca98f8593584f2117bc92fe8d75f6f098 by gribozavr
Removed PointerUnion3 and PointerUnion4 aliases in favor of the variadic
template
The file was modifiedclang/include/clang/AST/DeclTemplate.h
The file was modifiedllvm/include/llvm/Support/SourceMgr.h
The file was modifiedclang/include/clang/AST/DeclCXX.h
The file was modifiedllvm/tools/llvm-pdbutil/InputFile.h
The file was modifiedllvm/unittests/ADT/PointerUnionTest.cpp
The file was modifiedclang/include/clang/AST/Decl.h
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was modifiedclang/include/clang/AST/TemplateName.h
The file was modifiedclang/unittests/CodeGen/IRMatchers.h
The file was modifiedclang/tools/libclang/CXCursor.h
The file was modifiedllvm/lib/Transforms/IPO/LowerTypeTests.cpp
The file was modifiedclang/include/clang/AST/ExprObjC.h
The file was modifiedllvm/include/llvm/ADT/PointerUnion.h
Commit 40c5bd4212a51216a489fdaaf59060921d677009 by maskray
[ELF] --exclude-libs: don't assign VER_NDX_LOCAL to undefined symbols
Suggested by Peter Collingbourne.
Non-VER_NDX_GLOBAL versions should not be assigned to defined symbols.
--exclude-libs violates this and can cause a spurious error "cannot
refer to absolute symbol" after D71795.
excludeLibs incorrectly assigns VER_NDX_LOCAL to an undefined weak
symbol => isPreemptible is false => R_PLT_PC is optimized to R_PC => in
isStaticLinkTimeConstant, an error is emitted.
Reviewed By: pcc, grimar
Differential Revision: https://reviews.llvm.org/D72681
The file was modifiedlld/ELF/Driver.cpp
The file was addedlld/test/ELF/exclude-libs-undef.s
Commit 3e32b7e12701de772b1cdf855b42253650a1e997 by aqjune
[InstCombine] Let combineLoadToNewType preserve ABI alignment of the
load (PR44543)
Summary: If aligment on `LoadInst` isn't specified, load is assumed to
be ABI-aligned. And said aligment may be different for different types.
So if we change load type, but don't pay extra attention to the aligment
(i.e. keep it unspecified), we may either overpromise (if the default
aligment of the new type is higher), or underpromise (if the default
aligment of the new type is smaller).
Thus, if no alignment is specified, we need to manually preserve the
implied ABI alignment.
This addresses https://bugs.llvm.org/show_bug.cgi?id=44543 by making
combineLoadToNewType preserve ABI alignment of the load.
Reviewers: spatel, lebedev.ri
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72710
The file was modifiedllvm/test/Transforms/InstCombine/load-bitcast64.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
Commit eb23cc136b68b24e63dd765b87d1facecd622695 by diggerlin
[AIX][XCOFF] Supporting the ReadOnlyWithRel SectionKnd
SUMMARY: In this patch we put the global variable in a Csect which's
SectionKind is "ReadOnlyWithRel" into Data Section.
Reviewers: hubert.reinterpretcast,jasonliu,Xiangling_L Subscribers:
wuzish, nemanjai, hiraditya
Differential Revision: https://reviews.llvm.org/D72461
The file was modifiedllvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
The file was addedllvm/test/CodeGen/PowerPC/aix-readonly-with-relocation.ll
Commit f7e9f4f4c50245d10ca9869a9f8f3d431dfb6948 by warren_ristow
SCC: Allow ReplaceNode to safely support insertion
If scc_iterator::ReplaceNode is inserting a new entry in the map, rather
than replacing an existing entry, the possibility of growing the map
could cause a failure.  This change safely implements the insertion.
Reviewed By: probinson
Differential Revision: https://reviews.llvm.org/D72469
The file was modifiedllvm/include/llvm/ADT/SCCIterator.h
Commit 98c54fb1feba081c509f7e389877550df130a80d by craig.topper
[X86] Directly emit a BROADCAST_LOAD from constant pool in
lowerUINT_TO_FP_vXi32 to avoid double loads seen in D71971
By directly emitting the constants as a constant pool load we seem to
avoid the build_vector/extract_subvector combines that resulted in the
duplicate loads we had before.
Differential Revision: https://reviews.llvm.org/D72307
The file was modifiedllvm/test/CodeGen/X86/vec-strict-inttofp-256.ll
The file was modifiedllvm/test/CodeGen/X86/vec_int_to_fp.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
Commit 7dc4bbf8ab311606388faacca58b6c3e3e508b77 by tejohnson
[ThinLTO] Handle variable with twice promoted name (Rust)
Summary: Ensure that we can internalize values produced from two rounds
of promotion.
Note that this cannot happen currently via clang, but in other use cases
such as the Rust compiler which does a first round of ThinLTO on library
code, producing bitcode, and a second round on the final binary.
In particular this can happen if a function is exported and promoted,
ending up with a ".llvm.${hash}" suffix, and then goes through a round
of optimization creating an internal switch table expansion variable
that is internal and contains the promoted name of the enclosing
function. This variable will be promoted in the second round of ThinLTO
if @foo is imported again, and therefore ends up with two
".llvm.${hash}" suffixes. Only the final one should be stripped when
consulting the index to locate the summary.
Reviewers: wmi
Subscribers: mehdi_amini, inglorion, hiraditya, JDevlieghere, steven_wu,
dexonsmith, arphaman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72711
The file was addedllvm/test/ThinLTO/X86/thinlto-internalize-doublepromoted.ll
The file was addedllvm/test/ThinLTO/X86/Inputs/thinlto-internalize-doublepromoted.ll
The file was modifiedllvm/include/llvm/IR/ModuleSummaryIndex.h
Commit bec1b55c64cf33d5f33c8cb7cc10d02e25811bef by maskray
[ELF] Delete the RelExpr member R_HINT. NFC
R_HINT is ignored like R_NONE. There are no strong reasons to keep
R_HINT. The largest RelExpr member R_RISCV_PC_INDIRECT is 60 now.
Differential Revision: https://reviews.llvm.org/D71822
The file was modifiedlld/ELF/Arch/ARM.cpp
The file was modifiedlld/ELF/Relocations.h
The file was modifiedlld/ELF/Relocations.cpp
Commit 2cefb93951cca01dcdde6fe5c7354dc8bcd796d6 by tejohnson
[ThinLTO/WPD] Remove an overly-aggressive assert
Summary: An assert added to the index-based WPD was trying to verify
that we only have multiple vtables for a given guid when they are all
non-external linkage. This is too conservative because we may have
multiple external vtable with the same guid when they are in comdat.
Remove the assert, as we don't have comdat information in the index, the
linker should issue an error in this case.
See discussion on D71040 for more information.
Reviewers: evgeny777, aganea
Subscribers: mehdi_amini, inglorion, hiraditya, steven_wu, dexonsmith,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72648
The file was modifiedllvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
The file was addedllvm/test/ThinLTO/X86/devirt_external_comdat_same_guid.ll
The file was addedllvm/test/ThinLTO/X86/Inputs/devirt_external_comdat_same_guid.ll
Commit cd800f3b226b25142f233beca846715fc601809b by lewis-revill
[RISCV] Allow shrink wrapping for RISC-V
Enabling shrink wrapping requires ensuring the insertion point of the
epilogue is correct for MBBs without a terminator, in which case the
instruction to adjust the stack pointer is the last instruction in the
block.
Differential Revision: https://reviews.llvm.org/D62190
The file was addedllvm/test/CodeGen/RISCV/shrinkwrap.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Commit 36fcbb838c8f293f46bfed78c6ed8c177f1e3485 by aaron
Added readability-qualified-auto check
Adds a check that detects any auto variables that are deduced to a
pointer or a const pointer then adds in the const and asterisk
according. Will also check auto L value references that could be written
as const. This relates to the coding standard
https://llvm.org/docs/CodingStandards.html#beware-unnecessary-copies-with-auto
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst
The file was addedclang-tools-extra/docs/clang-tidy/checks/readability-qualified-auto.rst
The file was modifiedclang-tools-extra/clang-tidy/llvm/LLVMTidyModule.cpp
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst
The file was modifiedclang-tools-extra/clang-tidy/readability/CMakeLists.txt
The file was addedclang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.h
The file was addedclang-tools-extra/docs/clang-tidy/checks/llvm-qualified-auto.rst
The file was addedclang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/readability-qualified-auto-cxx20.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/readability-qualified-auto.cpp
The file was modifiedclang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
Commit 527f5a471eac75fd7d6ed48bd1e242ef8ea98dd0 by llvmgnsyncbot
[gn build] Port 36fcbb838c8
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clang-tidy/readability/BUILD.gn
Commit ab72db7fc85266f094cc6b9452dd01f175c04cab by stilis
[lldb/test] test_breakpoints_func_full from
TestNamespace.NamespaceBreakpointTestCase is now passing on Windows
After https://reviews.llvm.org/D70846, the test is now passing on
Windows
The file was modifiedlldb/packages/Python/lldbsuite/test/lang/cpp/namespace/TestNamespace.py
Commit b777e551f044bbc7245a0b535e46000469479ff6 by jay.foad
[MachineScheduler] Reduce reordering due to mem op clustering
Summary: Mem op clustering adds a weak edge in the DAG between two loads
or stores that should be clustered, but the direction of this edge is
pretty arbitrary (it depends on the sort order of MemOpInfo, which
represents the operands of a load or store). This often means that two
loads or stores will get reordered even if they would naturally have
been scheduled together anyway, which leads to test case churn and goes
against the scheduler's "do no harm" philosophy.
The fix makes sure that the direction of the edge always matches the
original code order of the instructions.
Reviewers: atrick, MatzeB, arsenm, rampitec, t.p.northover
Subscribers: jvesely, wdng, nhaehnle, kristof.beyls, hiraditya,
javed.absar, arphaman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72706
The file was modifiedllvm/test/CodeGen/AArch64/arm64-ldp-cluster.ll
The file was modifiedllvm/test/CodeGen/AArch64/aarch64-stp-cluster.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/max.i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shift-i128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
The file was modifiedllvm/lib/CodeGen/MachineScheduler.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/bitcast-constant-to-vector.ll
The file was modifiedllvm/test/CodeGen/AArch64/expand-select.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-memset-inline.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
The file was modifiedllvm/test/CodeGen/AArch64/machine-scheduler.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/byval-frame-setup.ll
The file was modifiedllvm/test/CodeGen/AArch64/global-merge-group-by-use.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/kernel-args.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ds_read2.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/call-argument-types.ll
Commit 57cb4685140284907d16673b555fd62307b4cd76 by spatel
[InstCombine] add test for possible cast-of-select transform; NFC
The file was modifiedllvm/test/Transforms/InstCombine/trunc.ll
Commit 88b8cb7215d4333ab990c99f21c7f92262ef02ef by alexandre.ganea
Fix NetBSD bot after b4a99a061f517e60985667e39519f60186cbb469
([Clang][Driver] Re-use the calling process instead of creating a new
process for the cc1 invocation)
The file was modifiedclang/test/Driver/cc1-spawnprocess.c
Commit 2d287bec3c5b63b7df9946163ba02987858b1736 by jonathanchesterfield
[nfc][libomptarget] Refactor amdgcn target_impl
Summary:
[nfc][libomptarget] Refactor amdgcn target_impl
Removes references to internal libraries from the header Standardises on
C++ mangling for all the target_impl functions Update comment block
clang-format Move some functions into a new target_impl.hip source file
This lays the groundwork for implementing the remaining unresolved
symbols in the target_impl.hip source.
Reviewers: jdoerfert, grokos, ABataev, ronlieb
Reviewed By: jdoerfert
Subscribers: jvesely, mgorny, jfb, openmp-commits
Tags: #openmp
Differential Revision: https://reviews.llvm.org/D72712
The file was modifiedopenmp/libomptarget/deviceRTLs/amdgcn/CMakeLists.txt
The file was modifiedopenmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
The file was addedopenmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip
Commit 2a43688a0a074a70e395491fa0c3cdb4556ccea4 by jonathanchesterfield
[nfc][libomptarget] Refactor nvptx/target_impl.cu
Summary:
[nfc][libomptarget] Refactor nxptx/target_impl.cu
Use __kmpc_impl_atomic_add instead of atomicAdd to match the rest of the
file. Alternatively, target_impl.cu could use the cuda functions
directly. Using a mixture in this file was an oversight, happy to
resolve in either direction.
Removed some comments that look outdated.
Call __kmpc_impl_unset_lock directly to avoid a redundant diagnostic and
remove an implict dependency on interface.h.
Reviewers: ABataev, grokos, jdoerfert
Reviewed By: jdoerfert
Subscribers: jfb, openmp-commits
Tags: #openmp
Differential Revision: https://reviews.llvm.org/D72719
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
Commit fa632340938cc02e03262e1318cb06b34c32f5fe by nikita.ppv
[InstCombine] Add test for iterator invalidation bug; NFC
The file was addedllvm/test/Transforms/InstCombine/bitcast-phi-uselistorder.ll
Commit 652cd7c1007aa5a13ad9864fadc939c5710c5199 by nikita.ppv
[InstCombine] Fix user iterator invalidation in bitcast of phi transform
This fixes the issue encountered in D71164. Instead of using a
range-based for, manually iterate over the users and advance the
iterator beforehand, so we do not skip any users due to iterator
invalidation.
Differential Revision: https://reviews.llvm.org/D72657
The file was modifiedllvm/test/Transforms/InstCombine/bitcast-phi-uselistorder.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
Commit b4dd928ffbb8232d6909b640d3affcd531681ffb by nikita.ppv
[InstCombine] Make combineLoadToNewType a method; NFC
So it can be reused as part of other combines. In particular for D71164.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h
Commit 65c0805be523445d7ad0f12e90f53648e1ae9f84 by nikita.ppv
[InstCombine] Fix infinite loop due to bitcast <-> phi transforms
Fix for https://bugs.llvm.org/show_bug.cgi?id=44245.
The optimizeBitCastFromPhi() and FoldPHIArgOpIntoPHI() end up fighting
against each other, because optimizeBitCastFromPhi() assumes that
bitcasts of loads will get folded. This doesn't happen here, because a
dangling phi node prevents the one-use fold in
https://github.com/llvm/llvm-project/blob/master/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp#L620-L628
from triggering.
This patch fixes the issue by explicitly performing the load combine as
part of the bitcast of phi transform. Other attempts to force the load
to be combined first were ultimately too unreliable.
Differential Revision: https://reviews.llvm.org/D71164
The file was addedllvm/test/Transforms/InstCombine/pr44245.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
Commit 48bad08aa3b3bf6ad5dabe858fa655a623757395 by a.bataev
[OPENMP]Improve handling of possibly incorrectly mapped types.
Need to analayze the type of the expression for mapping, not the type of
the declaration.
The file was modifiedclang/test/OpenMP/target_map_messages.cpp
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp
Commit 410331869defbde0f6e5b7b3f8ee30c10b7f6be3 by nikita.ppv
[NewPM] Port MergeFunctions pass
This ports the MergeFunctions pass to the NewPM. This was rather
straightforward, as no analyses are used.
Additionally MergeFunctions needs to be conditionally enabled in the
PassBuilder, but I left that part out of this patch.
Differential Revision: https://reviews.llvm.org/D72537
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was addedllvm/include/llvm/Transforms/IPO/MergeFunctions.h
The file was modifiedllvm/lib/Transforms/IPO/IPO.cpp
The file was modifiedllvm/lib/Passes/PassRegistry.def
The file was modifiedllvm/include/llvm/InitializePasses.h
The file was modifiedllvm/test/Transforms/MergeFunc/merge-block-address.ll
The file was modifiedllvm/lib/Transforms/IPO/MergeFunctions.cpp
Commit 2d4571bf3060f8f3d8417a0ec55e21a280158069 by protze
[OpenMP][Tool] Runtime warning for missing TSan-option
TSan spuriously reports for any OpenMP application a race on the
initialization of a runtime internal mutex:
``` Atomic read of size 1 at 0x7b6800005940 by thread T4:
#0 pthread_mutex_lock <null> (a.out+0x43f39e)
#1 __kmp_resume_64 <null> (libomp.so.5+0x84db4)
Previous write of size 1 at 0x7b6800005940 by thread T7:
#0 pthread_mutex_init <null> (a.out+0x424793)
#1 __kmp_suspend_initialize_thread <null> (libomp.so.5+0x8422e)
```
According to @AndreyChurbanov this is a false positive report, as the
control flow of the runtime guarantees the ordering of the mutex
initialization and the lock:
https://software.intel.com/en-us/forums/intel-open-source-openmp-runtime-library/topic/530363
To suppress this report, I suggest the use of
TSAN_OPTIONS='ignore_uninstrumented_modules=1'. With this patch, a
runtime warning is provided in case an OpenMP application is built with
Tsan and executed without this Tsan-option.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D70412
The file was modifiedopenmp/CREDITS.txt
The file was modifiedopenmp/tools/archer/ompt-tsan.cpp
Commit 5d1b3ba687690bbb37f911f66a2c2c5f19d60032 by maskray
[Driver] Ignore -fno-semantic-interposition
Fedora wants to build projects with -fno-semantic-interposition (e.g.
https://fedoraproject.org/wiki/Changes/PythonNoSemanticInterpositionSpeedup),
which is supported by GCC>=5.
Clang's current behavior is similar to -fno-semantic-interposition and
the end goal is to make it more so
(https://lists.llvm.org/pipermail/llvm-dev/2016-November/107625.html).
Ignore this option.
We should let users know -fsemantic-interposition is not currently
supported, so it should remain a hard error.
Reviewed By: serge-sans-paille
Differential Revision: https://reviews.llvm.org/D72724
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/test/Driver/clang_f_opts.c
Commit 26d96126a0d258afccfeec1fbaa727bfeb820308 by danilo.carvalho.grael
[SVE] Add patterns for MUL immediate instruction.
Summary: Add the missing MUL pattern for integer immediate instructions.
Reviewers: sdesmalen, huntergr, efriedma, c-rhodes, kmclaughlin
Subscribers: tschuett, hiraditya, rkruppe, psnobl, llvm-commits, amehsan
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72654
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was addedllvm/test/CodeGen/AArch64/sve-neg-int-arith-imm.ll
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was modifiedllvm/test/CodeGen/AArch64/sve-int-arith-imm.ll
The file was addedllvm/test/CodeGen/AArch64/sve-neg-int-arith-imm-2.ll
Commit 337e4359645ebd0f35136dbec9b51c48b9071f9c by martin
[libcxx] [Windows] Make a more proper implementation of strftime_l for
mingw with msvcrt.dll
This also makes this function consistent with the rest of the libc++
provided fallbacks.
The locale support in msvcrt.dll is very limited anyway; it can only be
configured processwide, not per thread, and it only seems to support the
locales "C" and "" (the user set locale), so it's hard to make any
meaningful automatic test for it. But manually tested, this change does
make time formatting locale code in libc++ output times in the user
requested format, when using locale "".
Differential Revision: https://reviews.llvm.org/D69554
The file was modifiedlibcxx/include/support/win32/locale_win32.h
The file was modifiedlibcxx/src/support/win32/locale_win32.cpp
Commit b53d44b17a1685e405415cd32c4b6eb89cc4c3a1 by Adrian Prantl
dotest.py: Add option to pass extra lldb settings to dotest
The primary motivation for this is to add another dimension to the Swift
LLDB test matrix, but this seems generally useful.
Differential Revision: https://reviews.llvm.org/D72662
The file was modifiedlldb/packages/Python/lldbsuite/test/dotest_args.py
The file was modifiedlldb/packages/Python/lldbsuite/test/configuration.py
The file was modifiedlldb/packages/Python/lldbsuite/test/dotest.py
Commit 5ee616a710bcb52cf9f1f7951644d098d38e7b6a by jranieri
[analyzer] Fix SARIF column locations
Differential revision: https://reviews.llvm.org/D70689
The file was modifiedclang/test/Analysis/diagnostics/Inputs/expected-sarif/sarif-multi-diagnostic-test.c.sarif
The file was modifiedclang/test/Analysis/diagnostics/Inputs/expected-sarif/sarif-diagnostics-taint-test.c.sarif
The file was modifiedclang/test/Analysis/diagnostics/sarif-multi-diagnostic-test.c
The file was modifiedclang/lib/StaticAnalyzer/Core/SarifDiagnostics.cpp
Commit 651128f557229e79598e22102edb7fad3bf288c0 by akhuang
[DebugInfo] Add option to clang to limit debug info that is emitted for
classes.
Summary: This patch adds an option to limit debug info by only emitting
complete class type information when its constructor is emitted. This
applies to classes that have nontrivial user defined constructors.
I implemented the option by adding another level to `DebugInfoKind`, and
a flag `-flimit-debug-info-constructor`.
Total object file size on Windows, compiling with RelWithDebInfo:
before: 4,257,448 kb
after:  2,104,963 kb
And on Linux
before: 9,225,140 kb
after:  4,387,464 kb
According to the Windows clang.pdb files, here is a list of types that
are no longer complete with this option enabled:
https://reviews.llvm.org/P8182
Reviewers: rnk, dblaikie
Subscribers: aprantl, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72427
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was addedclang/test/CodeGenCXX/debug-info-limited-ctor.cpp
Commit 04e586151e7987089d760662126e247012431e90 by nikita.ppv
[InstCombine] Fix worklist management when removing guard intrinsic
When multiple guard intrinsics are merged into one, currently the result
of eraseInstFromFunction() is returned -- however, this should only be
done if the current instruction is being removed. In this case we're
removing a different instruction and should instead report that the
current one has been modified by returning it.
For this test case, this reduces the number of instcombine iterations
from 5 to 2 (the minimum possible).
Differential Revision: https://reviews.llvm.org/D72558
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/test/Transforms/InstCombine/call-guard.ll
Commit 986202fad41529af8288aca54f2ff62d4c501d71 by Jan Korous
[clang][test][NFC] Use more widely supported sanitizer for file
dependency tests
The tests aren't concerned at all by the actual sanitizer - only by
blacklist being reported as a dependency. We're unfortunately limited by
platform support for any particular sanitizer but we can at least use
one that is widely supported.
Post-commit review: https://reviews.llvm.org/D72729
The file was modifiedclang/test/Frontend/dependency-gen.c
The file was removedclang/test/Frontend/Inputs/resource_dir_with_cfi_blacklist/share/cfi_blacklist.txt
The file was addedclang/test/Frontend/Inputs/resource_dir_with_sanitizer_blacklist/share/ubsan_blacklist.txt
Commit fe37d9ecaabda4f9948f35bb20c1a13687a7eaca by fedor.sergeev
[GVN] fix comment/argument name to match actual implementation. NFC
The file was modifiedllvm/include/llvm/Transforms/Scalar/GVN.h
Commit 9ee90ea55c1656b75e40f595dc351fbf667f5b79 by craig.topper
[LegalizeTypes] Remove untested code from ExpandIntOp_UINT_TO_FP
This code is untested in tree because the
"APFloat::semanticsPrecision(sem) >= SrcVT.getSizeInBits() - 1" check is
false for most combinations for int and fp types except maybe i32 and
f64. For that you would need i32 to be an illegal type, but f64 to be
legal and have custom handling for legalizing the split sint_to_fp. The
precision check itself was added in 2010 to fix a double rounding issue
in the algorithm that would occur if the sint_to_fp was not able to do
the conversion without rounding.
Differential Revision: https://reviews.llvm.org/D72728
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
Commit 1ca51c06729d7f7326fcc2a826e07d1c92158dfd by maskray
[Driver][test] Fix Driver/hexagon-toolchain-elf.c for
-DCLANG_DEFAULT_LINKER=lld builds
Reviewed By: nathanchance, sidneym
Differential Revision: https://reviews.llvm.org/D72668
The file was modifiedclang/test/Driver/hexagon-toolchain-elf.c
Commit 6078f2fedcac5797ac39ee5ef3fd7a35ef1202d5 by Amara Emerson
[AArch64][GlobalISel]: Support @llvm.{return,frame}address selection.
These intrinsics expand to a variable number of instructions so just
like in ISelLowering.cpp we use custom code to deal with them.
Committing Tim's original patch.
Differential Revision: https://reviews.llvm.org/D65656
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/select-returnaddr.ll
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/select-frameaddr.ll
Commit a3490e3e3d38d502179329f76138d96c5b2bab88 by michael.hliao
Remove trailing `;`. NFC.
The file was modifiedclang/lib/Tooling/Syntax/Tree.cpp
Commit 1bd14ce39293df61888042916a7e43b9e502a4de by riverriddle
[mlir] Use double format when parsing bfloat16 hexadecimal values
Summary: bfloat16 doesn't have a valid APFloat format, so we have to use
double semantics when storing it. This change makes sure that
hexadecimal values can be round-tripped properly given this fact.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D72667
The file was modifiedmlir/lib/Parser/Parser.cpp
The file was modifiedmlir/test/IR/invalid.mlir
The file was modifiedmlir/test/IR/parser.mlir
Commit a48600c0a653d34f4af760f117755ed1776adf9d by a.bataev
[OPENMP]Do not emit special virtual function for NVPTX target.
There are no special virtual function handlers (like __cxa_pure_virtual)
defined for NVPTX target, so just emit such functions as null pointers
to prevent issues with linking and unresolved references.
The file was addedclang/test/OpenMP/nvptx_target_pure_deleted_codegen.cpp
The file was modifiedclang/lib/CodeGen/CGVTables.cpp
Commit 8d07f8d98c48ee0a9dca450aaf4e1cabc621ff68 by michael.hliao
[DAGCombine] Replace `getIntPtrConstant()` with `getVectorIdxTy()`.
- Prefer `getVectorIdxTy()` as the index operand type for
`EXTRACT_SUBVECTOR` as targets expect different types by overloading
`getVectorIdxTy()`.
The file was addedllvm/test/CodeGen/AMDGPU/extract-subvector.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit f52d71736b10e87b1aa1880b777dc9462a0085ce by ntv
[mlir][Linalg] Update the semantics, verifier and test for Linalg with
tensors.
Summary: This diff fixes issues with the semantics of linalg.generic on
tensors that appeared when converting directly from HLO to
linalg.generic. The changes are self-contained within MLIR and can be
captured and tested independently of XLA.
The linalg.generic and indexed_generic are updated to:
To allow progressive lowering from the value world (a.k.a tensor values)
to the buffer world (a.k.a memref values), a linalg.generic op accepts
mixing input and output ranked tensor values with input and output
memrefs.
```
%1 = linalg.generic #trait_attribute %A, %B {other-attributes} :
tensor<?x?xf32>,
memref<?x?xf32, stride_specification>
-> (tensor<?x?xf32>)
```
In this case, the number of outputs (args_out) must match the sum of (1)
the number of output buffer operands and (2) the number of tensor return
values. The semantics is that the linalg.indexed_generic op produces
(i.e. allocates and fills) its return values.
Tensor values must be legalized by a buffer allocation pass before most
transformations can be applied. Such legalization moves tensor return
values into output buffer operands and updates the region argument
accordingly.
Transformations that create control-flow around linalg.indexed_generic
operations are not expected to mix with tensors because SSA values do
not escape naturally. Still, transformations and rewrites that take
advantage of tensor SSA values are expected to be useful and will be
added in the near future.
Subscribers: bmahjour, mehdi_amini, rriddle, jpienaar, burmako,
shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72555
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Analysis/DependenceAnalysis.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgTraits.h
The file was modifiedmlir/test/Dialect/Linalg/roundtrip.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
The file was modifiedmlir/test/Dialect/Linalg/invalid.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/LinalgToLoops.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/LinalgTransforms.cpp
Commit 729530f68fe135ad41d470fbed019cc5e31ac8a5 by l.lunak
-fmodules-codegen should not emit extern templates
If a header contains 'extern template', then the template should be
provided somewhere by an explicit instantiation, so it is not necessary
to generate a copy. Worse, this can lead to an unresolved symbol,
because the codegen's object file will not actually contain functions
from such a template because of the GVA_AvailableExternally, but the
object file for the explicit instantiation will not contain them either
because it will be blocked by the information provided by the module.
Differential Revision: https://reviews.llvm.org/D69779
The file was addedclang/test/Modules/codegen-extern-template.modulemap
The file was addedclang/test/Modules/codegen-extern-template.cpp
The file was addedclang/test/Modules/codegen-extern-template.h
The file was modifiedclang/lib/Serialization/ASTWriterDecl.cpp
Commit b5b2cf7af47f1ca04635dae7b787c8a81d5af4c9 by l.lunak
fix recent -fmodules-codegen fix test
The file was addedclang/test/Modules/Inputs/codegen-extern-template.modulemap
The file was modifiedclang/test/Modules/codegen-extern-template.cpp
The file was removedclang/test/Modules/codegen-extern-template.modulemap
Commit cbc9d22e49b434b6ceb2eb94b67079d02e0a7b74 by l.lunak
make -fmodules-codegen and -fmodules-debuginfo work also with PCHs
Allow to build PCH's (with -building-pch-with-obj and the extra .o file)
with -fmodules-codegen -fmodules-debuginfo to allow emitting shared code
into the extra .o file, similarly to how it works with modules. A bit of
a misnomer, but the underlying functionality is the same. This saves up
to 20% of build time here.
Differential Revision: https://reviews.llvm.org/D69778
The file was modifiedclang/lib/Serialization/ASTReaderDecl.cpp
The file was modifiedclang/lib/Serialization/ASTWriter.cpp
The file was modifiedclang/lib/Serialization/ASTReader.cpp
The file was addedclang/test/PCH/codegen.cpp
The file was modifiedclang/lib/Serialization/ASTWriterDecl.cpp
The file was modifiedclang/test/Modules/Inputs/codegen-flags/foo.h
Commit 20c6e0749461147df19a3b126d1a48106c63c351 by riverriddle
[mlir] Enable printing of FuncOp in the generic form.
Summary: This was previously disabled as FunctionType TypeAttrs could
not be roundtripped in the IR. This has been fixed, so we can now
generically print FuncOp.
Depends On D72429
Reviewed By: jpienaar, mehdi_amini
Differential Revision: https://reviews.llvm.org/D72642
The file was modifiedmlir/lib/IR/AsmPrinter.cpp
The file was modifiedmlir/test/IR/wrapping_op.mlir
Commit 23058f9dd4d7e18239fd63b6da52549514b45fda by a.bataev
[OPENMP]Do not use RTTI by default for NVPTX devices.
NVPTX does not support RTTI, so disable it by default.
The file was modifiedclang/lib/Driver/ToolChain.cpp
The file was addedclang/test/Driver/openmp-offload-gpu.cpp
Commit fa9dd8336bbd1167926f93fe2018d0c47839d5d6 by riverriddle
[mlir] Refactor ModuleState into AsmState and expose it to users.
Summary: This allows for users to cache printer state, which can be
costly to recompute. Each of the IR print methods gain a new overload
taking this new state class.
Depends On D72293
Reviewed By: jpienaar
Differential Revision: https://reviews.llvm.org/D72294
The file was modifiedmlir/include/mlir/IR/Block.h
The file was modifiedmlir/include/mlir/IR/OpDefinition.h
The file was modifiedmlir/lib/IR/AsmPrinter.cpp
The file was addedmlir/include/mlir/IR/AsmState.h
The file was modifiedmlir/include/mlir/IR/Module.h
The file was modifiedmlir/include/mlir/IR/Value.h
The file was modifiedmlir/include/mlir/IR/Operation.h
Commit 60d39479221d6bc09060f7816bcd7c54eb286603 by xur
[remark][diagnostics] Using clang diagnostic handler for IR input files
For IR input files, we currently use LLVM diagnostic handler even the
compilation is from clang. As a result, we are not able to use -Rpass to
get the transformation reports. Some warnings are not handled properly
either: We found many mysterious warnings in our ThinLTO backend
compilations in SamplePGO and CSPGO. An example of the warning:
"warning: net/proto2/public/metadata_lite.h:51:21: 0.02% (1 / 4999)"
This turns out to be a warning by Wmisexpect, which is supposed to be
filtered out by default. But since the filter is in clang's diagnostic
hander, we emit these incomplete warnings from LLVM's diagnostic
handler.
This patch uses clang diagnostic handler for IR input files. We create a
fake backendconsumer just to install the diagnostic handler.
With this change, we will have proper handling of all the warnings and
we can use -Rpass* options in IR input files compilation. Also note that
with is patch, LLVM's diagnostic options, like
"-mllvm -pass-remarks=*", are no longer be able to get optimization
remarks.
Differential Revision: https://reviews.llvm.org/D72523
The file was modifiedclang/lib/CodeGen/CodeGenAction.cpp
The file was addedclang/test/CodeGen/Inputs/thinlto_expect2.proftext
The file was addedclang/test/CodeGen/Inputs/thinlto_expect1.proftext
The file was modifiedclang/test/CodeGen/thinlto-diagnostic-handler-remarks-with-hotness.ll
The file was addedclang/test/CodeGen/thinlto-clang-diagnostic-handler-in-be.c
Commit 47c6ab2b97773ee5fb360fc093a5824be64b8c68 by antiagainst
[mlir][spirv] Properly support SPIR-V conversion target
This commit defines a new SPIR-V dialect attribute for specifying a
SPIR-V target environment. It is a dictionary attribute containing the
SPIR-V version, supported extension list, and allowed capability list. A
SPIRVConversionTarget subclass is created to take in the target
environment and sets proper dynmaically legal ops by querying the op
availability interface of SPIR-V ops to make sure they are available in
the specified target environment. All existing conversions targeting
SPIR-V is changed to use this SPIRVConversionTarget. It probes whether
the input IR has a `spv.target_env` attribute, otherwise, it uses the
default target environment: SPIR-V 1.0 with Shader capability and no
extra extensions.
Differential Revision: https://reviews.llvm.org/D72256
The file was modifiedmlir/include/mlir/Dialect/SPIRV/TargetAndABI.td
The file was modifiedmlir/docs/Dialects/SPIR-V.md
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVLowering.cpp
The file was modifiedmlir/test/Dialect/SPIRV/target-and-abi.mlir
The file was modifiedmlir/test/Dialect/SPIRV/TestAvailability.cpp
The file was modifiedmlir/include/mlir/Dialect/SPIRV/TargetAndABI.h
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVLowering.h
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/ConvertStandardToSPIRVPass.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/TargetAndABI.cpp
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRVPass.cpp
The file was addedmlir/test/Dialect/SPIRV/target-env.mlir
The file was modifiedmlir/lib/Dialect/SPIRV/Transforms/LowerABIAttributesPass.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVDialect.cpp
Commit 01a4b83154760ea286117ac4de9576b8a215cb8d by michael.hliao
[codegen,amdgpu] Enhance MIR DIE and re-arrange it for AMDGPU.
Summary:
- `dead-mi-elimination` assumes MIR in the SSA form and cannot be
arranged after phi elimination or DeSSA. It's enhanced to handle the
dead register definition by skipping use check on it. Once a register
def is `dead`, all its uses, if any, should be `undef`.
- Re-arrange the DIE in RA phase for AMDGPU by placing it directly after
`detect-dead-lanes`.
- Many relevant tests are refined due to different register assignment.
Reviewers: rampitec, qcolombet, sunfish
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl,
dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72709
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
The file was addedllvm/test/CodeGen/AMDGPU/dead-machine-elim-after-dead-lane.ll
The file was modifiedllvm/lib/CodeGen/DeadMachineInstructionElim.cpp
The file was removedllvm/test/CodeGen/AMDGPU/dead-mi-use-same-intr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/idot8u.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/loop_break.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/select.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/bswap.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
Commit e244145ab08ae79ea3d22c2fe479ec084dbd7742 by georgios.rokos
[LIBOMPTARGET] Do not increment/decrement the refcount for "declare
target" objects
The reference counter for global objects marked with declare target is
INF. This patch prevents the runtime from incrementing /decrementing INF
refcounts. Without it, the map(delete: global_object) directive actually
deallocates the global on the device. With this patch, such a directive
becomes a no-op.
Differential Revision: https://reviews.llvm.org/D72525
The file was modifiedopenmp/libomptarget/src/omptarget.cpp
The file was addedopenmp/libomptarget/test/mapping/delete_inf_refcount.c
The file was modifiedopenmp/libomptarget/src/device.cpp
The file was modifiedopenmp/libomptarget/src/device.h
Commit c9ee5e996e3c89a751a35e8b771870e0ec24f3c0 by xur
Fix windows bot failures in c410adb092c9cb51ddb0b55862b70f2aa8c5b16f
(clang diagnostic handler for IR input files)
The file was modifiedclang/test/CodeGen/thinlto-clang-diagnostic-handler-in-be.c
Commit ab9aefee9fa09957d1a3e76fcc47abda0d002255 by phosek
[libcxx] Use C11 thread API on Fuchsia
On Fuchsia, pthread API is emulated on top of C11 thread API. Using C11
thread API directly is more efficient.
While this implementation is only used by Fuchsia at the moment, it's
not Fuchsia specific, and could be used by other platforms that use C11
threads rather than pthreads in the future.
Differential Revision: https://reviews.llvm.org/D64378
The file was modifiedlibcxx/include/__threading_support
The file was modifiedlibcxx/include/__config
Commit ab035647061272b7efa39364c42e48972cebc0ab by ataei
[mlir] : Fix ViewOp shape folder for identity affine maps
Summary: Fix the ViewOpShapeFolder in case of no affine mapping
associated with a Memref construct identity mapping.
Reviewers: nicolasvasilache
Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen,
antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72735
The file was modifiedmlir/lib/Dialect/StandardOps/Ops.cpp
The file was modifiedmlir/test/Transforms/canonicalize.mlir
Commit 57eb56b83926675dd8a554fc8a8e28ee57278f90 by craig.topper
[X86] Swap the 0 and the fudge factor in the constant pool for the
32-bit mode i64->f32/f64/f80 uint_to_fp algorithm.
This allows us to generate better code for selecting the fixup to load.
Previously when the sign was set we had to load offset 0. And when it
was clear we had to load offset 4. This required a testl, setns, zero
extend, and finally a mul by 4. By switching the offsets we can just
shift the sign bit into the lsb and multiply it by 4.
The file was modifiedllvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
The file was modifiedllvm/test/CodeGen/X86/fildll.ll
The file was modifiedllvm/test/CodeGen/X86/fp80-strict-scalar.ll
The file was modifiedllvm/test/CodeGen/X86/uint64-to-float.ll
The file was modifiedllvm/test/CodeGen/X86/scalar-int-to-fp.ll
The file was modifiedllvm/test/CodeGen/X86/pr44396.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/fp-intrinsics.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-inttofp-512.ll
The file was modifiedllvm/test/CodeGen/X86/half.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-inttofp-128.ll
The file was modifiedllvm/test/CodeGen/X86/pr15309.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-inttofp-256.ll
The file was modifiedllvm/test/CodeGen/X86/fp-strict-scalar-inttofp.ll
The file was modifiedllvm/test/CodeGen/X86/fp-cvt.ll
Commit 76291e1158c2aedddfe0be0ea69452ea6dc2db24 by craig.topper
[X86] Drop an unneeded FIXME. NFC
The extload on X87 is free.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 65c8abb14e77b28d8357c52dddb8e0a6b12b4ba2 by michael.hliao
[amdgpu] Fix typos in a test case.
- There are typos introduced due to merge.
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
Commit 40cd26c7008183e01d8276396339aea2a99d83d7 by rnk
[Win64] Handle FP arguments more gracefully under -mno-sse
Pass small FP values in GPRs or stack memory according the the normal
convention. This is what gcc -mno-sse does on Win64.
I adjusted the conditions under which we emit an error to check if the
argument or return value would be passed in an XMM register when SSE is
disabled. This has a side effect of no longer emitting an error for FP
arguments marked 'inreg' when targetting x86 with SSE disabled. Our
calling convention logic was already assigning it to FP0/FP1, and then
we emitted this error. That seems unnecessary, we can ignore 'inreg' and
compile it without SSE.
Reviewers: jyknight, aemerson
Differential Revision: https://reviews.llvm.org/D70465
The file was addedllvm/test/CodeGen/X86/no-sse-x86.ll
The file was modifiedllvm/lib/Target/X86/X86CallingConv.td
The file was addedllvm/test/CodeGen/X86/no-sse-win64.ll
The file was removedllvm/test/CodeGen/X86/nosse-error2.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 0f9cf42facaf9eff47dc0b9eb7e6ed8803d3bc3b by rnk
Allow /D flags absent during PCH creation under msvc-compat
Summary: Before this patch adding a new /D flag when compiling a source
file that consumed a PCH with clang-cl would issue a diagnostic and then
fail.  With the patch, the diagnostic is still issued but the definition
is accepted.  This matches the msvc behavior.  The fuzzy-pch-msvc.c is a
clone of the existing fuzzy-pch.c tests with some msvc specific rework.
msvc diagnostic:
warning C4605: '/DBAR=int' specified on current command line, but was
not specified when precompiled header was built
Output of the CHECK-BAR test prior to the code change:
<built-in>(1,9): warning: definition of macro 'BAR' does not match
definition in precompiled header [-Wclang-cl-pch]
#define BAR int
         ^
D:\repos\llvm\llvm-project\clang\test\PCH\fuzzy-pch-msvc.c(12,1):
error: unknown type name 'BAR'
BAR bar = 17;
^
D:\repos\llvm\llvm-project\clang\test\PCH\fuzzy-pch-msvc.c(23,4):
error: BAR was not defined
#  error BAR was not defined
    ^
1 warning and 2 errors generated.
Reviewers: rnk, thakis, hans, zturner
Subscribers: mikerice, aganea, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72405
The file was addedclang/test/PCH/ms-pch-macro.c
The file was modifiedclang/lib/Lex/PPDirectives.cpp
Commit 8e780252a7284be45cf1ba224cabd884847e8e92 by rnk
[X86] ABI compat bugfix for MSVC vectorcall
Summary: Before this change, X86_32ABIInfo::classifyArgument would be
called twice on vector arguments to vectorcall functions. This function
has side effects to track GPR register usage, and this would lead to
incorrect GPR usage in some cases.  The specific case I noticed is from
running out of XMM registers with mixed FP and vector arguments and no
aggregates of any kind. Consider this prototype:
  void __vectorcall vectorcall_indirect_vec(
     double xmm0, double xmm1, double xmm2, double xmm3, double xmm4,
     __m128 xmm5,
     __m128 ecx,
     int edx,
     __m128 mem);
classifyArgument has no effects when called on a plain FP type, but when
called on a vector type, it modifies FreeRegs to model GPR consumption.
However, this should not happen during the vector call first pass.
I refactored the code to unify vectorcall HVA logic with regcall HVA
logic. The conventions pass HVAs in registers differently (expanded vs.
not expanded), but if they do not fit in registers, they both pass them
indirectly by address.
Reviewers: erichkeane, craig.topper
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72110
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
The file was modifiedclang/test/CodeGen/vectorcall.c
The file was modifiedclang/include/clang/CodeGen/CGFunctionInfo.h
Commit ff1e0fce817e01f0288fad6a2607dd173180aabd by saar
[Concepts] Type Constraints
Add support for type-constraints in template type parameters. Also add
support for template type parameters as pack expansions (where the type
constraint can now contain an unexpanded parameter pack).
Differential Revision: https://reviews.llvm.org/D44352
The file was modifiedclang/lib/Sema/SemaTemplateDeduction.cpp
The file was modifiedclang/include/clang/AST/RecursiveASTVisitor.h
The file was modifiedclang/lib/Serialization/ASTWriterDecl.cpp
The file was modifiedclang/lib/Sema/SemaCodeComplete.cpp
The file was modifiedclang/lib/Serialization/ASTReaderStmt.cpp
The file was modifiedclang/lib/AST/ODRHash.cpp
The file was modifiedclang/include/clang/AST/ASTConcept.h
The file was addedclang/test/Parser/cxx2a-constrained-template-param-with-partial-id.cpp
The file was modifiedclang/lib/Parse/ParseExprCXX.cpp
The file was modifiedclang/lib/Serialization/ASTWriterStmt.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was addedclang/test/SemaTemplate/instantiate-expanded-type-constraint.cpp
The file was modifiedclang/include/clang/Basic/TokenKinds.def
The file was modifiedclang/lib/Sema/SemaTemplate.cpp
The file was addedclang/test/CXX/temp/temp.constr/temp.constr.decl/p3.cpp
The file was modifiedclang/lib/Parse/ParseTemplate.cpp
The file was modifiedclang/lib/AST/ExprCXX.cpp
The file was modifiedclang/lib/Parse/ParseDecl.cpp
The file was modifiedclang/lib/Serialization/ASTReaderDecl.cpp
The file was modifiedclang/include/clang/AST/ASTContext.h
The file was modifiedclang/lib/AST/ASTImporter.cpp
The file was modifiedclang/include/clang/AST/ASTNodeTraverser.h
The file was modifiedclang/include/clang/Sema/ParsedTemplate.h
The file was modifiedclang/lib/AST/TextNodeDumper.cpp
The file was addedclang/test/CXX/temp/temp.arg/temp.arg.template/p3-2a.cpp
The file was modifiedclang/test/CXX/temp/temp.constr/temp.constr.decl/class-template-decl.cpp
The file was modifiedclang/lib/Sema/TreeTransform.h
The file was modifiedclang/lib/AST/DeclTemplate.cpp
The file was addedclang/test/CXX/temp/temp.param/p10-2a.cpp
The file was modifiedclang/include/clang/AST/DeclTemplate.h
The file was modifiedclang/lib/Sema/SemaType.cpp
The file was modifiedclang/tools/libclang/CIndex.cpp
The file was modifiedclang/include/clang/AST/ExprCXX.h
The file was modifiedclang/lib/AST/DeclPrinter.cpp
The file was modifiedclang/test/SemaTemplate/ms-delayed-default-template-args.cpp
The file was addedclang/test/Parser/cxx2a-constrained-template-param.cpp
The file was modifiedclang/include/clang/Parse/Parser.h
Commit 1a7398eca2040d232149f18a75b5d78a6521941c by listmail
[BranchAlign] Add master --x86-branches-within-32B-boundaries flag
This flag was originally part of D70157, but was removed as we carved
away pieces of the review. Since we have the nop support checked in, and
it appears mature(*), I think it's time to add the master flag. For now,
it will default to nop padding, but once the prefix padding support
lands, we'll update the defaults.
(*) I can now confirm that downstream testing of the changes which have
landed to date - nop padding and compiler support for suppressions - is
passing all of the functional testing we've thrown at it. There might
still be something lurking, but we've gotten enough coverage to be
confident of the basic approach.
Note that the new flag can be used either when assembling an .s file, or
when using the integrated assembler directly from the compiler. The
later will use all of the suppression mechanism and should always
generate correct code. We don't yet have assembly syntax for the
suppressions, so passing this directly to the assembler w/a raw .s file
may result in broken code. Use at your own risk.
Also note that this isn't the wiring for the clang option. I think the
most recent review for that is D72227, but I've lost track, so that
might be off.
Differential Revision: https://reviews.llvm.org/D72738
The file was modifiedllvm/test/MC/X86/align-branch-64-1a.s
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Commit aca3e70d2bc0dd89b7d486c2a8eac70d8a89e790 by hstong
DWARFDebugLine.cpp: Restore LF line endings
rG7e02406f6cf180a8c89ce64665660e7cc9dbc23e switched the file to CRLF
line endings.
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
Commit c6e69880ae4d9ce4d27bf046292a0a20c3ab3540 by douglas.yung
Modify test to use -S instead of -c so that it works when an external
assembler is used that is not present.
The file was modifiedclang/test/Driver/cc1-spawnprocess.c
Commit 1b5404aff37953ce4c10191d04872ed7c2dc6548 by richard
PR44540: Prefer an inherited default constructor over an initializer
list constructor when initializing from {}.
We would previously pick between calling an initializer list constructor
and calling a default constructor unstably in this situation, depending
on whether the inherited default constructor had already been used
elsewhere in the program.
The file was modifiedclang/lib/AST/DeclCXX.cpp
The file was modifiedclang/lib/Sema/SemaInit.cpp
The file was modifiedclang/test/CXX/dcl.decl/dcl.init/dcl.init.list/p3.cpp
Commit 0dbcb3639451a7c20e2d5133b459552281e64455 by tstellar
CMake: Make most target symbols hidden by default
Summary: For builds with LLVM_BUILD_LLVM_DYLIB=ON and
BUILD_SHARED_LIBS=OFF this change makes all symbols in the target
specific libraries hidden by default.
A new macro called LLVM_EXTERNAL_VISIBILITY has been added to mark
symbols in these libraries public, which is mainly needed for the
definitions of the LLVMInitialize* functions.
This patch reduces the number of public symbols in libLLVM.so by about
25%.  This should improve load times for the dynamic library and also
make abi checker tools, like abidiff require less memory when analyzing
libLLVM.so
One side-effect of this change is that for builds with
LLVM_BUILD_LLVM_DYLIB=ON and LLVM_LINK_LLVM_DYLIB=ON some unittests that
access symbols that are no longer public will need to be statically
linked.
Before and after public symbol counts (using gcc 8.2.1, ld.bfd 2.31.1):
nm before/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l 36221 nm
after/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l 26278
Reviewers: chandlerc, beanz, mgorny, rnk, hans
Reviewed By: rnk, hans
Subscribers: merge_guards_bot, luismarques, smeenai, ldionne, lenary,
s.egerton, pzheng, sameer.abuasal, MaskRay, wuzish, echristo, Jim,
hiraditya, michaelplatings, chapuni, jholewinski, arsenm, dschuff,
jyknight, dylanmckay, sdardis, nemanjai, jvesely, javed.absar, sbc100,
jgravelle-google, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso,
simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones,
mgrang, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX,
jocewei, kristina, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D54439
The file was modifiedllvm/lib/Target/XCore/TargetInfo/XCoreTargetInfo.cpp
The file was modifiedllvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
The file was modifiedllvm/unittests/tools/llvm-exegesis/ARM/CMakeLists.txt
The file was modifiedllvm/lib/Target/Lanai/LanaiTargetMachine.cpp
The file was modifiedllvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
The file was modifiedllvm/lib/Target/XCore/XCoreTargetMachine.cpp
The file was modifiedllvm/lib/Target/CMakeLists.txt
The file was modifiedllvm/lib/Target/Mips/MipsAsmPrinter.cpp
The file was modifiedllvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp
The file was modifiedllvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
The file was modifiedllvm/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp
The file was modifiedllvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp
The file was modifiedllvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/ARC/ARCTargetMachine.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
The file was modifiedllvm/lib/Target/AVR/AVRAsmPrinter.cpp
The file was modifiedllvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
The file was modifiedllvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
The file was modifiedllvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
The file was modifiedllvm/lib/Target/MSP430/MSP430TargetMachine.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
The file was modifiedllvm/lib/Target/MSP430/TargetInfo/MSP430TargetInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86AsmPrinter.cpp
The file was modifiedllvm/lib/Target/Mips/MipsTargetMachine.cpp
The file was modifiedllvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetMachine.cpp
The file was modifiedllvm/lib/Target/Lanai/TargetInfo/LanaiTargetInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
The file was modifiedllvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
The file was modifiedllvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
The file was modifiedllvm/unittests/Target/WebAssembly/CMakeLists.txt
The file was modifiedllvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
The file was modifiedllvm/lib/Target/ARC/ARCAsmPrinter.cpp
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
The file was modifiedllvm/lib/Target/XCore/XCoreAsmPrinter.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetMachine.cpp
The file was modifiedllvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
The file was modifiedllvm/unittests/tools/llvm-exegesis/X86/CMakeLists.txt
The file was modifiedllvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
The file was modifiedllvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
The file was modifiedllvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMAsmPrinter.cpp
The file was modifiedllvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
The file was modifiedllvm/unittests/tools/llvm-exegesis/Mips/CMakeLists.txt
The file was modifiedllvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
The file was modifiedllvm/lib/Target/RISCV/TargetInfo/RISCVTargetInfo.cpp
The file was modifiedllvm/lib/Target/NVPTX/TargetInfo/NVPTXTargetInfo.cpp
The file was modifiedllvm/include/llvm/Support/Compiler.h
The file was modifiedllvm/lib/Target/Sparc/SparcTargetMachine.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetMachine.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was modifiedllvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
The file was modifiedllvm/lib/Target/Sparc/TargetInfo/SparcTargetInfo.cpp
The file was modifiedllvm/utils/unittest/CMakeLists.txt
The file was modifiedllvm/unittests/tools/llvm-exegesis/PowerPC/CMakeLists.txt
The file was modifiedllvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVTarge