FailedChanges

Summary

  1. [x86] add tests for fneg IR with undef; NFC
  2. [AArch64][GlobalISel] Use fcsel instead of csel for G_SELECT on FPRs This saves us some unnecessary copies. If the inputs to a G_SELECT are floating point, we should use fcsel rather than csel. Changes here are... - Teach selectCopy about s1-to-s1 copies across register banks. - AArch64RegisterBankInfo about G_SELECT in general. - Teach the instruction selector about the FCSEL instructions. Also add two tests: - select-select.mir to show that we get the expected FCSEL - regbank-select.mir (unfortunately named) to show the register banks on G_SELECT are properly preserved And update fast-isel-select.ll to show that we do the same thing as other instruction selectors in these cases.
Revision 359941 by spatel:
[x86] add tests for fneg IR with undef; NFC
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/CodeGen/X86/vec_fneg.lltrunk/test/CodeGen/X86/vec_fneg.ll
Revision 359940 by paquette:
[AArch64][GlobalISel] Use fcsel instead of csel for G_SELECT on FPRs

This saves us some unnecessary copies.

If the inputs to a G_SELECT are floating point, we should use fcsel rather than
csel.

Changes here are...

- Teach selectCopy about s1-to-s1 copies across register banks.
- AArch64RegisterBankInfo about G_SELECT in general.
- Teach the instruction selector about the FCSEL instructions.

Also add two tests:

- select-select.mir to show that we get the expected FCSEL
- regbank-select.mir (unfortunately named) to show the register banks on
G_SELECT are properly preserved

And update fast-isel-select.ll to show that we do the same thing as other
instruction selectors in these cases.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpptrunk/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was modified/llvm/trunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpptrunk/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
The file was added/llvm/trunk/test/CodeGen/AArch64/GlobalISel/regbank-select.mirtrunk/test/CodeGen/AArch64/GlobalISel/regbank-select.mir
The file was added/llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-select.mirtrunk/test/CodeGen/AArch64/GlobalISel/select-select.mir
The file was modified/llvm/trunk/test/CodeGen/AArch64/fast-isel-select.lltrunk/test/CodeGen/AArch64/fast-isel-select.ll