SuccessChanges

Summary

  1. [AMDGPU] Change register type for v32 vectors When it is AReg_1024 this results in unnecessary copying into AGPRs of a 32 element vectors even though they are not intended for an mfma instruction. Differential Revision: https://reviews.llvm.org/D64815
Revision 366252 by rampitec:
[AMDGPU] Change register type for v32 vectors

When it is AReg_1024 this results in unnecessary copying into
AGPRs of a 32 element vectors even though they are not intended
for an mfma instruction.

Differential Revision: https://reviews.llvm.org/D64815
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp (diff)llvm.src/lib/Target/AMDGPU/SIISelLowering.cpp
The file was added/llvm/trunk/test/CodeGen/AMDGPU/v1024.llllvm.src/test/CodeGen/AMDGPU/v1024.ll