Started 3 mo 29 days ago
Took 37 min on green-dragon-03

Success Build rL:366819 - C:366818 - #63437 (Jul 23, 2019 9:22:41 AM)

Revisions
  • http://llvm.org/svn/llvm-project/llvm/trunk : 366819
  • http://llvm.org/svn/llvm-project/cfe/trunk : 366818
Changes
  1. [GlobalISel][AArch64] Teach GISel to handle shifts in load addressing modes

    When we select the XRO variants of loads, we can pull in very specific shifts
    (of the size of an element). E.g.

    ```
    ldr x1, [x2, x3, lsl #3]
    ```

    This teaches GISel to handle these when they're coming from shifts
    specifically.

    This adds a new addressing mode function, `selectAddrModeShiftedExtendXReg`
    which recognizes this pattern.

    This also packs this up with `selectAddrModeRegisterOffset` into
    `selectAddrModeXRO`. This is intended to be equivalent to `selectAddrModeXRO`
    in AArch64ISelDAGtoDAG.

    Also update load-addressing-modes to show that all of the cases here work.

    Differential Revision: https://reviews.llvm.org/D65119 (detail/ViewSVN)
    by paquette
  2. [ASTImporter] Fix inequivalence of ClassTemplateInstantiations

    Summary:
    We falsely state inequivalence if the template parameter is a
    qualified/nonquialified template in the first/second instantiation.
    Also, different kinds of TemplateName should be equal if the template
    decl (if available) is equal (even if the name kind is different).

    Reviewers: a_sidorin, a.sidorin

    Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, cfe-commits

    Tags: #clang

    Differential Revision: https://reviews.llvm.org/D64241 (detail/ViewSVN)
    by martong
  3. [TargetLowering] SimplifyMultipleUseDemandedBits - add VECTOR_SHUFFLE support.

    If all the demanded elts are from one operand and are inline, then we can use the operand directly.

    The changes are mainly from SSE41 targets which has blendvpd but not cmpgtq, allowing the v2i64 comparison to be simplified as we only need the signbit from alternate v4i32 elements. (detail/ViewSVN)
    by rksimon

Started by an SCM change (4 times)

This run spent:

  • 1 hr 2 min waiting;
  • 37 min build duration;
  • 1 hr 40 min total from scheduled to completion.
LLVM/Clang Warnings: 0 warnings.
  • No warnings since build 63,435.
  • Still 22 days before reaching the previous zero warnings highscore.
Test Result (no failures)