SuccessChanges

Summary

  1. clang-tidy and clang-query wont crash with invalid command line options (details)
  2. Change some extraneous /// comments to // comments inside methods. NFC. (details)
  3. [X86][AVX] combineX86ShufflesRecursively - peekThroughOneUseBitcasts subvector before widening. (details)
  4. [X86][AVX] Reduce unary target shuffles width if the upper elements aren't demanded. (details)
  5. [X86] Rewrite how X86PartialReduction finds candidates to consider optimizing. (details)
Commit 5952125691571de9bd817551fb1baabe270e73f9 by n.james93
clang-tidy and clang-query wont crash with invalid command line options

Motivated by [[ https://bugs.llvm.org/show_bug.cgi?id=46141 | clang-tidy crashed for unknown command line argument. ]]

Reviewed By: aaron.ballman, thakis

Differential Revision: https://reviews.llvm.org/D80879
The file was addedclang-tools-extra/test/clang-query/invalid-command-line.cpp
The file was modifiedclang-tools-extra/clang-query/tool/ClangQuery.cpp (diff)
The file was modifiedclang-tools-extra/clang-tidy/tool/ClangTidyMain.cpp (diff)
The file was addedclang-tools-extra/test/clang-tidy/infrastructure/invalid-command-line.cpp
Commit 0cf5ef176b5222b6ee8825a2e4ec843dd7152b46 by clattner
Change some extraneous /// comments to // comments inside methods. NFC.
The file was modifiedmlir/lib/Transforms/DialectConversion.cpp (diff)
Commit 8f2f613a6ecc75d592e9bd379b20b95790c00827 by llvm-dev
[X86][AVX] combineX86ShufflesRecursively - peekThroughOneUseBitcasts subvector before widening.

This matches what we do for the full sized vector ops at the start of combineX86ShufflesRecursively, and helps getFauxShuffleMask extract more INSERT_SUBVECTOR patterns.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-mul.ll (diff)
Commit 22e50833e9564f6be75fcbbabe9d75ca745e778d by llvm-dev
[X86][AVX] Reduce unary target shuffles width if the upper elements aren't demanded.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-mul.ll (diff)
Commit 8abe830093f65a0fc6ba398ee1786d4d96607fdf by craig.topper
[X86] Rewrite how X86PartialReduction finds candidates to consider optimizing.

Previously we walked the users of any vector binop looking for
more binops with the same opcode or phis that eventually ended up
in a reduction. While this is simple it also means visiting the
same nodes many times since we'll do a forward walk for each
BinaryOperator in the chain. It was also far more general than what
we have tests for or expect to see.

This patch replaces the algorithm with a new method that starts at
extract elements looking for a horizontal reduction. Once we find
a reduction we walk through backwards through phis and adds to
collect leaves that we can consider for rewriting.

We only consider single use adds and phis. Except for a special
case if the Add is used by a phi that forms a loop back to the
Add. Including other single use Adds to support unrolled loops.

Ultimately, I want to narrow the Adds, Phis, and final reduction
based on the partial reduction we're doing. I still haven't
figured out exactly what that looks like yet. But restricting
the types of graphs we expect to handle seemed like a good first
step. As does having all the leaves and the reduction at once.

Differential Revision: https://reviews.llvm.org/D79971
The file was modifiedllvm/test/CodeGen/X86/madd.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/sad.ll (diff)
The file was modifiedllvm/lib/Target/X86/X86PartialReduction.cpp (diff)