SuccessChanges

Summary

  1. Revert "Separate the Registration from Loading dialects in the Context" (details)
  2. Separate the Registration from Loading dialects in the Context (details)
  3. Reland "[TSan][libdispatch] Add interceptors for dispatch_async_and_wait()" (details)
  4. [TSan][libdispatch] Ensure TSan dylib works on old systems (details)
  5. [TSan][libdispatch] Guard test execution on old platforms (details)
  6. [mlir] [VectorOps] Cleanup mask 1-d test on constants (details)
  7. [AMDGPU] Support disassembly for AMDGPU kernel descriptors (details)
  8. [HIP] Support target id by --offload-arch (details)
  9. [gn build] Port 7546b29e761 (details)
  10. Fix test hip-target-id.hip (details)
  11. [Attributor][NFC] Add tests to range.ll (details)
  12. [X86][Driver] Remove code that forced a core2 mtune from MachO::TranslateArgs. (details)
  13. [SVE][CodeGen] Fix scalable vector issues in DAGTypeLegalizer::GenWidenVectorLoads (details)
  14. [AST] Fix a crash on mangling a binding decl from a DeclRefExpr. (details)
  15. Convert SVE macros into c++ constants and inlines (details)
  16. [LLDB] NativeThreadLinux invalidate register cache on stop (details)
  17. [clang] Remove stray semicolons, fixing GCC warnings. NFC. (details)
  18. Revert "[AMDGPU] Support disassembly for AMDGPU kernel descriptors" (details)
  19. [DSE,MemorySSA] Use NumRedundantStores instead of NumNoopStores. (details)
  20. [GlobalISel] Don't skip adding predicate matcher (details)
  21. [utils] Fix regexp in llvm/utils/extract_vplan.py to extract VPlans. (details)
  22. [RISCV] add the assemble and disassemble support of Zvlsseg instructions (details)
Commit e75bc5c791e0e8dbe79f7453e55af9e8d03c9cc0 by joker.eph
Revert "Separate the Registration from Loading dialects in the Context"

This reverts commit d14cf45735b0d09d7d3caf0824779520dd20ef10.
The build is broken with GCC-5.
The file was modifiedmlir/examples/toy/Ch3/toyc.cpp
The file was modifiedmlir/lib/Conversion/PassDetail.h
The file was modifiedmlir/tools/mlir-tblgen/PassGen.cpp
The file was modifiedmlir/unittests/Dialect/Quant/QuantizationUtilsTest.cpp
The file was modifiedmlir/include/mlir/Pass/PassBase.td
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
The file was modifiedmlir/test/lib/Transforms/TestGpuMemoryPromotion.cpp
The file was modifiedmlir/include/mlir/Pass/Pass.h
The file was modifiedmlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
The file was modifiedmlir/test/lib/Transforms/TestLinalgHoisting.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.td
The file was modifiedmlir/lib/Support/MlirOptMain.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
The file was modifiedmlir/lib/Parser/DialectSymbolParser.cpp
The file was modifiedmlir/lib/IR/Operation.cpp
The file was modifiedmlir/examples/toy/Ch2/toyc.cpp
The file was modifiedmlir/lib/Pass/PassDetail.h
The file was modifiedmlir/lib/IR/Verifier.cpp
The file was modifiedmlir/include/mlir/IR/OpBase.td
The file was modifiedmlir/examples/toy/Ch5/toyc.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestPatterns.cpp
The file was modifiedmlir/test/CAPI/ir.c
The file was modifiedmlir/examples/toy/Ch7/toyc.cpp
The file was modifiedmlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp
The file was modifiedmlir/test/lib/Dialect/Affine/TestVectorizationUtils.cpp
The file was modifiedmlir/test/lib/Transforms/TestBufferPlacement.cpp
The file was modifiedmlir/test/lib/Dialect/SPIRV/TestAvailability.cpp
The file was modifiedmlir/tools/mlir-opt/mlir-opt.cpp
The file was modifiedmlir/examples/toy/Ch4/toyc.cpp
The file was modifiedmlir/lib/Dialect/SDBM/SDBMExpr.cpp
The file was modifiedmlir/test/SDBM/sdbm-api-test.cpp
The file was modifiedmlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp
The file was modifiedmlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp
The file was modifiedmlir/lib/Dialect/Affine/Transforms/PassDetail.h
The file was modifiedmlir/lib/Parser/Parser.cpp
The file was modifiedmlir/lib/TableGen/Pass.cpp
The file was modifiedmlir/examples/toy/Ch7/mlir/LowerToAffineLoops.cpp
The file was modifiedmlir/include/mlir/InitAllTranslations.h
The file was modifiedmlir/test/mlir-opt/commandline.mlir
The file was modifiedmlir/include/mlir/TableGen/Pass.h
The file was modifiedmlir/include/mlir/IR/MLIRContext.h
The file was modifiedmlir/tools/mlir-translate/mlir-translate.cpp
The file was modifiedmlir/include/mlir/Conversion/Passes.td
The file was modifiedmlir/lib/CAPI/IR/IR.cpp
The file was modifiedmlir/lib/Conversion/GPUToVulkan/ConvertGPULaunchFuncToVulkanLaunchFunc.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h
The file was modifiedmlir/include/mlir/Transforms/Passes.td
The file was modifiedmlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp
The file was modifiedmlir/examples/standalone/standalone-opt/standalone-opt.cpp
The file was modifiedmlir/lib/Pass/Pass.cpp
The file was modifiedmlir/include/mlir/IR/Dialect.h
The file was modifiedmlir/unittests/Pass/AnalysisManagerTest.cpp
The file was modifiedmlir/lib/Transforms/PassDetail.h
The file was modifiedmlir/examples/toy/Ch5/mlir/LowerToAffineLoops.cpp
The file was modifiedmlir/unittests/Dialect/SPIRV/SerializationTest.cpp
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/PassDetail.h
The file was modifiedmlir/lib/TableGen/Dialect.cpp
The file was modifiedmlir/unittests/IR/DialectTest.cpp
The file was modifiedmlir/test/lib/Transforms/TestLinalgTransforms.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestDialect.h
The file was modifiedmlir/include/mlir/InitAllDialects.h
The file was modifiedmlir/unittests/TableGen/StructsGenTest.cpp
The file was modifiedmlir/examples/standalone/test/Standalone/standalone-opt.mlir
The file was modifiedmlir/lib/Dialect/SCF/Transforms/PassDetail.h
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
The file was modifiedmlir/unittests/Dialect/SPIRV/DeserializationTest.cpp
The file was modifiedmlir/include/mlir/Dialect/SCF/Passes.td
The file was modifiedmlir/unittests/IR/OperationSupportTest.cpp
The file was modifiedmlir/examples/toy/Ch6/mlir/LowerToAffineLoops.cpp
The file was modifiedmlir/include/mlir/IR/FunctionSupport.h
The file was modifiedmlir/lib/CAPI/Registration/Registration.cpp
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/lib/IR/MLIRContext.cpp
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/LegalizeStandardForSPIRV.cpp
The file was modifiedmlir/include/mlir/Dialect/Affine/Passes.td
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h
The file was modifiedmlir/include/mlir/Support/MlirOptMain.h
The file was modifiedmlir/test/lib/Dialect/Test/TestDialect.cpp
The file was modifiedmlir/unittests/TableGen/OpBuildGen.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
The file was modifiedmlir/tools/mlir-tblgen/DialectGen.cpp
The file was modifiedmlir/include/mlir/TableGen/Dialect.h
The file was modifiedmlir/lib/ExecutionEngine/JitRunner.cpp
The file was modifiedmlir/unittests/SDBM/SDBMTest.cpp
The file was modifiedmlir/lib/Parser/AttributeParser.cpp
The file was modifiedmlir/include/mlir-c/Registration.h
The file was modifiedmlir/test/lib/Transforms/TestAllReduceLowering.cpp
The file was modifiedmlir/test/EDSC/builder-api-test.cpp
The file was modifiedmlir/lib/IR/Dialect.cpp
The file was modifiedmlir/unittests/IR/AttributeTest.cpp
The file was modifiedmlir/examples/toy/Ch6/toyc.cpp
The file was modifiedmlir/include/mlir/Pass/PassManager.h
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
The file was modifiedmlir/test/lib/Transforms/TestVectorTransforms.cpp
Commit f9dc2b7079350d0fed3bb3775f496b90483c9e42 by joker.eph
Separate the Registration from Loading dialects in the Context

This changes the behavior of constructing MLIRContext to no longer load globally
registered dialects on construction. Instead Dialects are only loaded explicitly
on demand:
- the Parser is lazily loading Dialects in the context as it encounters them
during parsing. This is the only purpose for registering dialects and not load
them in the context.
- Passes are expected to declare the dialects they will create entity from
(Operations, Attributes, or Types), and the PassManager is loading Dialects into
the Context when starting a pipeline.

This changes simplifies the configuration of the registration: a compiler only
need to load the dialect for the IR it will emit, and the optimizer is
self-contained and load the required Dialects. For example in the Toy tutorial,
the compiler only needs to load the Toy dialect in the Context, all the others
(linalg, affine, std, LLVM, ...) are automatically loaded depending on the
optimization pipeline enabled.

To adjust to this change, stop using the existing dialect registration: the
global registry will be removed soon.

1) For passes, you need to override the method:

virtual void getDependentDialects(DialectRegistry &registry) const {}

and registery on the provided registry any dialect that this pass can produce.
Passes defined in TableGen can provide this list in the dependentDialects list
field.

2) For dialects, on construction you can register dependent dialects using the
provided MLIRContext: `context.getOrLoadDialect<DialectName>()`
This is useful if a dialect may canonicalize or have interfaces involving
another dialect.

3) For loading IR, dialect that can be in the input file must be explicitly
registered with the context. `MlirOptMain()` is taking an explicit registry for
this purpose. See how the standalone-opt.cpp example is setup:

  mlir::DialectRegistry registry;
  registry.insert<mlir::standalone::StandaloneDialect>();
  registry.insert<mlir::StandardOpsDialect>();

Only operations from these two dialects can be in the input file. To include all
of the dialects in MLIR Core, you can populate the registry this way:

  mlir::registerAllDialects(registry);

4) For `mlir-translate` callback, as well as frontend, Dialects can be loaded in
the context before emitting the IR: context.getOrLoadDialect<ToyDialect>()

Differential Revision: https://reviews.llvm.org/D85622
The file was modifiedmlir/tools/mlir-opt/mlir-opt.cpp
The file was modifiedmlir/include/mlir/Pass/PassManager.h
The file was modifiedmlir/test/lib/Transforms/TestLinalgHoisting.cpp
The file was modifiedmlir/test/mlir-opt/commandline.mlir
The file was modifiedmlir/lib/CAPI/Registration/Registration.cpp
The file was modifiedmlir/examples/toy/Ch6/toyc.cpp
The file was modifiedmlir/include/mlir/Support/MlirOptMain.h
The file was modifiedmlir/unittests/IR/OperationSupportTest.cpp
The file was modifiedmlir/unittests/IR/DialectTest.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h
The file was modifiedmlir/lib/Dialect/Affine/Transforms/PassDetail.h
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
The file was modifiedmlir/include/mlir/Dialect/SCF/Passes.td
The file was modifiedmlir/unittests/TableGen/OpBuildGen.cpp
The file was modifiedmlir/lib/Conversion/PassDetail.h
The file was modifiedmlir/include/mlir/InitAllDialects.h
The file was modifiedmlir/test/lib/Transforms/TestVectorTransforms.cpp
The file was modifiedmlir/unittests/IR/AttributeTest.cpp
The file was modifiedmlir/include/mlir/IR/FunctionSupport.h
The file was modifiedmlir/lib/IR/Dialect.cpp
The file was modifiedmlir/lib/Transforms/PassDetail.h
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
The file was modifiedmlir/include/mlir/Pass/Pass.h
The file was modifiedmlir/examples/toy/Ch7/mlir/LowerToAffineLoops.cpp
The file was modifiedmlir/lib/CAPI/IR/IR.cpp
The file was modifiedmlir/test/lib/Transforms/TestGpuMemoryPromotion.cpp
The file was modifiedmlir/examples/toy/Ch3/toyc.cpp
The file was modifiedmlir/include/mlir-c/Registration.h
The file was modifiedmlir/include/mlir/Conversion/Passes.td
The file was modifiedmlir/tools/mlir-translate/mlir-translate.cpp
The file was modifiedmlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp
The file was modifiedmlir/include/mlir/TableGen/Pass.h
The file was modifiedmlir/unittests/Dialect/Quant/QuantizationUtilsTest.cpp
The file was modifiedmlir/lib/IR/Verifier.cpp
The file was modifiedmlir/examples/standalone/test/Standalone/standalone-opt.mlir
The file was modifiedmlir/examples/toy/Ch6/mlir/LowerToAffineLoops.cpp
The file was modifiedmlir/lib/TableGen/Dialect.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
The file was modifiedmlir/lib/Conversion/GPUToVulkan/ConvertGPULaunchFuncToVulkanLaunchFunc.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
The file was modifiedmlir/include/mlir/InitAllTranslations.h
The file was modifiedmlir/lib/Parser/AttributeParser.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestDialect.cpp
The file was modifiedmlir/lib/Parser/Parser.cpp
The file was modifiedmlir/test/lib/Dialect/Affine/TestVectorizationUtils.cpp
The file was modifiedmlir/test/CAPI/ir.c
The file was modifiedmlir/lib/IR/Operation.cpp
The file was modifiedmlir/examples/standalone/standalone-opt/standalone-opt.cpp
The file was modifiedmlir/unittests/SDBM/SDBMTest.cpp
The file was modifiedmlir/test/EDSC/builder-api-test.cpp
The file was modifiedmlir/examples/toy/Ch2/toyc.cpp
The file was modifiedmlir/test/lib/Transforms/TestAllReduceLowering.cpp
The file was modifiedmlir/test/lib/Transforms/TestLinalgTransforms.cpp
The file was modifiedmlir/lib/TableGen/Pass.cpp
The file was modifiedmlir/include/mlir/Dialect/Affine/Passes.td
The file was modifiedmlir/include/mlir/IR/MLIRContext.h
The file was modifiedmlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp
The file was modifiedmlir/lib/Parser/DialectSymbolParser.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestPatterns.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestDialect.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/PassDetail.h
The file was modifiedmlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
The file was modifiedmlir/lib/Pass/PassDetail.h
The file was modifiedmlir/tools/mlir-tblgen/PassGen.cpp
The file was modifiedmlir/include/mlir/Transforms/Passes.td
The file was modifiedmlir/examples/toy/Ch7/toyc.cpp
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/unittests/Dialect/SPIRV/DeserializationTest.cpp
The file was modifiedmlir/examples/toy/Ch5/toyc.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h
The file was modifiedmlir/include/mlir/IR/Dialect.h
The file was modifiedmlir/include/mlir/TableGen/Dialect.h
The file was modifiedmlir/test/SDBM/sdbm-api-test.cpp
The file was modifiedmlir/unittests/Pass/AnalysisManagerTest.cpp
The file was modifiedmlir/lib/Dialect/SCF/Transforms/PassDetail.h
The file was modifiedmlir/lib/Pass/Pass.cpp
The file was modifiedmlir/lib/Support/MlirOptMain.cpp
The file was modifiedmlir/test/lib/Dialect/SPIRV/TestAvailability.cpp
The file was modifiedmlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp
The file was modifiedmlir/include/mlir/IR/OpBase.td
The file was modifiedmlir/unittests/Dialect/SPIRV/SerializationTest.cpp
The file was modifiedmlir/examples/toy/Ch4/toyc.cpp
The file was modifiedmlir/unittests/TableGen/StructsGenTest.cpp
The file was modifiedmlir/include/mlir/Pass/PassBase.td
The file was modifiedmlir/tools/mlir-tblgen/DialectGen.cpp
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/LegalizeStandardForSPIRV.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.td
The file was modifiedmlir/lib/IR/MLIRContext.cpp
The file was modifiedmlir/lib/ExecutionEngine/JitRunner.cpp
The file was modifiedmlir/examples/toy/Ch5/mlir/LowerToAffineLoops.cpp
The file was modifiedmlir/test/lib/Transforms/TestBufferPlacement.cpp
The file was modifiedmlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp
The file was modifiedmlir/lib/Dialect/SDBM/SDBMExpr.cpp
Commit 0c4863a253957db04549815be218237d6650e5be by julian.lettner
Reland "[TSan][libdispatch] Add interceptors for dispatch_async_and_wait()"

The linker errors caused by this revision have been addressed.

Add interceptors for `dispatch_async_and_wait[_f]()` which was added in
macOS 10.14.  This pair of functions is similar to `dispatch_sync()`,
but does not force a context switch of the queue onto the caller thread
when the queue is active (and hence is more efficient).  For TSan, we
can apply the same semantics as for `dispatch_sync()`.

From the header docs:
> Differences with dispatch_sync()
>
> When the runtime has brought up a thread to invoke the asynchronous
> workitems already submitted to the specified queue, that servicing
> thread will also be used to execute synchronous work submitted to the
> queue with dispatch_async_and_wait().
>
> However, if the runtime has not brought up a thread to service the
> specified queue (because it has no workitems enqueued, or only
> synchronous workitems), then dispatch_async_and_wait() will invoke the
> workitem on the calling thread, similar to the behaviour of functions
> in the dispatch_sync family.

Additional context:
> The guidance is to use `dispatch_async_and_wait()` instead of
> `dispatch_sync()` when it is necessary to mix async and sync calls on
> the same queue. `dispatch_async_and_wait()` does not guarantee
> execution on the caller thread which allows to reduce context switches
> when the target queue is active.
> https://gist.github.com/tclementdev/6af616354912b0347cdf6db159c37057

rdar://35757961

Reviewed By: kubamracek

Differential Revision: https://reviews.llvm.org/D85854
The file was addedcompiler-rt/test/tsan/libdispatch/async_and_wait.c
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_libdispatch.cpp
Commit 686fe293e6c5fd51fa0a3c86a43c2d9a652d53b1 by julian.lettner
[TSan][libdispatch] Ensure TSan dylib works on old systems

`dispatch_async_and_wait()` was introduced in macOS 10.14, which is
greater than our minimal deployment target.  We need to forward declare
it as a "weak import" to ensure we generate a weak reference so the TSan
dylib continues to work on older systems.  We cannot simply `#include
<dispatch.h>` or use the Darwin availability macros since this file is
multi-platform.

In addition, we want to prevent building these interceptors at all when
building with older SDKs because linking always fails.

Before:
```
➤ dyldinfo -bind ./lib/clang/12.0.0/lib/darwin/libclang_rt.tsan_osx_dynamic.dylib | grep dispatch_async_and_wait
__DATA  __interpose      0x000F5E68    pointer      0 libSystem        _dispatch_async_and_wait_f
```

After:
```
➤ dyldinfo -bind ./lib/clang/12.0.0/lib/darwin/libclang_rt.tsan_osx_dynamic.dylib | grep dispatch_async_and_wait
__DATA  __got            0x000EC0A8    pointer      0 libSystem        _dispatch_async_and_wait (weak import)
__DATA  __interpose      0x000F5E78    pointer      0 libSystem        _dispatch_async_and_wait (weak import)
```

This is a follow-up to D85854 and should fix:
https://reviews.llvm.org/D85854#2221529

Reviewed By: kubamracek

Differential Revision: https://reviews.llvm.org/D86103
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_libdispatch.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_dispatch_defs.h
Commit 40ae296bc39a2780ec4cd99edd87cce35585b9ad by julian.lettner
[TSan][libdispatch] Guard test execution on old platforms

`dispatch_async_and_wait()` was introduced in macOS 10.14.  Let's
forward declare it to ensure we can compile the test with older SDKs and
guard execution by checking if the symbol is available.  (We can't use
`__builtin_available()`, because that itself requires a higher minimum
deployment target.)  We also need to specify the `-undefined
dynamic_lookup` compiler flag.

Differential Revision: https://reviews.llvm.org/D85995
The file was modifiedcompiler-rt/test/tsan/libdispatch/async_and_wait.c
Commit 451dcfae31ee09f4a4a40476d3f36b784273fadc by ajcbik
[mlir] [VectorOps] Cleanup mask 1-d test on constants

I forgot to address this in previous CL. Sorry about that.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D86188
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp
Commit cacfb02d28a3cabd4e45d2535cb0686cef48a2c9 by RonakNilesh.Chauhan
[AMDGPU] Support disassembly for AMDGPU kernel descriptors

Decode AMDGPU Kernel descriptors as assembler directives.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D80713
The file was modifiedllvm/include/llvm/Support/AMDHSAKernelDescriptor.h
The file was addedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx9.s
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.cpp
The file was addedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-sgpr.s
The file was addedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx10.s
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was addedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-raw.s
The file was modifiedllvm/test/CodeGen/AMDGPU/nop-data.ll
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
The file was addedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-failure.s
The file was addedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-vgpr.s
Commit 7546b29e761687eeeaefcd8d963c19a2dac98d37 by Yaxun.Liu
[HIP] Support target id by --offload-arch

This patch introduces support of target id by
-offload-arch.

Differential Revision: https://reviews.llvm.org/D60620
The file was modifiedclang/include/clang/Basic/DiagnosticDriverKinds.td
The file was modifiedclang/lib/Driver/ToolChains/AMDGPU.h
The file was modifiedclang/lib/Basic/Targets/AMDGPU.cpp
The file was addedclang/test/Driver/hip-invalid-target-id.hip
The file was modifiedclang/lib/Basic/CMakeLists.txt
The file was modifiedllvm/lib/Support/TargetParser.cpp
The file was modifiedclang/test/Driver/amdgpu-macros.cl
The file was modifiedclang/include/clang/Basic/TargetInfo.h
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp
The file was addedclang/include/clang/Basic/TargetID.h
The file was addedclang/test/Driver/target-id-macros.hip
The file was addedclang/test/Driver/target-id.cl
The file was modifiedclang/include/clang/Driver/Options.td
The file was addedclang/test/Driver/hip-target-id.hip
The file was modifiedclang/test/Driver/amdgpu-features.c
The file was modifiedclang/lib/Driver/ToolChains/AMDGPU.cpp
The file was modifiedclang/lib/Driver/ToolChains/HIP.cpp
The file was addedclang/lib/Basic/TargetID.cpp
The file was modifiedllvm/include/llvm/Support/TargetParser.h
The file was modifiedclang/test/Driver/hip-toolchain-features.hip
The file was modifiedclang/test/Driver/amdgpu-mcpu.cl
The file was addedclang/test/Driver/target-id-macros.cl
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/lib/Driver/Driver.cpp
The file was modifiedclang/include/clang/Driver/Compilation.h
The file was modifiedclang/lib/Basic/Targets/AMDGPU.h
The file was addedclang/test/Driver/Inputs/rocm/amdgcn/bitcode/oclc_isa_version_908.bc
The file was addedclang/test/Driver/invalid-target-id.cl
Commit 9896546e8b0380cd16a10fe73005e3ac04e20755 by llvmgnsyncbot
[gn build] Port 7546b29e761
The file was modifiedllvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
Commit a11ab6e04c199c2a33d81c451e9e26bf18636dfc by Yaxun.Liu
Fix test hip-target-id.hip

Some build bot has lld in the directory name, which caused pattern match
issue in the list test.
The file was modifiedclang/test/Driver/hip-target-id.hip
Commit 21e4b9b204b4cc54a53e4fbe1e56d0828fc93d39 by okuraofvegetable
[Attributor][NFC] Add tests to range.ll

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D86128
The file was modifiedllvm/test/Transforms/Attributor/range.ll
Commit b32f203edc8579d4c0023007880293c3f9404fb7 by craig.topper
[X86][Driver] Remove code that forced a core2 mtune from MachO::TranslateArgs.

mtune was previously ignored by the compiler so I'm not sure this
did anything. But after D85384 we're starting to support mtune
and this code is now causing a couple test failures on MacOS.
The file was modifiedclang/lib/Driver/ToolChains/Darwin.cpp
Commit 3f36561f69fd62c3f96e3575835e86187889859d by david.sherwood
[SVE][CodeGen] Fix scalable vector issues in DAGTypeLegalizer::GenWidenVectorLoads

In DAGTypeLegalizer::GenWidenVectorLoads the algorithm assumes it only
ever deals with fixed width types, hence the offsets for each individual
store never take 'vscale' into account. I've changed the code in that
function to use TypeSize instead of unsigned for tracking the remaining
load amount. In addition, I've changed the load loop to use the new
IncrementPointer helper function for updating the addresses in each
iteration, since this handles scalable vector types.

Also, I've added report_fatal_errors in GenWidenVectorExtLoads,
TargetLowering::scalarizeVectorLoad and TargetLowering::scalarizeVectorStores,
since these functions currently use a sequence of element-by-element
scalar loads/stores. In a similar vein, I've also added a fatal error
report in FindMemType for the case when we decide to return the element
type for a scalable vector type.

I've added new tests in

  CodeGen/AArch64/sve-split-load.ll
  CodeGen/AArch64/sve-ld-addressing-mode-reg-imm.ll

for the changes in GenWidenVectorLoads.

Differential Revision: https://reviews.llvm.org/D85909
The file was modifiedllvm/test/CodeGen/AArch64/sve-split-load.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedllvm/include/llvm/Support/TypeSize.h
The file was modifiedllvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit 5b797eb5b4db1e5695f314b916ab3a79f3eda1e6 by hokein.wu
[AST] Fix a crash on mangling a binding decl from a DeclRefExpr.

Differential Revision: https://reviews.llvm.org/D86130
The file was modifiedclang/lib/AST/ItaniumMangle.cpp
The file was modifiedclang/test/CodeGenCXX/mangle.cpp
Commit 090306fc80dbf3e524d0ce4a7c39e0852f0ba144 by omair.javaid
Convert SVE macros into c++ constants and inlines

This patch updates LLDB's in house version of SVE ptrace/sig macros by
converting them into constants and inlines. They are housed under sve
namespace and are used by process elf-core for reading SVE register data.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D85641
The file was modifiedlldb/source/Plugins/Process/Utility/LinuxPTraceDefines_arm64sve.h
The file was modifiedlldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
Commit af4f40c376f5f05ec1b7cc72840518e917eaf091 by omair.javaid
[LLDB] NativeThreadLinux invalidate register cache on stop

In our discussion D79699 SVE ptrace register access support we decide to
invalidate register context cached data on every stop instead of doing
at before Step/Resume.

InvalidateAllRegisters was added to facilitate flushing of SVE register
context configuration and cached register values. It now makes more
sense to move invalidation after every stop where we initiate SVE
configuration update if needed by calling ConfigureRegisterContext.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D84501
The file was modifiedlldb/source/Plugins/Process/Linux/NativeThreadLinux.cpp
Commit cb6cf18ff5e0e5bb751e10549accc0f035f697ac by martin
[clang] Remove stray semicolons, fixing GCC warnings. NFC.
The file was modifiedclang/lib/Basic/TargetID.cpp
Commit fdf71d486c0f85dadea2b5e97b88d4a67e2be34c by RonakNilesh.Chauhan
Revert "[AMDGPU] Support disassembly for AMDGPU kernel descriptors"

This reverts commit cacfb02d28a3cabd4e45d2535cb0686cef48a2c9.

Reverting due to buildbot failures.
The file was modifiedllvm/include/llvm/Support/AMDHSAKernelDescriptor.h
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was removedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-failure.s
The file was modifiedllvm/test/CodeGen/AMDGPU/nop-data.ll
The file was removedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-vgpr.s
The file was removedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-raw.s
The file was removedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx9.s
The file was removedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx10.s
The file was removedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-sgpr.s
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
Commit 1a55fbceaaa2f1c9450e585577b7244eb9717b42 by flo
[DSE,MemorySSA] Use NumRedundantStores instead of NumNoopStores.

Legacy DSE uses NumRedundantStores, while MemorySSA DSE uses
NumNoopStores. We should just use the same counter.
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Commit 8351e80cd17b08ed1a95790eb61fc6f9b7084ba0 by Madhur.Amilkanthwar
[GlobalISel] Don't skip adding predicate matcher

This patch fixes a bug which skipped
adding predicate matcher for a pattern in many cases.
For example, if predicate is Load and
its memoryVT is non-null then the loop
continues and never reaches to the end which
adds the predicate matcher. This patch moves the
matcher addition to the top of the loop
so that it gets added regardless of contextual checks
later in the loop.
Other way to fix this issue is to remove all "continue" statements
in checks and let the loop continue till end.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D83034
The file was modifiedllvm/utils/TableGen/GlobalISelEmitter.cpp
The file was addedllvm/test/TableGen/ContextlessPredicates.td
Commit c78993955ebe2e27612f30022749c9d604a523b7 by flo
[utils] Fix regexp in llvm/utils/extract_vplan.py to extract VPlans.

Regarding this bug in Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=46451

I went ahead and fixed the regexp pattern and now Python script is able
to extract vplan graphs from the log files. Additionally some test for
this would be nice to have but I'm not sure are Python scripts tested
in LLVM and if so where they live.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D86068
The file was modifiedllvm/utils/extract_vplan.py
Commit 6c5039a10f339ecec1a6d342aa5b5721d12c3138 by 932494295
[RISCV] add the assemble and disassemble support of Zvlsseg instructions

This implements the assemble and disassemble support of RISCV Vector
extension Zvlsseg instructions, base on the 0.9 spec version.

Reviewed  by HsiangKai

Differential Revision: https://reviews.llvm.org/D84416
The file was modifiedllvm/lib/Target/RISCV/RISCVSchedRocket64.td
The file was addedllvm/test/MC/RISCV/rvv/zvlsseg.s
The file was modifiedllvm/lib/Target/RISCV/RISCVSchedRocket32.td
The file was modifiedllvm/lib/Target/RISCV/RISCVSubtarget.h
The file was modifiedllvm/lib/Target/RISCV/RISCV.td
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoV.td