SuccessChanges

Summary

  1. [ARM] Enabled VMLAV and Add instructions to use VMLAVA (details)
  2. [IR] Intrinsics default attributes and opt-out flag (details)
  3. [OpenMPOpt] ICV tracking for calls (details)
  4. [GlobalISel] Untabify InstructionSelectorImpl.h. NFC (details)
  5. [Clang][SVE] NFC: Move info about ACLE types into separate function. (details)
  6. [X86][AVX] Fold store(extract_element(vtrunc)) to truncated store (details)
  7. [LLDB] Add ptrace register access for AArch64 SVE registers (details)
  8. [SVE] Add tests for fixed length vector integer operations with immediate operands. (details)
  9. [X86][AVX] computeKnownBitsForTargetNode - add VTRUNC/VTRUNCS/VTRUNCUS known zero upper elements handling. (details)
  10. [LLDB] Minor fix in TestSVERegisters.py for AArch64/Linux buildbot (details)
  11. [ARM] Change target triple to arm-none-none-eabi. NFC (details)
  12. [lldb] Make error messages in TestQueues more helpfull (details)
  13. [InstCombine] Lower infinite combine loop detection thresholds (details)
  14. [InstCombine] update stale comments in test files; NFC (details)
  15. [X86][AVX] getAVX512TruncNode - don't truncate from illegal vector widths. (details)
  16. [X86] lowerShuffleWithVPMOV - remove unnecessary shuffle commutation. NFCI. (details)
  17. [lldb] Add typedefs to the DeclContext they are created in (details)
  18. [lldb] Clean up DW_AT_declaration-with-children.s test (details)
  19. [obj2yaml] Refactor the .debug_pub* sections dumper. (details)
  20. [CodeGen] Use existing EmitLambdaVLACapture (NFC) (details)
  21. Fix unused variable warnings. NFCI. (details)
  22. [X86][AVX] lowerShuffleWithVPMOV - minor refactor to more closely match lowerShuffleAsVTRUNC (details)
  23. Fix MSVC implicit truncation narrowing conversion warning. (details)
  24. Revert "[InstCombine] Lower infinite combine loop detection thresholds" (details)
  25. Make helpers static. NFC. (details)
  26. AMDGPU/GlobalISel: Add selection tests for pointer constants (details)
  27. [NFC] Fix typo in AMDGPU doc (details)
  28. AMDGPU/GlobalISel: Add some bitcast tests (details)
  29. [libomptarget][amdgpu] Support building with static rocm libraries (details)
  30. [mlir][VectorToSCF] Bug in TransferRead lowering fixed (details)
  31. [lldb] Convert builders to use inheritance (NFC) (details)
Commit 545de56f87f5d639cafb3fcc3fff199846ecfbff by meera.nakrani
[ARM] Enabled VMLAV and Add instructions to use VMLAVA

Used InstCombine to enable VMLAV and Add instructions to generate VMLAVA instead with tests.
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was addedllvm/test/Transforms/InstCombine/ARM/vmldava.ll
Commit eedf18fc1f5fc71bb896204abf41fc5a2dbf25f7 by sstipanovic
[IR] Intrinsics default attributes and opt-out flag

Intrinsic properties can now be set to default and applied to all
intrinsics. If the attributes are not needed, the user can opt-out by
setting the DisableDefaultAttributes flag to true.

Differential Revision: https://reviews.llvm.org/D70365
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedllvm/test/TableGen/searchabletables-intrinsic.td
The file was modifiedllvm/test/TableGen/intrinsic-struct.td
The file was modifiedllvm/test/TableGen/intrinsic-pointer-to-any.td
The file was modifiedllvm/utils/TableGen/CodeGenIntrinsics.h
The file was modifiedllvm/test/TableGen/intrinsic-varargs.td
The file was modifiedllvm/test/TableGen/intrinsic-long-name.td
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
The file was modifiedllvm/test/TableGen/intrin-side-effects.td
Commit b0b32e649011d9a60165b9b53eb2764b7da9c8ca by sstipanovic
[OpenMPOpt] ICV tracking for calls

Introduce two new AAs. AAICVTrackerFunctionReturned which checks if a
function can have a unique ICV value after it is finished, and
AAICVCallSiteReturned which checks AAICVTrackerFunctionReturned for a
call site. This enables us to check the value of a call and if it
changes the ICV. This also changes the approach in
`getReplacementValues()` to a worklist-based approach so we can explore
all relevant BBs.

Differential Revision: https://reviews.llvm.org/D85544
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
The file was modifiedllvm/test/Transforms/OpenMP/icv_tracking.ll
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp
Commit 54105d635d18aa40a59230591d9f6dd255049c6c by bjorn.a.pettersson
[GlobalISel] Untabify InstructionSelectorImpl.h. NFC
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
Commit 0353848cc94f0fc23a953f8f420be7ee3342c8dc by sander.desmalen
[Clang][SVE] NFC: Move info about ACLE types into separate function.

This function returns a struct `BuiltinVectorTypeInfo` that contains
the builtin vector's element type, element count and number of vectors
(used for vector tuples).

Reviewed By: c-rhodes

Differential Revision: https://reviews.llvm.org/D86100
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was modifiedclang/lib/CodeGen/CodeGenTypes.cpp
The file was modifiedclang/include/clang/AST/ASTContext.h
Commit 46fc9a0dfc0cdd092bbcbd7ca141decb74362053 by llvm-dev
[X86][AVX] Fold store(extract_element(vtrunc)) to truncated store

Add handling for storing the extracted lower (truncated bits) element from a X86ISD::VTRUNC node - this can be lowered to a generic truncated store directly.

Differential Revision: https://reviews.llvm.org/D86158
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/shuffle-vs-trunc-128.ll
The file was modifiedllvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll
The file was modifiedllvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll
Commit 567ba6c468b93accefed944e5a44b1052d3597de by omair.javaid
[LLDB] Add ptrace register access for AArch64 SVE registers

This patch adds NativeRegisterContext_arm64 ptrace routines to access
AArch64 SVE register set. This patch also adds a test-case to test
AArch64 SVE register access and dynamic size configuration capability.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D79699
The file was addedlldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/main.c
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
The file was modifiedlldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
The file was addedlldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/TestSVERegisters.py
The file was addedlldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/Makefile
The file was modifiedlldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h
Commit 08ba4f112d551028c4a4f96d65774487cec35511 by paul.walker
[SVE] Add tests for fixed length vector integer operations with immediate operands.
The file was addedllvm/test/CodeGen/AArch64/sve-fixed-length-int-immediates.ll
Commit 80a0dc59b7a42561ac487d7e590853905164ce23 by llvm-dev
[X86][AVX] computeKnownBitsForTargetNode - add VTRUNC/VTRUNCS/VTRUNCUS known zero upper elements handling.

Like many of the AVX512 conversion ops, the VTRUNC ops guarantee the upper destination elements are zero.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
The file was modifiedllvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll
The file was modifiedllvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll
Commit bd791e97f8bb0e4bb507bf51850183515ecc6743 by omair.javaid
[LLDB] Minor fix in TestSVERegisters.py for AArch64/Linux buildbot

This adds a minor test case fix to previously submitted AArch64 SVE
ptrace support. This was failing on LLDB/AArch64 Linux buildbot.

Differential Revision: https://reviews.llvm.org/D79699
The file was modifiedlldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/TestSVERegisters.py
Commit 41495dd57a0e98123dab997f69346468fb258965 by david.green
[ARM] Change target triple to arm-none-none-eabi. NFC
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-operand.ll
Commit c1b1868f35bbb4d6e63515c00eb74d5aeac1aecc by Raphael Isemann
[lldb] Make error messages in TestQueues more helpfull
The file was modifiedlldb/test/API/macosx/queues/TestQueues.py
Commit 71e0b82c9f5039cb3987c91075e78733ef044c07 by lebedev.ri
[InstCombine] Lower infinite combine loop detection thresholds

It's been a month since 2f3862eb9f21e8a0d48505637fefe6e5e295c18c,
and no new bug reports about the threshold were filled,
so let's bump it again and wait again.
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Commit 92bcd240f2565a79f94e0e9ac926b9135f03cbd6 by spatel
[InstCombine] update stale comments in test files; NFC

I missed updating these with:
rG23bd33c6acc4
The file was modifiedllvm/test/Transforms/InstCombine/and-xor-or.ll
The file was modifiedllvm/test/Transforms/InstCombine/xor.ll
Commit b61cef3a921bb21ca0e2dc4b1f079a8f1a91d65e by llvm-dev
[X86][AVX] getAVX512TruncNode - don't truncate from illegal vector widths.

Thanks to @fhahn for the test case.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was addedllvm/test/CodeGen/X86/trunc-vector-width.ll
Commit 9fee2bad6d8a84d0450833a906c6d2dff6164cab by llvm-dev
[X86] lowerShuffleWithVPMOV - remove unnecessary shuffle commutation. NFCI.

canonicalizeShuffleMaskWithCommute should have already ensured the lower elements are from V1, we do have test coverage for this already.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit d7363397c669f611e379988ea12fb428847fce61 by pavel
[lldb] Add typedefs to the DeclContext they are created in

TypeSystemClang::CreateTypedef was creating a typedef in the right
DeclContext, but it was not actually adding it as a child of the
context. The resulting inconsistent state meant that we would be unable
to reference the typedef from an expression directly, but we could use
them if they end up being pulled in by some previous subexpression
(because the ASTImporter will set up the correct links in the expression
ast).

This patch adds the typedef to the decl context it is created in.

Differential Revision: https://reviews.llvm.org/D86140
The file was modifiedlldb/test/API/lang/cpp/typedef/TestCppTypedef.py
The file was modifiedlldb/test/API/lang/cpp/typedef/main.cpp
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbtest.py
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Commit 9cc2f13deeb30de3a2ce1854c36f6c0a8de86d6c by pavel
[lldb] Clean up DW_AT_declaration-with-children.s test

Address some post-commit feedback on D85968.
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/DW_AT_declaration-with-children.s
Commit 419326a4452650089e5e36c2200c349d5a63bda5 by Xing
[obj2yaml] Refactor the .debug_pub* sections dumper.

It's good to reuse the DWARF parser in lib/DebugInfo so that we don't
need to maintain a separate parser in client side (obj2yaml). Besides,
A test case is added whose length field is a very huge value which makes
obj2yaml stuck when parsing the section.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D86192
The file was modifiedllvm/tools/obj2yaml/dwarf2yaml.cpp
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF-pubsections.yaml
Commit 916b750a8d1ab47d41939b42bf1d6eeddbdef686 by aaronpuchert
[CodeGen] Use existing EmitLambdaVLACapture (NFC)
The file was modifiedclang/lib/CodeGen/CGStmt.cpp
Commit 1014a93a4e0203eccc20190c31169b26ec4b9058 by llvm-dev
Fix unused variable warnings. NFCI.
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/DefineOutline.cpp
Commit 057bdd63a49a37924d1c88473d6c298caf2bcbec by llvm-dev
[X86][AVX] lowerShuffleWithVPMOV - minor refactor to more closely match lowerShuffleAsVTRUNC

Replace isBuildVectorAllZeros check by using the Zeroable bitmask instead.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 90a1e6509fc54f4acb61440d720fb4655d05b32e by llvm-dev
Fix MSVC implicit truncation narrowing conversion warning.
The file was modifiedllvm/tools/obj2yaml/dwarf2yaml.cpp
Commit 3d76a133c7e0d4056c1a0657b0b186c381bf7b74 by lebedev.ri
Revert "[InstCombine] Lower infinite combine loop detection thresholds"

And as being reported by Florian Hahn, there's a hit
in MultiSource/Benchmarks/mafft from the test-suite on X86 with -O3 -flto,
so reverting until addressed.

This reverts commit 71e0b82c9f5039cb3987c91075e78733ef044c07.
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Commit b98e25b6d7231798a4d819aae3a93f6f1627931a by benny.kra
Make helpers static. NFC.
The file was modifiedclang/lib/Tooling/Transformer/RewriteRule.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedllvm/lib/ObjectYAML/DWARFEmitter.cpp
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
Commit 386a5ea2b776fcc2d012bb2cc173338c204cc59d by arsenm2
AMDGPU/GlobalISel: Add selection tests for pointer constants
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
Commit 0313c540c2c7613df7661c360d204f64b60f68f0 by Madhur.Amilkanthwar
[NFC] Fix typo in AMDGPU doc

Reviewed By: t-tye, arsenm

Differential Revision: https://reviews.llvm.org/D86206
The file was modifiedllvm/docs/AMDGPUUsage.rst
Commit ff5758fec8adbb5031e93b87c77679f761c4d07d by Matthew.Arsenault
AMDGPU/GlobalISel: Add some bitcast tests
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir
Commit 6e1b11087f080b1cb9a023f9f920d29d5465633e by jonathanchesterfield
[libomptarget][amdgpu] Support building with static rocm libraries
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/CMakeLists.txt
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/data.cpp
Commit 8dace28f92056a04e02d913684d3f448ee1f295a by limo
[mlir][VectorToSCF] Bug in TransferRead lowering fixed

If Memref has rank > 1 this pass emits N-1 loops around
TransferRead op and transforms the op itself to 1D read. Since vectors
must have static shape while memrefs don't the pass emits if condition
to prevent out of bounds accesses in case some memref dimension is smaller
than the corresponding dimension of targeted vector. This logic is fine
but authors forgot to apply `permutation_map` on loops upper bounds and
thus if condition compares induction variable to incorrect loop upper bound
(dimension of the memref) in case `permutation_map` is not identity map.
This commit aims to fix that.
The file was modifiedmlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
The file was modifiedmlir/test/Conversion/VectorToSCF/vector-to-loops.mlir
Commit 1922bf12e1f3f228c0f57b27c796ebea4a50c358 by Jonas Devlieghere
[lldb] Convert builders to use inheritance (NFC)

Rather than have different modules for different platforms, use
inheritance so we can have a Builer base class and optional child
classes that override platform specific methods.

Differential revision: https://reviews.llvm.org/D86174
The file was removedlldb/packages/Python/lldbsuite/test/plugins/builder_freebsd.py
The file was removedlldb/packages/Python/lldbsuite/test/plugins/builder_openbsd.py
The file was removedlldb/packages/Python/lldbsuite/test/plugins/builder_win32.py
The file was removedlldb/packages/Python/lldbsuite/test/plugins/builder_base.py
The file was removedlldb/packages/Python/lldbsuite/test/plugins/builder_darwin.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbtest.py
The file was addedlldb/packages/Python/lldbsuite/builders/builder.py
The file was addedlldb/packages/Python/lldbsuite/builders/darwin.py
The file was modifiedlldb/packages/Python/lldbsuite/test/make/Makefile.rules
The file was addedlldb/packages/Python/lldbsuite/builders/__init__.py
The file was removedlldb/packages/Python/lldbsuite/test/plugins/builder_netbsd.py
The file was removedlldb/packages/Python/lldbsuite/test/plugins/builder_linux.py