FailedChanges

Summary

  1. Reapply "RegAllocFast: Record internal state based on register units" (details)
  2. RegAllocFast: Rewrite and improve (details)
  3. CodeGen: Move split block utility to MachineBasicBlock (details)
  4. [X86][AVX] Add missing non AVX512VL broadcastm test coverage (details)
  5. PR47468: Fix findPHICopyInsertPoint, so that copies aren't incorrectly inserted after an INLINEASM_BR. (details)
  6. DebugInfo: Simplify line table parsing to take all the units together, rather than CUs and TUs separately (details)
  7. Linewrap & remove some dead typedefs from previous commit (details)
  8. [InstCombine][SVE] Skip scalable type for InstCombiner::getFlippedStrictnessPredicateAndConstant. (details)
  9. [test][TSan] Fix tests under NPM (details)
  10. [X86][AVX] lowerBuildVectorAsBroadcast - improve BROADCASTM lowering on non-VLX targets (details)
  11. scudo: Add an API for disabling memory initialization per-thread. (details)
  12. First pass on MLIR python context lifetime management. (details)
  13. clangd:  Make ompletionModelCodegen.py tpy2.7 compatible (details)
  14. [gn build] (manually) port 9b6765e784b3 (details)
  15. Pre-commit test for CSEing masked loads/stores (details)
  16. [gn build] Do not sync filenames containing variable references (details)
  17. [clang-format] Recognize "hxx" as a C++ header in clang-format-diff.py (details)
  18. Temporarily Revert "[SLP] Allow reordering of vectorization trees with reused instructions." (details)
  19. [gn build] (manually) port 9b6765e784b3 more (details)
  20. [gn build] add file i forgot to add in 929d91a55616 (details)
  21. [InstSimplify] add tests for constant folding fmin/fmax with undef op; NFC (details)
  22. clang: Make changes in 7c8bb409f31e py2.7-compatible (details)
  23. CompletionModelCodegen: Remove unused import (details)
  24. [OpenMP] Initial Support for OpenMP Webpage Documentation (details)
  25. [msan][asan] Add runtime flag intercept_strcmp (details)
  26. [llvm-cov] Allow commas in filenames passed to `-object` flag (details)
  27. [COFF] Move per-global .drective emission from AsmPrinter to TLOFCOFF (details)
  28. [spirv] Move device info from resource limit into target env (details)
  29. Temporarily Revert "[clangd] Add Random Forest runtime for code completion." (details)
  30. [test][InstrProf] Fix always_inline.ll under NPM (details)
  31. [instcombine][x86] Converted pdep/pext with shifted mask to simple arithmetic (details)
  32. [clang][module] Improve incomplete-umbrella warning (details)
  33. [clang] Remove profile available check for fsplit-machine-functions. (details)
  34. [NFC][sanitizer] Don't use ::testing::internal (details)
  35. [lld][WebAssembly] Fix -Wunused-variable after D87663 (details)
  36. [PowerPC] Implement Move to VSR Mask builtins in LLVM/Clang (details)
  37. [GlobalISel] Add lowering support for G_ABS and use for AArch64. (details)
  38. [SCEV] Fix an unused variable in -DLLVM_ENABLE_ASSERTIONS=off build (details)
  39. [NFC][Asan] Fix test broken by RegAllocFast (details)
  40. [NFC][StackSafety] Replace auto with type (details)
  41. [AArch64][GlobalISel] Legalize arithmetic ops for <4 x s16> (details)
  42. [AArch64][GlobalISel] Add tests for pre-existing selection support for <4 x s16> arithmetic/bitwise ops. (details)
  43. [NFC][LSan] Add REQUIRES: linux (details)
  44. [LiveDebugValues] Add `#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)` to suppress -Wunused-function (details)
  45. [llvm-install-name-tool] Validate -id value early (details)
  46. Temporarily Revert "RegAllocFast: Rewrite and improve" (details)
  47. [llvm-objcopy][MachO] Add llvm-bitcode-strip driver (details)
  48. Revert "[gn build] (manually) port 9b6765e784b3" anf follow-ups (details)
  49. [llvm-objcopy][MachO] Clean up the interface of Object (details)
  50. [gn build] (manually) port 5495b691646 (details)
  51. DebugInfo: Cleanup RLE dumping, using a length-constrained DataExtractor rather than carrying the end offset separately (details)
Commit 870fd53e4f6357946f4bad0b861c510cd107420c by Matthew.Arsenault
Reapply "RegAllocFast: Record internal state based on register units"

The regressions this caused should be fixed when
https://reviews.llvm.org/D52010 is applied.

This reverts commit a21387c65470417c58021f8d3194a4510bb64f46.
The file was modifiedllvm/test/CodeGen/X86/2009-04-14-IllegalRegs.ll
The file was modifiedllvm/test/CodeGen/X86/regalloc-fast-missing-live-out-spill.mir
The file was modifiedllvm/test/CodeGen/X86/avx-load-store.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fptosi_and_fptoui.ll
The file was modifiedllvm/test/CodeGen/X86/mixed-ptr-sizes.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll
The file was modifiedllvm/test/CodeGen/X86/pr1489.ll
The file was modifiedllvm/test/CodeGen/X86/pr32451.ll
The file was modifiedllvm/test/CodeGen/PowerPC/popcount.ll
The file was modifiedllvm/test/CodeGen/X86/pr47000.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
The file was modifiedllvm/test/CodeGen/X86/pr44749.ll
The file was modifiedllvm/test/CodeGen/X86/pr39733.ll
The file was modifiedllvm/test/CodeGen/X86/pr34592.ll
The file was modifiedllvm/test/CodeGen/X86/lvi-hardening-loads.ll
The file was modifiedllvm/test/CodeGen/X86/pr32345.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wwm-reserved.ll
The file was modifiedllvm/test/CodeGen/X86/swift-return.ll
The file was modifiedllvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll
The file was modifiedllvm/test/CodeGen/PowerPC/addegluecrash.ll
The file was modifiedllvm/test/CodeGen/Mips/implicit-sret.ll
The file was modifiedllvm/test/CodeGen/X86/crash-O0.ll
The file was modifiedllvm/test/CodeGen/SPARC/fp16-promote.ll
The file was modifiedllvm/test/CodeGen/X86/atomic32.ll
The file was modifiedllvm/test/CodeGen/X86/pr32241.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vsx.ll
The file was modifiedllvm/test/CodeGen/X86/pr32340.ll
The file was modifiedllvm/test/DebugInfo/X86/op_deref.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-m0.ll
The file was modifiedllvm/test/CodeGen/X86/swifterror.ll
The file was modifiedllvm/test/CodeGen/X86/atomic-unordered.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-vcvt_f.ll
The file was modifiedllvm/test/CodeGen/X86/pr27591.ll
The file was modifiedllvm/test/CodeGen/ARM/legalize-bitcast.ll
The file was modifiedllvm/test/CodeGen/X86/pr30430.ll
The file was modifiedllvm/test/CodeGen/X86/atomic64.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-nontemporal.ll
The file was modifiedllvm/test/CodeGen/X86/pr32284.ll
The file was modifiedllvm/test/CodeGen/AArch64/popcount.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll
The file was modifiedllvm/lib/CodeGen/RegAllocFast.cpp
The file was modifiedllvm/test/CodeGen/X86/pr30813.ll
The file was modifiedllvm/test/CodeGen/Mips/atomic-min-max.ll
The file was modifiedllvm/test/CodeGen/Mips/atomic.ll
The file was modifiedllvm/test/CodeGen/X86/extend-set-cc-uses-dbg.ll
Commit c8757ff3aa7dd7a25a6343f6ef74a70c7be04325 by Matthew.Arsenault
RegAllocFast: Rewrite and improve

This rewrites big parts of the fast register allocator. The basic
strategy of doing block-local allocation hasn't changed but I tweaked
several details:

Track register state on register units instead of physical
registers. This simplifies and speeds up handling of register aliases.
Process basic blocks in reverse order: Definitions are known to end
register livetimes when walking backwards (contrary when walking
forward then uses may or may not be a kill so we need heuristics).

Check register mask operands (calls) instead of conservatively
assuming everything is clobbered.  Enhance heuristics to detect
killing uses: In case of a small number of defs/uses check if they are
all in the same basic block and if so the last one is a killing use.
Enhance heuristic for copy-coalescing through hinting: We check the
first k defs of a register for COPYs rather than relying on there just
being a single definition.  When testing this on the full llvm
test-suite including SPEC externals I measured:

average 5.1% reduction in code size for X86, 4.9% reduction in code on
aarch64. (ranging between 0% and 20% depending on the test) 0.5%
faster compiletime (some analysis suggests the pass is slightly slower
than before, but we more than make up for it because later passes are
faster with the reduced instruction count)

Also adds a few testcases that were broken without this patch, in
particular bug 47278.

Patch mostly by Matthias Braun
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/branch.ll
The file was modifiedllvm/test/DebugInfo/X86/subreg.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wwm-reserved.ll
The file was modifiedllvm/test/CodeGen/X86/swifterror.ll
The file was modifiedllvm/test/CodeGen/X86/pr42452.ll
The file was modifiedllvm/test/CodeGen/X86/atomic-unordered.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fastregalloc-self-loop-heuristic.mir
The file was modifiedllvm/test/CodeGen/ARM/Windows/alloca.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/ctpop.ll
The file was modifiedllvm/test/CodeGen/X86/x86-32-intrcc.ll
The file was modifiedllvm/test/CodeGen/X86/stack-protector-strong-macho-win32-xor.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/call.ll
The file was modifiedllvm/test/CodeGen/X86/pr32451.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-m0.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll
The file was modifiedllvm/test/CodeGen/X86/pr32484.ll
The file was modifiedllvm/test/CodeGen/AArch64/swift-return.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store_4_unaligned.ll
The file was modifiedllvm/test/CodeGen/PowerPC/stack-guard-reassign.ll
The file was modifiedllvm/test/CodeGen/X86/volatile.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/jump_table_and_brjt.ll
The file was modifiedllvm/test/CodeGen/Mips/atomic64.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/ctlz.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/callabi.ll
The file was modifiedllvm/test/DebugInfo/X86/fission-ranges.ll
The file was modifiedllvm/test/CodeGen/ARM/ldrd.ll
The file was modifiedllvm/test/CodeGen/Mips/msa/ldr_str.ll
The file was modifiedllvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fp-strict-fcmp-noopt.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-br.ll
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-vararg.ll
The file was addedllvm/test/CodeGen/X86/bug47278.mir
The file was modifiedllvm/test/CodeGen/ARM/thumb-big-stack.ll
The file was modifiedllvm/test/CodeGen/Thumb2/high-reg-spill.mir
The file was modifiedllvm/test/CodeGen/X86/atomic6432.ll
The file was modifiedllvm/test/DebugInfo/X86/parameters.ll
The file was modifiedllvm/test/DebugInfo/X86/op_deref.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_4_unaligned.ll
The file was modifiedllvm/test/DebugInfo/ARM/prologue_end.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-vcvt_f.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fptosi_and_fptoui.ll
The file was modifiedllvm/test/CodeGen/PowerPC/spill-nor0.ll
The file was modifiedllvm/test/CodeGen/ARM/stack-guard-reassign.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-ldr-str-thumb-neg-index.ll
The file was modifiedllvm/lib/CodeGen/RegAllocFast.cpp
The file was modifiedllvm/test/CodeGen/SPARC/fp16-promote.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/brindirect.ll
The file was modifiedllvm/test/CodeGen/X86/pr47000.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/dyn_stackalloc.ll
The file was modifiedllvm/test/CodeGen/X86/avx-load-store.ll
The file was modifiedllvm/test/CodeGen/AArch64/cmpxchg-O0.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sitofp_and_uitofp.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/icmp.ll
The file was modifiedllvm/test/CodeGen/Hexagon/vect/vect-load-v4i16.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-nontemporal.ll
The file was modifiedllvm/test/CodeGen/X86/phys-reg-local-regalloc.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-overflow-toc.py
The file was modifiedllvm/test/CodeGen/X86/mixed-ptr-sizes.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-select.ll
The file was modifiedllvm/test/CodeGen/SystemZ/swifterror.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/zext_and_sext.ll
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-call.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/long_ambiguous_chain_s64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-agpr.mir
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/cttz.ll
The file was modifiedllvm/test/DebugInfo/X86/sret.ll
The file was modifiedllvm/test/CodeGen/X86/pr11415.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/zextLoad_and_sextLoad.ll
The file was modifiedllvm/test/CodeGen/X86/pr30813.ll
The file was addedllvm/test/CodeGen/AMDGPU/fast-ra-kills-vcc.mir
The file was modifiedllvm/test/CodeGen/AArch64/combine-loads.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/reserve-vgpr-for-sgpr-spill.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/float_constants.ll
The file was modifiedllvm/test/CodeGen/Mips/copy-fp64.ll
The file was modifiedllvm/test/CodeGen/ARM/crash-greedy-v6.ll
The file was modifiedllvm/test/CodeGen/SystemZ/swift-return.ll
The file was addedllvm/test/CodeGen/X86/bug47278-eflags-error.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/darwin-tls-call-clobber.ll
The file was modifiedllvm/test/DebugInfo/AArch64/frameindices.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/memtest1.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-cmp-branch.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll
The file was modifiedllvm/test/CodeGen/ARM/cmpxchg-O0.ll
The file was modifiedllvm/test/CodeGen/X86/pr27591.ll
The file was modifiedllvm/test/CodeGen/X86/pr32345.ll
The file was modifiedllvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitreverse.ll
The file was modifiedllvm/test/CodeGen/Mips/implicit-sret.ll
The file was addedllvm/test/CodeGen/AMDGPU/fastregalloc-illegal-subreg-physreg.mir
The file was modifiedllvm/test/CodeGen/X86/pr39733.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/rem_and_div.ll
The file was modifiedllvm/test/CodeGen/ARM/swifterror.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store_split_because_of_memsize_or_align.ll
The file was modifiedllvm/test/DebugInfo/X86/pieces-1.ll
The file was modifiedllvm/test/CodeGen/PowerPC/addegluecrash.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64_32-fastisel.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill192.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bswap.ll
The file was modifiedllvm/test/CodeGen/AArch64/popcount.ll
The file was modifiedllvm/test/CodeGen/Mips/micromips-eva.mir
The file was modifiedllvm/test/CodeGen/PowerPC/fp64-to-int16.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll
The file was modifiedllvm/test/CodeGen/X86/atomic-monotonic.ll
The file was modifiedllvm/test/CodeGen/X86/pr32284.ll
The file was modifiedllvm/test/CodeGen/AArch64/fast-isel-cmpxchg.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_split_because_of_memsize_or_align.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-select-sse.ll
The file was modifiedllvm/test/CodeGen/X86/x86-64-intrcc.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub_vec.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/test_TypeInfoforMF.ll
The file was modifiedllvm/test/CodeGen/X86/pr32241.ll
The file was modifiedllvm/test/CodeGen/AArch64/unwind-preserved.ll
The file was modifiedllvm/test/CodeGen/X86/2013-10-14-FastISel-incorrect-vreg.ll
The file was modifiedllvm/test/CodeGen/X86/atomic64.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64_32-null.ll
The file was modifiedllvm/test/CodeGen/X86/pr34653.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fcmp.ll
The file was modifiedllvm/test/CodeGen/X86/pr44749.ll
The file was modifiedllvm/test/DebugInfo/X86/reference-argument.ll
The file was modifiedllvm/test/CodeGen/Mips/atomicCmpSwapPW.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-x86-64.ll
The file was modifiedllvm/test/DebugInfo/X86/prologue-stack.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fp-int128-fp-combine.ll
The file was modifiedllvm/test/CodeGen/ARM/debug-info-blocks.ll
The file was addedllvm/test/CodeGen/AMDGPU/unexpected-reg-unit-state.mir
The file was modifiedllvm/test/CodeGen/Mips/atomic-min-max.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/phi.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/aggregate_struct_return.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/var_arg.ll
The file was modifiedllvm/test/DebugInfo/X86/spill-indirect-nrvo.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fast-isel-pcrel.ll
The file was modifiedllvm/test/CodeGen/PowerPC/p9-vinsert-vextract.ll
The file was addedllvm/test/CodeGen/PowerPC/spill-nor0.mir
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vector-spill.ll
The file was modifiedllvm/test/CodeGen/X86/mixed-ptr-sizes-i686.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vsx-args.ll
The file was modifiedllvm/test/DebugInfo/X86/dbg-declare-arg.ll
The file was modifiedllvm/test/CodeGen/PowerPC/popcount.ll
The file was modifiedllvm/test/CodeGen/X86/regalloc-fast-missing-live-out-spill.mir
The file was modifiedllvm/test/CodeGen/AArch64/unwind-preserved-from-mir.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/long_ambiguous_chain_s32.ll
The file was modifiedllvm/test/DebugInfo/Mips/delay-slot.ll
The file was modifiedllvm/test/CodeGen/PowerPC/elf-common.ll
The file was modifiedllvm/test/DebugInfo/AArch64/prologue_end.ll
The file was modifiedllvm/test/CodeGen/ARM/legalize-bitcast.ll
The file was modifiedllvm/test/CodeGen/X86/win64_eh.ll
The file was modifiedllvm/test/CodeGen/AArch64/br-cond-not-merge.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vsx.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/mul_vec.ll
The file was modifiedllvm/test/CodeGen/Mips/atomic.ll
The file was modifiedllvm/test/CodeGen/X86/swift-return.ll
The file was modifiedllvm/test/CodeGen/PowerPC/anon_aggr.ll
The file was modifiedllvm/test/CodeGen/ARM/cmpxchg-O0-be.ll
The file was modifiedllvm/test/CodeGen/X86/pr34592.ll
The file was modifiedllvm/test/CodeGen/X86/stack-protector-msvc.ll
The file was modifiedllvm/test/CodeGen/X86/atomic32.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/mul.ll
The file was modifiedllvm/test/CodeGen/X86/pr32340.ll
The file was modifiedllvm/test/DebugInfo/Mips/prologue_end.ll
The file was modifiedllvm/test/CodeGen/X86/pr1489.ll
The file was modifiedllvm/test/CodeGen/X86/2009-04-14-IllegalRegs.ll
The file was modifiedllvm/test/CodeGen/X86/crash-O0.ll
The file was modifiedllvm/test/CodeGen/X86/extend-set-cc-uses-dbg.ll
The file was modifiedllvm/test/CodeGen/AArch64/swifterror.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address_pic.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add.ll
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-select.ll
The file was modifiedllvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll
The file was modifiedllvm/test/CodeGen/X86/pr30430.ll
Commit 3105d0f84bfa6b765bb88cbf090f557e588764ea by Matthew.Arsenault
CodeGen: Move split block utility to MachineBasicBlock

AMDGPU needs this in several places, so consolidate them here.
The file was modifiedllvm/include/llvm/CodeGen/MachineBasicBlock.h
The file was modifiedllvm/lib/CodeGen/MachineBasicBlock.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit ecba9d793e205ac857196abbd00cd67777e6f51a by llvm-dev
[X86][AVX] Add missing non AVX512VL broadcastm test coverage
The file was modifiedllvm/test/CodeGen/X86/broadcastm-lowering.ll
Commit f7a53d82c0902147909f28a9295a9d00b4b27d38 by jyknight
PR47468: Fix findPHICopyInsertPoint, so that copies aren't incorrectly inserted after an INLINEASM_BR.

findPHICopyInsertPoint special cases placement in a block with a
callbr or invoke in it. In that case, we must ensure that the copy is
placed before the INLINEASM_BR or call instruction, if the register is
defined prior to that instruction, because it may jump out of the
block.

Previously, the code placed it immediately after the last def _or
use_. This is wrong, if the use is the instruction which may jump.  We
could correctly place it immediately after the last def (ignoring
uses), but that is non-optimal for register pressure.

Instead, place the copy after the last def, or before the
call/inlineasm_br, whichever is later.

Differential Revision: https://reviews.llvm.org/D87865
The file was addedllvm/test/CodeGen/X86/callbr-asm-phi-placement.ll
The file was modifiedllvm/lib/CodeGen/PHIEliminationUtils.cpp
Commit 51a505340dfdfdfd9ab32c7267a74db3cdeefa56 by dblaikie
DebugInfo: Simplify line table parsing to take all the units together, rather than CUs and TUs separately
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFContext.cpp
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h
The file was modifiedllvm/unittests/DebugInfo/DWARF/DWARFDebugLineTest.cpp
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
Commit 82af17cde8caa8d2d020237f644d4302fc4fa589 by dblaikie
Linewrap & remove some dead typedefs from previous commit

Cleanup for 51a505340dfdfdfd9ab32c7267a74db3cdeefa56
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h
Commit 9ad6049736c58cca098b13ed128e7de0940f94a0 by huihuiz
[InstCombine][SVE] Skip scalable type for InstCombiner::getFlippedStrictnessPredicateAndConstant.

We cannot iterate on scalable vector, the number of elements is unknown at compile-time.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D87918
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
The file was addedllvm/test/Transforms/InstCombine/vscale_cmp.ll
Commit 2b1cb6d54a3298204e01a2982e3d00a1f08743a2 by aeubanks
[test][TSan] Fix tests under NPM

Under NPM, the TSan passes are split into a module and function pass. A
couple tests were testing for inserted module constructors, which is
only part of the module pass.
The file was modifiedllvm/test/Instrumentation/ThreadSanitizer/do-not-instrument-memory-access.ll
The file was modifiedllvm/test/Instrumentation/ThreadSanitizer/tsan_basic.ll
Commit 4ebd30722af5175282b99938d163ad4459aa5968 by llvm-dev
[X86][AVX] lowerBuildVectorAsBroadcast - improve BROADCASTM lowering on non-VLX targets

Broadcast to a ZMM type then extract the low subvector.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/broadcastm-lowering.ll
Commit 7bd75b630144ec639dbbf7bcb2797f48380b953b by peter
scudo: Add an API for disabling memory initialization per-thread.

Here "memory initialization" refers to zero- or pattern-init on
non-MTE hardware, or (where possible to avoid) memory tagging on MTE
hardware. With shared TSD the per-thread memory initialization state
is stored in bit 0 of the TLS slot, similar to PointerIntPair in LLVM.

Differential Revision: https://reviews.llvm.org/D87739
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/combined_test.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/wrappers_c.inc
The file was modifiedcompiler-rt/lib/scudo/standalone/combined.h
The file was modifiedcompiler-rt/lib/scudo/standalone/tsd_exclusive.h
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/chunk_test.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/include/scudo/interface.h
The file was modifiedcompiler-rt/lib/scudo/standalone/common.h
The file was modifiedcompiler-rt/lib/scudo/standalone/tsd_shared.h
The file was modifiedcompiler-rt/lib/scudo/standalone/chunk.h
Commit 85185b61b6371c29111611b8e3ac8d06403542c8 by stellaraccident
First pass on MLIR python context lifetime management.

* Per thread https://llvm.discourse.group/t/revisiting-ownership-and-lifetime-in-the-python-bindings/1769
* Reworks contexts so it is always possible to get back to a py::object that holds the reference count for an arbitrary MlirContext.
* Retrofits some of the base classes to automatically take a reference to the context, elimintating keep_alives.
* More needs to be done, as discussed, when moving on to the operations/blocks/regions.

Differential Revision: https://reviews.llvm.org/D87886
The file was modifiedmlir/lib/Bindings/Python/IRModules.h
The file was modifiedmlir/lib/Bindings/Python/IRModules.cpp
The file was modifiedmlir/lib/CAPI/IR/IR.cpp
The file was addedmlir/test/Bindings/Python/context_lifecycle.py
The file was modifiedmlir/include/mlir-c/IR.h
Commit 0ea2a57274225066ad81e971659222cf9ee1d12d by thakis
clangd:  Make ompletionModelCodegen.py tpy2.7 compatible

LLVM still supports Python 2.7, so unbreak bots that still run that.
In a separate commit so that this is easy to revert once we drop
support :)
The file was modifiedclang-tools-extra/clangd/quality/CompletionModelCodegen.py
Commit 442801a7b9b5460114498c48c12b8af40e495188 by thakis
[gn build] (manually) port 9b6765e784b3
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
Commit ae0ecb3c505e013659d9fa2668c55d93c1fff0b9 by kparzysz
Pre-commit test for CSEing masked loads/stores
The file was addedllvm/test/Transforms/EarlyCSE/masked-intrinsics-unequal-masks.ll
Commit 9b346f974ea606e17064969568568da30394c7a2 by thakis
[gn build] Do not sync filenames containing variable references
The file was modifiedllvm/utils/gn/build/sync_source_lists_from_cmake.py
Commit b168bbfae42e792542b4ced8729599524b9759c5 by vmiklos
[clang-format] Recognize "hxx" as a C++ header in clang-format-diff.py

And shift "proto" to the next line to avoid a too long line.

Reviewed By: MyDeveloperDay

Differential Revision: https://reviews.llvm.org/D87931
The file was modifiedclang/tools/clang-format/clang-format-diff.py
Commit ecfd8161bf43d035eafb75c14e9cf4a6d3966946 by echristo
Temporarily Revert "[SLP] Allow reordering of vectorization trees with reused instructions."
as it's infinite looping on occasion.

This reverts commit 455ca0ebb69210046928fedffe292420a30f89ad.
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/jumbled_store_crash.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/vectorize-reorder-reuse.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/reorder_repeated_ops.ll
Commit 929d91a55616d4fcf4754044b063644807b87fbe by thakis
[gn build] (manually) port 9b6765e784b3 more
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
Commit 7c2d83347f4ea146af1aca72fe289294aaf212be by thakis
[gn build] add file i forgot to add in 929d91a55616
The file was addedllvm/utils/gn/secondary/clang-tools-extra/clangd/quality/gen_decision_forest.gni
Commit d3b0644e22a4ebe599d58d9d319d2403484fd88f by spatel
[InstSimplify] add tests for constant folding fmin/fmax with undef op; NFC
The file was modifiedllvm/test/Transforms/InstSimplify/ConstProp/fp-undef.ll
Commit 7502040ed25e713546e64fe54a30beb5cfd8d045 by thakis
clang: Make changes in 7c8bb409f31e py2.7-compatible
The file was modifiedllvm/utils/UpdateTestChecks/common.py
Commit 807777913e82bece68a2f929ae17bd0e9ba38ab0 by thakis
CompletionModelCodegen: Remove unused import

The unused import is 3.4+, so it also breaks py2.7 compat.
But this is easy to fix :)
The file was modifiedclang-tools-extra/clangd/quality/CompletionModelCodegen.py
Commit 1c4c21489f013d6a501a52e79a36df07d772d9b8 by jhuber6
[OpenMP] Initial Support for OpenMP Webpage Documentation

Summary:
Adding support for generated html documentation for OpenMP. Changing
Cmake files to build the documentation and adding the base templates for
future documentation to be added.

Reviewers: jdoerfert

Subscribers: aaron.ballman arphaman guansong mgorny openmp-commits sstefan1 yaxunl

Tags: #OpenMP

Differential Revision: https://reviews.llvm.org/D87797
The file was addedopenmp/docs/CMakeLists.txt
The file was addedopenmp/docs/README.txt
The file was addedopenmp/docs/_templates/layout.html
The file was addedopenmp/docs/_themes/llvm-theme/layout.html
The file was addedopenmp/docs/_templates/indexsidebar.html
The file was addedopenmp/docs/_themes/llvm-theme/static/llvm-theme.css
The file was addedopenmp/docs/_themes/llvm-theme/static/contents.png
The file was addedopenmp/docs/_themes/llvm-theme/static/navigation.png
The file was addedopenmp/docs/_themes/llvm-theme/theme.conf
The file was addedopenmp/docs/_themes/llvm-theme/static/logo.png
The file was addedopenmp/docs/index.rst
The file was addedopenmp/docs/conf.py
The file was modifiedopenmp/CMakeLists.txt
The file was modifiedopenmp/docs/ReleaseNotes.rst
Commit 516d7574320554022e56bbdfcddb269f87a1ba0f by Vitaly Buka
[msan][asan] Add runtime flag intercept_strcmp

Can be used to disable interceptor to workaround issues of
non-instrumented code.

Reviewed By: morehouse, eugenis

Differential Revision: https://reviews.llvm.org/D87897
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_flags.inc
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
The file was addedcompiler-rt/test/msan/strcmp.c
The file was addedcompiler-rt/test/asan/TestCases/strcmp.c
Commit 3c731ba5f1b604c873e96ac137bfea723690ba95 by Vedant Kumar
[llvm-cov] Allow commas in filenames passed to `-object` flag

Currently, -object takes a comma separated list of objects as an
argument, which prevents it working with path names that contain a
comma. Drop comma-separated support, which requires to set pass the
-object flag multiple times to set multiple objects.

Patch by Andrew Gallagher!

Differential Revision: https://reviews.llvm.org/D87003
The file was modifiedllvm/tools/llvm-cov/CodeCoverage.cpp
The file was addedllvm/test/tools/llvm-cov/comma-in-coverage-object-filename.test
Commit 9932561b4892b6e9bbb0c2369272dfff2305fdb9 by rnk
[COFF] Move per-global .drective emission from AsmPrinter to TLOFCOFF

This changes the order of output sections and the output assembly, but
is otherwise NFC.

It simplifies the TLOF interface by removing two COFF-only methods.
The file was modifiedllvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
The file was modifiedllvm/test/CodeGen/ARM/global-merge-dllexport.ll
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
The file was modifiedllvm/test/CodeGen/X86/dllexport.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/test/CodeGen/X86/dllexport-x86_64.ll
The file was modifiedllvm/include/llvm/Target/TargetLoweringObjectFile.h
Commit 1f0b43638ed7366189fb7b609484bb3033e678d9 by antiagainst
[spirv] Move device info from resource limit into target env

Vendor/device information are not resource limits. Moving to
target environment directly for better organization.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D87911
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVDialect.cpp
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVAttributes.h
The file was modifiedmlir/test/Dialect/SPIRV/target-and-abi.mlir
The file was modifiedmlir/docs/Dialects/SPIR-V.md
The file was modifiedmlir/lib/Dialect/SPIRV/TargetAndABI.cpp
The file was modifiedmlir/include/mlir/Dialect/SPIRV/TargetAndABI.h
The file was modifiedmlir/include/mlir/Dialect/SPIRV/TargetAndABI.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVBase.td
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVAttributes.cpp
Commit 549e55b3d5634870aa9d42135f51ad46a6a0e347 by echristo
Temporarily Revert "[clangd] Add Random Forest runtime for code completion."
as a header doesn't appear to have made it into the commit.

This reverts commit 9b6765e784b39c88cb8cdb85ab083e6c95a997ed and followup
The file was modifiedclang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
The file was modifiedclang-tools-extra/clangd/CMakeLists.txt
The file was removedclang-tools-extra/clangd/quality/README.md
The file was removedclang-tools-extra/clangd/unittests/DecisionForestTests.cpp
The file was removedclang-tools-extra/clangd/quality/CompletionModel.cmake
The file was removedclang-tools-extra/clangd/unittests/decision_forest_model/features.json
The file was removedclang-tools-extra/clangd/unittests/decision_forest_model/CategoricalFeature.h
The file was removedclang-tools-extra/clangd/quality/CompletionModelCodegen.py
The file was removedclang-tools-extra/clangd/quality/model/forest.json
The file was modifiedclang-tools-extra/clangd/unittests/CMakeLists.txt
The file was removedclang-tools-extra/clangd/quality/model/features.json
The file was removedclang-tools-extra/clangd/unittests/decision_forest_model/forest.json
Commit 7c10129f5a2145cf8f6dbe259269fd2a781a8dbe by aeubanks
[test][InstrProf] Fix always_inline.ll under NPM

NPM's inliner does not clean up dead functions.

Differential Revision: https://reviews.llvm.org/D87922
The file was modifiedllvm/test/Instrumentation/InstrProfiling/always_inline.ll
Commit 06f136f61e6d23fde5c91f7fa0813d0291c17c97 by listmail
[instcombine][x86] Converted pdep/pext with shifted mask to simple arithmetic

If the mask of a pdep or pext instruction is a shift masked (i.e. one contiguous block of ones) we need at most one and and one shift to represent the operation without the intrinsic. One all platforms I know of, this is faster than the pdep/pext.

The cost modelling for multiple contiguous blocks might be worth exploring in a follow up, but it's not relevant for my current use case. It would almost certainly be a win on AMDs where these are really really slow though.

Differential Revision: https://reviews.llvm.org/D87861
The file was modifiedllvm/test/Transforms/InstCombine/X86/x86-bmi-tbm.ll
The file was modifiedllvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
Commit ed79827aea444e6995fb3d36abc2bfd36331773c by zixu_wang
[clang][module] Improve incomplete-umbrella warning

Change the warning message for -Wincomplete-umbrella to report the location of the umbrella header;

Differential Revision: https://reviews.llvm.org/D82118
The file was modifiedclang/lib/Lex/PPLexerChange.cpp
The file was modifiedclang/test/Modules/incomplete-umbrella.m
Commit b86f1af423952d9f1dbe105b651b948ce0e1e8d0 by snehasishk
[clang] Remove profile available check for fsplit-machine-functions.

Enforcing a profile available check in the driver does not work with
incremental LTO builds where the LTO backend invocation does not include
the profile flags. At this point the profiles have already been consumed
and the IR contains profile metadata. Instead we always pass through the
-fsplit-machine-functions flag on user request. The pass itself contains
a check to return early if no profile information is available.

Differential Revision: https://reviews.llvm.org/D87943
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/test/Driver/fsplit-machine-functions.c
Commit 82827244e9bbc2804afd9070158c567ac89f0540 by Vitaly Buka
[NFC][sanitizer] Don't use ::testing::internal
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/sanitizer_stackdepot_test.cpp
Commit 51b75b87dbbed24b9c0a809f7e4d22b31923630d by i
[lld][WebAssembly] Fix -Wunused-variable after D87663
The file was modifiedlld/wasm/Writer.cpp
Commit 37e7673c21af1531b601ca975cb6118d04b6e1cc by amy.kwan1
[PowerPC] Implement Move to VSR Mask builtins in LLVM/Clang

This patch implements the vec_gen[b|h|w|d|q]m function prototypes in altivec.h
in order to utilize the move to VSR with mask instructions introduced in Power10.

Differential Revision: https://reviews.llvm.org/D82725
The file was modifiedclang/lib/Headers/altivec.h
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedclang/test/CodeGen/builtins-ppc-p10vector.c
The file was modifiedllvm/test/CodeGen/PowerPC/p10-vector-mask-ops.ll
Commit 5d34d7f1a0cae8367066ce2b55afe42b94a7466f by Amara Emerson
[GlobalISel] Add lowering support for G_ABS and use for AArch64.

Differential Revision: https://reviews.llvm.org/D87952
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/legalize-abs.mir
Commit 76eec6c95b14abd5b72a805ac2e9bb3d8480679b by i
[SCEV] Fix an unused variable in -DLLVM_ENABLE_ASSERTIONS=off build
The file was modifiedllvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
Commit 3ab118a57d3803f45e3fe95321654994f2c9e1a1 by Vitaly Buka
[NFC][Asan] Fix test broken by RegAllocFast

The test worked only because by coincidence register with pointer was
clobbered.
After D52010 value is still preserved.
The file was modifiedcompiler-rt/test/asan/TestCases/Linux/leak.cpp
Commit 97bfac076a068b658923aeba34d82df4ef097ba5 by Vitaly Buka
[NFC][StackSafety] Replace auto with type

Fixes static analyzer is warning.
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
Commit 269bcc39ca87c90b2b02a1b5b46686ae1929db3d by Amara Emerson
[AArch64][GlobalISel] Legalize arithmetic ops for <4 x s16>
The file was modifiedllvm/test/CodeGen/AArch64/arm64-vabs.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
Commit cce24bb38d97c352bf7ac40860f0ade33024735c by Amara Emerson
[AArch64][GlobalISel] Add tests for pre-existing selection support for <4 x s16> arithmetic/bitwise ops.
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-binop.mir
Commit 034781f7f33634918025206427e6ee912ef3985b by Vitaly Buka
[NFC][LSan] Add REQUIRES: linux

Additional registers scaning is only implemented for x86 linux.
The file was modifiedcompiler-rt/test/lsan/TestCases/use_registers_extra.cpp
Commit 2ac06241d277c969c0dee0f40fb4f00971a4d7f7 by i
[LiveDebugValues] Add `#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)` to suppress -Wunused-function
The file was modifiedllvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
Commit e9f9027c3c07ecdfad1ab900c0a62e0e320d5dd1 by alexshap
[llvm-install-name-tool] Validate -id value early

The code which validates the value of -id is moved into the function parseInstallNameToolOptions.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D87855
The file was modifiedllvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp
The file was modifiedllvm/tools/llvm-objcopy/CopyConfig.cpp
Commit dbd53a1f0c939a55e7719c39d08179468f9ad3dc by echristo
Temporarily Revert "RegAllocFast: Rewrite and improve"
as it's breaking a few tests in the lldb test suite.

Bot: http://lab.llvm.org:8011/builders/lldb-arm-ubuntu/builds/4226/steps/test/logs/stdio

This reverts commit c8757ff3aa7dd7a25a6343f6ef74a70c7be04325.
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
The file was modifiedllvm/test/CodeGen/X86/pr27591.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/darwin-tls-call-clobber.ll
The file was removedllvm/test/CodeGen/AMDGPU/unexpected-reg-unit-state.mir
The file was modifiedllvm/test/CodeGen/ARM/swifterror.ll
The file was modifiedllvm/test/CodeGen/X86/pr30813.ll
The file was modifiedllvm/test/CodeGen/X86/pr32284.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sitofp_and_uitofp.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_4_unaligned.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/phi.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/ctpop.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fptosi_and_fptoui.ll
The file was modifiedllvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll
The file was modifiedllvm/test/DebugInfo/X86/reference-argument.ll
The file was modifiedllvm/lib/CodeGen/RegAllocFast.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/aix-overflow-toc.py
The file was modifiedllvm/test/CodeGen/ARM/legalize-bitcast.ll
The file was modifiedllvm/test/CodeGen/X86/x86-32-intrcc.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64_32-null.ll
The file was modifiedllvm/test/CodeGen/Mips/micromips-eva.mir
The file was modifiedllvm/test/CodeGen/X86/regalloc-fast-missing-live-out-spill.mir
The file was modifiedllvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fp-strict-fcmp-noopt.ll
The file was removedllvm/test/CodeGen/AMDGPU/fastregalloc-illegal-subreg-physreg.mir
The file was modifiedllvm/test/CodeGen/AArch64/swifterror.ll
The file was modifiedllvm/test/CodeGen/AArch64/swift-return.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitreverse.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/jump_table_and_brjt.ll
The file was modifiedllvm/test/CodeGen/X86/swifterror.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store_split_because_of_memsize_or_align.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/zextLoad_and_sextLoad.ll
The file was removedllvm/test/CodeGen/X86/bug47278.mir
The file was modifiedllvm/test/CodeGen/X86/pr32451.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/long_ambiguous_chain_s64.ll
The file was modifiedllvm/test/CodeGen/X86/mixed-ptr-sizes-i686.ll
The file was modifiedllvm/test/CodeGen/ARM/debug-info-blocks.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address_pic.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
The file was modifiedllvm/test/CodeGen/X86/pr32241.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address.ll
The file was modifiedllvm/test/CodeGen/X86/extend-set-cc-uses-dbg.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
The file was modifiedllvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/ctlz.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/dyn_stackalloc.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64_32-fastisel.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vsx.ll
The file was modifiedllvm/test/CodeGen/X86/pr34592.ll
The file was modifiedllvm/test/CodeGen/X86/pr39733.ll
The file was modifiedllvm/test/DebugInfo/X86/parameters.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/long_ambiguous_chain_s32.ll
The file was modifiedllvm/test/CodeGen/Mips/atomic64.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/branch.ll
The file was modifiedllvm/test/CodeGen/X86/pr32345.ll
The file was modifiedllvm/test/CodeGen/ARM/thumb-big-stack.ll
The file was modifiedllvm/test/DebugInfo/X86/pieces-1.ll
The file was modifiedllvm/test/CodeGen/AArch64/cmpxchg-O0.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-agpr.mir
The file was modifiedllvm/test/CodeGen/X86/win64_eh.ll
The file was modifiedllvm/test/CodeGen/PowerPC/anon_aggr.ll
The file was modifiedllvm/test/CodeGen/X86/x86-64-intrcc.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-nontemporal.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/callabi.ll
The file was modifiedllvm/test/DebugInfo/AArch64/frameindices.ll
The file was modifiedllvm/test/DebugInfo/Mips/prologue_end.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fp64-to-int16.ll
The file was modifiedllvm/test/CodeGen/X86/atomic-unordered.ll
The file was modifiedllvm/test/CodeGen/Mips/implicit-sret.ll
The file was modifiedllvm/test/CodeGen/X86/atomic64.ll
The file was modifiedllvm/test/CodeGen/ARM/stack-guard-reassign.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
The file was removedllvm/test/CodeGen/X86/bug47278-eflags-error.mir
The file was modifiedllvm/test/CodeGen/X86/mixed-ptr-sizes.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-x86-64.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vsx-args.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/brindirect.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/call.ll
The file was modifiedllvm/test/CodeGen/PowerPC/stack-guard-reassign.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-br.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bswap.ll
The file was modifiedllvm/test/CodeGen/PowerPC/popcount.ll
The file was modifiedllvm/test/CodeGen/X86/pr44749.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll
The file was modifiedllvm/test/CodeGen/ARM/cmpxchg-O0.ll
The file was modifiedllvm/test/CodeGen/SPARC/fp16-promote.ll
The file was modifiedllvm/test/CodeGen/X86/stack-protector-strong-macho-win32-xor.ll
The file was modifiedllvm/test/DebugInfo/X86/subreg.ll
The file was modifiedllvm/test/CodeGen/Mips/atomicCmpSwapPW.ll
The file was modifiedllvm/test/DebugInfo/AArch64/prologue_end.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub.ll
The file was modifiedllvm/test/CodeGen/X86/atomic32.ll
The file was modifiedllvm/test/DebugInfo/X86/op_deref.ll
The file was modifiedllvm/test/DebugInfo/X86/sret.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/cttz.ll
The file was modifiedllvm/test/CodeGen/X86/2009-04-14-IllegalRegs.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fp-int128-fp-combine.ll
The file was modifiedllvm/test/CodeGen/X86/atomic-monotonic.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fcmp.ll
The file was modifiedllvm/test/CodeGen/ARM/Windows/alloca.ll
The file was modifiedllvm/test/CodeGen/X86/volatile.ll
The file was modifiedllvm/test/DebugInfo/Mips/delay-slot.ll
The file was modifiedllvm/test/CodeGen/X86/2013-10-14-FastISel-incorrect-vreg.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/var_arg.ll
The file was modifiedllvm/test/CodeGen/X86/pr11415.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-cmp-branch.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/mul_vec.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll
The file was modifiedllvm/test/CodeGen/AArch64/unwind-preserved-from-mir.mir
The file was modifiedllvm/test/CodeGen/ARM/ldrd.ll
The file was modifiedllvm/test/CodeGen/Mips/atomic.ll
The file was removedllvm/test/CodeGen/PowerPC/spill-nor0.mir
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-vararg.ll
The file was modifiedllvm/test/DebugInfo/X86/prologue-stack.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/float_constants.ll
The file was modifiedllvm/test/CodeGen/X86/crash-O0.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/icmp.ll
The file was modifiedllvm/test/DebugInfo/X86/fission-ranges.ll
The file was modifiedllvm/test/CodeGen/AArch64/combine-loads.ll
The file was modifiedllvm/test/CodeGen/AArch64/popcount.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/reserve-vgpr-for-sgpr-spill.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/zext_and_sext.ll
The file was modifiedllvm/test/DebugInfo/X86/spill-indirect-nrvo.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill192.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll
The file was modifiedllvm/test/CodeGen/SystemZ/swift-return.ll
The file was modifiedllvm/test/CodeGen/X86/pr1489.ll
The file was modifiedllvm/test/CodeGen/X86/pr32484.ll
The file was modifiedllvm/test/CodeGen/Mips/copy-fp64.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/test_TypeInfoforMF.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fast-isel-pcrel.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wwm-reserved.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-select-sse.ll
The file was modifiedllvm/test/CodeGen/PowerPC/addegluecrash.ll
The file was modifiedllvm/test/CodeGen/X86/pr32340.ll
The file was modifiedllvm/test/CodeGen/Mips/atomic-min-max.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-vcvt_f.ll
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-ldr-str-thumb-neg-index.ll
The file was modifiedllvm/test/CodeGen/X86/pr47000.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub_vec.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll
The file was modifiedllvm/test/DebugInfo/X86/dbg-declare-arg.ll
The file was modifiedllvm/test/CodeGen/X86/atomic6432.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store_4_unaligned.ll
The file was modifiedllvm/test/CodeGen/X86/fast-isel-select.ll
The file was modifiedllvm/test/CodeGen/PowerPC/p9-vinsert-vextract.ll
The file was modifiedllvm/test/CodeGen/X86/stack-protector-msvc.ll
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-call.ll
The file was modifiedllvm/test/CodeGen/AArch64/unwind-preserved.ll
The file was modifiedllvm/test/CodeGen/Thumb2/high-reg-spill.mir
The file was modifiedllvm/test/DebugInfo/ARM/prologue_end.ll
The file was modifiedllvm/test/CodeGen/ARM/crash-greedy-v6.ll
The file was modifiedllvm/test/CodeGen/AArch64/fast-isel-cmpxchg.ll
The file was modifiedllvm/test/CodeGen/AArch64/br-cond-not-merge.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-m0.ll
The file was modifiedllvm/test/CodeGen/Hexagon/vect/vect-load-v4i16.ll
The file was modifiedllvm/test/CodeGen/X86/pr42452.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/aggregate_struct_return.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/mul.ll
The file was modifiedllvm/test/CodeGen/SystemZ/swifterror.ll
The file was modifiedllvm/test/CodeGen/X86/avx-load-store.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_split_because_of_memsize_or_align.ll
The file was modifiedllvm/test/CodeGen/Mips/msa/ldr_str.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vector-spill.ll
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/memtest1.ll
The file was modifiedllvm/test/CodeGen/PowerPC/elf-common.ll
The file was modifiedllvm/test/CodeGen/X86/pr30430.ll
The file was modifiedllvm/test/CodeGen/PowerPC/spill-nor0.ll
The file was removedllvm/test/CodeGen/AMDGPU/fast-ra-kills-vcc.mir
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-select.ll
The file was modifiedllvm/test/CodeGen/ARM/cmpxchg-O0-be.ll
The file was modifiedllvm/test/CodeGen/X86/pr34653.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec.ll
The file was modifiedllvm/test/CodeGen/X86/phys-reg-local-regalloc.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fastregalloc-self-loop-heuristic.mir
The file was modifiedllvm/test/CodeGen/X86/swift-return.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/rem_and_div.ll
Commit 5495b6916469c0fc242df4fc650b50848d75911b by alexshap
[llvm-objcopy][MachO] Add llvm-bitcode-strip driver

This diff adds llvm-bitcode-strip driver to llvm-objcopy.
In the future this will enable us to build a replacement for the tool bitcode_strip.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D87212
The file was modifiedllvm/tools/llvm-objcopy/CopyConfig.cpp
The file was modifiedllvm/test/tools/llvm-objcopy/tool-name.test
The file was modifiedllvm/test/lit.cfg.py
The file was modifiedllvm/tools/llvm-objcopy/CopyConfig.h
The file was modifiedllvm/test/CMakeLists.txt
The file was modifiedllvm/test/tools/llvm-objcopy/tool-version.test
The file was modifiedllvm/tools/llvm-objcopy/llvm-objcopy.cpp
The file was addedllvm/tools/llvm-objcopy/BitcodeStripOpts.td
The file was modifiedllvm/tools/llvm-objcopy/CMakeLists.txt
The file was modifiedllvm/test/tools/llvm-objcopy/tool-help-message.test
Commit 90fffdd0f705bfb480810cef087305567dc4f6cf by thakis
Revert "[gn build] (manually) port 9b6765e784b3" anf follow-ups

9b6765e784b3 was reverted in 549e55b3d5634.

This reverts commit 442801a7b9b5460114498c48c12b8af40e495188.
This reverts commit 929d91a55616d4fcf4754044b063644807b87fbe.
This reverts commit 7c2d83347f4ea146af1aca72fe289294aaf212be.
The file was removedllvm/utils/gn/secondary/clang-tools-extra/clangd/quality/gen_decision_forest.gni
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
Commit 2ca68b6542cf1df79613ac99d41ac58b2a7cea48 by alexshap
[llvm-objcopy][MachO] Clean up the interface of Object

Remove the method addLoadCommand which was used only in a single place.
NFC.

Test plan: make check-all
The file was modifiedllvm/tools/llvm-objcopy/MachO/Object.h
The file was modifiedllvm/tools/llvm-objcopy/MachO/Object.cpp
The file was modifiedllvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp
Commit 528a1f121c55793dbae46293ba4a088dd79de7f5 by thakis
[gn build] (manually) port 5495b691646
The file was modifiedllvm/utils/gn/secondary/llvm/tools/llvm-objcopy/BUILD.gn
Commit ad68a8b9526601c5a778d74b33e2d660fbc52772 by dblaikie
DebugInfo: Cleanup RLE dumping, using a length-constrained DataExtractor rather than carrying the end offset separately
The file was modifiedllvm/lib/BinaryFormat/Dwarf.cpp
The file was modifiedllvm/include/llvm/BinaryFormat/Dwarf.h
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFListTable.h
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugRnglists.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/debug_rnglists_invalid.s
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFDebugRnglists.h