SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [NFC][PowerPC] Add the inheritable and additional features to make the (details)
  2. [LegalizeDAG] When expanding vector SRA/SRL/SHL add the new BUILD_VECTOR (details)
  3. [LegalizeDAG] Return true from ExpandNode for some nodes that don't have (details)
  4. AvoidBindCheck.cpp: Fix GCC 5.3 build errors (details)
  5. AvoidBindCheck.cpp: Fix unused variables warning (details)
  6. [lldb][NFC] Remove ThreadSafeSTLVector and ThreadSafeSTLMap and their (details)
  7. [UpdateTestChecks] Fix parsing of RUN: lines with line continuations (details)
  8. [llvm][bindings][go] Fix typo (details)
  9. [NFC] Slightly improve wording in the comments (details)
  10. [MachineVerifier]  Improve checks of target instructions operands. (details)
  11. [NFC] Tidy-ups to TimeProfiler.cpp (details)
  12. Mark some tests as xfail on AArch64 Linux (details)
  13. [LiveDebugValues] Introduce entry values of unmodified params (details)
  14. ImplicitNullChecks: Don't add a dead definition of DepMI as live-in (details)
  15. Temporarily run machine-verifier once in test/CodeGen/SPARC/fp128.ll, so (details)
  16. [asan] Remove debug locations from alloca prologue instrumentation (details)
  17. [lldb] Move register info "augmentation" from gdb-remote into ABI (details)
  18. [lldb] Remove tab from TestReturnValue.py (details)
  19. [DWARF] Add support for parsing/dumping section indices in location (details)
  20. Fixup 6d18e53: xfail TestShowLocationDwarf5.py properly (details)
  21. [clang][CodeGen] Make use of cc1 instead of clang in the tests (details)
  22. [lldb][NFC] Test going up/down one line in the multiline expression (details)
  23. [OpenCL] Fix mangling of single-overload builtins (details)
  24. [CodeGen] Move ARMCodegenPrepare to TypePromotion (details)
  25. [lldb] Remove all remaining tabs from TestReturnValue.py (details)
  26. Fix for buildbots (details)
  27. [lldb][NFC] Extract searching for function SymbolContexts out of (details)
  28. gn build: Merge bc76dadb3cf (details)
  29. [AArch64][SVE] Implement shift intrinsics (details)
  30. Fix compatibility with python3 of clang-include-fixer.py (details)
  31. [VPlan] Add dump function to VPlan class. (details)
  32. Revert "[LiveDebugValues] Introduce entry values of unmodified params" (details)
  33. [AArch64][SVE] Add intrinsics for gather loads with 64-bit offsets (details)
  34. [lldb][NFC] Move Curses interface implementation to own file (details)
  35. [Support] Add ProcName to TimeTraceProfiler (details)
  36. Add FunctionDecl::getParameterSourceRange() (details)
  37. [AArch64][SVE2] Implement remaining SVE2 floating-point intrinsics (details)
  38. [NFCI][DebugInfo] Corrected a comment. (details)
  39. [Aarch64][SVE] Add intrinsics for gather loads with 32-bits offsets (details)
  40. [LLDB] Disable MSVC warning C4190: (details)
  41. [Object/ELF] - Refine the error reported when section's offset + size (details)
  42. Precommit tests for D70673 (details)
  43. [DDG] Data Dependence Graph - Topological Sort (Memory Leak Fix) (details)
  44. [DebugInfo] Make DebugVariable class available in DebugInfoMetadata (details)
  45. [libomptarget] Build a minimal deviceRTL for amdgcn (details)
  46. [Aarch64][SVE] Add intrinsics for gather loads (vector + imm) (details)
  47. [lldb] Use llvm range functions in LineTable.cpp (details)
  48. [lldb] Remove unneeded semicolon in IOHandlerCursesGUI (details)
  49. [SelectionDAG] Reoder ViewXXXDAGs declarations to match execution order. (details)
  50. [AArch64] Fix over-eager fusing of NEON SIMD MUL/ADD (details)
  51. [lldb/Reproducer] Add version check (details)
  52. [OpenCL] Use generic addr space for lambda call operator (details)
  53. [EditLine] Fix RecallHistory to make it go in the right direction. (details)
Commit 4cde2d6b8db6257739c44d339a1677934b154704 by qshanz
[NFC][PowerPC] Add the inheritable and additional features to make the
processor definition more clear
The old processor design assume that, all the old processor's feature
must be inherited into future processor. That is not true as instruction
fusion or some implementation defined features are not inheritable.
What this patch did:
* Rename the old "specific features" to "additional features" that keep
the new added inheritable features.
* Use the "specific features" to keep those features only for specific
processor.
* Add the "inheritable features" to keep all the features that
inherited from early processor.
Differential Revision: https://reviews.llvm.org/D70768
The file was modifiedllvm/lib/Target/PowerPC/PPC.td
Commit f92000187e149a51900c05056ed644f43603fb66 by craig.topper
[LegalizeDAG] When expanding vector SRA/SRL/SHL add the new BUILD_VECTOR
to the Results vector instead of just calling ReplaceNode
The code that processes the Results vector also calls ReplaceNode and
makes ExpandNode return true.
If we don't add it to the Results node, we end up returning false from
ExpandNode. This causes ConvertNodeToLibcall to be called next. But
ConvertNodeToLibcall doesn't do anything for shifts so they just pass
through unmodified. Except for printing a debug message.
Ultimately, I'd like to add more checks to ExpandNode and
ConvertNodeToLibcall to make sure we don't have nodes marked as Expand
that don't have any Expand or libcall handling.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Commit 039664db87d255570854ade5241bf53b8ce3b5a9 by craig.topper
[LegalizeDAG] Return true from ExpandNode for some nodes that don't have
expand support.
These nodes have a FIXME that they only get here because a Custom
handler returned SDValue() instead of the original Op.
Even though we aren't expanding them, we should return true here to
prevent ConvertNodeToLibcall from also trying to process them until the
FIXME has been addressed.
I'm hoping to add checking to ConvertNodeToLibcall to make sure we don't
give it nodes it doesn't have support for.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Commit 8e7f60e942ff009de742e20e10ebc09dcdecd5a2 by hans
AvoidBindCheck.cpp: Fix GCC 5.3 build errors
It was failing with:
clang-tools-extra/clang-tidy/modernize/AvoidBindCheck.cpp:61:29: error:
declaration of ‘clang::tidy::modernize::{anonymous}::CaptureMode
clang::tidy::modernize::{anonymous}::BindArgument::CaptureMode’
[-fpermissive]
  CaptureMode CaptureMode = CM_None;
                            ^
clang-tools-extra/clang-tidy/modernize/AvoidBindCheck.cpp:38:6: error:
changes meaning of ‘CaptureMode’ from ‘enum
clang::tidy::modernize::{anonymous}::CaptureMode’ [-fpermissive]
enum CaptureMode { CM_None, CM_ByRef, CM_ByValue, CM_InitExpression };
     ^
The file was modifiedclang-tools-extra/clang-tidy/modernize/AvoidBindCheck.cpp
Commit b5f295ffcec2fa7402e39eb1262acbd55a7d39f5 by hans
AvoidBindCheck.cpp: Fix unused variables warning
The file was modifiedclang-tools-extra/clang-tidy/modernize/AvoidBindCheck.cpp
Commit 315600f480055f5143aaa245f25bd25221edfa91 by Raphael Isemann
[lldb][NFC] Remove ThreadSafeSTLVector and ThreadSafeSTLMap and their
use in ValueObjectSynthetic
Summary: ThreadSafeSTLVector and ThreadSafeSTLMap are not useful for
achieving any degree of thread safety in LLDB and should be removed
before they are used in more places. They are only used (unsurprisingly
incorrectly) in
`ValueObjectSynthetic::GetChildAtIndex`, so this patch replaces their
use there with a simple mutex with which we guard the related data
structures. This doesn't make ValueObjectSynthetic::GetChildAtIndex any
more thread-safe, but on the other hand it at least allows us to get rid
of the ThreadSafeSTL* data structures without changing the observable
behaviour of ValueObjectSynthetic (beside that it is now a few bytes
smaller).
Reviewers: labath, JDevlieghere, jingham
Reviewed By: labath
Subscribers: lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D70845
The file was modifiedlldb/include/lldb/Core/ValueObjectSyntheticFilter.h
The file was removedlldb/include/lldb/Core/ThreadSafeSTLMap.h
The file was modifiedlldb/source/Core/ValueObjectSyntheticFilter.cpp
The file was removedlldb/include/lldb/Core/ThreadSafeSTLVector.h
Commit c246d6e536c7112019cba6cfc764daeb9088ef29 by Alexander.Richardson
[UpdateTestChecks] Fix parsing of RUN: lines with line continuations
I accidentally broke this in d9542db49e90457de62af3bfe395aaf4c47b68a5
due to incorrectly placed parentheses.
The file was modifiedllvm/utils/UpdateTestChecks/common.py
Commit 33f93ea23a09c89e701a12ee315decb469362ea8 by kadircet
[llvm][bindings][go] Fix typo
The file was modifiedllvm/bindings/go/llvm/dibuilder.go
Commit 9091f06994f09fceb079aa01e0fa3e1ea5c9e9f0 by kbobyrev
[NFC] Slightly improve wording in the comments
Reviewed by: hokein
Differential Revision: https://reviews.llvm.org/D70943
The file was modifiedclang-tools-extra/clangd/refactor/Rename.cpp
Commit 4fd8f11901b5bfb13a5fef597626dde31835873b by paulsson
[MachineVerifier]  Improve checks of target instructions operands.
While working with a patch for instruction selection, the splitting of a
large immediate ended up begin treated incorrectly by the backend. Where
a register operand should have been created, it instead became an
immediate. To my surprise the machine verifier failed to report this,
which at the time would have been helpful.
This patch improves the verifier so that it will report this type of
error.
This patch XFAILs CodeGen/SPARC/fp128.ll, which has been reported at
https://bugs.llvm.org/show_bug.cgi?id=44091
Review: thegameg, arsenm, fhahn https://reviews.llvm.org/D63973
The file was modifiedllvm/test/CodeGen/SPARC/fp128.ll
The file was addedllvm/test/MachineVerifier/verify-regops.mir
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
Commit df943a7a08102ed3d1f632e88b24a024a7c4ba81 by russell.gallop
[NFC] Tidy-ups to TimeProfiler.cpp
Remove unused include Make fields const where possible Move
initialisation to initialiser list
Differential Revision: https://reviews.llvm.org/D70904
The file was modifiedllvm/lib/Support/TimeProfiler.cpp
Commit 6d18e5366c9a0bffe45b179a830483b3f2ec9fa9 by diana.picus
Mark some tests as xfail on AArch64 Linux
I have either opened new bug reports for these tests, or added links to
existing bugs.
This should help make the lldb-aarch64-ubuntu buildbot green (there will
still be some unexpected passes that someone should look into, but those
can be handled later).
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/inline-stepping/TestInlineStepping.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/static-initializers/TestStaticInitializers.py
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/show_location/TestShowLocationDwarf5.py
The file was modifiedlldb/packages/Python/lldbsuite/test/linux/builtin_trap/TestBuiltinTrap.py
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/load_unload/TestLoadUnload.py
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/tail_call_frames/thread_step_out_or_return/TestSteppingOutWithArtificialFrames.py
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/step-avoids-no-debug/TestStepNoDebug.py
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/breakpoint/require_hw_breakpoints/TestRequireHWBreakpoints.py
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/return-value/TestReturnValue.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lang/cpp/trivial_abi/TestTrivialABI.py
Commit 4cfceb910692f9e894622da1b394324503667e46 by djordje.todorovic
[LiveDebugValues] Introduce entry values of unmodified params
The idea is to remove front-end analysis for the parameter's value
modification and leave it to the value tracking system. Front-end in
some cases marks a parameter as modified even the line of code that
modifies the parameter gets optimized, that implies that this will cover
more entry values even. In addition, extending the support for modified
parameters will be easier with this approach.
Since the goal is to recognize if a parameter’s value has changed, the
idea at very high level is: If we encounter a DBG_VALUE other than the
entry value one describing the same variable (parameter), we can assume
that the variable’s value has changed and we should not track its entry
value any more. That would be ideal scenario, but due to various LLVM
optimizations, a variable’s value could be just moved around from one
register to another
(and there will be additional DBG_VALUEs describing the same variable),
so we have to recognize such situation (otherwise, we will lose a lot of
entry values) and salvage the debug entry value.
Differential Revision: https://reviews.llvm.org/D68209
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/TestBasicEntryValuesX86_64.py
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp
The file was modifiedllvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir
The file was addedllvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir
The file was modifiedllvm/lib/CodeGen/LiveDebugValues.cpp
The file was addedllvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir
The file was addedllvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir
The file was addedllvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir
Commit f8c0cfc24eab0f23e3ebc65b10ee4276b1f15eeb by paulsson
ImplicitNullChecks: Don't add a dead definition of DepMI as live-in
This is one of the fixes needed to reapply D68267 which improves
verification of live-in lists.
Review: craig.topper https://reviews.llvm.org/D70434
The file was modifiedllvm/test/CodeGen/X86/implicit-null-checks.mir
The file was modifiedllvm/lib/CodeGen/ImplicitNullChecks.cpp
Commit 7b63e27cc0a940a67db84b8b8485dd8b81a2beeb by paulsson
Temporarily run machine-verifier once in test/CodeGen/SPARC/fp128.ll, so
that it XFAIL:s also without expensive checks.
See https://reviews.llvm.org/D63973
The file was modifiedllvm/test/CodeGen/SPARC/fp128.ll
Commit 09667bc1920463107684a566c3f2c3cef9b156e7 by aclopte
[asan] Remove debug locations from alloca prologue instrumentation
Summary: This fixes https://llvm.org/PR26673
"Wrong debugging information with -fsanitize=address" where asan
instrumentation causes the prologue end to be computed incorrectly:
findPrologueEndLoc, looks for the first instruction with a debug
location to determine the prologue end.  Since the asan instrumentation
instructions had debug locations, that prologue end was at some
instruction, where the stack frame is still being set up.
There seems to be no good reason for extra debug locations for the asan
instrumentations that set up the frame; they don't have a natural source
location.  In the debugger they are simply located at the start of the
function.
For certain other instrumentations like
-fsanitize-coverage=trace-pc-guard the same problem persists - that
might be more work to fix, since it looks like they rely on locations of
the tracee functions.
This partly reverts aaf4bb239487e0a3b20a8eaf94fc641235ba2c29
"[asan] Set debug location in ASan function prologue" whose motivation
was to give debug location info to the coverage callback. Its test only
ensures that the call to @__sanitizer_cov_trace_pc_guard is given the
correct source location; as the debug location is still set in
ModuleSanitizerCoverage::InjectCoverageAtBlock, the test does not break.
So -fsanitize-coverage is hopefully unaffected - I don't think it should
rely on the debug locations of asan-generated allocas.
Related revision: 3c6c14d14b40adfb581940859ede1ac7d8ceae7a
"ASAN: Provide reliable debug info for local variables at -O0."
Below is how the X86 assembly version of the added test case changes. We
get rid of some .loc lines and put prologue_end where the user code
starts.
```diff
--- 2.master.s 2019-12-02 12:32:38.982959053 +0100
+++ 2.patch.s 2019-12-02 12:32:41.106246674 +0100
@@ -45,8 +45,6 @@
.cfi_offset %rbx, -24
xorl %eax, %eax
movl %eax, %ecx
- .Ltmp2:
- .loc 1 3 0 prologue_end      # 2.c:3:0
cmpl $0, __asan_option_detect_stack_use_after_return
movl %edi, 92(%rbx)          # 4-byte Spill
movq %rsi, 80(%rbx)          # 8-byte Spill
@@ -57,9 +55,7 @@
callq __asan_stack_malloc_0
movq %rax, 72(%rbx)          # 8-byte Spill
.LBB1_2:
- .loc 1 0 0 is_stmt 0         # 2.c:0:0
movq 72(%rbx), %rax          # 8-byte Reload
- .loc 1 3 0                   # 2.c:3:0
cmpq $0, %rax
movq %rax, %rcx
movq %rax, 64(%rbx)          # 8-byte Spill
@@ -72,9 +68,7 @@
movq %rax, %rsp
movq %rax, 56(%rbx)          # 8-byte Spill
.LBB1_4:
- .loc 1 0 0                   # 2.c:0:0
movq 56(%rbx), %rax          # 8-byte Reload
- .loc 1 3 0                   # 2.c:3:0
movq %rax, 120(%rbx)
movq %rax, %rcx
addq $32, %rcx
@@ -99,7 +93,6 @@
movb %r8b, 31(%rbx)          # 1-byte Spill
je .LBB1_7
# %bb.5:
- .loc 1 0 0                   # 2.c:0:0
movq 40(%rbx), %rax          # 8-byte Reload
andq $7, %rax
addq $3, %rax
@@ -118,7 +111,8 @@
movl %ecx, (%rax)
movq 80(%rbx), %rdx          # 8-byte Reload
movq %rdx, 128(%rbx)
- .loc 1 4 3 is_stmt 1         # 2.c:4:3
+.Ltmp2:
+ .loc 1 4 3 prologue_end      # 2.c:4:3
movq %rax, %rdi
callq f
movq 48(%rbx), %rax          # 8-byte Reload
```
Reviewers: eugenis, aprantl
Reviewed By: eugenis
Subscribers: ormris, aprantl, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70894
The file was addedllvm/test/Instrumentation/AddressSanitizer/debug-info-alloca.ll
The file was modifiedllvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
The file was modifiedllvm/test/Instrumentation/AddressSanitizer/local_stack_base.ll
Commit 2b8db387f2a616f39a077ede18c6366f2ea9f203 by pavel
[lldb] Move register info "augmentation" from gdb-remote into ABI
Summary: Previously the ABI plugin exposed some "register infos" and the
gdb-remote code used those to fill in the missing bits. Now, the
"filling in" code is in the ABI plugin itself, and the gdb-remote code
just invokes that.
The motivation for this is two-fold: a) the "augmentation" logic is
useful outside of process gdb-remote. For
instance, it would allow us to avoid repeating the register number
definitions in minidump code. b) It gives more implementation freedom
to the ABI classes. Now that
these "register infos" are essentially implementation details, classes
can use other methods to obtain dwarf/eh_frame register numbers -- for
instance they can consult llvm MC layer.
Since the augmentation code was not currently tested anywhere, I took
the opportunity to create a simple test for it.
Reviewers: jasonmolenda, clayborg, tatyana-krasnukha
Subscribers: aprantl, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D70906
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was modifiedlldb/include/lldb/Target/ABI.h
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/gdb_remote_client/TestTargetXMLArch.py
The file was addedlldb/packages/Python/lldbsuite/test/functionalities/gdb_remote_client/basic_eh_frame.yaml
The file was modifiedlldb/source/Target/ABI.cpp
Commit 46d0ec3a803021281c8d868b1487d2d5cd06f274 by Raphael Isemann
[lldb] Remove tab from TestReturnValue.py
Mixing tabs and spaces makes Python exit with this error:
  File
"llvm/lldb/packages/Python/lldbsuite/test/functionalities/return-value/TestReturnValue.py",
line 23
   return (self.getArchitecture() == "aarch64" and self.getPlatform() ==
"linux")
                                                                       
       ^ TabError: inconsistent use of tabs and spaces in indentation
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/return-value/TestReturnValue.py
Commit 1fbe8a82e1ea0168ee10079a18140135222d1d2c by pavel
[DWARF] Add support for parsing/dumping section indices in location
lists
Summary: This does exactly what it says on the box. The only small
gotcha is the section index computation for offset_pair entries, which
can use either the base address section, or the section from the
offset_pair entry. This is to support both the cases where the base
address is relocated
(points to the base of the CU, typically), and the case where the base
address is a constant (typically zero) and relocations are on the
offsets themselves.
Reviewers: dblaikie, JDevlieghere, aprantl, SouraVX
Subscribers: hiraditya, llvm-commits, probinson
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70540
The file was modifiedllvm/test/DebugInfo/X86/dwarfdump-debug-loc-simple.test
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/debug_loclists.s
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFDebugLoc.h
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFContext.cpp
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Commit 057626b4393836e11712bd694afda121d8309973 by diana.picus
Fixup 6d18e53: xfail TestShowLocationDwarf5.py properly
Forgot to squash this...
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/show_location/TestShowLocationDwarf5.py
Commit 01a26fa74a9b3ab876a7d3bf30d9aca2d5dfcc7d by kadircet
[clang][CodeGen] Make use of cc1 instead of clang in the tests
The file was modifiedclang/test/CodeGen/arm-neon-vcadd.c
Commit 4821d2a014e02b14223676c98b2ef5244eb91da8 by Raphael Isemann
[lldb][NFC] Test going up/down one line in the multiline expression
editor
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/multiline-navigation/TestMultilineNavigation.py
Commit 6713670b17324b81cc457f3a37dbc8c1ee229b88 by sven.vanhaastregt
[OpenCL] Fix mangling of single-overload builtins
Commit 9a8d477a0e0 ("[OpenCL] Add builtin function attribute handling",
2019-11-05) stopped Clang from mangling single-overload builtins, which
is incorrect.
The file was modifiedclang/test/CodeGenOpenCL/fdeclare-opencl-builtins.cl
The file was modifiedclang/lib/Sema/SemaLookup.cpp
Commit bc76dadb3cf16c38564ccb1cc54206279b7c54bc by sam.parker
[CodeGen] Move ARMCodegenPrepare to TypePromotion
Convert ARMCodeGenPrepare into a generic type promotion pass by:
- Removing the insertion of arm specific intrinsics to handle narrow
types as we weren't using this.
- Removing ARMSubtarget references.
- Now query a generic TLI object to know which types should be
promoted and what they should be promoted to.
- Move all codegen tests into Transforms folder and testing using opt
and not llc, which is how they should have been written in the
first place...
The pass searches up from icmp operands in an attempt to safely promote
types so we can avoid generating unnecessary unsigned extends during DAG
ISel.
Differential Revision: https://reviews.llvm.org/D69556
The file was modifiedllvm/include/llvm/InitializePasses.h
The file was modifiedllvm/test/CodeGen/ARM/O3-pipeline.ll
The file was removedllvm/lib/Target/ARM/ARMCodeGenPrepare.cpp
The file was modifiedllvm/lib/CodeGen/CMakeLists.txt
The file was removedllvm/test/CodeGen/ARM/CGP/arm-cgp-calls.ll
The file was removedllvm/test/CodeGen/ARM/CGP/arm-cgp-signed-icmps.ll
The file was addedllvm/test/Transforms/TypePromotion/ARM/phis-ret.ll
The file was removedllvm/test/CodeGen/ARM/CGP/arm-cgp-icmps.ll
The file was removedllvm/test/CodeGen/ARM/CGP/arm-cgp-pointers.ll
The file was addedllvm/test/Transforms/TypePromotion/ARM/signed.ll
The file was modifiedllvm/lib/CodeGen/CodeGen.cpp
The file was addedllvm/test/Transforms/TypePromotion/ARM/calls.ll
The file was modifiedllvm/lib/Target/ARM/ARM.h
The file was modifiedllvm/lib/Target/ARM/CMakeLists.txt
The file was addedllvm/test/Transforms/TypePromotion/ARM/clear-structures.ll
The file was addedllvm/test/Transforms/TypePromotion/ARM/pointers.ll
The file was addedllvm/test/Transforms/TypePromotion/ARM/wrapping.ll
The file was addedllvm/lib/CodeGen/TypePromotion.cpp
The file was addedllvm/test/Transforms/TypePromotion/ARM/lit.local.cfg
The file was addedllvm/test/Transforms/TypePromotion/ARM/signed-icmps.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetMachine.cpp
The file was addedllvm/test/Transforms/TypePromotion/ARM/icmps.ll
The file was removedllvm/test/CodeGen/ARM/CGP/arm-cgp-phis-ret.ll
The file was addedllvm/test/Transforms/TypePromotion/ARM/casts.ll
The file was addedllvm/test/Transforms/TypePromotion/ARM/switch.ll
The file was removedllvm/test/CodeGen/ARM/CGP/arm-cgp-overflow.ll
The file was modifiedllvm/include/llvm/CodeGen/Passes.h
The file was removedllvm/test/CodeGen/ARM/CGP/clear-structures.ll
The file was removedllvm/test/CodeGen/ARM/CGP/arm-cgp-signed.ll
The file was removedllvm/test/CodeGen/ARM/CGP/arm-cgp-casts.ll
The file was removedllvm/test/CodeGen/ARM/CGP/arm-cgp-switch.ll
The file was modifiedllvm/tools/opt/opt.cpp
Commit b37a43d93db8c5afb3b95d803638f0536608779d by Raphael Isemann
[lldb] Remove all remaining tabs from TestReturnValue.py
I assumed this was just a single typo, but it seems we actually have a
whole bunch of tabs in this file which cause Python to complain about
mixing tabs and spaces.
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/return-value/TestReturnValue.py
Commit 26bf2a510f7904236982f5f9e83835f36917871a by sam.parker
Fix for buildbots
Change pass name in pipeline test.
The file was modifiedllvm/test/CodeGen/ARM/O3-pipeline.ll
Commit 16c0653db1150c849bb25f0547abb64349234394 by Raphael Isemann
[lldb][NFC] Extract searching for function SymbolContexts out of
ClangExpressionDeclMap::LookupFunction
This code was just creating a new SymbolContextList with any found
functions in the front and orders them by how close they are to the
current frame. This refactors this code into its own function to make
this more obvious.
Doesn't do any other changes to the code, so this is NFC.
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.h
Commit 14f767393945857d7a4652e1e7a832d44649b496 by llvmgnsyncbot
gn build: Merge bc76dadb3cf
The file was modifiedllvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
Commit 7483eb656fd290346e0ad70e553755fe9155e203 by kerry.mclaughlin
[AArch64][SVE] Implement shift intrinsics
Summary: Adds the following intrinsics:
- asr & asrd
- insr
- lsl & lsr
This patch also adds a new AArch64ISD node (INSR) to represent the
int_aarch64_sve_insr intrinsic.
Reviewers: huntergr, sdesmalen, dancgr, mgudim, rengolin, efriedma
Reviewed By: sdesmalen
Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl,
cameron.mcinally, cfe-commits, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70437
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was addedllvm/test/CodeGen/AArch64/sve-intrinsics-shifts.ll
Commit aa189ed25fbd861b07eb5d5116dfd8e33e2b1991 by benny.kra
Fix compatibility with python3 of clang-include-fixer.py
clang-include-fixer was recently updated to be python3-compatible.
However, an exception handling clause was improperly using the
deprecated `message` property of Exception classes, so the code was not
yet entirely python3-compatible.
Differential Revision: https://reviews.llvm.org/D70902
The file was modifiedclang-tools-extra/clang-include-fixer/tool/clang-include-fixer.py
Commit e9c68422dee9d2883b201580867c2edc4f55d49e by flo
[VPlan] Add dump function to VPlan class.
This adds a dump() function to VPlan, which uses the existing
operator<<.
This method provides a convenient way to dump a VPlan while debugging,
e.g. from lldb.
Reviewers: hsaito, Ayal, gilr, rengolin
Reviewed By: hsaito
Differential Revision: https://reviews.llvm.org/D70920
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
Commit 409350deeaf27ab767018b4c4834cfb82919e338 by djordje.todorovic
Revert "[LiveDebugValues] Introduce entry values of unmodified params"
This reverts commit rG4cfceb910692 due to LLDB test failing.
The file was removedllvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir
The file was removedllvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/main.cpp
The file was modifiedllvm/lib/CodeGen/LiveDebugValues.cpp
The file was removedllvm/test/DebugInfo/MIR/X86/propagate-entry-value-cross-bbs.mir
The file was modifiedllvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir
The file was removedllvm/test/DebugInfo/MIR/X86/entry-values-diamond-bbs.mir
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/param_entry_vals/basic_entry_values_x86_64/TestBasicEntryValuesX86_64.py
Commit 6e51ceba536d88f882737c9c4f9ff0ffb0004bfd by sander.desmalen
[AArch64][SVE] Add intrinsics for gather loads with 64-bit offsets
This patch adds the following intrinsics for gather loads with 64-bit
offsets:
     * @llvm.aarch64.sve.ld1.gather (unscaled offset)
     * @llvm.aarch64.sve.ld1.gather.index (scaled offset)
These intrinsics map 1-1 to the following AArch64 instructions
respectively (examples for half-words):
     * ld1h { z0.d }, p0/z, [x0, z0.d]
     * ld1h { z0.d }, p0/z, [x0, z0.d, lsl #1]
Committing on behalf of Andrzej Warzynski (andwar)
Reviewers: sdesmalen, huntergr, rovka, mgudim, dancgr, rengolin,
efriedma
Reviewed By: efriedma
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70542
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrFormats.td
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-64bit-scaled-offset.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was addedllvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-64bit-unscaled-offset.ll
The file was modifiedllvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
Commit 7caa17caf8e290fb865ac81470da737056ab0ace by Raphael Isemann
[lldb][NFC] Move Curses interface implementation to own file
Summary: The IOHandler class source file is currently around 4600 LOC.
However only 200 of these lines are concerned with the actual IOHandler
class and the rest are the implementations for Editline,
IOHandlerConfirm and the Curses interface. All these large features also
cause that the IOHandler (which is in Core) has a large set of
dependencies on other parts of LLDB.
This patch splits out the code for the curses interface into its own
file. This way the simple IOHandler code is no longer buried in-between
much larger functionalities.
Next up is splitting out the other IOHandlers into their own files and
then move them to more appropriate parts of LLDB.
Reviewers: labath, clayborg, JDevlieghere
Reviewed By: labath
Subscribers: mgorny, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D70946
The file was modifiedlldb/source/Core/IOHandler.cpp
The file was modifiedlldb/source/Commands/CommandObjectGUI.cpp
The file was addedlldb/source/Core/IOHandlerCursesGUI.cpp
The file was modifiedlldb/include/lldb/Core/IOHandler.h
The file was addedlldb/include/lldb/Core/IOHandlerCursesGUI.h
The file was modifiedlldb/source/Core/CMakeLists.txt
Commit aedeab7f85caaa0946152e5d73e37455267019bb by russell.gallop
[Support] Add ProcName to TimeTraceProfiler
This was hard-coded to "clang". This change allows it to to be used on
processes other than clang (such as lld).
This gets reported as clang-10 on Linux and clang.exe on Windows so
adapted test to accommodate this.
Differential Revision: https://reviews.llvm.org/D70950
The file was modifiedclang/tools/driver/cc1_main.cpp
The file was modifiedllvm/lib/Support/TimeProfiler.cpp
The file was modifiedllvm/include/llvm/Support/TimeProfiler.h
The file was modifiedclang/test/Driver/check-time-trace.cpp
Commit cc3c935da24c8ebe4fd92638574462b762d92335 by aaron
Add FunctionDecl::getParameterSourceRange()
This source range covers the list of parameters of the function
declaration, including the ellipsis for a variadic function.
The file was modifiedclang/include/clang/AST/Decl.h
The file was modifiedclang/lib/AST/Decl.cpp
The file was modifiedclang/lib/AST/Type.cpp
The file was modifiedclang/lib/Sema/SemaType.cpp
The file was modifiedclang/include/clang/AST/Type.h
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was modifiedclang/unittests/AST/SourceLocationTest.cpp
Commit 8881ac9c3986bad3a3b96a01fe9d603a740b2107 by kerry.mclaughlin
[AArch64][SVE2] Implement remaining SVE2 floating-point intrinsics
Summary: Adds the following intrinsics:
- faddp
- fmaxp, fminp, fmaxnmp & fminnmp
- fmlalb, fmlalt, fmlslb & fmlslt
- flogb
Reviewers: huntergr, sdesmalen, dancgr, efriedma
Reviewed By: sdesmalen
Subscribers: efriedma, tschuett, kristof.beyls, hiraditya,
cameron.mcinally, cfe-commits, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70253
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was addedllvm/test/CodeGen/AArch64/sve2-intrinsics-fp-int-binary-logarithm.ll
The file was addedllvm/test/CodeGen/AArch64/sve2-intrinsics-non-widening-pairwise-arith.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was addedllvm/test/CodeGen/AArch64/sve2-intrinsics-fp-widening-mul-acc.ll
Commit 8dd17a13b04f00c41bc72fdb12a552f2df26e516 by SourabhSingh.Tomar
[NFCI][DebugInfo] Corrected a comment.
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
Commit 8bf31e28d7b6eb5743bda82fc5f8a98152b50e57 by sander.desmalen
[Aarch64][SVE] Add intrinsics for gather loads with 32-bits offsets
This patch adds intrinsics for SVE gather loads for which the offsets
are 32-bits wide and are:
* unscaled
* @llvm.aarch64.sve.ld1.gather.sxtw
* @llvm.aarch64.sve.ld1.gather.uxtw
* scaled (offsets become indices)
* @llvm.arch64.sve.ld1.gather.sxtw.index
* @llvm.arch64.sve.ld1.gather.uxtw.index The offsets are either zero
(uxtw) or sign (sxtw) extended to 64 bits.
These intrinsics map 1-1 to the corresponding SVE instructions (examples
for half-words):
* unscaled
* ld1h { z0.s }, p0/z, [x0, z0.s, sxtw]
* ld1h { z0.s }, p0/z, [x0, z0.s, uxtw]
* scaled
* ld1h { z0.s }, p0/z, [x0, z0.s, sxtw #1]
* ld1h { z0.s }, p0/z, [x0, z0.s, uxtw #1]
Committed on behalf of Andrzej Warzynski (andwar)
Reviewers: sdesmalen, kmclaughlin, eli.friedman, rengolin, rovka,
huntergr, dancgr, mgudim, efriedma
Reviewed By: sdesmalen
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70782
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was addedllvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-32bit-scaled-offsets.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-32bit-unscaled-offsets.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Commit 1cc0ba4cbdc54200e1b3c65e83e51a5368a819ea by alexandre.ganea
[LLDB] Disable MSVC warning C4190:
'LLDBSwigPythonBreakpointCallbackFunction' has C-linkage specified, but
returns UDT 'llvm::Expected<bool>' which is incompatible with C
Differential Revision: https://reviews.llvm.org/D70830
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
The file was modifiedlldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
Commit d7ecc0256ebda38e4c746a1ed0faeb3005410d93 by grimar
[Object/ELF] - Refine the error reported when section's offset + size
overruns the file buffer.
This is a follow-up requested in comments for D70826.
It changes the message from
"section X has a sh_offset (Y) + sh_size (Z) that cannot be represented"
to
"section X has a sh_offset (Y) + sh_size (Z) that is greater than the
file size (0xABC)"
when section's sh_offset + sh_size overruns a file buffer.
Differential revision: https://reviews.llvm.org/D70893
The file was modifiedllvm/test/tools/llvm-readobj/elf-verneed-invalid.test
The file was modifiedllvm/test/Object/invalid.test
The file was modifiedllvm/include/llvm/Object/ELF.h
The file was modifiedllvm/test/tools/llvm-readobj/elf-verdef-invalid.test
Commit 970d9719ea0d15795694d7686d4d8eb524bba379 by Sanne.Wouda
Precommit tests for D70673
The file was modifiedllvm/test/CodeGen/AArch64/neon-mla-mls.ll
The file was addedllvm/test/CodeGen/AArch64/overeager_mla_fusing.ll
Commit 2dd82a1c04961cac05966f29d22a2b4b42b01b69 by bmahjour
[DDG] Data Dependence Graph - Topological Sort (Memory Leak Fix)
Summary: This fixes the memory leak in
bec37c3fc766a7b97f8c52c181c325fd47b75259 and re-delivers the reverted
patch. In this patch the DDG DAG is sorted topologically to put the
nodes in the graph in the order that would satisfy all dependencies.
This helps transformations that would like to generate code based on the
DDG. Since the DDG is a DAG a reverse-post-order traversal would give us
the topological ordering. This patch also sorts the basic blocks passed
to the builder based on program order to ensure that the dependencies
are computed in the correct direction.
Authored By: bmahjour
Reviewer: Meinersbur, fhahn, myhsu, xtian, dmgreen, kbarton, jdoerfert
Reviewed By: Meinersbur
Subscribers: ychen, arphaman, simoll, a.elovikov, mgorny, hiraditya,
jfb, wuzish, llvm-commits, jsji, Whitney, etiotto, ppc-slack
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70609
The file was modifiedllvm/test/Analysis/DDG/root-node.ll
The file was modifiedllvm/include/llvm/Analysis/DDG.h
The file was modifiedllvm/test/Analysis/DDG/basic-loopnest.ll
The file was modifiedllvm/include/llvm/Analysis/DependenceGraphBuilder.h
The file was modifiedllvm/lib/Analysis/DDG.cpp
The file was modifiedllvm/test/Analysis/DDG/basic-b.ll
The file was modifiedllvm/test/Analysis/DDG/basic-a.ll
The file was modifiedllvm/lib/Analysis/DependenceGraphBuilder.cpp
Commit 269a9afe25cb0ab7a7c0c62b9d95975ffc653530 by stozer
[DebugInfo] Make DebugVariable class available in DebugInfoMetadata
The DebugVariable class is a class declared in LiveDebugValues.cpp which
is used to uniquely identify a single variable, using its source
variable, inline location, and fragment info to do so. This patch moves
this class into DebugInfoMetadata.h, making it available in a much
broader scope.
The file was modifiedllvm/lib/IR/DebugInfoMetadata.cpp
The file was modifiedllvm/lib/CodeGen/LiveDebugValues.cpp
The file was modifiedllvm/unittests/IR/MetadataTest.cpp
The file was modifiedllvm/include/llvm/IR/DebugInfoMetadata.h
Commit 877ffa716fba52251a7454ffd3727d025b617a1f by jonathanchesterfield
[libomptarget] Build a minimal deviceRTL for amdgcn
Summary:
[libomptarget] Build a minimal deviceRTL for amdgcn
The CMakeLists.txt file is functionally identical to the one used in the
aomp fork. Whitespace changes were made based on nvptx/CMakeLists.txt,
plus the copyright notice updated to match (Greg was the original author
so would like his sign off on that here).
This change will build a small subset of the deviceRTL if an appropriate
toolchain is available, e.g. a local install of rocm. Support.h is moved
from nvptx as a dependency of debug.h.
Reviewers: jdoerfert, ABataev, grokos, ronlieb, gregrodgers
Reviewed By: jdoerfert
Subscribers: jfb, Hahnfeld, jvesely, mgorny, openmp-commits
Tags: #openmp
Differential Revision: https://reviews.llvm.org/D70414
The file was removedopenmp/libomptarget/deviceRTLs/nvptx/src/support.h
The file was addedopenmp/libomptarget/deviceRTLs/common/support.h
The file was addedopenmp/libomptarget/deviceRTLs/amdgcn/CMakeLists.txt
The file was addedopenmp/libomptarget/deviceRTLs/amdgcn/src/device_environment.h
The file was modifiedopenmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
The file was modifiedopenmp/libomptarget/deviceRTLs/CMakeLists.txt
Commit 79f2422d6a68c3fce16ed1f3111f9214169c0e1f by sander.desmalen
[Aarch64][SVE] Add intrinsics for gather loads (vector + imm)
This patch adds intrinsics for SVE gather loads from memory addresses
generated by a vector base plus immediate index:
* @llvm.aarch64.sve.ld1.gather.imm
This intrinsics maps 1-1 to the corresponding SVE instruction (example
for half-words):
* ld1h { z0.d }, p0/z, [z0.d, #16]
Committed on behalf of Andrzej Warzynski (andwar)
Reviewers: sdesmalen, huntergr, kmclaughlin, eli.friedman, rengolin,
rovka, dancgr, mgudim, efriedma
Reviewed By: sdesmalen
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70806
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was addedllvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-vector-base.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Commit 159641d710b074b6d89e3aced179f9a2229e4eb0 by pavel
[lldb] Use llvm range functions in LineTable.cpp
to avoid needing to declare iterators everywhere.
The file was modifiedlldb/source/Symbol/LineTable.cpp
Commit ad5bb05405c0ea8fc82fae240e2006d241799cf6 by pavel
[lldb] Remove unneeded semicolon in IOHandlerCursesGUI
The file was modifiedlldb/include/lldb/Core/IOHandlerCursesGUI.h
Commit b4980f7781424f22244341e833743aaed8ae1d3e by deadalnix
[SelectionDAG] Reoder ViewXXXDAGs declarations to match execution order.
NFC
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Commit f2e7de81c625413a7f682c757ab64e7b63b48800 by Sanne.Wouda
[AArch64] Fix over-eager fusing of NEON SIMD MUL/ADD
Summary: The ISel pattern for SIMD MLA is a bit too eager: it replaces
the ADD with an MLA even when the MUL cannot be eliminated, e.g. when it
has another use.  An MLA is usually has a higher latency than an ADD
(and there are fewer pipes available that can execute it), so trading an
MLA for an ADD is not great.
ISel is not taking the number of uses of the MUL result into account,
nor any other factors such as the length of the critical path or other
resource pressure.
The MachineCombiner is able to make these judgments so this patch ports
the ISel pattern for MUL/ADD fusing to the MachineCombiner.
Similarly for MUL/SUB -> MLS, as well as the indexed variants.
The change has no impact on SPEC CPU© intrate nor fprate.
Reviewers: dmgreen, SjoerdMeijer, fhahn, Gerolf
Subscribers: kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70673
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-with-no-legality-check.mir
The file was modifiedllvm/include/llvm/CodeGen/MachineCombinerPattern.h
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/test/CodeGen/AArch64/overeager_mla_fusing.ll
Commit 62827737acd878af6cd8930758b0d6f297173f40 by Jonas Devlieghere
[lldb/Reproducer] Add version check
To ensure a reproducer works correctly, the version of LLDB used for
capture and replay must match. Right now the reproducer already contains
the LLDB version. However, this is purely informative. LLDB will happily
replay a reproducer generated with a different version of LLDB, which
can cause subtle differences.
This patch adds a version check which compares the current LLDB version
with the one in the reproducer. If the version doesn't match, LLDB will
refuse to replay. It also adds an escape hatch to make it possible to
still replay the reproducer without having to mess with the recorded
version. This might prove useful when you know two versions of LLDB
match, even though the version string doesn't. This behavior is
triggered by passing a new flag -reproducer-skip-version-check to the
lldb driver.
Differential revision: https://reviews.llvm.org/D70934
The file was addedlldb/test/Shell/Reproducer/TestVersionCheck.test
The file was modifiedlldb/include/lldb/API/SBReproducer.h
The file was modifiedlldb/tools/driver/Options.td
The file was modifiedlldb/source/API/SBReproducer.cpp
The file was modifiedlldb/tools/driver/Driver.cpp
Commit 980133a2098cf6159785b8ac0cbe4d8fbf99bfea by anastasia.stulova
[OpenCL] Use generic addr space for lambda call operator
Since lambdas are represented by callable objects, we add generic addr
space for implicit object parameter in call operator.
Any lambda variable declared in __constant addr space
(which is not convertible to generic) fails to compile with a
diagnostic. To support constant addr space we need to add a way to
qualify the lambda call operators.
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69938
The file was addedclang/test/SemaOpenCLCXX/address-space-lambda.cl
The file was modifiedclang/lib/Sema/SemaLambda.cpp
The file was modifiedclang/lib/Sema/SemaDeclCXX.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Sema/Sema.cpp
The file was modifiedclang/lib/Sema/SemaType.cpp
Commit 0e9b0b6d11e882efec8505d97c4b65e1562e6715 by Jonas Devlieghere
[EditLine] Fix RecallHistory to make it go in the right direction.
The naming used by editline for the history operations is counter
intuitive to how it's used in lldb for the REPL.
- The H_PREV operation returns the previous element in the history,
  which is newer than the current one.
- The H_NEXT operation returns the next element in the history, which
  is older than the current one.
This exposed itself as a bug in the REPL where the behavior of up- and
down-arrow was inverted. This wasn't immediately obvious because of how
we save the current "live" entry.
This patch fixes the bug and introduces and enum to wrap the editline
operations that match the semantics of lldb.
Differential revision: https://reviews.llvm.org/D70932
The file was modifiedlldb/include/lldb/Host/Editline.h
The file was modifiedlldb/source/Host/common/Editline.cpp