SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [perf-training] Make training data location configurable (details)
  2. AArch64: Fix frame record chain (details)
  3. gn build: (manually and belatedly) merge ed153ef044fd (details)
  4. Revert "AArch64: Fix frame record chain" (details)
  5. [cxx_status] Fix paper number for "Concept auto" paper. (details)
  6. [LegalizeTypes] In PromoteFloatOp_SETCC, don't both querying for (details)
  7. [LegalizeTypes] Teach BitcastToInt_ATOMIC_SWAP to only create FP16_TO_FP (details)
  8. [IR] Include more target specific intrinsic headers (details)
Commit 2c59c4ffb9c111f8d87a65839697d03fc485c51c by smeenai
[perf-training] Make training data location configurable
We may wish to keep the PGO training data outside the repository. Add a
CMake variable to allow referencing an external lit testsuite.
Differential Revision: https://reviews.llvm.org/D71507
The file was modifiedclang/utils/perf-training/lit.site.cfg.in
The file was modifiedclang/utils/perf-training/lit.cfg
The file was modifiedclang/utils/perf-training/order-files.lit.site.cfg.in
The file was modifiedclang/utils/perf-training/CMakeLists.txt
The file was modifiedclang/utils/perf-training/order-files.lit.cfg
Commit d4e10e6adb1b629b3fc1b78f7e281fbcec392edb by tzuhsiang.chien
AArch64: Fix frame record chain
The commit r369122 may keep LR and FP register (aka. frame record) in
the middle of a frame, thus we must add the offsets to ensure the FP
register always points to innermost frame record on the stack.
According to AAPCS64[1], a conforming code shall construct a linked list
of stack frames that can be traversed with frame records.  This commit
is also essential to frame-pointer-based stack unwinder (e.g.  the stack
unwinder in linx-perf-tools.)
[1]
https://github.com/ARM-software/software-standards/blob/master/abi/aapcs64/aapcs64.rst#the-frame-pointer
Test: llvm-lit
${LLVM_SRC}/test/CodeGen/AArch64/framelayout-frame-record.ll Test:
llvm-lit ${LLVM_SRC}/test/CodeGen/AArch64
Differential Revision: https://reviews.llvm.org/D70800
The file was modifiedllvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/framelayout-frame-record.mir
Commit 5ea34c15bb986b16741cc0a17996552859b74c49 by thakis
gn build: (manually and belatedly) merge ed153ef044fd
The file was modifiedllvm/utils/gn/secondary/clang/test/BUILD.gn
Commit 061a94e4e28551662e3c70e312475580d0c9184e by tzuhsiang.chien
Revert "AArch64: Fix frame record chain"
Breaks aosp-O3-polly-before-vectorizer-unprofitable with the following
error message:
void llvm::emitFrameOffset(llvm::MachineBasicBlock &,
MachineBasicBlock::iterator, const llvm::DebugLoc &, unsigned int,
unsigned int, llvm::StackOffset, const llvm::TargetInstrInfo *,
MachineInstr::MIFlag, bool, bool, bool *): Assertion `(DestReg !=
AArch64::SP || Bytes % 16 == 0) && "SP increment/decrement not 16-byte
aligned"' failed.
This reverts commit d4e10e6adb1b629b3fc1b78f7e281fbcec392edb.
The file was removedllvm/test/CodeGen/AArch64/framelayout-frame-record.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
Commit 357e64e95267de3dfc64b5563dec2df84e6cce0e by richard
[cxx_status] Fix paper number for "Concept auto" paper.
The file was modifiedclang/www/cxx_status.html
Commit 95ce8f94986c7d246c381757f6afbc00fe7bdbfb by craig.topper
[LegalizeTypes] In PromoteFloatOp_SETCC, don't both querying for
transforming the result type.
The result type is already legal, is doesnt' need to be transformed.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
Commit 1dc0c8af5e7d330bcbe23e4d88502e6b7f5135b8 by craig.topper
[LegalizeTypes] Teach BitcastToInt_ATOMIC_SWAP to only create FP16_TO_FP
when called from PromoteFloatResult.
There's also a call from SoftenFloatResult that should not be promoted.
The change test case would fail with the new RUN line prior to this
change.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
The file was modifiedllvm/test/CodeGen/X86/atomic32.ll
Commit 0133dc3983c2ed477a198d414d5d7ad4b95db549 by aheejin
[IR] Include more target specific intrinsic headers
After D71320, target-specific intrinsic headers should be included.
The file was modifiedpolly/lib/CodeGen/PPCGCodeGeneration.cpp