SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-zorg.git)

Summary

  1. [lldb] Increase the build timeout for the sanitized bot (details)
  2. Enable remote host configuration to run the target tests for Windows to (details)
  3. [VE] Staging buildbot (details)
Commit bd84296d9de634ca5ee36afeb2f12e9265fc9e5b by Jonas Devlieghere
[lldb] Increase the build timeout for the sanitized bot
The file was modifiedzorg/jenkins/jobs/jobs/lldb-cmake-sanitized
Commit 1e3be1d0254e886f3e7409e0a544903457939825 by vvereschaka
Enable remote host configuration to run the target tests for Windows to
ARM Linux cross buiders.
Passing the remote host and user name into a builder configuration from
the build worker properties if they are specified there.
Differential Revision: https://reviews.llvm.org/D71626
The file was modifiedbuildbot/osuosl/master/config/builders.py
The file was modifiedbuildbot/osuosl/master/config/slaves.py
Commit 66f206567090b1d6e4879775d8308d3715379515 by simon.moll
[VE] Staging buildbot
Summary: This patch registers the `nec-arrproto41` worker and staging
builder for the VE target: NEC SX-Aurora TSUBASA.
Reviewed By: gkistanova
Differential Revision: https://reviews.llvm.org/D71417
The file was modifiedbuildbot/osuosl/master/config/status.py
The file was modifiedbuildbot/osuosl/master/config/slaves.py
The file was modifiedbuildbot/osuosl/master/config/builders.py

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [mlir][spirv] Add lowering for std cmp ops. (details)
  2. AMDGPU: Annotate EXTRACT_SUBREGs with source register classes (details)
  3. Revert "[mlir][spirv] Add lowering for std.fpext, std.fptrunc, (details)
  4. [mlir][spirv] Add lowering for std.fpext, std.fptrunc, std.sitofp. (details)
  5. [RISCV] Fix evalutePCRelLo for symbols at the end of a fragment (details)
  6. [X86] Adding fp128 support for strict fcmp (details)
  7. [lldb/Test] Try to appease the Windows bot (details)
  8. [lldb/CMake] Only auto-enable Python when SWIG is found (details)
  9. [NFC][Test] Add the option -enable-no-signed-zeros-fp-math for test (details)
  10. [libc] Add a convenience CMake rule to add testsuites. (details)
  11. [clangd] Add xref for macros to FileIndex. (details)
  12. [libcxx][test] Fix span tests. (details)
  13. [lldb][NFC] Remove redundant ClangASTContext constructor that takes (details)
  14. AArch64: add missing Apple CPU names and use them by default. (details)
  15. Revert "[InstCombine] fold zext of masked bit set/clear" (details)
  16. [llvm-symbolizer]Fix printing of malformed address values not passed via (details)
  17. [lldb] Remove default llvm::Triple argument from ClangASTContext (details)
  18. [NFC][ARM] Update tests (details)
  19. [Dsymutil][Debuginfo][NFC] Reland: Refactor dsymutil to separate DWARF (details)
  20. [gn build] (manually) merge 1cf11a4c67a15 (details)
  21. Disallow an empty string literal in an asm label (details)
  22. [ARM][MVE] Enable masked gathers from vector of pointers (details)
  23. [gn build] Port 346f6b54bd1 (details)
  24. Fixing a formatting nit; NFC (details)
  25. [NFC] Move InPQueue into arguments of releaseNode (details)
  26. [Intrinsic] Add fixed point division intrinsics. (details)
  27. [clang-tidy] Disable match on `if constexpr` statements in template (details)
  28. [ARM,MVE] Intrinsics for partial-overwrite imm shifts. (details)
  29. [ARM,MVE] Intrinsics for variable shift instructions. (details)
  30. [JumpThreading] Thread jumps through two basic blocks (details)
  31. [OPENMP]Allow comma in combiner expression. (details)
  32. [DAGCombiner] clean up extract-of-concat fold; NFC (details)
  33. [InstCombine] Adding testcase for Z / (1.0 / Y) => (Y * Z); NFC (details)
  34. [SelectionDAG] Use llvm::Optional<APInt> for FoldValue. (details)
  35. [amdgpu] Remove unused header. NFC. (details)
  36. [lldb/CMake] Use LLDB's autodetection logic for libxml2 (details)
Commit dd495e8a877784df413679e5ec380985b60c0b2c by antiagainst
[mlir][spirv] Add lowering for std cmp ops.
Differential Revision: https://reviews.llvm.org/D72296
The file was modifiedmlir/test/Dialect/SPIRV/Serialization/logical-ops.mlir
The file was modifiedmlir/test/Conversion/StandardToSPIRV/std-to-spirv.mlir
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/ConvertStandardToSPIRV.cpp
Commit 22700f68e171aeb1182ecbe9e3e8fc10d8633e24 by arsenm2
AMDGPU: Annotate EXTRACT_SUBREGs with source register classes
This partially fixes GlobalISel import of the patterns, but removes a
lot of entriess from the end of the skipped pattern log.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructions.td
Commit dab2921f77099534ff19fead9a79fbff312feabf by antiagainst
Revert "[mlir][spirv] Add lowering for std.fpext, std.fptrunc,
std.sitofp."
This reverts commit 7e7f849a6d94f77f1a29630419acb7226051f4b6 because it
recorded the wrong commit author.
The file was modifiedmlir/test/Conversion/StandardToSPIRV/std-to-spirv.mlir
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.td
Commit eac01f63a6c99d6ffd03b7b7c88cf8e28d364e5c by antiagainst
[mlir][spirv] Add lowering for std.fpext, std.fptrunc, std.sitofp.
Differential Revision: https://reviews.llvm.org/D72137
The file was modifiedmlir/test/Conversion/StandardToSPIRV/std-to-spirv.mlir
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.td
Commit 917f46db04b8ddf52a43183f00d3b74e78740f9f by jrtc27
[RISCV] Fix evalutePCRelLo for symbols at the end of a fragment
Summary: This is analogous to D58943, which correctly finds the
corresponding fixup. However, when linker relaxations are disabled and
we evaluate the fixup, we need to also ensure we use an offset of 0
rather than the size of the previous fragment.
Reviewers: asb, efriedma, lenary
Reviewed By: efriedma
Subscribers: hiraditya, rbar, johnrusso, simoncook, sabuasal, niosHD,
kito-cheng, shiva0217, MaskRay, zzheng, edward-jones, rogfer01,
MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna,
Jim, s.egerton, pzheng, sameer.abuasal, apazos, luismarques,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71978
The file was modifiedllvm/test/MC/RISCV/option-mix.s
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
Commit 9a621de1ecadf668886a7caf743f6283d1c709e2 by pengfei.wang
[X86] Adding fp128 support for strict fcmp
Summary: Adding fp128 support for strict fcmp
Reviewers: craig.topper, LiuChen3, andrew.w.kaylor, RKSimon, uweigand
Subscribers: hiraditya, llvm-commits, LuoYuanke
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71897
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/fp128-libcalls-strict.ll
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
Commit adee6454b7ac8e7a489ec63e338e1d4a5705e2f1 by Jonas Devlieghere
[lldb/Test] Try to appease the Windows bot
In TestConvenienceVariables I changed %t from a file to a directory.
This tripped up mkdir which can't deal with an existing file at the
given location. In order to solve this issue on the bots I added an
`rm -rf %t` statement, but now the Windows bot complains that "This
function is not supported on this system".
If you never ran the test suite wit this temporary workaround, the test
might fail. If this happens please remove what %t expands to in the lit
output and rerun the test.
The file was modifiedlldb/test/Shell/Driver/TestConvenienceVariables.test
Commit fc6f15d4d2c4a051c8e31fe4de0bfaf9d3535f6e by Jonas Devlieghere
[lldb/CMake] Only auto-enable Python when SWIG is found
As correctly pointed out by Martin on the mailing list, Python should
only be auto-enabled if SWIG is found as well. This moves the logic of
finding SWIG into FindPythonInterpAndLibs to make that possible.
To make diagnosing easier I've included a status message to convey why
Python support is disabled.
The file was modifiedlldb/cmake/modules/FindPythonInterpAndLibs.cmake
The file was modifiedlldb/scripts/CMakeLists.txt
Commit 44f78f368c2cafd9dfce5d65f5e2ebfcfb30105a by qshanz
[NFC][Test] Add the option -enable-no-signed-zeros-fp-math for test
fma-combine.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fma-combine.ll
Commit 880734aebb396891d8e6596ae85d597ca43359b1 by sivachandra
[libc] Add a convenience CMake rule to add testsuites.
Summary: This rule helps avoid repeated setting of check-libc's
dependency on the various testsuites.
Reviewers: abrachet
Subscribers: mgorny, MaskRay, tschuett, libc-commits
Tags: #libc-project
Differential Revision: https://reviews.llvm.org/D72353
The file was modifiedlibc/test/src/sys/mman/CMakeLists.txt
The file was modifiedlibc/test/src/string/CMakeLists.txt
The file was modifiedlibc/test/src/errno/CMakeLists.txt
The file was modifiedlibc/cmake/modules/LLVMLibCRules.cmake
The file was modifiedlibc/test/config/CMakeLists.txt
The file was modifiedlibc/test/config/linux/CMakeLists.txt
The file was modifiedlibc/test/CMakeLists.txt
The file was modifiedlibc/test/config/linux/x86_64/CMakeLists.txt
Commit 583ba07884ed9281d1f1f5311ee2e280c977d62d by usx
[clangd] Add xref for macros to FileIndex.
Summary: Adds macro references to the dynamic index. Tests added. Also
exposed a new API to convert path to URI in URI.h
Reviewers: hokein
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D71406
The file was modifiedclang-tools-extra/clangd/index/SymbolCollector.cpp
The file was modifiedclang-tools-extra/clangd/index/FileIndex.h
The file was modifiedclang-tools-extra/clangd/index/SymbolCollector.h
The file was modifiedclang-tools-extra/clangd/unittests/FileIndexTests.cpp
The file was modifiedclang-tools-extra/clangd/index/FileIndex.cpp
Commit a1857e2ce35e749e16d092305f53c0f2bf2e9c7b by stl
[libcxx][test] Fix span tests.
span.cons/container.pass.cpp N4842 22.7.3.2 [span.cons]/13 constrains
span's range constructor for ranges::contiguous_range (among other
criteria).
24.4.5 [range.refinements]/2 says that contiguous_range requires data(),
and (via contiguous_range, random_access_range, bidirectional_range,
forward_range, input_range, range) it also requires begin() and end()
(see 24.4.2 [range.range]/1).
Therefore, IsAContainer needs to provide begin() and end().
(Detected by MSVC's concept-constrained implementation.)
span.cons/stdarray.pass.cpp This test uses std::array, so it must
include <array>.
<span> isn't guaranteed to drag in <array>.
(Detected by MSVC's implementation which uses a forward declaration to
avoid dragging in <array>, for increased compiler throughput.)
span.objectrep/as_bytes.pass.cpp
span.objectrep/as_writable_bytes.pass.cpp Testing `sp.extent ==
std::dynamic_extent` triggers MSVC warning C4127 "conditional expression
is constant". Using `if constexpr` is a simple way to avoid this without
disrupting anyone else (as span requires C++20 mode).
span.tuple/get.pass.cpp 22.7.3.2 [span.cons]/4.3: "Preconditions: If
extent is not equal to dynamic_extent, then count is equal to extent."
These lines were triggering undefined behavior (detected by assertions
in MSVC's implementation).
I changed the count arguments in the first two chunks, followed by
changing the span extents, in order to preserve the test's coverage and
follow the existing pattern.
span.cons/span.pass.cpp 22.7.3.2 [span.cons]/18.1 constrains span's
converting constructor with
"Extent == dynamic_extent || Extent == OtherExtent is true".
This means that converting from dynamic extent to static extent is not
allowed. (Other constructors tested elsewhere, like span(It first,
size_type count), can be used to write such code.)
As this is the test for the converting constructor, I have:
* Removed the "dynamic -> static" case from checkCV(), which is
comprehensive.
* Changed the initialization of std::span<T, 0> s1{}; in
testConstexprSpan() and testRuntimeSpan(), because s1 is used below.
* Removed ASSERT_NOEXCEPT(std::span<T, 0>{s0}); from those functions, as
they are otherwise comprehensive.
* Deleted testConversionSpan() entirely. Note that this could never
compile (it had a bool return type, but forgot to say `return`). And it
couldn't have provided useful coverage, as the /18.2 constraint
"OtherElementType(*)[] is convertible to ElementType(*)[]" permits only
cv-qualifications, which are already tested by checkCV().
The file was modifiedlibcxx/test/std/containers/views/span.cons/span.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.tuple/get.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.objectrep/as_writable_bytes.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.objectrep/as_bytes.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/stdarray.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/span.cons/container.pass.cpp
Commit 0a4daff6e26f276dd92e777b597e94e093ae018d by Raphael Isemann
[lldb][NFC] Remove redundant ClangASTContext constructor that takes
ArchSpec
ArchSpec has a superset of the information of llvm::Triple but the
ClangASTContext just uses the Triple part of it. This deletes the
ArchSpec constructor and all the code creating ArchSpecs and instead
just uses the llvm::Triple constructor for ClangASTContext.
The file was modifiedlldb/source/Symbol/ClangASTContext.cpp
The file was modifiedlldb/include/lldb/Symbol/ClangASTContext.h
Commit 903e5c3028d61481c570c09eeb5e7a920c2d7d38 by Tim Northover
AArch64: add missing Apple CPU names and use them by default.
Apple's CPUs are called A7-A13 in official communication, occasionally
with weird suffixes which we probably don't need to care about. This
adds each one and describes its features. It also switches the default
CPU to the canonical name for Cyclone, but leaves legacy support in so
that existing bitcode still compiles.
The file was modifiedllvm/include/llvm/Support/AArch64TargetParser.def
The file was modifiedclang/test/Preprocessor/aarch64-target-features.c
The file was modifiedclang/lib/Driver/ToolChains/Arch/AArch64.cpp
The file was modifiedllvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.h
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64SystemOperands.td
The file was modifiedclang/test/Driver/arm64-as.s
The file was modifiedllvm/lib/Target/AArch64/AArch64.td
The file was modifiedclang/test/Driver/aarch64-cpus.c
The file was modifiedllvm/unittests/Support/TargetParserTest.cpp
Commit b212eb7159b40c98b3c40619b82b996fb903282b by kadircet
Revert "[InstCombine] fold zext of masked bit set/clear"
This reverts commit a041c4ec6f7aa659b235cb67e9231a05e0a33b7d.
This looks like a non-trivial change and there has been no code reviews
(at least there were no phabricator revisions attached to the commit
description). It is also causing a regression in one of our downstream
integration tests, we haven't been able to come up with a minimal
reproducer yet.
The file was modifiedllvm/test/Transforms/InstCombine/zext.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
Commit dfeb8730e24c5a4493e9092907b7ff083fae43a5 by th3charlie
[llvm-symbolizer]Fix printing of malformed address values not passed via
stdin
Summary: relates https://bugs.llvm.org/show_bug.cgi?id=44443
Adding missing newline when printing bad input values.
Fix testcase
Reviewers: jhenderson
Reviewed By: jhenderson
Subscribers: rupprecht, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72313
The file was modifiedllvm/test/tools/llvm-symbolizer/sym.test
The file was modifiedllvm/test/tools/llvm-symbolizer/invalid-input-address.test
The file was modifiedllvm/tools/llvm-symbolizer/llvm-symbolizer.cpp
Commit 518597c1737646ea1f087c1fa43109f689adf7a6 by Raphael Isemann
[lldb] Remove default llvm::Triple argument from ClangASTContext
constructor
Creating an ASTContext with an unknown triple is rarely a good idea (as
usually all our ASTs have a valid triple that is either from the host or
the target) and the default argument makes it far to easy to implicitly
create such an AST. Let's remove it and force people to pass a triple.
The only place where we don't pass a triple is a
DWARFASTParserClangTests where we now just pass the host triple instead
(the test doesn't depend on any triple so this shouldn't change
anything).
The file was modifiedlldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
The file was modifiedlldb/include/lldb/Symbol/ClangASTContext.h
Commit 96d2d96b03ff590867cd6578eb7f6d32770cbbf0 by sam.parker
[NFC][ARM] Update tests
Run the update_mir_test on some of the low-overhead loop tests.
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/end-positive-offset.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-after-dls.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/size-limit.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-mov.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/revert-while.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/safe-def-no-mov.mir
Commit 1cf11a4c67a15ab5493ef424c898accf49012caa by a.v.lapshin
[Dsymutil][Debuginfo][NFC] Reland: Refactor dsymutil to separate DWARF
optimizing part. #2.
Summary: This patch relands D71271. The problem with D71271 is that it
has cyclic dependency: CodeGen->AsmPrinter->DebugInfoDWARF->CodeGen. To
avoid cyclic dependency this patch puts implementation for
DWARFOptimizer into separate library: lib/DWARFLinker.
Thus the difference between this patch and D71271 is in that
DWARFOptimizer renamed into DWARFLinker and it`s files are put into
lib/DWARFLinker.
Reviewers: JDevlieghere, friss, dblaikie, aprantl
Reviewed By: JDevlieghere
Subscribers: thegameg, merge_guards_bot, probinson, mgorny, hiraditya,
llvm-commits
Tags: #llvm, #debug-info
Differential Revision: https://reviews.llvm.org/D71839
The file was removedllvm/tools/dsymutil/DeclContext.cpp
The file was removedllvm/tools/dsymutil/CompileUnit.cpp
The file was removedllvm/tools/dsymutil/DwarfLinker.h
The file was removedllvm/tools/dsymutil/CompileUnit.h
The file was modifiedllvm/include/llvm/CodeGen/NonRelocatableStringpool.h
The file was addedllvm/include/llvm/DWARFLinker/DWARFLinkerCompileUnit.h
The file was modifiedllvm/tools/dsymutil/CMakeLists.txt
The file was addedllvm/include/llvm/DWARFLinker/DWARFLinkerDeclContext.h
The file was modifiedllvm/lib/CMakeLists.txt
The file was addedllvm/tools/dsymutil/DwarfLinkerForBinary.h
The file was addedllvm/lib/DWARFLinker/DWARFLinkerCompileUnit.cpp
The file was addedllvm/include/llvm/DWARFLinker/DWARFLinker.h
The file was removedllvm/tools/dsymutil/DwarfLinker.cpp
The file was removedllvm/tools/dsymutil/DeclContext.h
The file was modifiedllvm/tools/dsymutil/DwarfStreamer.cpp
The file was modifiedllvm/tools/dsymutil/LLVMBuild.txt
The file was addedllvm/lib/DWARFLinker/CMakeLists.txt
The file was modifiedllvm/tools/dsymutil/DwarfStreamer.h
The file was addedllvm/lib/DWARFLinker/DWARFLinker.cpp
The file was addedllvm/tools/dsymutil/DwarfLinkerForBinary.cpp
The file was addedllvm/lib/DWARFLinker/DWARFLinkerDeclContext.cpp
The file was modifiedllvm/lib/LLVMBuild.txt
The file was modifiedllvm/lib/CodeGen/NonRelocatableStringpool.cpp
The file was addedllvm/lib/DWARFLinker/LLVMBuild.txt
Commit 111ec8c2a435440a72904aeca22c9f3046de5f42 by thakis
[gn build] (manually) merge 1cf11a4c67a15
The file was addedllvm/utils/gn/secondary/llvm/lib/DWARFLinker/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/tools/dsymutil/BUILD.gn
Commit 55a51e1c79a21080289ba88d5eac4bbe54ec4272 by aaron
Disallow an empty string literal in an asm label
An empty string literal in an asm label does not make a whole lot of
sense. GCC does not diagnose such a construct, but it also generates
code that cannot be assembled by gas should two symbols have an empty
asm label within the same TU. This does not affect an asm statement with
an empty string literal, which is still a useful construct.
The file was modifiedclang/lib/Parse/ParseDecl.cpp
The file was modifiedclang/lib/Parse/Parser.cpp
The file was modifiedclang/lib/Parse/ParseDeclCXX.cpp
The file was modifiedclang/lib/Parse/ParseStmtAsm.cpp
The file was modifiedclang/test/AST/ast-print-attr.c
The file was modifiedclang/test/Parser/asm.c
The file was modifiedclang/include/clang/Basic/DiagnosticParseKinds.td
The file was modifiedclang/test/CodeGen/asm-label.c
The file was modifiedclang/include/clang/Parse/Parser.h
The file was modifiedclang/lib/Parse/ParseExprCXX.cpp
Commit 346f6b54bd1237a9a5a2d9bb1e424b57dc178998 by anna.welker
[ARM][MVE] Enable masked gathers from vector of pointers
Adds a pass to the ARM backend that takes a v4i32 gather and transforms
it into a call to MVE's masked gather intrinsics.
Differential Revision: https://reviews.llvm.org/D71743
The file was modifiedllvm/lib/Target/ARM/CMakeLists.txt
The file was addedllvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetMachine.cpp
The file was addedllvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
The file was modifiedllvm/test/CodeGen/ARM/O3-pipeline.ll
The file was addedllvm/test/CodeGen/Thumb2/mve-gather-ind32-scaled.ll
The file was addedllvm/test/CodeGen/Thumb2/mve-gather-ind32-unscaled.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
The file was addedllvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll
The file was modifiedllvm/lib/Target/ARM/ARM.h
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
Commit 26ac7923e7df982081e726bb2856fadb35d6d35d by llvmgnsyncbot
[gn build] Port 346f6b54bd1
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
Commit 7a77ad144694ced7b553c644bcbcbfffac2b5fe1 by aaron
Fixing a formatting nit; NFC
The file was modifiedclang/lib/ASTMatchers/Dynamic/Registry.cpp
Commit b2c2fe72197267af90b4b6a187ab6163f806ce00 by qiucofan
[NFC] Move InPQueue into arguments of releaseNode
This patch moves `InPQueue` into function arguments instead of template
arguments of `releaseNode`, which is a cleaner approach.
Differential Revision: https://reviews.llvm.org/D72125
The file was modifiedllvm/include/llvm/CodeGen/MachineScheduler.h
The file was modifiedllvm/lib/CodeGen/MachineScheduler.cpp
Commit 8e2b44f7e0641d3776021163ee6a77089cca9cdc by mikael.holmen
[Intrinsic] Add fixed point division intrinsics.
Summary: This patch adds intrinsics and ISelDAG nodes for signed and
unsigned fixed-point division:
  llvm.sdiv.fix.*
llvm.udiv.fix.*
These intrinsics perform scaled division on two integers or vectors of
integers. They are required for the implementation of the Embedded-C
fixed-point arithmetic in Clang.
Patch by: ebevhan
Reviewers: bjope, leonardchan, efriedma, craig.topper
Reviewed By: craig.topper
Subscribers: Ka-Ka, ilya, hiraditya, jdoerfert, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70007
The file was addedllvm/test/CodeGen/X86/sdiv_fix.ll
The file was modifiedllvm/include/llvm/Target/TargetSelectionDAG.td
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
The file was modifiedllvm/include/llvm/CodeGen/ISDOpcodes.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was addedllvm/test/CodeGen/X86/udiv_fix.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
Commit ba129c7d0f5c7c32398ad708c88e14cb06a339ad by abpostelnicu
[clang-tidy] Disable match on `if constexpr` statements in template
instantiation for `readability-misleading-indentation` check.
Summary: Fixes fixes `readability-misleading-identation` for `if
constexpr`. This is very similar to D71980.
Reviewers: alexfh
Subscribers: xazax.hun, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72333
The file was modifiedclang-tools-extra/clang-tidy/readability/MisleadingIndentationCheck.cpp
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/readability-misleading-indentation.cpp
Commit 3100480925df10960c1e0a077dd9875037d3fe29 by simon.tatham
[ARM,MVE] Intrinsics for partial-overwrite imm shifts.
This batch of intrinsics covers two sets of immediate shift
instructions, which have in common that they only overwrite part of
their output register and so they need an extra input giving its
previous value.
The VSLI and VSRI instructions shift each lane of the input vector left
or right just as if they were normal immediate VSHL/VSHR, but then they
only overwrite the output bits that correspond to actual shifted bits of
the input. So VSLI will leave the low n bits of each output lane
unchanged, and VSRI the same with the top n bits.
The V[Q][R]SHR[U]N family are all narrowing shifts: they take an input
vector of 2n-bit integers, shift each lane right by a constant, and then
narrowing the shifted result to only n bits. So they only overwrite half
of the n-bit lanes in the output register, and the B/T suffix indicates
whether it's the bottom or top half of each 2n-bit lane.
I've implemented the whole of the latter family using a single IR
intrinsic `vshrn`, which takes a lot of i32 parameters indicating which
instruction it expands to (by specifying signedness of the input and
output types, whether it saturates and/or rounds, etc).
Reviewers: dmgreen, MarkMurrayARM, miyuki, ostannard
Reviewed By: dmgreen
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D72328
The file was addedclang/test/CodeGen/arm-mve-intrinsics/vector-shift-imm-dyadic.c
The file was addedllvm/test/CodeGen/Thumb2/mve-intrinsics/vector-shift-imm-dyadic.ll
The file was modifiedclang/include/clang/Basic/arm_mve.td
The file was modifiedclang/include/clang/Basic/arm_mve_defs.td
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsARM.td
The file was modifiedclang/utils/TableGen/MveEmitter.cpp
Commit dac7b23cc3efbb4ccb6a9ea101f367f866f334e2 by simon.tatham
[ARM,MVE] Intrinsics for variable shift instructions.
This batch of intrinsics fills in all the shift instructions that take a
variable shift distance in a register, instead of an immediate. Some of
these instructions take a single shift distance in a scalar register and
apply it to all lanes; others take a vector of per-lane distances.
These instructions are all basically one family, varying in whether they
saturate out-of-range values, and whether they round when bits are
shifted off the bottom. I've implemented them at the IR level by a much
smaller family of IR intrinsics, which take flag parameters to indicate
saturating and/or rounding (along with the usual one to specify
signed/unsigned integers).
An oddity is that all of them are //left// shift instructions – but if
you pass a negative shift count, they'll shift right. So the vector
shift distances are always vectors of //signed// integers, regardless of
whether you're considering the other input vector to be of signed or
unsigned. Also, even the simplest `vshlq` instruction in this family
(neither saturating nor rounding) has to be implemented as an IR
intrinsic, because the ordinary LLVM IR `shl` operation would consider
an out-of-range shift count to be undefined behavior.
Reviewers: dmgreen, MarkMurrayARM, miyuki, ostannard
Reviewed By: dmgreen
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D72329
The file was addedclang/test/CodeGen/arm-mve-intrinsics/vector-shift-var.c
The file was modifiedllvm/include/llvm/IR/IntrinsicsARM.td
The file was modifiedclang/include/clang/Basic/arm_mve_defs.td
The file was addedllvm/test/CodeGen/Thumb2/mve-intrinsics/vector-shift-var.ll
The file was modifiedclang/include/clang/Basic/arm_mve.td
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
Commit ead815924e6ebeaf02c31c37ebf7a560b5fdf67b by kazu
[JumpThreading] Thread jumps through two basic blocks
Summary: This patch teaches JumpThreading.cpp to thread through two
basic blocks like:
  bb3:
   %var = phi i32* [ null, %bb1 ], [ @a, %bb2 ]
   %tobool = icmp eq i32 %cond, 0
   br i1 %tobool, label %bb4, label ...
  bb4:
   %cmp = icmp eq i32* %var, null
   br i1 %cmp, label bb5, label bb6
by duplicating basic blocks like bb3 above.  Once we duplicate bb3 as
bb3.dup and redirect edge bb2->bb3 to bb2->bb3.dup, we have:
  bb3:
   %var = phi i32* [ @a, %bb2 ]
   %tobool = icmp eq i32 %cond, 0
   br i1 %tobool, label %bb4, label ...
  bb3.dup:
   %var = phi i32* [ null, %bb1 ]
   %tobool = icmp eq i32 %cond, 0
   br i1 %tobool, label %bb4, label ...
  bb4:
   %cmp = icmp eq i32* %var, null
   br i1 %cmp, label bb5, label bb6
Then the existing code in JumpThreading.cpp can thread edge bb3.dup->bb4
through bb4 and eventually create bb3.dup->bb5.
Reviewers: wmi
Subscribers: hiraditya, jfb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70247
The file was modifiedllvm/include/llvm/Transforms/Scalar/JumpThreading.h
The file was addedllvm/test/Transforms/JumpThreading/thread-two-bbs1.ll
The file was addedllvm/test/Transforms/JumpThreading/thread-two-bbs2.ll
The file was modifiedllvm/lib/Transforms/Scalar/JumpThreading.cpp
Commit c74a8adda3bc4fc5714aef14cdcfda944d3038a0 by a.bataev
[OPENMP]Allow comma in combiner expression.
Use ParseExpression() instead of ParseAssignmentExpression() to allow
commas in combiner expressions.
The file was modifiedclang/test/OpenMP/declare_reduction_ast_print.cpp
The file was modifiedclang/lib/Parse/ParseOpenMP.cpp
Commit 780ba1f22b53116918cf12decccaed7ba2292bd5 by spatel
[DAGCombiner] clean up extract-of-concat fold; NFC
This hopes to improve readability and adds an assert. The functional
change noted by the TODO comment is proposed in: D72361
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit 5dfd52398f5c1b67024106febdc68e6b12f8ad37 by spatel
[InstCombine] Adding testcase for Z / (1.0 / Y) => (Y * Z); NFC
The added testcase shows the current transformation for the operation Z
/ (1.0 / Y), which remains unchanged. This will be updated to align with
the transformed code (Y * Z) with D72319.
The existing transformation Z / (X / Y) => (Y * Z) / X is not handling
this case as there are multiple uses for (1.0 / Y) in this testcase.
Patch by: @raghesh (Raghesh Aloor)
Differential Revision: https://reviews.llvm.org/D72388
The file was modifiedllvm/test/Transforms/InstCombine/fdiv.ll
Commit 108279948de31eba4f212b2a4715030b9d471c9e by llvm-dev
[SelectionDAG] Use llvm::Optional<APInt> for FoldValue.
Use llvm::Optional<APInt> instead of std::pair<APInt, bool> with the
bool second being used to report success/failure of fold.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Commit 07a569a0539a12700401b8f4221af0a58f28a654 by michael.hliao
[amdgpu] Remove unused header. NFC.
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Commit bbbbf8a1065e9420e3cc7c958897683e84023075 by Jonas Devlieghere
[lldb/CMake] Use LLDB's autodetection logic for libxml2
Libxml2 is already an optional dependency. It should use the same
infrastructure as the other dependencies.
Differential revision: https://reviews.llvm.org/D72290
The file was modifiedlldb/cmake/modules/LLDBConfig.cmake
The file was modifiedlldb/docs/resources/build.rst