SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. Fix "pointer is null" static analyzer warning. NFCI. (details)
  2. Fix "pointer is null" static analyzer warning. NFCI. (details)
  3. [MC] writeFragment - assert MCFragment::FT_Fill length is legal. (details)
  4. [ELF] Don't special case weak symbols for pie with no shared objects (details)
  5. [ELF] Delete an unused special rule from isStaticLinkTimeConstant. NFC (details)
  6. [BranchAlign] Compiler support for suppressing branch align (details)
  7. [X86] Add isel patterns for bitcasting between v32i1/v64i1 and (details)
  8. [X86] Custom type legalize v4i64->v4f32 uint_to_fp on sse4.1 targets in (details)
  9. [mlir][Linalg] Lower linalg.reshape to LLVM for the static case (details)
  10. [mlir] NFC: Move the state for managing aliases out of ModuleState and (details)
  11. [clang-tidy] Remove broken test on Windows for (details)
  12. [MLIR] Fix ML IR build on Windows with Visual Studio (details)
  13. [X86] Keep cl::opts at top of file [NFC] (details)
  14. Merge memtag instructions with adjacent stack slots. (details)
  15. Add a new AST matcher 'optionally'. (details)
  16. LTOVisibility.rst: fix up syntax in example (details)
  17. [x86] add test for concat-extract corner case; NFC (details)
  18. Canonicalize static alloc followed by memref_cast and std.view (details)
  19. [LLD] [COFF] Fix post-commit suggestions for absolute symbol equality (details)
  20. [InstSimplify] add tests for select of true/false; NFC (details)
  21. [lldb/SWIG] Refactor extensions to be non Python-specific (details)
  22. Revert "[JumpThreading] Thread jumps through two basic blocks" (details)
  23. [lldb/CMake] Only auto-enable Lua when SWIG is found (details)
  24. Delete dead code. (details)
  25. Revert "Merge memtag instructions with adjacent stack slots." (details)
  26. [MLIR] Don't use SSA names directly for std.view canonicalization test (details)
  27. [cfi][test] cross-dso/stats.cpp: don't assume the order of static (details)
  28. [lldb/SWIG] Refactor extensions to be non Python-specific (2/2) (details)
  29. [X86]  Remove EFLAGS from live-in lists in X86FlagsCopyLowering. (details)
  30. [NFC] Whitespace fixes (details)
  31. [libcxx] [test] Disable refwrap/weak_result.pass.cpp in C++20 mode (details)
  32. Recommit "[MachineVerifier] Improve verification of live-in lists." (details)
  33. [PowerPC]: Add powerpcspe target triple subarch component (details)
  34. [NFC][InlineCost] Factor cost modeling out of CallAnalyzer traversal. (details)
  35. [Attributor][FIX] Avoid dangling value pointers during code modification (details)
  36. [Attributor][FIX] Carefully change invokes to calls (after manifest) (details)
  37. Revert "[NFC][InlineCost] Factor cost modeling out of CallAnalyzer (details)
  38. [PowerPC] when folding rlwinm+rlwinm. to andi., we should use first (details)
  39. [lldb] Remove various dead Compare functions (details)
  40. [MIR] Target specific MIR formating and parsing (details)
  41. Save more descriptive error msg from FBS/BKS, relay it up to lldb. (details)
  42. Revert "[MIR] Target specific MIR formating and parsing" (details)
  43. [MIR] Target specific MIR formating and parsing (details)
  44. Revert "[MIR] Target specific MIR formating and parsing" (details)
  45. Revert "Revert "[MIR] Target specific MIR formating and parsing"" (details)
  46. [DAGCombine] Fold the (fma -x, y, -z) to -(fma x, y, z) (details)
Commit 5936717fa6537812257990143e2384bb78486ef9 by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
Use castAs<> instead of getAs<> since we know that the pointer will be
valid (and is dereferenced immediately below).
The file was modifiedclang/lib/CodeGen/CGOpenCLRuntime.cpp
Commit 19bfb6d8df6c23c8c8d19af9221d12bf08244b51 by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
Use cast<> instead of dyn_cast<> since we know that the pointer should
be valid (and is dereferenced immediately below in the getSignature
call).
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
Commit 46e2f89364ce24a06953d08c78218fb5548a9fa3 by llvm-dev
[MC] writeFragment - assert MCFragment::FT_Fill length is legal.
Silence (clang/MSVC) static analyzer warnings that the fragment data may
either write out of bounds of the local array or reference uninitialized
data.
The file was modifiedllvm/lib/MC/MCAssembler.cpp
Commit 96e2376d02f0840e82b96314108660ecabe63c7f by maskray
[ELF] Don't special case weak symbols for pie with no shared objects
D59275 added the following clause to Symbol::includeInDynsym()
  if (isUndefWeak() && Config->Pie && SharedFiles.empty())
   return false;
D59549 explored the possibility to generalize it for -no-pie.
GNU ld's rules are architecture dependent and partly controlled by -z
{,no-}dynamic-undefined-weak. Our attempts to mimic its rules are
actually half-baked and don't provide perceivable benefits (it can save
a few more weak undefined symbols in .dynsym in a -static-pie
executable). Let's just delete the rule for simplicity. We will expect
cosmetic inconsistencies with ld.bfd in certain -static-pie scenarios.
This permits a simplification in D71795.
Reviewed By: peter.smith
Differential Revision: https://reviews.llvm.org/D71794
The file was modifiedlld/test/ELF/ppc32-weak-undef-call.s
The file was removedlld/test/ELF/weak-undef-no-shared-libs.s
The file was modifiedlld/ELF/Symbols.cpp
Commit b841e119d77ed0502e3a2e710f26a899bef28b3c by maskray
[ELF] Delete an unused special rule from isStaticLinkTimeConstant. NFC
Weak undefined symbols are preemptible after D71794.
  if (sym.isPreemptible)
   return false;
if (!config->isPic)
   return true;
// isPic means includeInDynsym is true after D71794.
  ...
  // We can delete this if because it can never be true.
if (sym.isUndefWeak)
   return true;
Differential Revision: https://reviews.llvm.org/D71795
The file was modifiedlld/ELF/Relocations.cpp
Commit 29ccb12e2c12b6a50a1451ffdbf70fef29efda0e by listmail
[BranchAlign] Compiler support for suppressing branch align
As discussed heavily in the original review (D70157), there's a need for
the compiler to be able to selective suppress padding (either nop or
prefix) to respect assumptions about the meaning of labels and
instructions in generated code.
Rather than wait for syntax to be finalized - which appears to be a very
slow process - this patch focuses on the compiler use case and *only*
worries about the integrated assembler. To my knowledge, this covers all
cases mentioned to date for clang/JIT support.
For testing purposes, I wired it up so that if the integrated assembler
was using autopadding for branch alignment (e.g. enabled at command
line) then the textual assembly output would contain a comment for each
location where padding was enabled or disabled. This seemed like the
least painful choice overall.
Note that the result of this patch effective disables the jcc errata
mitigation for many constructs (statepoints, implicit null checks, xray,
etc...) which is non ideal. It is at least *correct* and should allow us
to enable the mitigation for the compiler. Once that's done, and a few
other items are worked through, we probably want to come back to this an
explore a bundling based approach instead so that we can pad
instructions while keeping labels in the right place.
Differential Revision: https://reviews.llvm.org/D72303
The file was modifiedllvm/lib/MC/MCAsmStreamer.cpp
The file was modifiedllvm/lib/Target/X86/X86MCInstLower.cpp
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
The file was addedllvm/test/CodeGen/X86/align-branch-boundary-suppressions.ll
The file was modifiedllvm/include/llvm/MC/MCStreamer.h
The file was modifiedllvm/include/llvm/MC/MCAsmBackend.h
The file was modifiedllvm/lib/MC/MCObjectStreamer.cpp
The file was addedllvm/test/CodeGen/X86/align-branch-boundary-noautopadding.ll
Commit d60b3b4817cb9346b682bb75371c41642c273b13 by craig.topper
[X86] Add isel patterns for bitcasting between v32i1/v64i1 and
float/double.
We have to do an intermediate jump to a GPR to make the cast.
Fixes PR43750.
The file was modifiedllvm/test/CodeGen/X86/avx512bw-mask-op.ll
The file was modifiedllvm/lib/Target/X86/X86InstrAVX512.td
Commit 3811417f39a7d0a370fac2923060f5ef8dacd8d7 by craig.topper
[X86] Custom type legalize v4i64->v4f32 uint_to_fp on sse4.1 targets in
64-bit mode
For v4i64->v4f32 uint_to_fp on pre-avx targets where v4i64 isn't legal
we create to v2i64->v2f32 uint_to_fp that need to be shuffled together.
Our codegen for v2i64->v2f32 involves detecting if the number is larger
than (2^31 - 1), if so we do a special divison by 2 so we can do a
signed conversion which we need to scalarize, then do a multiply by 2 at
the end if we divided earlier.
When v4i64 isn't legal we need to split the checking for a larger number
and dividing by 2 into two v2i64 vectors. The scalar part can extract
the 4 i64 values from those 4 splits. But we can reassemble the 4 scalar
f32 results directly into a single v432 vector. Then we just need to
combine the fixup indications from the 2 halves and we can do the final
multiply by 2 fixup on all 4 values if needed at once using a single
v4f32 blend and v4f32 fadd.
Differential Revision: https://reviews.llvm.org/D72368
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vec_int_to_fp.ll
Commit 766ce87e9bed89bc3b5c2c904f1eb2d10be0d3be by ntv
[mlir][Linalg] Lower linalg.reshape to LLVM for the static case
Summary: This diff adds lowering of the linalg.reshape op to LLVM.
A new descriptor is created with fields initialized as follows: 1.
allocatedPTr, alignedPtr and offset are copied from the source
descriptor 2. sizes are copied from the static destination shape 3.
strides are copied from the static strides collected with
`getStridesAndOffset`
Only the static case in which the target view conforms to strided memref
semantics is supported. Other cases are left for future work and will be
added on a per-need basis.
Reviewers: ftynse, mravishankar
Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen,
antiagainst, arpith-jacob, mgester, lucyrfox, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72316
The file was modifiedmlir/test/Dialect/Linalg/llvm.mlir
The file was modifiedmlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp
Commit 659f7d463b3d677823fdcfddc37eea481078c514 by riverriddle
[mlir] NFC: Move the state for managing aliases out of ModuleState and
into a new class AliasState.
Summary: This reduces the complexity of ModuleState and simplifies the
code. A future revision will mold ModuleState into something that can be
used by users for caching of printer state, as well as for implementing
printAsOperand style methods.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D72292
The file was modifiedmlir/lib/IR/AsmPrinter.cpp
Commit 0a01ec972d2e24c721f46e55210d42391ae52b70 by abpostelnicu
[clang-tidy] Remove broken test on Windows for
`readability-misleading-indentation`. Because Windows build uses by
default `fdelayed-template-parsing` we cannot have a test where we don't
instantiate the template. Please see D72333.
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/readability-misleading-indentation.cpp
Commit 48b14e58abc57cfea7bcdc0d7165686f135a2ebd by stilis
[MLIR] Fix ML IR build on Windows with Visual Studio
Summary: Right now the path for each lib in whole_archive_link when MSVC
is used as the compiler is not a full path - and it's not even the
correct path when VS is used to build. This patch sets the lib path to a
full path using CMAKE_CFG_INTDIR which means the path will be correct
regardless of whether ninja, make or VS is used and it will always be a
full path.
Reviewers: denis13, jpienaar
Reviewed By: jpienaar
Subscribers: mgorny, mehdi_amini, rriddle, jpienaar, burmako, shauheen,
antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox,
llvm-commits, asmith
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72403
The file was modifiedmlir/CMakeLists.txt
Commit ba181d0063e43fb56938555112ab859f48aee287 by listmail
[X86] Keep cl::opts at top of file [NFC]
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Commit b675a7628ce6a21b1e4a71c079a67badfb8b073d by eugenis
Merge memtag instructions with adjacent stack slots.
Summary: Detect a run of memory tagging instructions for adjacent stack
frame slots, and replace them with a shorter instruction sequence
* replace STG + STG with ST2G
* replace STGloop + STGloop with STGloop
This code needs to run when stack slot offsets are already known, but
before FrameIndex operands in STG instructions are eliminated; that's
the reason for the new hook in PrologueEpilogue.
This change modifies STGloop and STZGloop pseudos to take the size as an
immediate integer operand, and base address as a FI operand when
possible. This is needed to simplify recognizing an STGloop instruction
as operating on a stack slot post-regalloc.
This improves memtag code size by ~0.25%, and it looks like an
additional ~0.1% is possible by rearranging the stack frame such that
consecutive STG instructions reference adjacent slots (patch pending).
Reviewers: pcc, ostannard
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70286
The file was modifiedllvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
The file was addedllvm/test/CodeGen/AArch64/settag-merge.mir
The file was modifiedllvm/test/CodeGen/AArch64/stack-tagging-unchecked-ld-st.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.cpp
The file was modifiedllvm/lib/CodeGen/PrologEpilogInserter.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/settag.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.h
The file was modifiedllvm/include/llvm/CodeGen/TargetFrameLowering.h
The file was addedllvm/test/CodeGen/AArch64/settag-merge.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
Commit 2823e91d55891e33a7a8b9a4016db4ec9e2765ae by aaron
Add a new AST matcher 'optionally'.
This matcher matches any node and at the same time executes all its
inner matchers to produce any possbile result bindings.
This is useful when a user wants certain supplementary information
that's not always present along with the main match result.
The file was modifiedclang/lib/ASTMatchers/Dynamic/Registry.cpp
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h
The file was modifiedclang/lib/ASTMatchers/ASTMatchersInternal.cpp
The file was modifiedclang/docs/LibASTMatchersReference.html
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchersInternal.h
Commit 43f938eddc8a5c8e12c116ca5f31df5a6fead24e by tejohnson
LTOVisibility.rst: fix up syntax in example
Summary: Pretty self-evident. This example was missing an lparen. Added
it, and fixed up the ASCII art.
Patch by Nick Black <dankamongmen@gmail.com>
Reviewers: pcc
Reviewed By: pcc
Subscribers: tejohnson, mehdi_amini, inglorion, hiraditya, steven_wu,
dexonsmith, cfe-commits
Tags: #llvm, #clang
Differential Revision: https://reviews.llvm.org/D70765
The file was modifiedclang/docs/LTOVisibility.rst
Commit 31992a69b808f30a46a4ddb6da0d073d528bc72e by spatel
[x86] add test for concat-extract corner case; NFC
See D72361 for discussion.
The file was modifiedllvm/test/CodeGen/X86/extract-concat.ll
Commit 1e25109f93ffe5b28b28a2359e69143b7fb4aa5f by ataei
Canonicalize static alloc followed by memref_cast and std.view
Summary: Rewrite alloc, memref_cast, std.view into allo, std.view by
droping memref_cast.
Reviewers: nicolasvasilache
Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen,
antiagainst, arpith-jacob, mgester, lucyrfox, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72379
The file was modifiedmlir/test/Transforms/canonicalize.mlir
The file was modifiedmlir/lib/Dialect/StandardOps/Ops.cpp
Commit 78ce19b7e1dc521fa8ac8300823d52d619d4e93e by martin
[LLD] [COFF] Fix post-commit suggestions for absolute symbol equality
Differential Revision: https://reviews.llvm.org/D72252
The file was modifiedlld/COFF/Symbols.h
The file was modifiedlld/test/COFF/duplicate-absolute-same.s
The file was modifiedlld/COFF/SymbolTable.cpp
Commit 0b8ce37d64747ba7d8908626256e2b5e58f7b396 by spatel
[InstSimplify] add tests for select of true/false; NFC
The file was modifiedllvm/test/Transforms/InstSimplify/select.ll
Commit 0341c11e08504acef8c16ab07210bc253dadf2d9 by Jonas Devlieghere
[lldb/SWIG] Refactor extensions to be non Python-specific
The current SWIG extensions for the string conversion operator is Python
specific because it uses the PythonObjects. This means that the code
cannot be reused for other SWIG supported languages such as Lua.
This reimplements the extensions in a more generic way that can be
reused.
Differential revision: https://reviews.llvm.org/D72377
The file was modifiedlldb/scripts/interface/SBTarget.i
The file was modifiedlldb/scripts/lldb_lua.swig
The file was modifiedlldb/scripts/lldb.swig
The file was modifiedlldb/scripts/Python/python-extensions.swig
Commit 2d258ed931cdf47a7d1dcf08ad963b5452a8670f by kazu
Revert "[JumpThreading] Thread jumps through two basic blocks"
It looks like my patch breaks the sanitizer-windows build:
http://lab.llvm.org:8011/builders/sanitizer-windows/builds/56324
This reverts commit ead815924e6ebeaf02c31c37ebf7a560b5fdf67b.
The file was removedllvm/test/Transforms/JumpThreading/thread-two-bbs1.ll
The file was removedllvm/test/Transforms/JumpThreading/thread-two-bbs2.ll
The file was modifiedllvm/lib/Transforms/Scalar/JumpThreading.cpp
The file was modifiedllvm/include/llvm/Transforms/Scalar/JumpThreading.h
Commit edadb818e5be005fa4397b7e4bd5e397ddb4f5d6 by Jonas Devlieghere
[lldb/CMake] Only auto-enable Lua when SWIG is found
Just like Python, Lua should only be auto-enabled if SWIG is found as
well. This moves the logic of finding SWIG and Lua as a whole into a new
CMake package.
The file was addedlldb/cmake/modules/FindLuaAndSwig.cmake
The file was modifiedlldb/cmake/modules/LLDBConfig.cmake
Commit 28b9cdd26073c79be36c79476a9bacceca3d116f by Adrian Prantl
Delete dead code.
https://reviews.llvm.org/D58856
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
Commit 58deb20dd2dfbfbfff8097ce80137d12a57a3607 by eugenis
Revert "Merge memtag instructions with adjacent stack slots."
*** Bad machine code: Tied use must be a register ***
- function:    stg_alloca17
- basic block: %bb.0 entry (0x20076710580)
- instruction: early-clobber %0:gpr64common, early-clobber %1:gpr64sp =
STGloop 272, %stack.0.a :: (store 272 into %ir.a, align 16)
- operand 3:   %stack.0.a
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/21481/steps/test-check-all/logs/stdio
This reverts commit b675a7628ce6a21b1e4a71c079a67badfb8b073d.
The file was modifiedllvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetFrameLowering.h
The file was removedllvm/test/CodeGen/AArch64/settag-merge.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/stack-tagging-unchecked-ld-st.ll
The file was removedllvm/test/CodeGen/AArch64/settag-merge.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/test/CodeGen/AArch64/settag.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.h
The file was modifiedllvm/lib/CodeGen/PrologEpilogInserter.cpp
Commit f84d3200528a4aa1e8c7f2d3a9567f63f855b165 by ataei
[MLIR] Don't use SSA names directly for std.view canonicalization test
Reviewers: rriddle, nicolasvasilache
Subscribers: mehdi_amini, jpienaar, burmako, shauheen, antiagainst,
arpith-jacob, mgester, lucyrfox, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72408
The file was modifiedmlir/test/Transforms/canonicalize.mlir
Commit 7f1026a7520eb3d7e99da77f6738deb72de17980 by maskray
[cfi][test] cross-dso/stats.cpp: don't assume the order of static
constructors
__sanitizer_stat_init is called for the executable first, then the
shared object. In WriterModuleReport(), the information for the shared
object will be recorded first. It'd be nice to get rid of the order
requirement of static constructors. (This should make .ctors platforms
work.)
The file was modifiedcompiler-rt/test/cfi/cross-dso/stats.cpp
Commit ae47a3d8107856c84c104f3c2e43a553f4e36748 by Jonas Devlieghere
[lldb/SWIG] Refactor extensions to be non Python-specific (2/2)
The current SWIG extensions for the string conversion operator is Python
specific because it uses the PythonObjects. This means that the code
cannot be reused for other SWIG supported languages such as Lua.
This reimplements the extensions in a more generic way that can be
reused. It uses a SWIG macro to reduce code duplication.
Differential revision: https://reviews.llvm.org/D72377
The file was modifiedlldb/scripts/interface/SBBlock.i
The file was modifiedlldb/scripts/interface/SBMemoryRegionInfo.i
The file was modifiedlldb/scripts/interface/SBFunction.i
The file was modifiedlldb/scripts/interface/SBCommandReturnObject.i
The file was modifiedlldb/scripts/interface/SBInstruction.i
The file was modifiedlldb/scripts/interface/SBModule.i
The file was modifiedlldb/scripts/interface/SBBreakpointName.i
The file was modifiedlldb/scripts/interface/SBDeclaration.i
The file was modifiedlldb/scripts/interface/SBLineEntry.i
The file was modifiedlldb/scripts/lldb.swig
The file was modifiedlldb/scripts/interface/SBFileSpec.i
The file was modifiedlldb/scripts/interface/SBBreakpoint.i
The file was modifiedlldb/scripts/interface/SBModuleSpec.i
The file was modifiedlldb/scripts/interface/SBDebugger.i
The file was modifiedlldb/scripts/Python/python-extensions.swig
The file was modifiedlldb/scripts/interface/SBTarget.i
The file was modifiedlldb/scripts/interface/SBBreakpointLocation.i
The file was modifiedlldb/scripts/interface/SBAddress.i
The file was modifiedlldb/scripts/interface/SBInstructionList.i
The file was modifiedlldb/scripts/interface/SBCompileUnit.i
The file was addedlldb/scripts/macros.swig
The file was modifiedlldb/scripts/interface/SBError.i
The file was modifiedlldb/scripts/interface/SBFrame.i
The file was modifiedlldb/scripts/interface/SBData.i
The file was modifiedlldb/scripts/lldb_lua.swig
Commit ee57469a5128a5cd4f8b13945c873d3421a4b3d0 by paulsson
[X86]  Remove EFLAGS from live-in lists in X86FlagsCopyLowering.
When EFLAGS is no longer live into a basic block, remove it from the
live-in list.
Fixes https://bugs.llvm.org/show_bug.cgi?id=44462.
Review: Craig Topper
Differential Revision: https://reviews.llvm.org/D71375
The file was modifiedllvm/lib/Target/X86/X86FlagsCopyLowering.cpp
The file was addedllvm/test/CodeGen/X86/copy-eflags-liveinlists.mir
Commit b2fb6a7ba118f651cc76580ecb48eb5f877920aa by xazax
[NFC] Whitespace fixes
The file was modifiedclang/include/clang/Basic/Attr.td
The file was modifiedclang/include/clang/Basic/AttrDocs.td
Commit 85ee4ff4e474788abc7abdc939114281c2a68ec1 by bion
[libcxx] [test] Disable refwrap/weak_result.pass.cpp in C++20 mode
(broken by P0357R3)
The file was modifiedlibcxx/test/std/utilities/function.objects/refwrap/weak_result.pass.cpp
Commit 659efa21f1b3eded304b7239b356eecf1f5034ae by paulsson
Recommit "[MachineVerifier] Improve verification of live-in lists."
MachineVerifier::visitMachineFunctionAfter() is extended to check the
live-through case for live-in lists. This is only done for registers
without aliases and that are neither allocatable or reserved, such as
the SystemZ::CC register.
The MachineVerifier earlier only catched the case of a live-in use
without an entry in the live-in list (as "using an undefined physical
register").
A comment in LivePhysRegs.h has been added stating a guarantee that
addLiveOuts() can be trusted for a full register both before and after
register allocation.
Review: Quentin Colombet
Differential Revision: https://reviews.llvm.org/D68267
The file was addedllvm/test/MachineVerifier/live-ins-03.mir
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
The file was modifiedllvm/include/llvm/CodeGen/LivePhysRegs.h
The file was addedllvm/test/MachineVerifier/live-ins-02.mir
The file was addedllvm/test/MachineVerifier/live-ins-01.mir
Commit ff0311c4b3b9dce9d25d08e38aa163682b155513 by chmeeedalf
[PowerPC]: Add powerpcspe target triple subarch component
Summary: This allows the use of '-target powerpcspe-unknown-linux-gnu'
or
'powerpcspe-unknown-freebsd' to be used, instead of
'-target powerpc-unknown-linux-gnu -mspe'.
Reviewed By: dim Differential Revision: https://reviews.llvm.org/D72014
The file was modifiedllvm/unittests/ADT/TripleTest.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.cpp
The file was modifiedclang/test/Preprocessor/init.c
The file was modifiedllvm/include/llvm/ADT/Triple.h
The file was modifiedclang/lib/Basic/Targets/PPC.h
The file was modifiedclang/lib/Basic/Targets/PPC.cpp
The file was modifiedllvm/lib/Support/Triple.cpp
Commit 76aab66d34446ccf764cf8127b73e1517df75fb4 by mtrofin
[NFC][InlineCost] Factor cost modeling out of CallAnalyzer traversal.
Summary: The goal is to simplify experimentation on the cost model.
Today, CallAnalyzer decides 2 things: legality, and benefit. The
refactoring keeps legality assessment in CallAnalyzer, and factors
benefit evaluation out, as an extension.
Reviewers: davidxl, eraman
Subscribers: kamleshbhalui, fedor.sergeev, hiraditya,
baloghadamsoftware, haicheng, a.sidorin, Szelethus, donat.nagy, dkrupp,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71733
The file was modifiedllvm/lib/Analysis/InlineCost.cpp
Commit 1e46eb74be6527377e47090bbe0fc9298f7de2c5 by johannes
[Attributor][FIX] Avoid dangling value pointers during code modification
When we replace instructions with unreachable we delete instructions. We
now avoid dangling pointers to those deleted instructions in the
`ToBeChangedToUnreachableInsts` set. Other modification collections
might need to be updated in the future as well.
The file was modifiedllvm/include/llvm/Transforms/IPO/Attributor.h
The file was modifiedllvm/test/Transforms/Attributor/undefined_behavior.ll
The file was modifiedllvm/include/llvm/IR/ValueHandle.h
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp
Commit a4088c75cc1034307400076d29b35905d0ae58b2 by johannes
[Attributor][FIX] Carefully change invokes to calls (after manifest)
Before we manually inserted unreachable early but that could lead to
broken PHI nodes. Now we use the existing late modification
functionality.
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead.ll
The file was modifiedllvm/test/Transforms/Attributor/noreturn_async.ll
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/fp80.ll
The file was modifiedllvm/test/Transforms/Attributor/IPConstantProp/return-constant.ll
The file was modifiedllvm/include/llvm/Transforms/IPO/Attributor.h
The file was modifiedllvm/test/Transforms/Attributor/liveness.ll
The file was modifiedllvm/test/Transforms/Attributor/IPConstantProp/recursion.ll
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/crash.ll
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/nonzero-address-spaces.ll
Commit 338a601612ca36e112b14f622eb310985b93192a by mtrofin
Revert "[NFC][InlineCost] Factor cost modeling out of CallAnalyzer
traversal."
This reverts commit 76aab66d34446ccf764cf8127b73e1517df75fb4.
Failure:
http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/20562,
will investigate and resubmit.
The file was modifiedllvm/lib/Analysis/InlineCost.cpp
Commit 26ba160d47220a0bce75b1f491bf6e262edf69fa by czhengsz
[PowerPC] when folding rlwinm+rlwinm. to andi., we should use first
rlwinm input reg.
%2:gprc = RLWINM %1:gprc, 27, 5, 10
%3:gprc = RLWINM_rec %2:gprc, 8, 5, 10, implicit-def $cr0
==>
%3:gprc = ANDI_rec %1, 0, implicit-def $cr0
we should use %1 instead of %2 as ANDI_rec input.
Reviewed By: steven.zhang
Differential Revision: https://reviews.llvm.org/D71885
The file was modifiedllvm/lib/Target/PowerPC/PPCMIPeephole.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/fold-rlwinm.mir
Commit a63af915288ad9d1049d486833fcd085b620dc6d by apl
[lldb] Remove various dead Compare functions
The file was modifiedlldb/source/Symbol/Function.cpp
The file was modifiedlldb/source/Core/Section.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
The file was modifiedlldb/source/Symbol/Type.cpp
Commit be841f89d0014b1e0246a4feae941b2f74abd908 by daniel_l_sanders
[MIR] Target specific MIR formating and parsing
Summary: Added MIRFormatter for target specific MIR formating and
parsing with immediate and custom pseudo source values. Target machine
can subclass MIRFormatter and implement custom logic for printing and
parsing immediate and custom pseudo source values for better
readability.
* Target specific immediate mnemonic need to start with "." follows by
identifier string. When MIR parser sees immediate it will call target
specific parsing function.
* Custom pseudo source value need to start with custom follows by
double-quoted string. MIR parser will pass the quoted string to target
specific PSV parsing function.
* MIRFormatter have 2 helper functions to facilitate LLVM value printing
and parsing for custom PSV if they refers LLVM values.
Reviewers: dsanders, arsenm
Reviewed By: dsanders
Subscribers: wdng, jvesely, nhaehnle, hiraditya, jfb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69836
The file was modifiedllvm/include/llvm/CodeGen/MIRParser/MIParser.h
The file was modifiedllvm/include/llvm/Target/TargetMachine.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
The file was modifiedllvm/lib/CodeGen/MachineOperand.cpp
The file was modifiedllvm/lib/CodeGen/MIRParser/MIParser.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
The file was modifiedllvm/include/llvm/CodeGen/MachineOperand.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.h
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
The file was modifiedllvm/lib/CodeGen/MIRPrinter.cpp
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetInstrInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
The file was modifiedllvm/include/llvm/CodeGen/PseudoSourceValue.h
The file was modifiedllvm/lib/Target/TargetMachine.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
The file was modifiedllvm/unittests/CodeGen/MachineOperandTest.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
The file was modifiedllvm/include/llvm/CodeGen/MachineMemOperand.h
The file was addedllvm/include/llvm/CodeGen/MIRFormatter.h
Commit d44a0743175fc781aa2a23d638d683ded6eb10b8 by Jason Molenda
Save more descriptive error msg from FBS/BKS, relay it up to lldb.
When lldb requests an app launch through FrontBoard/BackBoard, we get
back an NSError object if there was a problem with an integer error code
and a descriptive text string.  debugserver would log the descriptive
text string to the console, but it would only save the error code value,
ask for the much-less-specific name of that error code, and send that
very generic error word back to lldb.
This patch saves the longer description of the failure when available,
and sends that to lldb.  If unavailable, it falls back to sending up the
generic description of the error code as it was doing before.
This only impacts the iOS on-device debugserver.
<rdar://problem/49953304>
The file was modifiedlldb/tools/debugserver/source/MacOSX/MachProcess.mm
Commit 5ab6fa7b7011b00e8955168c5bbcb46e9712afa9 by daniel_l_sanders
Revert "[MIR] Target specific MIR formating and parsing"
Forgot to credit Peng in the commit message.
This reverts commit be841f89d0014b1e0246a4feae941b2f74abd908.
The file was modifiedllvm/include/llvm/CodeGen/MIRParser/MIParser.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.cpp
The file was modifiedllvm/lib/Target/TargetMachine.cpp
The file was modifiedllvm/include/llvm/CodeGen/MachineOperand.h
The file was modifiedllvm/lib/CodeGen/MIRParser/MIParser.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
The file was modifiedllvm/lib/CodeGen/MIRPrinter.cpp
The file was modifiedllvm/include/llvm/CodeGen/PseudoSourceValue.h
The file was modifiedllvm/include/llvm/CodeGen/TargetInstrInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
The file was modifiedllvm/lib/CodeGen/MachineOperand.cpp
The file was modifiedllvm/include/llvm/Target/TargetMachine.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
The file was modifiedllvm/unittests/CodeGen/MachineOperandTest.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
The file was removedllvm/include/llvm/CodeGen/MIRFormatter.h
The file was modifiedllvm/include/llvm/CodeGen/MachineMemOperand.h
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
Commit 3ef05d85be8c3666ebfa3ad986eb334da5195a47 by daniel_l_sanders
[MIR] Target specific MIR formating and parsing
Summary: Added MIRFormatter for target specific MIR formating and
parsing with immediate and custom pseudo source values. Target machine
can subclass MIRFormatter and implement custom logic for printing and
parsing immediate and custom pseudo source values for better
readability.
* Target specific immediate mnemonic need to start with "." follows by
identifier string. When MIR parser sees immediate it will call target
specific parsing function.
* Custom pseudo source value need to start with custom follows by
double-quoted string. MIR parser will pass the quoted string to target
specific PSV parsing function.
* MIRFormatter have 2 helper functions to facilitate LLVM value printing
and parsing for custom PSV if they refers LLVM values.
Patch by Peng Guo
Reviewers: dsanders, arsenm
Reviewed By: dsanders
Subscribers: wdng, jvesely, nhaehnle, hiraditya, jfb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69836
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
The file was modifiedllvm/lib/CodeGen/MachineOperand.cpp
The file was modifiedllvm/include/llvm/CodeGen/MachineOperand.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
The file was addedllvm/include/llvm/CodeGen/MIRFormatter.h
The file was modifiedllvm/include/llvm/CodeGen/PseudoSourceValue.h
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
The file was modifiedllvm/include/llvm/Target/TargetMachine.h
The file was modifiedllvm/lib/CodeGen/MIRParser/MIParser.cpp
The file was modifiedllvm/include/llvm/CodeGen/MachineMemOperand.h
The file was modifiedllvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
The file was modifiedllvm/lib/CodeGen/MIRPrinter.cpp
The file was modifiedllvm/lib/Target/TargetMachine.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
The file was modifiedllvm/include/llvm/CodeGen/TargetInstrInfo.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
The file was modifiedllvm/include/llvm/CodeGen/MIRParser/MIParser.h
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
The file was modifiedllvm/unittests/CodeGen/MachineOperandTest.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
Commit 71d64f72f934631aa2f12b9542c23f74f256f494 by thakis
Revert "[MIR] Target specific MIR formating and parsing"
This reverts commit 3ef05d85be8c3666ebfa3ad986eb334da5195a47. It broke
check-llvm on many bots, see comments on D69836.
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
The file was modifiedllvm/lib/Target/TargetMachine.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
The file was modifiedllvm/include/llvm/CodeGen/MachineOperand.h
The file was modifiedllvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
The file was modifiedllvm/include/llvm/Target/TargetMachine.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.cpp
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.h
The file was modifiedllvm/include/llvm/CodeGen/TargetInstrInfo.h
The file was modifiedllvm/include/llvm/CodeGen/MachineMemOperand.h
The file was modifiedllvm/include/llvm/CodeGen/PseudoSourceValue.h
The file was modifiedllvm/include/llvm/CodeGen/MIRParser/MIParser.h
The file was modifiedllvm/unittests/CodeGen/MachineOperandTest.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
The file was modifiedllvm/lib/CodeGen/MIRPrinter.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
The file was modifiedllvm/lib/CodeGen/MIRParser/MIParser.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
The file was modifiedllvm/lib/CodeGen/MachineOperand.cpp
The file was removedllvm/include/llvm/CodeGen/MIRFormatter.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
Commit de3d0ee023cb14c06d5be01369ef8db4cbfa16b4 by daniel_l_sanders
Revert "Revert "[MIR] Target specific MIR formating and parsing""
There was an unguarded dereference of MF in a function that permitted
nullptr. Fixed
This reverts commit 71d64f72f934631aa2f12b9542c23f74f256f494.
The file was modifiedllvm/lib/CodeGen/MIRParser/MIParser.cpp
The file was modifiedllvm/include/llvm/CodeGen/MachineOperand.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
The file was modifiedllvm/unittests/CodeGen/MachineOperandTest.cpp
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
The file was modifiedllvm/include/llvm/CodeGen/MIRParser/MIParser.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
The file was modifiedllvm/lib/Target/TargetMachine.cpp
The file was modifiedllvm/lib/CodeGen/MIRPrinter.cpp
The file was modifiedllvm/include/llvm/CodeGen/PseudoSourceValue.h
The file was modifiedllvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
The file was modifiedllvm/lib/CodeGen/MachineOperand.cpp
The file was modifiedllvm/include/llvm/Target/TargetMachine.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
The file was addedllvm/include/llvm/CodeGen/MIRFormatter.h
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.cpp
The file was modifiedllvm/include/llvm/CodeGen/MachineMemOperand.h
The file was modifiedllvm/include/llvm/CodeGen/TargetInstrInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
Commit d48ac7d54d8a096677c84cfb2928400e05b918ea by qshanz
[DAGCombine] Fold the (fma -x, y, -z) to -(fma x, y, z)
This is a positive combination as long as the NEG is NOT free, as we are
reducing the number of NEG from two to one.
Differential Revision: https://reviews.llvm.org/D72312
The file was modifiedllvm/test/CodeGen/PowerPC/combine-fneg.ll
The file was modifiedllvm/test/CodeGen/PowerPC/recipest.ll
The file was modifiedllvm/test/CodeGen/PowerPC/qpx-recipest.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fma-combine.ll
The file was modifiedllvm/test/CodeGen/PowerPC/repeated-fp-divisors.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp