FailedChanges

Changes from Git (git http://labmaster3.local/git/llvm-zorg.git)

Summary

  1. [zorg] Pass "-DLLVM_POLLY_LINK_INTO_TOOLS=ON" in getPollyBuildFactory (details)
  2. [AVR] Add the AVR builder 'llvm-avr-linux' back, pulling from GitHub (details)
Commit 6ad01600c4e27d7238564346976df22204a5014b by efriedma
[zorg] Pass "-DLLVM_POLLY_LINK_INTO_TOOLS=ON" in getPollyBuildFactory
The default here was changed recently, and the
aosp-O3-polly-before-vectorizer-unprofitable builder assumes polly is
linked into clang.
Differential Revision: https://reviews.llvm.org/D72646
The file was modifiedzorg/buildbot/builders/PollyBuilder.py
Commit d94f2381197b14fa3e65eafd17ad4ceaf972ae34 by me
[AVR] Add the AVR builder 'llvm-avr-linux' back, pulling from GitHub
This patch brings back the existing AVR builder that was removed in
3b645861c5110a9d11bf5f6d936ca074212cc452 due to it being incompatible
with the GitHub only repo we now have.
The builder now uses the 'getClangCMakeBuildFactory()' factory, instead
of 'getLLVMCMakeBuildFactory()' as it used to.
The file was modifiedbuildbot/osuosl/master/config/builders.py

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [libcxx] Use C11 thread API on Fuchsia (details)
  2. [mlir] : Fix ViewOp shape folder for identity affine maps (details)
  3. [X86] Swap the 0 and the fudge factor in the constant pool for the (details)
  4. [X86] Drop an unneeded FIXME. NFC (details)
  5. [amdgpu] Fix typos in a test case. (details)
  6. [Win64] Handle FP arguments more gracefully under -mno-sse (details)
  7. Allow /D flags absent during PCH creation under msvc-compat (details)
  8. [X86] ABI compat bugfix for MSVC vectorcall (details)
  9. [Concepts] Type Constraints (details)
  10. [BranchAlign] Add master --x86-branches-within-32B-boundaries flag (details)
  11. DWARFDebugLine.cpp: Restore LF line endings (details)
  12. Modify test to use -S instead of -c so that it works when an external (details)
  13. PR44540: Prefer an inherited default constructor over an initializer (details)
  14. CMake: Make most target symbols hidden by default (details)
  15. Relax the rules around objc_alloc and objc_alloc_init optimizations. (details)
  16. [PowerPC] Fix powerpcspe subtarget enablement in llvm backend (details)
  17. [ODRHash] Fix wrong error message with bitfields and mutable. (details)
  18. [Driver][X86] Add -malign-branch* and -mbranches-within-32B-boundaries (details)
  19. Fix up ms-pch-macro.c test to pass on non-Windows (details)
  20. [lldb/CommandInterpreter] Remove flag that's always true (NFC) (details)
  21. [lldb/test] Add test for CMTime data formatter (details)
  22. [Scheduler] Adjust interface of CreateTargetMIHazardRecognizer to use (details)
  23. [Attributor] AAValueConstantRange: Value range analysis using constant (details)
  24. [ARM] Reegenerate MVE tests. NFC (details)
  25. [X86] Don't call LowerUINT_TO_FP_i32 for i32->f80 on 32-bit targets with (details)
  26. [VE] Minimal codegen for empty functions (details)
  27. [AMDGPU] Invert the handling of skip insertion. (details)
  28. [MachO] Add a test for detecting reserved unit length. (details)
  29. [gn build] Port 0dc6c249bff (details)
  30. [DWARF] Fix DWARFDebugAranges to support 64-bit CU offsets. (details)
  31. [RISCV] Support ABI checking with per function target-features (details)
  32. [llvm-locstats][NFC] Support OOP concept (details)
  33. Revert "[RISCV] Add Clang frontend support for Bitmanip extension" (details)
  34. [yaml2obj/obj2yaml] - Add support for SHT_RELR sections. (details)
  35. [llvm-locstats] Add the --draw-plot option (details)
  36. [AArch64][SVE] Add ptest intrinsics (details)
  37. [Support] Replace Windows __declspec(thread) with thread_local for (details)
  38. Revert "[yaml2obj/obj2yaml] - Add support for SHT_RELR sections." (details)
  39. [Lexer] Allow UCN for dollar symbol '\u0024' in identifiers when using (details)
  40. [llvm-locstats] Fix the docs (details)
  41. [NFC] Adjust test cases numbering, test commit. (details)
  42. [AArch64][SVE] Fold variable into assert to silence unused variable (details)
  43. [lldb] Add expect_expr function for testing expression evaluation in (details)
  44. [yaml2obj/obj2yaml] - Add support for SHT_RELR sections. (details)
  45. Fix "pointer is null" static analyzer warning. NFCI. (details)
  46. RegisterClassInfo::computePSetLimit - assert that we actually find a (details)
  47. Fix Wdocumentation warning. NFC. (details)
  48. Revert "[RISCV] Support ABI checking with per function target-features" (details)
  49. [RISCV] Support ABI checking with per function target-features (details)
  50. Revert rG6078f2fedcac5797ac39ee5ef3fd7a35ef1202d5 - (details)
  51. Bump the trunk major version to 11 (details)
Commit ab9aefee9fa09957d1a3e76fcc47abda0d002255 by phosek
[libcxx] Use C11 thread API on Fuchsia
On Fuchsia, pthread API is emulated on top of C11 thread API. Using C11
thread API directly is more efficient.
While this implementation is only used by Fuchsia at the moment, it's
not Fuchsia specific, and could be used by other platforms that use C11
threads rather than pthreads in the future.
Differential Revision: https://reviews.llvm.org/D64378
The file was modifiedlibcxx/include/__config
The file was modifiedlibcxx/include/__threading_support
Commit ab035647061272b7efa39364c42e48972cebc0ab by ataei
[mlir] : Fix ViewOp shape folder for identity affine maps
Summary: Fix the ViewOpShapeFolder in case of no affine mapping
associated with a Memref construct identity mapping.
Reviewers: nicolasvasilache
Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen,
antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72735
The file was modifiedmlir/lib/Dialect/StandardOps/Ops.cpp
The file was modifiedmlir/test/Transforms/canonicalize.mlir
Commit 57eb56b83926675dd8a554fc8a8e28ee57278f90 by craig.topper
[X86] Swap the 0 and the fudge factor in the constant pool for the
32-bit mode i64->f32/f64/f80 uint_to_fp algorithm.
This allows us to generate better code for selecting the fixup to load.
Previously when the sign was set we had to load offset 0. And when it
was clear we had to load offset 4. This required a testl, setns, zero
extend, and finally a mul by 4. By switching the offsets we can just
shift the sign bit into the lsb and multiply it by 4.
The file was modifiedllvm/test/CodeGen/X86/pr15309.ll
The file was modifiedllvm/test/CodeGen/X86/fp80-strict-scalar.ll
The file was modifiedllvm/test/CodeGen/X86/scalar-int-to-fp.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-inttofp-256.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-inttofp-512.ll
The file was modifiedllvm/test/CodeGen/X86/pr44396.ll
The file was modifiedllvm/test/CodeGen/X86/uint64-to-float.ll
The file was modifiedllvm/test/CodeGen/X86/half.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-inttofp-128.ll
The file was modifiedllvm/test/CodeGen/X86/fp-cvt.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/fildll.ll
The file was modifiedllvm/test/CodeGen/X86/fp-intrinsics.ll
The file was modifiedllvm/test/CodeGen/X86/fp-strict-scalar-inttofp.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
Commit 76291e1158c2aedddfe0be0ea69452ea6dc2db24 by craig.topper
[X86] Drop an unneeded FIXME. NFC
The extload on X87 is free.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 65c8abb14e77b28d8357c52dddb8e0a6b12b4ba2 by michael.hliao
[amdgpu] Fix typos in a test case.
- There are typos introduced due to merge.
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
Commit 40cd26c7008183e01d8276396339aea2a99d83d7 by rnk
[Win64] Handle FP arguments more gracefully under -mno-sse
Pass small FP values in GPRs or stack memory according the the normal
convention. This is what gcc -mno-sse does on Win64.
I adjusted the conditions under which we emit an error to check if the
argument or return value would be passed in an XMM register when SSE is
disabled. This has a side effect of no longer emitting an error for FP
arguments marked 'inreg' when targetting x86 with SSE disabled. Our
calling convention logic was already assigning it to FP0/FP1, and then
we emitted this error. That seems unnecessary, we can ignore 'inreg' and
compile it without SSE.
Reviewers: jyknight, aemerson
Differential Revision: https://reviews.llvm.org/D70465
The file was modifiedllvm/lib/Target/X86/X86CallingConv.td
The file was addedllvm/test/CodeGen/X86/no-sse-win64.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was addedllvm/test/CodeGen/X86/no-sse-x86.ll
The file was removedllvm/test/CodeGen/X86/nosse-error2.ll
Commit 0f9cf42facaf9eff47dc0b9eb7e6ed8803d3bc3b by rnk
Allow /D flags absent during PCH creation under msvc-compat
Summary: Before this patch adding a new /D flag when compiling a source
file that consumed a PCH with clang-cl would issue a diagnostic and then
fail.  With the patch, the diagnostic is still issued but the definition
is accepted.  This matches the msvc behavior.  The fuzzy-pch-msvc.c is a
clone of the existing fuzzy-pch.c tests with some msvc specific rework.
msvc diagnostic:
warning C4605: '/DBAR=int' specified on current command line, but was
not specified when precompiled header was built
Output of the CHECK-BAR test prior to the code change:
<built-in>(1,9): warning: definition of macro 'BAR' does not match
definition in precompiled header [-Wclang-cl-pch]
#define BAR int
         ^
D:\repos\llvm\llvm-project\clang\test\PCH\fuzzy-pch-msvc.c(12,1):
error: unknown type name 'BAR'
BAR bar = 17;
^
D:\repos\llvm\llvm-project\clang\test\PCH\fuzzy-pch-msvc.c(23,4):
error: BAR was not defined
#  error BAR was not defined
    ^
1 warning and 2 errors generated.
Reviewers: rnk, thakis, hans, zturner
Subscribers: mikerice, aganea, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72405
The file was addedclang/test/PCH/ms-pch-macro.c
The file was modifiedclang/lib/Lex/PPDirectives.cpp
Commit 8e780252a7284be45cf1ba224cabd884847e8e92 by rnk
[X86] ABI compat bugfix for MSVC vectorcall
Summary: Before this change, X86_32ABIInfo::classifyArgument would be
called twice on vector arguments to vectorcall functions. This function
has side effects to track GPR register usage, and this would lead to
incorrect GPR usage in some cases.  The specific case I noticed is from
running out of XMM registers with mixed FP and vector arguments and no
aggregates of any kind. Consider this prototype:
  void __vectorcall vectorcall_indirect_vec(
     double xmm0, double xmm1, double xmm2, double xmm3, double xmm4,
     __m128 xmm5,
     __m128 ecx,
     int edx,
     __m128 mem);
classifyArgument has no effects when called on a plain FP type, but when
called on a vector type, it modifies FreeRegs to model GPR consumption.
However, this should not happen during the vector call first pass.
I refactored the code to unify vectorcall HVA logic with regcall HVA
logic. The conventions pass HVAs in registers differently (expanded vs.
not expanded), but if they do not fit in registers, they both pass them
indirectly by address.
Reviewers: erichkeane, craig.topper
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72110
The file was modifiedclang/include/clang/CodeGen/CGFunctionInfo.h
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
The file was modifiedclang/test/CodeGen/vectorcall.c
Commit ff1e0fce817e01f0288fad6a2607dd173180aabd by saar
[Concepts] Type Constraints
Add support for type-constraints in template type parameters. Also add
support for template type parameters as pack expansions (where the type
constraint can now contain an unexpanded parameter pack).
Differential Revision: https://reviews.llvm.org/D44352
The file was modifiedclang/include/clang/AST/DeclTemplate.h
The file was modifiedclang/lib/Sema/SemaType.cpp
The file was addedclang/test/Parser/cxx2a-constrained-template-param-with-partial-id.cpp
The file was modifiedclang/lib/Serialization/ASTReaderDecl.cpp
The file was addedclang/test/CXX/temp/temp.param/p10-2a.cpp
The file was modifiedclang/lib/Serialization/ASTWriterStmt.cpp
The file was addedclang/test/CXX/temp/temp.arg/temp.arg.template/p3-2a.cpp
The file was modifiedclang/tools/libclang/CIndex.cpp
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was modifiedclang/lib/AST/ASTImporter.cpp
The file was modifiedclang/include/clang/AST/ExprCXX.h
The file was modifiedclang/lib/Parse/ParseDecl.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was addedclang/test/Parser/cxx2a-constrained-template-param.cpp
The file was modifiedclang/lib/AST/ExprCXX.cpp
The file was modifiedclang/lib/AST/TextNodeDumper.cpp
The file was modifiedclang/include/clang/AST/ASTContext.h
The file was modifiedclang/lib/Parse/ParseExprCXX.cpp
The file was modifiedclang/lib/Serialization/ASTReaderStmt.cpp
The file was modifiedclang/test/CXX/temp/temp.constr/temp.constr.decl/class-template-decl.cpp
The file was modifiedclang/lib/Sema/SemaCodeComplete.cpp
The file was modifiedclang/lib/AST/DeclTemplate.cpp
The file was addedclang/test/CXX/temp/temp.constr/temp.constr.decl/p3.cpp
The file was modifiedclang/include/clang/AST/RecursiveASTVisitor.h
The file was addedclang/test/SemaTemplate/instantiate-expanded-type-constraint.cpp
The file was modifiedclang/lib/Sema/SemaTemplate.cpp
The file was modifiedclang/include/clang/AST/ASTConcept.h
The file was modifiedclang/include/clang/Parse/Parser.h
The file was modifiedclang/lib/AST/DeclPrinter.cpp
The file was modifiedclang/include/clang/Basic/TokenKinds.def
The file was modifiedclang/lib/AST/ODRHash.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/lib/Sema/TreeTransform.h
The file was modifiedclang/lib/Sema/SemaTemplateDeduction.cpp
The file was modifiedclang/include/clang/AST/ASTNodeTraverser.h
The file was modifiedclang/test/SemaTemplate/ms-delayed-default-template-args.cpp
The file was modifiedclang/include/clang/Sema/ParsedTemplate.h
The file was modifiedclang/lib/Parse/ParseTemplate.cpp
The file was modifiedclang/lib/Serialization/ASTWriterDecl.cpp
Commit 1a7398eca2040d232149f18a75b5d78a6521941c by listmail
[BranchAlign] Add master --x86-branches-within-32B-boundaries flag
This flag was originally part of D70157, but was removed as we carved
away pieces of the review. Since we have the nop support checked in, and
it appears mature(*), I think it's time to add the master flag. For now,
it will default to nop padding, but once the prefix padding support
lands, we'll update the defaults.
(*) I can now confirm that downstream testing of the changes which have
landed to date - nop padding and compiler support for suppressions - is
passing all of the functional testing we've thrown at it. There might
still be something lurking, but we've gotten enough coverage to be
confident of the basic approach.
Note that the new flag can be used either when assembling an .s file, or
when using the integrated assembler directly from the compiler. The
later will use all of the suppression mechanism and should always
generate correct code. We don't yet have assembly syntax for the
suppressions, so passing this directly to the assembler w/a raw .s file
may result in broken code. Use at your own risk.
Also note that this isn't the wiring for the clang option. I think the
most recent review for that is D72227, but I've lost track, so that
might be off.
Differential Revision: https://reviews.llvm.org/D72738
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
The file was modifiedllvm/test/MC/X86/align-branch-64-1a.s
Commit aca3e70d2bc0dd89b7d486c2a8eac70d8a89e790 by hstong
DWARFDebugLine.cpp: Restore LF line endings
rG7e02406f6cf180a8c89ce64665660e7cc9dbc23e switched the file to CRLF
line endings.
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
Commit c6e69880ae4d9ce4d27bf046292a0a20c3ab3540 by douglas.yung
Modify test to use -S instead of -c so that it works when an external
assembler is used that is not present.
The file was modifiedclang/test/Driver/cc1-spawnprocess.c
Commit 1b5404aff37953ce4c10191d04872ed7c2dc6548 by richard
PR44540: Prefer an inherited default constructor over an initializer
list constructor when initializing from {}.
We would previously pick between calling an initializer list constructor
and calling a default constructor unstably in this situation, depending
on whether the inherited default constructor had already been used
elsewhere in the program.
The file was modifiedclang/test/CXX/dcl.decl/dcl.init/dcl.init.list/p3.cpp
The file was modifiedclang/lib/Sema/SemaInit.cpp
The file was modifiedclang/lib/AST/DeclCXX.cpp
Commit 0dbcb3639451a7c20e2d5133b459552281e64455 by tstellar
CMake: Make most target symbols hidden by default
Summary: For builds with LLVM_BUILD_LLVM_DYLIB=ON and
BUILD_SHARED_LIBS=OFF this change makes all symbols in the target
specific libraries hidden by default.
A new macro called LLVM_EXTERNAL_VISIBILITY has been added to mark
symbols in these libraries public, which is mainly needed for the
definitions of the LLVMInitialize* functions.
This patch reduces the number of public symbols in libLLVM.so by about
25%.  This should improve load times for the dynamic library and also
make abi checker tools, like abidiff require less memory when analyzing
libLLVM.so
One side-effect of this change is that for builds with
LLVM_BUILD_LLVM_DYLIB=ON and LLVM_LINK_LLVM_DYLIB=ON some unittests that
access symbols that are no longer public will need to be statically
linked.
Before and after public symbol counts (using gcc 8.2.1, ld.bfd 2.31.1):
nm before/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l 36221 nm
after/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l 26278
Reviewers: chandlerc, beanz, mgorny, rnk, hans
Reviewed By: rnk, hans
Subscribers: merge_guards_bot, luismarques, smeenai, ldionne, lenary,
s.egerton, pzheng, sameer.abuasal, MaskRay, wuzish, echristo, Jim,
hiraditya, michaelplatings, chapuni, jholewinski, arsenm, dschuff,
jyknight, dylanmckay, sdardis, nemanjai, jvesely, javed.absar, sbc100,
jgravelle-google, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso,
simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones,
mgrang, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX,
jocewei, kristina, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D54439
The file was modifiedllvm/lib/Target/AVR/AVRAsmPrinter.cpp
The file was modifiedllvm/lib/Target/X86/TargetInfo/X86TargetInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86AsmPrinter.cpp
The file was modifiedllvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVTargetMachine.cpp
The file was modifiedllvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/lib/Target/XCore/XCoreAsmPrinter.cpp
The file was modifiedllvm/lib/Target/Lanai/TargetInfo/LanaiTargetInfo.cpp
The file was modifiedllvm/utils/unittest/CMakeLists.txt
The file was modifiedllvm/unittests/tools/llvm-exegesis/Mips/CMakeLists.txt
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
The file was modifiedllvm/lib/Target/SystemZ/TargetInfo/SystemZTargetInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
The file was modifiedllvm/lib/Target/Mips/MipsTargetMachine.cpp
The file was modifiedllvm/unittests/tools/llvm-exegesis/PowerPC/CMakeLists.txt
The file was modifiedllvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
The file was modifiedllvm/lib/Target/NVPTX/TargetInfo/NVPTXTargetInfo.cpp
The file was modifiedllvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
The file was modifiedllvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
The file was modifiedllvm/lib/Target/MSP430/MSP430TargetMachine.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
The file was modifiedllvm/lib/Target/ARM/ARMAsmPrinter.cpp
The file was modifiedllvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
The file was modifiedllvm/unittests/Target/WebAssembly/CMakeLists.txt
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetMachine.cpp
The file was modifiedllvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp
The file was modifiedllvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
The file was modifiedllvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
The file was modifiedllvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
The file was modifiedllvm/lib/Target/Lanai/LanaiTargetMachine.cpp
The file was modifiedllvm/unittests/tools/llvm-exegesis/ARM/CMakeLists.txt
The file was modifiedllvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
The file was modifiedllvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
The file was modifiedllvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/CMakeLists.txt
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetMachine.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
The file was modifiedllvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
The file was modifiedllvm/lib/Target/AVR/AVRTargetMachine.cpp
The file was modifiedllvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
The file was modifiedllvm/lib/Target/Sparc/SparcTargetMachine.cpp
The file was modifiedllvm/lib/Target/Sparc/TargetInfo/SparcTargetInfo.cpp
The file was modifiedllvm/include/llvm/Support/Compiler.h
The file was modifiedllvm/lib/Target/Mips/MipsAsmPrinter.cpp
The file was modifiedllvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
The file was modifiedllvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/ARM/TargetInfo/ARMTargetInfo.cpp
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
The file was modifiedllvm/lib/Target/AArch64/TargetInfo/AArch64TargetInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetMachine.cpp
The file was modifiedllvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetMachine.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
The file was modifiedllvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp
The file was modifiedllvm/unittests/tools/llvm-exegesis/AArch64/CMakeLists.txt
The file was modifiedllvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
The file was modifiedllvm/unittests/Target/ARM/CMakeLists.txt
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
The file was modifiedllvm/lib/Target/Sparc/SparcAsmPrinter.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp
The file was modifiedllvm/unittests/CMakeLists.txt
The file was modifiedllvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
The file was modifiedllvm/lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp
The file was modifiedllvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
The file was modifiedllvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
The file was modifiedllvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/XCore/XCoreTargetMachine.cpp
The file was modifiedllvm/unittests/tools/llvm-exegesis/X86/CMakeLists.txt
The file was modifiedllvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
The file was modifiedllvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
The file was modifiedllvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/BPF/BPFAsmPrinter.cpp
The file was modifiedllvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
The file was modifiedllvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
The file was modifiedllvm/lib/Target/MSP430/TargetInfo/MSP430TargetInfo.cpp
The file was modifiedllvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/RISCV/TargetInfo/RISCVTargetInfo.cpp
The file was modifiedllvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
The file was modifiedllvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
The file was modifiedllvm/lib/Target/ARC/ARCTargetMachine.cpp
The file was modifiedllvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
The file was modifiedllvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
The file was modifiedllvm/lib/Target/BPF/BPFTargetMachine.cpp
The file was modifiedllvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
The file was modifiedllvm/unittests/Target/AArch64/CMakeLists.txt
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
The file was modifiedllvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp
The file was modifiedllvm/lib/Target/BPF/TargetInfo/BPFTargetInfo.cpp
The file was modifiedllvm/lib/Target/ARC/TargetInfo/ARCTargetInfo.cpp
The file was modifiedllvm/lib/Target/AVR/TargetInfo/AVRTargetInfo.cpp
The file was modifiedllvm/lib/Target/Hexagon/TargetInfo/HexagonTargetInfo.cpp
The file was modifiedllvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
The file was modifiedllvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
The file was modifiedllvm/lib/Target/XCore/TargetInfo/XCoreTargetInfo.cpp
The file was modifiedllvm/lib/Target/ARC/ARCAsmPrinter.cpp
The file was modifiedllvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
Commit d18fbfc09720009c0dc6a1ddf315402ee0a7751d by phabouzit
Relax the rules around objc_alloc and objc_alloc_init optimizations.
Today the optimization is limited to:
- `[ClassName alloc]`
- `[self alloc]` when within a class method
However it means that when code is written this way:
```
   @interface MyObject
   - (id)copyWithZone:(NSZone *)zone
   {
       return [[self.class alloc] _initWith...];
   }
    @end
```
... then the optimization doesn't kick in and `+[NSObject alloc]` ends
up in IMP caches where it could have been avoided. It turns out that
`+alloc` -> `+[NSObject alloc]` is the most cached SEL/IMP pair in the
entire platform which is rather silly).
There's two theoretical risks allowing this optimization:
1. if the receiver is nil (which it can't be today), but it turns out
  that `objc_alloc()`/`objc_alloc_init()` cope with a nil receiver,
2. if the `Clas` type for the receiver is a lie. However, for such a
  code to work today (and not fail witn an unrecognized selector
  anyway) you'd have to have implemented the `-alloc` **instance
  method**.
   Fortunately, `objc_alloc()` doesn't assume that the receiver is a
  Class, it basically starts with a test that is similar to
       `if (receiver->isa->bits & hasDefaultAWZ) { /* fastpath */ }`.
   This bit is only set on metaclasses by the runtime, so if an instance
  is passed to this function by accident, its isa will fail this test,
  and `objc_alloc()` will gracefully fallback to `objc_msgSend()`.
   The one thing `objc_alloc()` doesn't support is tagged pointer
  instances. None of the tagged pointer classes implement an instance
  method called `'alloc'` (actually there's a single class in the
  entire Apple codebase that has such a method).
Differential Revision: https://reviews.llvm.org/D71682 Radar-Id:
rdar://problem/58058316 Reviewed-By: Akira Hatanaka Signed-off-by:
Pierre Habouzit <phabouzit@apple.com>
The file was modifiedclang/lib/CodeGen/CGObjC.cpp
The file was modifiedclang/test/CodeGenObjC/objc-alloc-init.m
Commit 36eedfcb3cea6d4fb0c5998e63596502eb7d32f0 by chmeeedalf
[PowerPC] Fix powerpcspe subtarget enablement in llvm backend
Summary: As currently written, -target powerpcspe will enable SPE
regardless of disabling the feature later on in the command line.
Instead, change this to just set a default CPU to 'e500' instead of a
generic CPU.
As part of this, add FeatureSPE to the e500 definition.
Reviewed By: MaskRay Differential Revision:
https://reviews.llvm.org/D72673
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPC.td
Commit a60e8927297005898b10a46300d929ba5cf7833c by rtrieu
[ODRHash] Fix wrong error message with bitfields and mutable.
Add a check to bitfield mismatches that may have caused Clang to give an
error about the bitfield instead of being mutable.
The file was modifiedclang/lib/Serialization/ASTReader.cpp
The file was modifiedclang/test/Modules/odr_hash.cpp
Commit 5ca24d09aefaedf8e4148c7fce4b4ab0c4ecc72a by maskray
[Driver][X86] Add -malign-branch* and -mbranches-within-32B-boundaries
These driver options perform some checking and delegate to MC options
-x86-align-branch* and -x86-branches-within-32B-boundaries.
Reviewed By: skan
Differential Revision: https://reviews.llvm.org/D72463
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticDriverKinds.td
The file was addedclang/test/Driver/x86-malign-branch.c
The file was addedclang/test/Driver/x86-malign-branch.s
The file was modifiedclang/include/clang/Driver/Options.td
Commit c42116cc653ae1618cc49dab367d9f6addd8cfd9 by rnk
Fix up ms-pch-macro.c test to pass on non-Windows
The file was modifiedclang/test/PCH/ms-pch-macro.c
Commit a6faf851f49c7d50e92b16ff9d2e7c02790dd0f8 by Jonas Devlieghere
[lldb/CommandInterpreter] Remove flag that's always true (NFC)
The 'asynchronously' argument to both GetLLDBCommandsFromIOHandler and
GetPythonCommandsFromIOHandler is true for all call sites. This commit
simplifies the API by dropping it and giving the baton a default
argument.
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
The file was modifiedlldb/source/Interpreter/CommandInterpreter.cpp
The file was modifiedlldb/include/lldb/Interpreter/CommandInterpreter.h
The file was modifiedlldb/source/Commands/CommandObjectTarget.cpp
The file was modifiedlldb/source/Commands/CommandObjectWatchpointCommand.cpp
The file was modifiedlldb/source/Commands/CommandObjectBreakpointCommand.cpp
The file was modifiedlldb/source/Commands/CommandObjectCommands.cpp
The file was modifiedlldb/source/Commands/CommandObjectType.cpp
Commit 914b551eeed159ba6051852c0aa63a1311ac4e40 by Jonas Devlieghere
[lldb/test] Add test for CMTime data formatter
Add a test for the CMTime data formatter. The coverage report showed
that this code path was untested.
The file was addedlldb/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-objc/cmtime/Makefile
The file was addedlldb/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-objc/cmtime/TestDataFormatterCMTime.py
The file was addedlldb/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-objc/cmtime/main.m
Commit b891490ceb390b9c9ccc93abf08c2c1bec50e340 by david.green
[Scheduler] Adjust interface of CreateTargetMIHazardRecognizer to use
ScheduleDAGMI. NFC
All the callers of this function will be ScheduleDAGMI from the
MachineScheduler. This allows us to use the extra info available in
ScheduleDAGMI without resorting to awkward casts.
The file was modifiedllvm/include/llvm/CodeGen/TargetInstrInfo.h
The file was modifiedllvm/lib/CodeGen/TargetInstrInfo.cpp
Commit 188f9a348dc545bf9a420d998ad37761bddd7285 by uenoku.tokotoko
[Attributor] AAValueConstantRange: Value range analysis using constant
range
Summary: This patch introduces `AAValueConstantRange`, which answers a
possible range for integer value in a specific program point. One of the
motivations is propagating existing `range` metadata. (I think we need
to change the situation that `range` metadata cannot be put to
Argument).
The state is a tuple of `ConstantRange` and it is initialized to (known,
assumed) = ([-∞, +∞], empty).
Currently, AAValueConstantRange is created in `getAssumedConstant`
method when `AAValueSimplify` returns `nullptr`(worst state).
Supported
- BinaryOperator(add, sub, ...)
- CmpInst(icmp eq, ...)
- !range metadata
`AAValueConstantRange` is not intended to extend to polyhedral range
value analysis.
Reviewers: jdoerfert, sstefan1
Reviewed By: jdoerfert
Subscribers: phosek, davezarzycki, baziotis, hiraditya, javed.absar,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71620
The file was addedllvm/test/Transforms/Attributor/lvi-for-ashr.ll
The file was modifiedllvm/include/llvm/Transforms/IPO/Attributor.h
The file was modifiedllvm/test/Transforms/Attributor/dereferenceable-1.ll
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp
The file was addedllvm/test/Transforms/Attributor/range.ll
The file was modifiedllvm/test/Transforms/Attributor/value-simplify.ll
The file was modifiedllvm/test/Transforms/Attributor/IPConstantProp/solve-after-each-resolving-undefs-for-function.ll
The file was addedllvm/test/Transforms/Attributor/lvi-after-jumpthreading.ll
The file was modifiedllvm/test/Transforms/Attributor/IPConstantProp/return-constant.ll
Commit 1b264a8263f8656bd9c09c471af9b43422429ef6 by david.green
[ARM] Reegenerate MVE tests. NFC
The mve-phireg.ll test no longer really tests what it was added for, but
the original case was fairly complex. I've left the test in as a general
codegen test.
The file was modifiedllvm/test/CodeGen/Thumb2/mve-stacksplot.mir
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-2-blocks-1-pred.mir
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-2-blocks-non-consecutive-ins.mir
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-block-optnone.mir
The file was modifiedllvm/test/CodeGen/Thumb2/mve-phireg.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-block-fold-vcmp.mir
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-from-intrinsics.ll
Commit be8f217b180e134d568ff491b045d05c137b6234 by craig.topper
[X86] Don't call LowerUINT_TO_FP_i32 for i32->f80 on 32-bit targets with
sse2.
We were performing an emulated i32->f64 in the SSE registers, then
storing that value to memory and doing a extload into the X87 domain.
After this patch we'll now just store the i32 to memory along with an
i32 0. Then do a 64-bit FILD to f80 completely in the X87 unit. This
matches what we do without SSE.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/scalar-int-to-fp.ll
Commit 064859bde79ccd221fd5196fd2d889014c5435c4 by simon.moll
[VE] Minimal codegen for empty functions
Summary: This patch implements minimal VE code generation for empty
function bodies (no args, no value return).
Contents
* empty function code generation test.
* Minimal function prologue & epilogue emission
* Instruction formats and instruction definitions as far as required for
the empty function prologue & epilogue.
* I64 register class definitions.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D72598
The file was modifiedllvm/lib/Target/VE/CMakeLists.txt
The file was addedllvm/lib/Target/VE/VEInstrInfo.td
The file was addedllvm/lib/Target/VE/InstPrinter/VEInstPrinter.cpp
The file was addedllvm/lib/Target/VE/VERegisterInfo.td
The file was modifiedllvm/lib/Target/VE/LLVMBuild.txt
The file was addedllvm/lib/Target/VE/VEISelLowering.h
The file was modifiedllvm/lib/Target/VE/MCTargetDesc/CMakeLists.txt
The file was addedllvm/lib/Target/VE/MCTargetDesc/VETargetStreamer.h
The file was modifiedllvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.h
The file was addedllvm/lib/Target/VE/VECallingConv.td
The file was addedllvm/lib/Target/VE/VEFrameLowering.h
The file was addedllvm/lib/Target/VE/VEInstrInfo.h
The file was addedllvm/lib/Target/VE/VEAsmPrinter.cpp
The file was addedllvm/lib/Target/VE/VEMCInstLower.cpp
The file was modifiedllvm/lib/Target/VE/VE.h
The file was addedllvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
The file was addedllvm/lib/Target/VE/InstPrinter/CMakeLists.txt
The file was modifiedllvm/lib/Target/VE/MCTargetDesc/LLVMBuild.txt
The file was addedllvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.h
The file was modifiedllvm/lib/Target/VE/VETargetMachine.h
The file was addedllvm/lib/Target/VE/VEFrameLowering.cpp
The file was addedllvm/lib/Target/VE/VESubtarget.cpp
The file was addedllvm/lib/Target/VE/VEInstrInfo.cpp
The file was addedllvm/lib/Target/VE/InstPrinter/LLVMBuild.txt
The file was addedllvm/lib/Target/VE/InstPrinter/VEInstPrinter.h
The file was addedllvm/lib/Target/VE/VERegisterInfo.h
The file was modifiedllvm/lib/Target/VE/VETargetMachine.cpp
The file was addedllvm/lib/Target/VE/MCTargetDesc/VETargetStreamer.cpp
The file was addedllvm/lib/Target/VE/VEISelDAGToDAG.cpp
The file was addedllvm/lib/Target/VE/VE.td
The file was addedllvm/lib/Target/VE/VETargetTransformInfo.h
The file was addedllvm/lib/Target/VE/VEInstrFormats.td
The file was addedllvm/lib/Target/VE/VERegisterInfo.cpp
The file was modifiedllvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
The file was addedllvm/lib/Target/VE/VEISelLowering.cpp
The file was addedllvm/test/CodeGen/VE/simple_prologue_epilogue.ll
The file was addedllvm/lib/Target/VE/VESubtarget.h
Commit 0dc6c249bffac9f23a605ce4e42a84341da3ddbd by cdevadas
[AMDGPU] Invert the handling of skip insertion.
The current implementation of skip insertion (SIInsertSkip) makes it a
mandatory pass required for correctness. Initially, the idea was to have
an optional pass. This patch inserts the s_cbranch_execz upfront during
SILowerControlFlow to skip over the sections of code when no lanes are
active. Later, SIRemoveShortExecBranches removes the skips for short
branches, unless there is a sideeffect and the skip branch is really
necessary.
This new pass will replace the handling of skip insertion in the
existing SIInsertSkip Pass.
Differential revision: https://reviews.llvm.org/D68092
The file was modifiedllvm/test/CodeGen/AMDGPU/skip-if-dead.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/valu-i1.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/collapse-endcf.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/skip-branch-taildup-ret.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-condition-and.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wave32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/skip-branch-trap.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert-skips-kill-uncond.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/insert-skips-flat-vmem.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/wqm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/else.ll
The file was addedllvm/lib/Target/AMDGPU/SIRemoveShortExecBranches.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/call-skip.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert-skips-ignored-insts.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ret_jump.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/hoist-cond.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertSkips.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relaxation.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.h
The file was modifiedllvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert-skips-gws.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/uniform-cfg.ll
The file was modifiedllvm/lib/Target/AMDGPU/CMakeLists.txt
The file was modifiedllvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll
Commit fcc08aa835de1e0c1f3e7e479917575e55433b68 by ikudrin
[MachO] Add a test for detecting reserved unit length.
This is a follow-up for D71546 to add a corresponding unit test.
Differential Revision: https://reviews.llvm.org/D72695
The file was modifiedlld/unittests/MachOTests/MachONormalizedFileToAtomsTests.cpp
Commit 4b1d471fa61f2d390d4dd5f2e95862a3cb5a6ec0 by llvmgnsyncbot
[gn build] Port 0dc6c249bff
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Commit 2142e20f50954b9b5085e9b9461efc318a3348c0 by ikudrin
[DWARF] Fix DWARFDebugAranges to support 64-bit CU offsets.
DWARFContext, the only user of this class, can already handle such
offsets.
Differential Revision: https://reviews.llvm.org/D71834
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFDebugAranges.h
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugAranges.cpp
Commit 109e4d12edda07bdec139de36d9fdb6f73399f92 by zakk.chen
[RISCV] Support ABI checking with per function target-features
if users don't specific -mattr, the default target-feature come from IR
attribute.
The file was modifiedllvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
The file was modifiedllvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll
Commit a3ebc40644d7e93841d1f8c8994f1f22023960ad by djordje.todorovic
[llvm-locstats][NFC] Support OOP concept
Making these changes, the code becomes more robust and easier for adding
the new features.
  -Introduce the LocationStats class representing the statistics
-Add the pretty_print() method in the LocationStats class
-Add additional '-' for the program options
-Add the verify_program_inputs() function
-Add the parse_locstats() function
-Rename 'results' => 'opts'
-Add more comments
Differential Revision: https://reviews.llvm.org/D71868
The file was modifiedllvm/utils/llvm-locstats/llvm-locstats.py
The file was modifiedllvm/docs/CommandGuide/llvm-locstats.rst
Commit cbe681bd8339d3a018d25441a5f4ef9da2bd017d by scott.egerton
Revert "[RISCV] Add Clang frontend support for Bitmanip extension"
This reverts commit 57cf6ee9c84434161088c39a6f8dd2aae14eb12d.
The file was modifiedclang/lib/Basic/Targets/RISCV.cpp
The file was modifiedclang/lib/Driver/ToolChains/Arch/RISCV.cpp
The file was modifiedclang/lib/Basic/Targets/RISCV.h
The file was modifiedclang/test/Preprocessor/riscv-target-features.c
Commit 46d11e30ee807accefd14e0b7f306647963a39b5 by grimar
[yaml2obj/obj2yaml] - Add support for SHT_RELR sections.
The encoded sequence of Elf*_Relr entries in a SHT_RELR section looks
like [ AAAAAAAA BBBBBBB1 BBBBBBB1 ... AAAAAAAA BBBBBB1 ... ] i.e. start
with an address, followed by any number of bitmaps. The address entry
encodes 1 relocation. The subsequent bitmap entries encode up to 63(31)
relocations each, at subsequent offsets following the last address
entry.
More information is here:
https://github.com/llvm-mirror/llvm/blob/master/lib/Object/ELF.cpp#L272
This patch adds a support for these sections.
Differential revision: https://reviews.llvm.org/D71872
The file was addedllvm/test/tools/yaml2obj/ELF/relr-section.yaml
The file was addedllvm/test/tools/obj2yaml/relr-section.yaml
The file was modifiedllvm/include/llvm/ObjectYAML/ELFYAML.h
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was modifiedllvm/tools/obj2yaml/elf2yaml.cpp
Commit ada964661e2b4d86b0753c99265c812029a3d1d2 by djordje.todorovic
[llvm-locstats] Add the --draw-plot option
When using the option, draw the histogram representing the debug
location buckets. The resulting histogram will be saved in a png file.
Differential Revision: https://reviews.llvm.org/D71869
The file was modifiedllvm/utils/llvm-locstats/llvm-locstats.py
The file was modifiedllvm/docs/CommandGuide/llvm-locstats.rst
Commit 93a4dede3a5ecb110dd7cdfd7faa48e3448844d8 by cullen.rhodes
[AArch64][SVE] Add ptest intrinsics
Summary: Implements the following intrinsics:
    * @llvm.aarch64.sve.ptest.any
   * @llvm.aarch64.sve.ptest.first
   * @llvm.aarch64.sve.ptest.last
Reviewers: sdesmalen, efriedma, dancgr, mgudim, cameron.mcinally,
rengolin
Reviewed By: efriedma
Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72398
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/sve-setcc.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was addedllvm/test/CodeGen/AArch64/sve-intrinsics-pred-testing.ll
Commit 884a65af5ceebce76519749ed6eb9a86d0596771 by russell.gallop
[Support] Replace Windows __declspec(thread) with thread_local for
LLVM_THREAD_LOCAL
Windows minimum host tools version is now VS2017, which supports C++11
thread_local so use this for LLVM_THREAD_LOCAL instead of
declspec(thread). According to [1], thread_local is implemented with
declspec(thread) so this should be NFC.
[1] https://docs.microsoft.com/en-us/cpp/cpp/thread?view=vs-2017
Differential Revision: https://reviews.llvm.org/D72399
The file was modifiedllvm/include/llvm/Support/Compiler.h
Commit ca6f616532780b236556fc129cda3243d31cb01a by grimar
Revert "[yaml2obj/obj2yaml] - Add support for SHT_RELR sections."
This reverts commit 46d11e30ee807accefd14e0b7f306647963a39b5.
It broke bots. E.g.
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/60744
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was modifiedllvm/tools/obj2yaml/elf2yaml.cpp
The file was modifiedllvm/include/llvm/ObjectYAML/ELFYAML.h
The file was removedllvm/test/tools/yaml2obj/ELF/relr-section.yaml
The file was removedllvm/test/tools/obj2yaml/relr-section.yaml
Commit a90ea386981f4fa3c7cb7f62c6900069764b05a8 by scott.egerton
[Lexer] Allow UCN for dollar symbol '\u0024' in identifiers when using
-fdollars-in-identifiers flag.
Summary: Previously, the -fdollars-in-identifiers flag allows the '$'
symbol to be used in an identifier but the universal character name
equivalent '\u0024' is not allowed. This patch changes this, so that
\u0024 is valid in identifiers.
Reviewers: rsmith, jordan_rose
Reviewed By: rsmith
Subscribers: dexonsmith, simoncook, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D71758
The file was modifiedclang/lib/Lex/Lexer.cpp
The file was modifiedclang/test/Preprocessor/ucn-pp-identifier.c
Commit ce8795eb6c054328173876fe3fb126fd0b0b8aba by djordje.todorovic
[llvm-locstats] Fix the docs
Add the missing picture for the documentation.
The file was addedllvm/docs/CommandGuide/locstats-draw-plot.png
Commit 019c8d9d1511a07d2004667d2240f3e47cb991ec by arkady.shlykov
[NFC] Adjust test cases numbering, test commit.
Summary: Test case test14 is missing, adjust the numbering to have a
consecutive range. Also a test commit to verify commit access.
The file was modifiedllvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll
Commit 06cfcdcca7de9c88a1e885eff0d0c4c07090ad48 by benny.kra
[AArch64][SVE] Fold variable into assert to silence unused variable
warnings in Release builds
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit 13f22f5d5958a46db1212a083a426e339204c783 by Raphael Isemann
[lldb] Add expect_expr function for testing expression evaluation in
dotests.
Summary: This patch adds a new function to lldbtest: `expect_expr`. This
function is supposed to replace the current approach of calling
`expect`/`runCmd` with `expr`, `p` etc.
`expect_expr` allows evaluating expressions and matching their
value/summary/type/error message without having to do any string
matching that might allow unintended passes (e.g., `self.expect("expr
3+4", substrs=["7"])` can unexpectedly pass for results like `(Class7)
$0 = 7`, `(int) $7 = 22`, `(int) $0 = 77` and so on).
This only uses the function in a few places to test and demonstrate it.
I'll migrate the tests in follow up commits.
Reviewers: JDevlieghere, shafik, labath
Reviewed By: labath
Subscribers: christof, abidh, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D70314
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-stl/libcxx/string/TestDataFormatterLibcxxString.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/call-function/TestCallBuiltinFunction.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbtest.py
Commit 7570d387c21935b58afa67cb9ee17250e38721fa by grimar
[yaml2obj/obj2yaml] - Add support for SHT_RELR sections.
Note: this is a reland with a trivial 2 lines fix in
ELFState<ELFT>::writeSectionContent.
     It adds a check similar to ones we already have for other sections
to fix the case revealed
     by bots, like
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/60744.
The encoded sequence of Elf*_Relr entries in a SHT_RELR section looks
like [ AAAAAAAA BBBBBBB1 BBBBBBB1 ... AAAAAAAA BBBBBB1 ... ] i.e. start
with an address, followed by any number of bitmaps. The address entry
encodes 1 relocation. The subsequent bitmap entries encode up to 63(31)
relocations each, at subsequent offsets following the last address
entry.
More information is here:
https://github.com/llvm-mirror/llvm/blob/master/lib/Object/ELF.cpp#L272
This patch adds a support for these sections.
Differential revision: https://reviews.llvm.org/D71872
The file was modifiedllvm/include/llvm/ObjectYAML/ELFYAML.h
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp
The file was modifiedllvm/tools/obj2yaml/elf2yaml.cpp
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
Commit 7b15865225103389150153d12904041fcc57fd0e by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
Use cast<> instead of dyn_cast<> since the pointer is always
dereferenced and cast<> will perform the null assertion for us.
The file was modifiedllvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
Commit 0b64400e0b3de18c99f77380e98da8e5e1a49832 by llvm-dev
RegisterClassInfo::computePSetLimit - assert that we actually find a
register.
Fixes "pointer is null" clang static analyzer warning.
The file was modifiedllvm/lib/CodeGen/RegisterClassInfo.cpp
Commit eb82226f33525c7332f8008c048b821f08d725fa by llvm-dev
Fix Wdocumentation warning. NFC.
The file was modifiedclang/include/clang/Sema/Sema.h
Commit 3bc2860e926b7e35c381ea41dd90caeb7ae400d2 by zakk.chen
Revert "[RISCV] Support ABI checking with per function target-features"
This reverts commit 109e4d12edda07bdec139de36d9fdb6f73399f92.
The file was modifiedllvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp
The file was modifiedllvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll
Commit 7bc58a779aaa1de56fad8b1bc8e46932d2f2f1e4 by zakk.chen
[RISCV] Support ABI checking with per function target-features
if users don't specific -mattr, the default target-feature come from IR
attribute.
Reviewers: lenary, asb
Reviewed By: lenary, asb
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70837
The file was modifiedllvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
The file was modifiedllvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll
The file was modifiedllvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit e26a78e70857273c83aaacd4aa0edb36effe70e3 by llvm-dev
Revert rG6078f2fedcac5797ac39ee5ef3fd7a35ef1202d5 -
"[AArch64][GlobalISel]: Support @llvm.{return,frame}address selection."
These intrinsics expand to a variable number of instructions so just
like in ISelLowering.cpp we use custom code to deal with them.
Committing Tim's original patch.
Differential Revision: https://reviews.llvm.org/D65656
---- Breaks EXPENSIVE_CHECKS builds.
The file was removedllvm/test/CodeGen/AArch64/GlobalISel/select-frameaddr.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was removedllvm/test/CodeGen/AArch64/GlobalISel/select-returnaddr.ll
Commit 5852475e2c049ce29dcb1f0da3ac33035f8c9156 by hans
Bump the trunk major version to 11
and clear the release notes.
The file was modifiedpolly/docs/conf.py
The file was modifiedlibcxx/include/__config
The file was modifiedpstl/test/pstl/version.pass.cpp
The file was modifiedllvm/utils/release/build_llvm_package.bat
The file was modifiedpstl/docs/ReleaseNotes.rst
The file was modifiedlibcxx/include/__libcpp_version
The file was modifiedclang/docs/analyzer/conf.py
The file was modifiedlibcxx/docs/conf.py
The file was modifiedllvm/utils/lit/lit/__init__.py
The file was modifiedpolly/docs/ReleaseNotes.rst
The file was modifiedllvm/utils/gn/secondary/llvm/version.gni
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedlibcxx/CMakeLists.txt
The file was modifiedclang-tools-extra/docs/conf.py
The file was modifiedlibunwind/CMakeLists.txt
The file was modifiedllvm/docs/ReleaseNotes.rst
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst
The file was modifiedlld/docs/ReleaseNotes.rst
The file was modifiedpstl/include/pstl/internal/pstl_config.h
The file was modifiedllvm/CMakeLists.txt
The file was modifiedclang/docs/conf.py
The file was modifiedlld/docs/conf.py
The file was modifiedlibunwind/docs/conf.py
The file was modifiedlibcxx/docs/ReleaseNotes.rst