FailedChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. Remove release note about in-process-cc1 (details)
  2. [lldb][NFC] Migrate several tests to expect_expr (details)
  3. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  4. Fix unused variable warning. NFCI. (details)
  5. [clangd] Make output order of allTargetDecls deterministic (details)
  6. [ELF] Optimization to LinkerScript::computeInputSections NFC (details)
  7. Revert "[PHIEliminate] Move dbg values after phi and label" (details)
  8. Make lld cmake not compute commit revision twice (details)
  9. Removed an unused include from TypeLocVisitor.h (details)
  10. [VectorUtils] Rework the Vector Function Database (VFDatabase). (details)
  11. try to unbreak build after 4b6d9ac392613 (details)
  12. [mlir][Linalg] Fix Linalg EDSC builders (details)
  13. [ARM][MVE] Enable extending gathers (details)
  14. [lldb/DWARF/test] Freshen up debug_names tests (details)
  15. [GlobalISel] Use more MachineIRBuilder helper methods (details)
  16. [ARM][LowOverheadLoops] Update liveness info (details)
  17. [Hexagon] Remove unnecessary case in StringSwitch, NFC (details)
  18. Remove some SVN-specific code. (details)
  19. [GlobalISel] Pass MachineOperands into MachineIRBuilder helper methods (details)
  20. [GlobalISel] Don't arbitrarily limit a mask to 64 bits (details)
  21. [Hexagon] Add preprocessor test for hexagonv66 (details)
  22. AMDGPU/GlobalISel: Select DS GWS intrinsics (details)
  23. [lldb][NFC] Delete TestDataFormatterObjCNSDate.py (details)
  24. [MC][test] Fix non-portable GNU diff option (details)
  25. AMDGPU/GlobalISel: Don't handle legacy buffer intrinsic (details)
  26. [llvm-exegesis][NFC] Refactor Mips tests fixtures into a base class. (details)
  27. [llvm-exegesis][mips] Add RegisterAliasingTest unit test (details)
  28. [Hexagon] Fix alignment info for __builtin_circ_lduh (details)
  29. [gn build] Port 6b357866496 (details)
  30. [llvm] Make new pass manager's OptimizationLevel a class (details)
  31. [lldb/Scripts] Remove swig_bot_lib/__init__.py (details)
  32. [GVN] introduce GVNOptions to control GVN pass behavior (details)
  33. [LLDB] Add SymbolVendorWasm plugin for WebAssembly debugging (details)
  34. [LLDB] Convert Plugins/ObjectFile/wasm/ObjectFileWasm.h to unix line (details)
  35. remove an include that's unused after r347592 (details)
  36. [lldb/test] Revert changes to debug-names-compressed.cpp (details)
  37. [SystemZ] Avoid unnecessary conversions in vecintrin.h (details)
  38. [PowerPC][AIX] Make PIC the default relocation model for AIX (details)
  39. [gn build] include revision information in lld --version output (details)
  40. [gn build] (manually) port bed7626f04f7 (details)
  41. Revert "[Loop Peeling] Add possibility to enable peeling on loop nests." (details)
  42. [ELF] Decrease alignment of ThunkSection on 64-bit targets from 8 to 4 (details)
  43. [Hexagon] Add a target feature to disable compound instructions (details)
  44. Delete control character from comment. (NFC) (details)
  45. AMDGPU: Update tests to use modern buffer intrinsics (details)
  46. TableGen: Remove dead code (details)
  47. TableGen/GlobalISel: Fix srcvalue inputs (details)
  48. GlobalISel: Preserve load/store metadata in IRTranslator (details)
  49. GlobalISel: Apply target MMO flags to atomics (details)
  50. AMDGPU: Remove IR section from MIR test (details)
  51. [clangd] Make define outline code action visible (details)
  52. [clangd] Print underlying type for decltypes in hover (details)
  53. [LegalizeDAG][Mips] Add an assert to protect a uint_to_fp implementation (details)
  54. [Hexagon] Update autogeneated intrinsic information in LLVM (details)
  55. GlobalISel: Move extension scalar narrowing to separate function (details)
  56. GlobalISel: Don't ignore requested ext narrowing type (details)
  57. AMDGPU/GlobalISel: Improve lowering of G_SEXT_INREG (details)
  58. AMDGPU: Update more tests to use modern buffer intrinsics (details)
  59. Don't run powerpc lit test case on other platforms. (details)
  60. AMDGPU: Remove outdated comment (details)
  61. [lldb/test] Exted test for CMTime data formatter (details)
  62. [libc++] Fix Windows DLL build for string. (details)
  63. [OpenMP][Tool] Fix memory leak and double-allocation (details)
  64. Address redirect issue on Windows. (details)
  65. [ELF] -r: don't create .interp (details)
  66. [Hexagon] Update autogenerated intrinsic info in clang (details)
  67. Resubmit: [JumpThreading] Thread jumps through two basic blocks (details)
  68. [GVN] add GVN parameters parsing to new pass manager (details)
  69. [Hexagon] Add ELF flags for Hexagon v66 to ELFYAML.cpp (details)
  70. [clangd] Add workaround for GCC5 host compilers. NFC. (details)
  71. [NFC] Remove unnecessary link components. (details)
  72. scudo: Add initial memory tagging support. (details)
  73. Factor out renaming logic from readability-identifier-naming (details)
  74. [gn build] Port d5c6b8407c1 (details)
  75. [OPENMP]Avoid string concat where possible and use standard name (details)
  76. [IR] fix crash in Constant::isElementWiseEqual() with FP types (details)
  77. [WebAssembly] Track frame registers through VReg and local allocation (details)
  78. Add BuiltinsHexagonDep.def to clang module map (details)
  79. [llvm-nm] Use `StringRef` over `const std::string &` params (details)
  80. AMDGPU: Move permlane discard vdst_in optimization (details)
  81. AMDGPU: Do permlane16 vdst_in discard optimization in InstCombine (details)
  82. Revert "[WebAssembly] Track frame registers through VReg and local (details)
  83. lldb: xfail TestCrossDSOTailCalls.py and TestCrossObjectTailCalls.py on (details)
  84. [libcxx] Temporarily switch back to pthread backend for Fuchsia (details)
  85. [lld][WebAssembly] Use a more meaningful name for stub functions (details)
  86. [mlir] NFC: Fix trivial typos (details)
  87. [mlir] support translation of multidimensional vectors to LLVM IR (details)
  88. [clangd][test] Disable a particular testcase in (details)
  89. AMDGPU: Update clang test (details)
  90. [OPENMP]Do not emit RTTI descriptor for NVPTX devices. (details)
  91. [AArch64][GlobalISel] Change G_FCONSTANTs feeding into stores into (details)
Commit 00c74d0b644b9ad31b377d0a07012c090af834e2 by hans
Remove release note about in-process-cc1
This feature landed before the 10.x branch, so it will be covered in the
clang 10 release notes instead.
The file was modifiedclang/docs/ReleaseNotes.rst
Commit 39d6b6c21f744e9c2503aa267a2561032de1326c by Raphael Isemann
[lldb][NFC] Migrate several tests to expect_expr
expect_expr is the stricter and safer way of testing these expressions.
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/inline-namespace/TestInlineNamespace.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/test/TestExprs.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/anonymous-struct/TestCallUserAnonTypedef.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/static-initializers/TestStaticInitializers.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lang/cpp/bool/TestCPPBool.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lang/cpp/chained-calls/TestCppChainedCalls.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lang/cpp/char8_t/TestCxxChar8_t.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/radar_8638051/Test8638051.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/basic/TestImportStdModule.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lang/cpp/limit-debug-info/TestWithLimitDebugInfo.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/entry-bp/TestExprEntryBP.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lang/cpp/char1632_t/TestChar1632T.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/call-function/TestCallBuiltinFunction.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/class_template_specialization_empty_pack/TestClassTemplateSpecializationParametersHandling.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/namespace_local_var_same_name_cpp_and_c/TestNamespaceLocalVarSameNameCppAndC.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lang/cpp/auto/TestCPPAuto.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/call-function/TestCallUserDefinedFunction.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/deque-basic/TestBasicDeque.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lang/cpp/call-function/TestCallCPPFunction.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/call-overridden-method/TestCallOverriddenMethod.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/import-std-module/conflicts/TestStdModuleWithConflicts.py
Commit 19c5057e8df62e75b26e881dfc8f8f32686fe75c by llvm-dev
Fix "pointer is null" static analyzer warnings. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately in all cases and castAs will perform the null assertion for
us.
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
Commit 23a887b0dd48639716b78a1c9ca665df49f64b2e by llvm-dev
Fix unused variable warning. NFCI.
The file was modifiedllvm/lib/Transforms/Utils/AMDGPUEmitPrintf.cpp
Commit d54d71b67e602674a255e299a22fe31dee1f3619 by kadircet
[clangd] Make output order of allTargetDecls deterministic
Summary: Makes use of insertion order to stabilize output for multiple
decls.
Fixes https://bugs.llvm.org/show_bug.cgi?id=44564
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, mgrang, arphaman,
usaxena95, cfe-commits, aemerson
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72826
The file was modifiedclang-tools-extra/clangd/FindTarget.cpp
Commit d36b2649e5e4d90a3f439e2a16057cd75566c669 by andrew.ng
[ELF] Optimization to LinkerScript::computeInputSections NFC
Moved the section name check ahead of any filename matching or
exclusion. Firstly, this reduces the need to retrieve the filename and
secondly, reduces the amount of potentially expensive filename pattern
matching if such rules are present in the linker script.
The impact of this change is particularly significant when linking
objects built with -ffunction-sections and -fstack-size-section, using a
linker script that includes non-trivial filename patterns. In a number
of such cases, the link time is halved.
Differential Revision: https://reviews.llvm.org/D72775
The file was modifiedlld/ELF/LinkerScript.cpp
Commit c969335abdb22284691e7cb2894820350cfe422b by jeremy.morse
Revert "[PHIEliminate] Move dbg values after phi and label"
Testing compiler-rt, a new assertion failure occurs when building the
GwpAsanTestObjects object. I'm uploading a reproducer to D70597.
This reverts commit 75188b01e9af3a89639d84be912f84610d6885ba.
The file was removedllvm/test/CodeGen/X86/dbg-changes-codegen-phi-elimination.ll
The file was modifiedllvm/lib/CodeGen/PHIElimination.cpp
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
Commit 4b6d9ac392613e33c61ff3f91ade6c477d8396fa by thakis
Make lld cmake not compute commit revision twice
r354605 moved LLD to the unified revision handling introduced in
rL353268 / r352729 and removed uses of LLD_REPOSITORY_STRING and
LLD_REVISION_STRING.
After this change, we no longer compute the (now-unused) values of these
two variables.
Since this removes the only use of llvm/utils/GetRepositoryPath, remove
that too (it's redundant with the system added in r354605).
While here, also remove LLD_VERSION_MAJOR and LLD_VERSION_MINOR. Their
uses were removed in r285163.
Also remove LLD_VERSION from Version.inc which as far as I can tell has
been unused since the file was added in r219277.
No behavior change.
Differential Revision: https://reviews.llvm.org/D72803
The file was modifiedllvm/utils/gn/secondary/lld/include/lld/Common/BUILD.gn
The file was modifiedlld/CMakeLists.txt
The file was removedllvm/utils/GetRepositoryPath
The file was modifiedlld/include/lld/Common/Version.inc.in
Commit cbaa32650a0b5b17b42fc123de068de69b290bf5 by gribozavr
Removed an unused include from TypeLocVisitor.h
The file was modifiedclang-tools-extra/clangd/FindTarget.cpp
The file was modifiedclang/include/clang/AST/TypeLocVisitor.h
Commit 66c120f02560ef528a60924104ead66f330190f1 by francesco.petrogalli
[VectorUtils] Rework the Vector Function Database (VFDatabase).
Summary: This commits is a rework of the patch in
https://reviews.llvm.org/D67572.
The rework was requested to prevent out-of-tree performance regression
when vectorizing out-of-tree IR intrinsics. The vectorization of such
intrinsics is enquired via the static function `isTLIScalarize`. For
detail see the discussion in https://reviews.llvm.org/D67572.
Reviewers: uabelho, fhahn, sdesmalen
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72734
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll
The file was modifiedllvm/test/Other/opt-O3-pipeline.ll
The file was modifiedllvm/lib/Analysis/LazyCallGraph.cpp
The file was modifiedllvm/test/Other/opt-Os-pipeline.ll
The file was modifiedllvm/lib/Analysis/VectorUtils.cpp
The file was modifiedllvm/unittests/Analysis/VectorFunctionABITest.cpp
The file was modifiedllvm/lib/Analysis/LoopAccessAnalysis.cpp
The file was modifiedllvm/test/Other/opt-O2-pipeline.ll
The file was modifiedllvm/include/llvm/Analysis/VectorUtils.h
The file was modifiedllvm/include/llvm/Analysis/TargetLibraryInfo.h
The file was modifiedllvm/lib/Transforms/Utils/ModuleUtils.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
The file was modifiedllvm/lib/Transforms/Utils/InjectTLIMappings.cpp
Commit 4f5c65a5c80438d638ef4f863cf3f98e19a6de97 by thakis
try to unbreak build after 4b6d9ac392613
The file was modifiedlld/CMakeLists.txt
Commit 2b81d3c6c6fd7b3fcffba626c5df3a9a66a3deb1 by ntv
[mlir][Linalg] Fix Linalg EDSC builders
Summary: This diff fixes the fact that the method
`mlir::edsc::makeGenericLinalgOp` incorrectly adds 2 blocks to Linalg
ops.
Tests are updated accordingly.
Reviewers: ftynse, hanchung, herhut, pifon2a, asaadaldien
Reviewed By: asaadaldien
Subscribers: merge_guards_bot, mehdi_amini, rriddle, jpienaar, burmako,
shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72780
The file was modifiedmlir/include/mlir/EDSC/Builders.h
The file was modifiedmlir/test/EDSC/builder-api-test.cpp
The file was modifiedmlir/lib/Dialect/Linalg/EDSC/Builders.cpp
The file was modifiedmlir/lib/EDSC/Builders.cpp
Commit c24cf97960827fa4993c399dc3f0be5a5376d9e7 by anna.welker
[ARM][MVE] Enable extending gathers
Enables the masked gather pass to create extending masked gathers.
Differential Revision: https://reviews.llvm.org/D72451
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ind16-unscaled.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ind32-scaled.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll
The file was modifiedllvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ind32-unscaled.ll
Commit 15a6df52efaa74308bfdcd03718a84ac893b40d8 by pavel
[lldb/DWARF/test] Freshen up debug_names tests
These tests used "clang -mllvm -accel-tables=Dwarf" as a way to
guarantee that clang will emit the debug_names table. Unfortunately, a
change it clang made that insufficient (-gpubnames is required now too),
which rendered these tests ineffective. Since lldb automatically falls
back to the manual index, the tests didn't fail and this change went
largely unnoticed.
This patch updates the tests to really use debug_names (-gdwarf-5
-gpubnames) is the combination that works now, and it adds additional
checks to ensure the section is actually emitted.
Fortunately, no regressions crept in while these tests were disabled.
The file was modifiedlldb/packages/Python/lldbsuite/test/lang/c/forward/TestForwardDeclaration.py
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/find-function-regex.cpp
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/find-basic-function.cpp
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/find-variable-file.cpp
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/find-basic-variable.cpp
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/debug-names-compressed.cpp
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/dwarf5-index-is-used.cpp
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/find-variable-dwo.cpp
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/dwarf5-partial-index.cpp
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/find-basic-namespace.cpp
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/find-method.cpp
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/find-basic-type.cpp
Commit 28bb43bdf808c7e737eabfb6f6a368ace9086a9f by jay.foad
[GlobalISel] Use more MachineIRBuilder helper methods
Reviewers: arsenm, nhaehnle
Subscribers: wdng, rovka, hiraditya, volkan, Petar.Avramovic,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72833
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
Commit 760b1751097ff7fdd3e852b016e175bea4da7480 by sam.parker
[ARM][LowOverheadLoops] Update liveness info
Recommitting e93e0d413f3a after reverting due to test failures, which
will hopefully now be fixed. Original commit message:
After expanding the pseudo instructions, update the liveness info. We do
this in a post-order traversal of the loop, including its exit blocks
and preheader(s).
Differential Revision: https://reviews.llvm.org/D72131
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/while.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/revert-while.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/end-positive-offset.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpsel-2.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/move-def-before-start.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/safe-def-no-mov.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/add_reduce.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-lr-terminator.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpnot-1.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update3.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-after-dls.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/size-limit.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-guards.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/move-start-after-def.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-mov.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vmldava_in_vpt.mir
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpnot-2.mir
The file was modifiedllvm/lib/CodeGen/LivePhysRegs.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vmaxmin_vpred_r.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/disjoint-vcmp.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update2.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-cpsr-loop-use.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpsel-1.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpnot-3.mir
Commit 237fd94312526c7aef55f929b51696bba451dab8 by kparzysz
[Hexagon] Remove unnecessary case in StringSwitch, NFC
The file was modifiedclang/lib/Driver/ToolChains/Hexagon.cpp
Commit fb9413cb84cc422426c81f6464083795e781566b by thakis
Remove some SVN-specific code.
$URL$ is an SVN keyword substitution enabled via
`svn propset svn:keywords "URL" tools/clang/lib/Basic/Version.cpp`. Now
that we no longer use SVN, it's no longer being replaced by anything,
and we no longer offer svn exports. So remove the
$URL$-specific logic.
The "cfe" path prefix removal also no longer makes sense now that we're
on git: Both CLANG_REPOSITORY and LLVM_REPOSITORY are usually set to
https://github.com/llvm/llvm-project.git
So remove that too, and remove the "llvm" prefix removal for symmetry.
With the github url, "llvm" _is_ found in the string, but not in the
place the function expected. Nobody noticed since the llvm repository
path is only used if CLANG_REVISION and LLVM_REVISION are different,
which in the git monorepo world they never should be.
(I might remove the "// Support LLVM in a separate repository" block in
a separate commit.)
Differential Revision: https://reviews.llvm.org/D72848
The file was modifiedclang/lib/Basic/Version.cpp
Commit 63f73545dd897f30846edfac5dc014f62efec6b5 by jay.foad
[GlobalISel] Pass MachineOperands into MachineIRBuilder helper methods
Reviewers: arsenm, aditya_nandakumar, aemerson
Subscribers: wdng, rovka, hiraditya, volkan, Petar.Avramovic,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72849
The file was modifiedllvm/lib/Target/ARM/ARMLegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
Commit 885260d5d80549a3a4a686093dc38cde0ea0b3c2 by jay.foad
[GlobalISel] Don't arbitrarily limit a mask to 64 bits
Reviewers: arsenm
Subscribers: wdng, rovka, hiraditya, volkan, Petar.Avramovic,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72853
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Commit 7f5f6ff5476b6dafb5be2f9c102d9b324a313717 by kparzysz
[Hexagon] Add preprocessor test for hexagonv66
The file was modifiedclang/test/Preprocessor/hexagon-predefines.c
Commit 9b2f3532c7ffa664a004714731752733d914e2d4 by arsenm2
AMDGPU/GlobalISel: Select DS GWS intrinsics
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.release.all.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.v.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.barrier.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.br.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.init.ll
Commit 81eaa3ddd060ab8486ed3fa349d23dbe8f00d8c5 by Raphael Isemann
[lldb][NFC] Delete TestDataFormatterObjCNSDate.py
This test is just TestDataFormatterObjCNSData.py copied but without any
changes
(and it therefore doesn't even test NSDate).
It's also failing as NSData has been changed by me in
4f244bba4f66b14382c446b62e122fa684b8db78.
The file was removedlldb/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-objc/TestDataFormatterObjCNSDate.py
Commit 1794158f90f904ad2d07c1fcae5c3114a4f23d68 by hubert.reinterpretcast
[MC][test] Fix non-portable GNU diff option
Summary: This patch replaces the non-portable GNU diff option
`--strip-trailing-cr` with the POSIX `-b` option in two test files.
Reviewers: daltenty, jasonliu
Reviewed By: daltenty
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72745
The file was modifiedllvm/test/MC/AsmParser/preserve-comments.s
The file was modifiedllvm/test/MC/ARM/preserve-comments-arm.s
Commit 4ca1ad85b7c8b12a3b4ab1e0a394bf8b8d63d9e3 by arsenm2
AMDGPU/GlobalISel: Don't handle legacy buffer intrinsic
The file was removedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-buffer-load.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
Commit 31458a9feecb636e64a360d87081f836f2920ccb by Milos.Stojanovic
[llvm-exegesis][NFC] Refactor Mips tests fixtures into a base class.
Differential Revision: https://reviews.llvm.org/D72003
The file was modifiedllvm/unittests/tools/llvm-exegesis/Mips/BenchmarkResultTest.cpp
The file was modifiedllvm/unittests/tools/llvm-exegesis/Mips/SnippetGeneratorTest.cpp
The file was modifiedllvm/unittests/tools/llvm-exegesis/Mips/TargetTest.cpp
The file was addedllvm/unittests/tools/llvm-exegesis/Mips/TestBase.h
Commit 6b3578664961d474cc06c44e1723913ddeb499cd by Milos.Stojanovic
[llvm-exegesis][mips] Add RegisterAliasingTest unit test
Differential Revision: https://reviews.llvm.org/D72004
The file was modifiedllvm/unittests/tools/llvm-exegesis/Mips/CMakeLists.txt
The file was addedllvm/unittests/tools/llvm-exegesis/Mips/RegisterAliasingTest.cpp
Commit bc413da0865d6c0dba1c39f185298806c60890e3 by kparzysz
[Hexagon] Fix alignment info for __builtin_circ_lduh
The file was modifiedclang/lib/Sema/SemaChecking.cpp
Commit c29a9f64b78e98ff4f23e7a48df7cb7a100a9676 by llvmgnsyncbot
[gn build] Port 6b357866496
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/tools/llvm-exegesis/Mips/BUILD.gn
Commit 7acfda633f1378344efde22bfed242dd56c26cdd by mtrofin
[llvm] Make new pass manager's OptimizationLevel a class
Summary: The old pass manager separated speed optimization and size
optimization levels into two unsigned values. Coallescing both in an
enum in the new pass manager may lead to unintentional casts and
comparisons.
In particular, taking a look at how the loop unroll passes were
constructed previously, the Os/Oz are now (==new pass manager) treated
just like O3, likely unintentionally.
This change disallows raw comparisons between optimization levels, to
avoid such unintended effects. As an effect, the O{s|z} behavior changes
for loop unrolling and loop unroll and jam, matching O2 rather than O3.
The change also parameterizes the threshold values used for loop
unrolling, primarily to aid testing.
Reviewers: tejohnson, davidxl
Reviewed By: tejohnson
Subscribers: zzheng, ychen, mehdi_amini, hiraditya, steven_wu,
dexonsmith, dang, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D72547
The file was addedllvm/test/Transforms/LoopUnrollAndJam/opt-levels.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
The file was modifiedllvm/lib/LTO/LTOBackend.cpp
The file was addedllvm/test/Transforms/LoopUnroll/opt-levels.ll
The file was modifiedllvm/include/llvm/Passes/PassBuilder.h
Commit 26646761e2bf41eebcf58e09a6f9bb85b94ec3f6 by Jonas Devlieghere
[lldb/Scripts] Remove swig_bot_lib/__init__.py
The file was removedlldb/scripts/swig_bot_lib/__init__.py
Commit 3478551bf3d24ab20a52f1eddb5b4c9bd5c8bf77 by fedor.sergeev
[GVN] introduce GVNOptions to control GVN pass behavior
There are a few global (cl::opt) controls that enable optional behavior
in GVN. Introduce GVNOptions that provide corresponding per-pass
instance controls.
That will allow to use GVN multiple times in pipeline each time with
different settings.
Reviewers: asbirlea, rnk, reames, skatkov, fhahn Reviewed By: fhahn
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72732
The file was modifiedllvm/include/llvm/Transforms/Scalar/GVN.h
The file was modifiedllvm/lib/Transforms/Scalar/GVN.cpp
Commit 9b3254dbf9f6624c772db7cfa7a3c29a0b94be8e by dschuff
[LLDB] Add SymbolVendorWasm plugin for WebAssembly debugging
Add plugin class SymbolVendorWasm, with the logic to manage debug
symbols for Wasm modules.
Reviewers: clayborg, labath, aprantl, sbc100, teemperor
Reviewed By: labath
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72650
The file was modifiedlldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.h
The file was modifiedlldb/tools/lldb-test/SystemInitializerTest.cpp
The file was modifiedlldb/source/Plugins/SymbolVendor/CMakeLists.txt
The file was addedlldb/source/Plugins/SymbolVendor/wasm/CMakeLists.txt
The file was addedlldb/source/Plugins/SymbolVendor/wasm/SymbolVendorWasm.h
The file was modifiedlldb/source/API/SystemInitializerFull.cpp
The file was addedlldb/source/Plugins/SymbolVendor/wasm/SymbolVendorWasm.cpp
The file was modifiedlldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
The file was addedlldb/test/Shell/ObjectFile/wasm/unified-debug-sections.yaml
Commit d34e4152e3e057b311d7d6c0c93dc30fa76aa94f by dschuff
[LLDB] Convert Plugins/ObjectFile/wasm/ObjectFileWasm.h to unix line
endings
The file was modifiedlldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.h
Commit 81c67da0f20a101b5ee3a9c1ce8c74a6a0a1925c by thakis
remove an include that's unused after r347592
The file was modifiedllvm/lib/LTO/ThinLTOCodeGenerator.cpp
Commit ee05138515abee2a349ad2fdc8320ab17ddfde12 by pavel
[lldb/test] Revert changes to debug-names-compressed.cpp
With the changes in 15a6df52efa, the test is failing in some
configurations. Reverting while I investigate
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/debug-names-compressed.cpp
Commit cebba7ce3952c8f37a923fa3a10360fd4c463775 by ulrich.weigand
[SystemZ] Avoid unnecessary conversions in vecintrin.h
Use floating-point instead of integer zero constants to avoid creating
implicit conversions, which currently cause suboptimal code to be
generated with -ffp-exception-behavior=strict.
NFC otherwise.
The file was modifiedclang/lib/Headers/vecintrin.h
Commit bed7626f04f7442bed3674126ba6b658b4dfa505 by wanyu9511
[PowerPC][AIX] Make PIC the default relocation model for AIX
Summary: The `llc` tool currently defaults to Static relocation model
and generates non-relocatable code for 32-bit Power. This is not
desirable on AIX where we always generate Position Independent Code
(PIC). This patch makes PIC the default relocation model for AIX.
Reviewers: daltenty, hubert.reinterpretcast, DiggerLin, Xiangling_L,
sfertile
Reviewed By: hubert.reinterpretcast
Subscribers: mgorny, wuzish, nemanjai, hiraditya, kbarton, jsji,
shchenz, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72479
The file was addedllvm/unittests/Target/PowerPC/CMakeLists.txt
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetMachine.cpp
The file was modifiedllvm/tools/llc/llc.cpp
The file was addedllvm/test/tools/llc/aix-pic-setting.ll
The file was addedllvm/unittests/Target/PowerPC/AIXRelocModelTest.cpp
Commit 5caa1212957456c3bfb4adf3cd3b7308cecc8650 by thakis
[gn build] include revision information in lld --version output
The file was modifiedllvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
The file was modifiedllvm/utils/gn/build/write_vcsrevision.gni
The file was modifiedllvm/utils/gn/secondary/lld/Common/BUILD.gn
Commit d51a15d86a2501343fc169a4e02ec03a5e6e92be by thakis
[gn build] (manually) port bed7626f04f7
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/BUILD.gn
The file was addedllvm/utils/gn/secondary/llvm/unittests/Target/PowerPC/BUILD.gn
Commit c87982b46701155926ca2c2bf07cbda3d3bade7b by arkady.shlykov
Revert "[Loop Peeling] Add possibility to enable peeling on loop nests."
This reverts commit 3f3017e because there's a failure on
peel-loop-nests.ll with LLVM_ENABLE_EXPENSIVE_CHECKS on.
Differential Revision: https://reviews.llvm.org/D70304
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was removedllvm/test/Transforms/LoopUnroll/peel-loop-nests.ll
The file was modifiedllvm/lib/Transforms/Utils/LoopUnrollPeel.cpp
The file was modifiedllvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
Commit 870094decfc9fe80c8e0a6405421b7d09b97b02b by maskray
[ELF] Decrease alignment of ThunkSection on 64-bit targets from 8 to 4
ThunkSection contains 4-byte instructions on all targets that use
thunks. Thunks should not be used in any performance sensitive places,
and locality/cache line/instruction fetching arguments should not apply.
We use 16 bytes as preferred function alignments for modern PowerPC
cores. In any case, 8 is not optimal.
Differential Revision: https://reviews.llvm.org/D72819
The file was modifiedlld/test/ELF/ppc64-tls-gd.s
The file was modifiedlld/ELF/SyntheticSections.cpp
The file was modifiedlld/test/ELF/ppc64-ifunc.s
The file was modifiedlld/test/ELF/aarch64-jump26-thunk.s
The file was modifiedlld/test/ELF/aarch64-cortex-a53-843419-thunk.s
The file was modifiedlld/test/ELF/aarch64-thunk-pi.s
The file was modifiedlld/test/ELF/ppc64-toc-restore.s
The file was modifiedlld/test/ELF/aarch64-call26-thunk.s
The file was modifiedlld/test/ELF/ppc64-long-branch.s
The file was modifiedlld/test/ELF/ppc64-dtprel.s
The file was modifiedlld/test/ELF/aarch64-thunk-script.s
Commit 8ee2d1689664d4d116c693ff427159396474c30d by kparzysz
[Hexagon] Add a target feature to disable compound instructions
This affects the following instructions: Tag: M4_mpyrr_addr     Syntax:
Ry32 = add(Ru32,mpyi(Ry32,Rs32)) Tag: M4_mpyri_addr_u2  Syntax: Rd32 =
add(Ru32,mpyi(#u6:2,Rs32)) Tag: M4_mpyri_addr     Syntax: Rd32 =
add(Ru32,mpyi(Rs32,#u6)) Tag: M4_mpyri_addi     Syntax: Rd32 =
add(#u6,mpyi(Rs32,#U6)) Tag: M4_mpyrr_addi     Syntax: Rd32 =
add(#u6,mpyi(Rs32,Rt32)) Tag: S4_addaddi        Syntax: Rd32 =
add(Rs32,add(Ru32,#s6)) Tag: S4_subaddi        Syntax: Rd32 =
add(Rs32,sub(#s6,Ru32)) Tag: S4_or_andix       Syntax: Rx32 =
or(Ru32,and(Rx32,#s10)) Tag: S4_andi_asl_ri    Syntax: Rx32 =
and(#u8,asl(Rx32,#U5)) Tag: S4_ori_asl_ri     Syntax: Rx32 =
or(#u8,asl(Rx32,#U5)) Tag: S4_addi_asl_ri    Syntax: Rx32 =
add(#u8,asl(Rx32,#U5)) Tag: S4_subi_asl_ri    Syntax: Rx32 =
sub(#u8,asl(Rx32,#U5)) Tag: S4_andi_lsr_ri    Syntax: Rx32 =
and(#u8,lsr(Rx32,#U5)) Tag: S4_ori_lsr_ri     Syntax: Rx32 =
or(#u8,lsr(Rx32,#U5)) Tag: S4_addi_lsr_ri    Syntax: Rx32 =
add(#u8,lsr(Rx32,#U5)) Tag: S4_subi_lsr_ri    Syntax: Rx32 =
sub(#u8,lsr(Rx32,#U5))
The file was modifiedllvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td
The file was modifiedllvm/lib/Target/Hexagon/HexagonSubtarget.h
The file was modifiedllvm/lib/Target/Hexagon/Hexagon.td
The file was addedllvm/test/CodeGen/Hexagon/feature-compound.ll
The file was modifiedllvm/lib/Target/Hexagon/HexagonPatterns.td
The file was modifiedllvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
Commit c0d909a1b12fd646f7dbca3cd098ff7e278d7446 by Adrian Prantl
Delete control character from comment. (NFC)
The file was modifiedlldb/source/Expression/DWARFExpression.cpp
Commit 20ca49b646b73619b05d1a6908c5ab3416f53f97 by arsenm2
AMDGPU: Update tests to use modern buffer intrinsics
The file was modifiedllvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wait.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/uniform-branch-intrinsic-cond.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.softwqm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wqm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/amdpal.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wave32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/else.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/loop_exit_with_xor.ll
Commit 86d14ed766eb10b2c0c61126343bb305676d85de by arsenm2
TableGen: Remove dead code
The file was modifiedllvm/include/llvm/Target/TargetSelectionDAG.td
Commit 03a592f18ba57d52a65e70ad5e1dd709cdcfb71d by arsenm2
TableGen/GlobalISel: Fix srcvalue inputs
Allow using srcvalue for discarding pattern inputs.
The file was addedllvm/test/TableGen/GlobalISelEmitter-input-discard.td
The file was modifiedllvm/utils/TableGen/GlobalISelEmitter.cpp
Commit 0d0fce42b0ea7c7ce18cd0191f95204a0b800b15 by arsenm2
GlobalISel: Preserve load/store metadata in IRTranslator
This was dropping the invariant metadata on dead argument loads, so they
weren't deleted.
Atomics still need to be fixed the same way. Also, apparently store was
never preserving dereferencable which should also be fixed.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stackprotect-check.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/constant-dbg-loc.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.cpp
The file was modifiedllvm/lib/Target/XCore/XCoreISelLowering.h
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/irtranslator-load-metadata.ll
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/localizer-arm64-tti.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/irtranslator/var_arg.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/XCore/XCoreISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/irtranslator-store-metadata.ll
Commit d0943537e10e25281164bb27df843e283dc6666c by arsenm2
GlobalISel: Apply target MMO flags to atomics
Unify MMO flag handling with SelectionDAG like with loads and stores.
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/irtranslator-atomic-metadata.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
Commit de4f88df97cbc99b0a7855b177d62f62f4ddd533 by arsenm2
AMDGPU: Remove IR section from MIR test
Also generate check lines so this isn't just testing the meaningless
block name.
The file was modifiedllvm/test/CodeGen/AMDGPU/couldnt-join-subrange-3.mir
Commit a881fcafaa5af545b049c5fd69ccaf9c93196640 by kadircet
[clangd] Make define outline code action visible
Summary: This got forgotten during the process.
Reviewers: sammccall, usaxena95
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72840
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/DefineOutline.cpp
Commit 0474fe465d8feebcfd54a16d93ad8518b5625972 by kadircet
[clangd] Print underlying type for decltypes in hover
Summary: Fixes https://github.com/clangd/clangd/issues/249
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72498
The file was modifiedclang-tools-extra/clangd/Hover.cpp
The file was modifiedclang-tools-extra/clangd/unittests/HoverTests.cpp
Commit 61a89e17df4c3baf9cdf317d8ae3a73788f2aa92 by craig.topper
[LegalizeDAG][Mips] Add an assert to protect a uint_to_fp implementation
from double rounding. Add a i32->f32 uint_to_fp implementation that
avoids this code.
The algorithm here only works if the sint_to_fp doesn't do any rounding.
Otherwise it can round before the offset fixup is applied. Add an assert
to protect this.
To avoid breaking the one test in tree that tested this code with a set
of types that fail the assert, I've enabled i32->f32 to use the i64->f32
algorithm. This only occurs when f64 isn't a legal type. If f64 is legal
then we do i32->f64->f32 instead.
Differential Revision: https://reviews.llvm.org/D72794
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
The file was modifiedllvm/test/CodeGen/Mips/uitofp.ll
Commit 5f65065437cdbb680a6552d12d43090dc8d632b9 by kparzysz
[Hexagon] Update autogeneated intrinsic information in LLVM
The file was addedllvm/include/llvm/IR/IntrinsicsHexagonDep.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsHexagon.td
The file was modifiedllvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td
Commit be31a7b7eec8ed7c033f3087dd88e8fd685c3ded by arsenm2
GlobalISel: Move extension scalar narrowing to separate function
Also rename a few things. Handling a different requested type will
require this to become much more complex.
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Commit a66d2817ca9e1dd72674627b18aec80d077910f0 by arsenm2
GlobalISel: Don't ignore requested ext narrowing type
This was assuming the narrow target was the source type. Respect the
requested type when these don't match by using intermediate merges. This
avoids producing very wide, illegal shift expansions.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-sext-zext-128.mir
Commit e12b840abfcde8ec02062fa7600348ad4623d049 by arsenm2
AMDGPU/GlobalISel: Improve lowering of G_SEXT_INREG
Clamping the scalar is much better than lowering with superwide shifts
for types > s64.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
Commit 8945b23af590286d3a48e72d59348eb218bb7fbd by arsenm2
AMDGPU: Update more tests to use modern buffer intrinsics
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
The file was modifiedllvm/test/Transforms/StructurizeCFG/rebuild-ssa-infinite-loop.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
Commit ff1e3cad71e69a35b05610691552950232ab1dbe by wanyu9511
Don't run powerpc lit test case on other platforms.
Only run this test on powerpc tragets, because other platforms might not
have powerpc registered.
The file was modifiedllvm/test/tools/llc/aix-pic-setting.ll
Commit f5d98543b89ea5095f6bd185b2a32b75e1a0f09a by arsenm2
AMDGPU: Remove outdated comment
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp
Commit 5f8e4121882b61d289237bb27636c76a030a9627 by Jonas Devlieghere
[lldb/test] Exted test for CMTime data formatter
Cover more cases handled by the formatter.
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-objc/cmtime/TestDataFormatterCMTime.py
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-objc/cmtime/main.m
Commit 59919c4d6b6370da7133bbca0d31844e21646bb1 by eric
[libc++] Fix Windows DLL build for string.
We need to mark string::npos with _LIBCPP_FUNC_VIS on the first in-class
declaration, otherwise it might get ignored
The file was modifiedlibcxx/include/string
Commit 39f746d8def66ef8f5c4d3f1eb4c4cee4baac988 by protze
[OpenMP][Tool] Fix memory leak and double-allocation
Fix the memory leak pointed out in https://reviews.llvm.org/D70412. And
a second one due to double-allocation.
Reviewed by: Hahnfeld
Differential revision: https://reviews.llvm.org/D72779
The file was modifiedopenmp/tools/archer/ompt-tsan.cpp
Commit d0b02aecacc626d245a0e1ef5fe6276d6d3f9ed4 by wanyu9511
Address redirect issue on Windows.
The file was modifiedllvm/test/tools/llc/aix-pic-setting.ll
Commit 2d7a8cf90478cd845ffb39763b0e95b7715322d2 by maskray
[ELF] -r: don't create .interp
`{clang,gcc} -nostdlib -r a.c` passes --dynamic-linker to the linker,
and the expected behavior is to ignore it.
If .interp is kept in the relocatable object file, a final link will get
PT_INTERP even if --dynamic-linker is not specified. glibc ld.so expects
to see PT_DYNAMIC and the executable will likely fail to run.
Ignore --dynamic-linker in -r mode as well as -shared.
The file was modifiedlld/ELF/Writer.cpp
The file was modifiedlld/test/ELF/dynamic-linker.s
Commit 6f3effbbf054e75039030d389752608efd5a0221 by kparzysz
[Hexagon] Update autogenerated intrinsic info in clang
In addition to that, use target features to validate intrinsic
availability on a given target.
The file was modifiedclang/include/clang/Basic/BuiltinsHexagon.def
The file was modifiedclang/test/CodeGen/hexagon-brev-store-elm.c
The file was modifiedclang/lib/Basic/Targets/Hexagon.cpp
The file was modifiedclang/test/Sema/builtins-hvx-none.c
The file was modifiedclang/test/Sema/builtins-hvx-v60.c
The file was modifiedclang/test/Sema/builtins-hexagon-v55.c
The file was modifiedclang/test/Sema/builtins-hvx-v62.c
The file was addedclang/include/clang/Basic/BuiltinsHexagonDep.def
The file was modifiedclang/test/CodeGen/hexagon-brev-ld-ptr-incdec.c
The file was modifiedclang/test/CodeGen/builtins-hexagon-circ.c
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/test/Sema/builtins-hexagon-v60.c
The file was modifiedclang/test/Sema/builtins-hexagon-v62.c
Commit 53b68e676faf208b4a8f817e9bd4ddd522cc6006 by kazu
Resubmit: [JumpThreading] Thread jumps through two basic blocks
This reverts commit 2d258ed931cdf47a7d1dcf08ad963b5452a8670f.  This
revision fixes the Windows build and adds a testcase for it, namely
thread-two-bbs3.ll.  My original patch improperly copied EH pads on
Windows.  This patch disregards jump threading opportunities having to
do with EH pads.
[JumpThreading] Thread jumps through two basic blocks
Summary: This patch teaches JumpThreading.cpp to thread through two
basic blocks like:
  bb3:
   %var = phi i32* [ null, %bb1 ], [ @a, %bb2 ]
   %tobool = icmp eq i32 %cond, 0
   br i1 %tobool, label %bb4, label ...
  bb4:
   %cmp = icmp eq i32* %var, null
   br i1 %cmp, label bb5, label bb6
by duplicating basic blocks like bb3 above.  Once we duplicate bb3 as
bb3.dup and redirect edge bb2->bb3 to bb2->bb3.dup, we have:
  bb3:
   %var = phi i32* [ @a, %bb2 ]
   %tobool = icmp eq i32 %cond, 0
   br i1 %tobool, label %bb4, label ...
  bb3.dup:
   %var = phi i32* [ null, %bb1 ]
   %tobool = icmp eq i32 %cond, 0
   br i1 %tobool, label %bb4, label ...
  bb4:
   %cmp = icmp eq i32* %var, null
   br i1 %cmp, label bb5, label bb6
Then the existing code in JumpThreading.cpp can thread edge bb3.dup->bb4
through bb4 and eventually create bb3.dup->bb5.
Reviewers: wmi
Subscribers: hiraditya, jfb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70247
The file was modifiedllvm/include/llvm/Transforms/Scalar/JumpThreading.h
The file was addedllvm/test/Transforms/JumpThreading/thread-two-bbs2.ll
The file was modifiedllvm/lib/Transforms/Scalar/JumpThreading.cpp
The file was addedllvm/test/Transforms/JumpThreading/thread-two-bbs1.ll
The file was addedllvm/test/Transforms/JumpThreading/thread-two-bbs3.ll
Commit 1f2dad1fd575ff24cfb2c5323c10e1014b516df0 by fedor.sergeev
[GVN] add GVN parameters parsing to new pass manager
Introduce parsing, add a few instances of parameter use into GVN-PRE
tests.
Reviewers: skatkov, asbirlea Reviewed By: skatkov
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72752
The file was modifiedllvm/test/Transforms/GVN/PRE/local-pre.ll
The file was modifiedllvm/test/Transforms/GVN/PRE/load-pre-align.ll
The file was modifiedllvm/test/Transforms/GVN/PRE/pre-single-pred.ll
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was modifiedllvm/test/Transforms/GVN/PRE/pre-load.ll
The file was modifiedllvm/lib/Passes/PassRegistry.def
The file was modifiedllvm/test/Transforms/GVN/PRE/pre-gep-load.ll
The file was modifiedllvm/test/Transforms/GVN/PRE/pre-basic-add.ll
Commit ecf0766cf14191fb44386a097e78325c7f555d81 by kparzysz
[Hexagon] Add ELF flags for Hexagon v66 to ELFYAML.cpp
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
Commit 40514a7d7a3b745ba43c2d014e54a0d78d65d957 by michael.hliao
[clangd] Add workaround for GCC5 host compilers. NFC.
The file was modifiedclang-tools-extra/clangd/Hover.cpp
Commit fc4e43ad618b6a00840f0fd0c84d32922dfd3cd2 by wanyu9511
[NFC] Remove unnecessary link components.
Remove unused link components in unittest according to post commit
comments.
The file was modifiedllvm/unittests/Target/PowerPC/CMakeLists.txt
Commit c299d1981deaf822dfaa06c791f3158bd6801e20 by peter
scudo: Add initial memory tagging support.
When the hardware and operating system support the ARM Memory Tagging
Extension, tag primary allocation granules with a random tag. The
granules either side of the allocation are tagged with tag 0, which is
normally excluded from the set of tags that may be selected randomly.
Memory is also retagged with a random tag when it is freed, and we
opportunistically reuse the new tag when the block is reused to reduce
overhead. This causes linear buffer overflows to be caught
deterministically and non-linear buffer overflows and use-after-free to
be caught probabilistically.
This feature is currently only enabled for the Android allocator and
depends on an experimental Linux kernel branch available here:
https://github.com/pcc/linux/tree/android-experimental-mte
All code that depends on the kernel branch is hidden behind a macro,
ANDROID_EXPERIMENTAL_MTE. This is the same macro that is used by the
Android platform and may only be defined in non-production
configurations. When the userspace interface is finalized the code will
be updated to use the stable interface and all #ifdef
ANDROID_EXPERIMENTAL_MTE will be removed.
Differential Revision: https://reviews.llvm.org/D70762
The file was modifiedcompiler-rt/lib/scudo/standalone/primary64.h
The file was modifiedcompiler-rt/lib/scudo/standalone/combined.h
The file was addedcompiler-rt/lib/scudo/standalone/memtag.h
The file was modifiedcompiler-rt/lib/scudo/standalone/common.h
The file was modifiedcompiler-rt/lib/scudo/standalone/linux.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/primary32.h
The file was modifiedcompiler-rt/lib/scudo/standalone/allocator_config.h
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/combined_test.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/wrappers_c.inc
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/primary_test.cpp
Commit d5c6b8407c12d39a78f42a216369407cb2d7b511 by aaron
Factor out renaming logic from readability-identifier-naming
Before this patch, readability-identifier-naming contained a significant
amount of logic for (a) checking the style of identifiers, followed by
(b) renaming/ applying fix-its. This patch factors out (b) into a
separate base class so that it can be reused by other checks that want
to do renaming. This also cleans up readability-identifier-naming
significantly, since now it only needs to be concerned with the
interesting details of (a).
The file was addedclang-tools-extra/clang-tidy/utils/RenamerClangTidyCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.h
The file was modifiedclang-tools-extra/clang-tidy/utils/CMakeLists.txt
The file was addedclang-tools-extra/clang-tidy/utils/RenamerClangTidyCheck.h
The file was modifiedclang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
Commit cbc63fbdc43b01387b9a604d953cd7627a0a15e2 by llvmgnsyncbot
[gn build] Port d5c6b8407c1
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clang-tidy/utils/BUILD.gn
Commit 8b321929483ee3c4070a10c457733c1bddd10b51 by a.bataev
[OPENMP]Avoid string concat where possible and use standard name
generation function, NFC.
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
Commit 52b44902d059e68c6b5553c1d043f768c516064a by spatel
[IR] fix crash in Constant::isElementWiseEqual() with FP types
We lifted this code from InstCombine for general usage in: rL369842
...but it's not safe as-is. There are no existing users that can trigger
this bug, but I discovered it via crashing several regression tests when
trying to use it for select folding in InstSimplify.
ICmp requires (vector) integer types, so give up on anything that's not
integer or FP (pointers and ?) then bitcast the constants before trying
the match. That matches the definition of "equal or undef" that I was
looking for. If someone wants an FP-aware version of equality (deal with
NaN, -0.0), that could be a different mode or different function.
Differential Revision: https://reviews.llvm.org/D72784
The file was modifiedllvm/lib/IR/Constants.cpp
The file was modifiedllvm/unittests/IR/ConstantsTest.cpp
Commit 3a05c3969c18b5520e360b78fc63cda39a6be98f by dschuff
[WebAssembly] Track frame registers through VReg and local allocation
This change has 2 components:
Target-independent: add a method getDwarfFrameBase to
TargetFrameLowering. It describes how the Dwarf frame base will be
encoded.  That can be a register (the default), the CFA (which replaces
NVPTX-specific logic in DwarfCompileUnit), or a DW_OP_WASM_location
descriptr.
WebAssembly: Allow WebAssemblyFunctionInfo::getFrameRegister to return
the correct virtual register instead of FP32/SP32 after
WebAssemblyReplacePhysRegs has run.  Make WebAssemblyExplicitLocals
store the local it allocates for the frame register. Use this local
information to implement getDwarfFrameBase
The result is that the DW_AT_frame_base attribute is correctly encoded
for each subprogram, and each param and local variable has a correct
DW_AT_location that uses DW_OP_fbreg to refer to the frame base.
Differential Revision: https://reviews.llvm.org/D71681
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.h
The file was modifiedllvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
The file was modifiedlld/test/wasm/debuginfo.test
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVPTXFrameLowering.h
The file was addedllvm/test/MC/WebAssembly/debug-localvar.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
The file was modifiedllvm/include/llvm/CodeGen/TargetFrameLowering.h
The file was modifiedllvm/test/MC/WebAssembly/debug-info.ll
The file was modifiedllvm/test/MC/WebAssembly/dwarfdump.ll
The file was modifiedllvm/test/CodeGen/WebAssembly/multi-return.ll
The file was modifiedllvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
Commit 202446c639fdd27a54c3be268154a7c66af4f36d by kparzysz
Add BuiltinsHexagonDep.def to clang module map
The file was modifiedclang/include/clang/module.modulemap
Commit fa4112fffc6bd81ba44a9e6ffb19f4314f6e37b0 by sbc
[llvm-nm] Use `StringRef` over `const std::string &` params
Differential Revision: https://reviews.llvm.org/D72718
The file was modifiedllvm/tools/llvm-nm/llvm-nm.cpp
Commit 91e758b7329b4ff134684e661af93a85c436a460 by arsenm2
AMDGPU: Move permlane discard vdst_in optimization
This case can be handled as a regular selection pattern, so move it out
of the weird post-isel folding code which doesn't have an exactly
equivalent place in GlobalISel.
I think it doesn't make much sense to do this optimization here though,
and it would be more useful in instcombine. There's not really any new
information that will be gained during lowering since these inputs were
known from the beginning.
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/VOP3Instructions.td
Commit 3ef8cdf6660fc20baeb09eae5008b741f178b624 by arsenm2
AMDGPU: Do permlane16 vdst_in discard optimization in InstCombine
There's more potential value to discarding the source value earlier,
since we always know the value of the fi/bc bits.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Commit 80906d9d16043377ad322c7c44d8a4d3f9914808 by dschuff
Revert "[WebAssembly] Track frame registers through VReg and local
allocation"
This reverts commit 3a05c3969c18b5520e360b78fc63cda39a6be98f. It breaks
under expensive-checks and on Windows
The file was modifiedllvm/test/CodeGen/WebAssembly/multi-return.ll
The file was modifiedllvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVPTXFrameLowering.h
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.h
The file was modifiedllvm/include/llvm/CodeGen/TargetFrameLowering.h
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
The file was modifiedllvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
The file was modifiedllvm/test/MC/WebAssembly/dwarfdump.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
The file was removedllvm/test/MC/WebAssembly/debug-localvar.ll
The file was modifiedllvm/test/MC/WebAssembly/debug-info.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
The file was modifiedlld/test/wasm/debuginfo.test
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
Commit 6c4d37733403bf3fda260f1b05fc899427a61cdc by Vedant Kumar
lldb: xfail TestCrossDSOTailCalls.py and TestCrossObjectTailCalls.py on
arm/aarch64
This effectively reverts commit
8d2f252bb8e4d199be8498c4ee2245117ef08fd2, which went a bit too far and
disabled these on all non-Darwin systems.
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/tail_call_frames/cross_dso/TestCrossDSOTailCalls.py
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/tail_call_frames/cross_object/TestCrossObjectTailCalls.py
Commit 9050d0fb593c60628f47caa122c01ea1dc7a1bf5 by phosek
[libcxx] Temporarily switch back to pthread backend for Fuchsia
We switched to C11 thread API on Fuchsia in ab9aefe, but further testing
showed that Fuchsia's C11 mutex implementation needs a few improvements
for this to be usable, so we temporarily switch back to the pthread
implementation until those issues are addressed.
Differential Revision: https://reviews.llvm.org/D72862
The file was modifiedlibcxx/include/__config
Commit 51b521c07a7a784d087d6a4c176b132cc4e36db7 by sbc
[lld][WebAssembly] Use a more meaningful name for stub functions
When we generate these stub functions on signature mismatches give them
a more meaningful name so that when people see this in stack traces is
gives a clue as the what is going on.
See: https://github.com/emscripten-core/emscripten/issues/10226
Differential Revision: https://reviews.llvm.org/D72881
The file was modifiedlld/test/wasm/signature-mismatch.ll
The file was modifiedlld/test/wasm/signature-mismatch-export.ll
The file was modifiedlld/wasm/SymbolTable.cpp
Commit 73f371c31d2774b3e4d51e4e276737d54922aa18 by zinenko
[mlir] NFC: Fix trivial typos
Summary: Fix trivial typos
Differential Revision: https://reviews.llvm.org/D72672
The file was modifiedmlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
The file was modifiedmlir/utils/spirv/define_inst.sh
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVOps.cpp
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVTypes.h
The file was modifiedmlir/include/mlir/Dialect/VectorOps/VectorOps.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVAvailability.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVBase.td
The file was modifiedmlir/lib/Dialect/GPU/Transforms/MemoryPromotion.cpp
Commit a4a42160c4463eac74c5d0cfa9a88c4971d8a23e by zinenko
[mlir] support translation of multidimensional vectors to LLVM IR
Summary: MLIR unlike LLVM IR supports multidimensional vector types.
Such types are lowered to nested LLVM IR arrays wrapping an LLVM IR
vector for the innermost dimension of the MLIR vector. MLIR supports
constants of such types using ElementsAttr for values. Introduce support
for converting ElementsAttr into LLVM IR Constant Aggregates
recursively. This enables translation of multidimensional vector
constants from MLIR to LLVM IR.
Differential Revision: https://reviews.llvm.org/D72846
The file was modifiedmlir/test/Target/llvmir.mlir
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
The file was modifiedmlir/test/Target/llvmir-invalid.mlir
Commit 42b3c38903c9c80e129ce678db7f522967e91eeb by Jan Korous
[clangd][test] Disable a particular testcase in
FindExplicitReferencesTest when LLVM_ENABLE_EXPENSIVE_CHECKS
The test is failing on our CI bots. Seems like the order of results for
one target is undefined.
(post-commit review) Differential Revision:
https://reviews.llvm.org/D72883
The file was modifiedclang-tools-extra/clangd/unittests/FindTargetTests.cpp
Commit 9b549f26fab6900b5328c0c6239fd77c7527159c by arsenm2
AMDGPU: Update clang test
The file was modifiedclang/test/CodeGenOpenCL/builtins-amdgcn-gfx10.cl
Commit 25b542c61fe364fa86163723b9e35cb7db28bcb4 by a.bataev
[OPENMP]Do not emit RTTI descriptor for NVPTX devices.
Need to disable emission of RTTI descriptors for NVPTX devices to be
able to use dynamic classes without unresolved symbols at link stage.
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedclang/test/OpenMP/nvptx_target_pure_deleted_codegen.cpp
Commit b82d18e1e8e6a997f304cbf591e92af02e067fdb by Jessica Paquette
[AArch64][GlobalISel] Change G_FCONSTANTs feeding into stores into
G_CONSTANTS
Given the following situation:
x = G_FCONSTANT (something that can't be materialized) G_STORE x,
some_addr
We know that x must be materialized as at least a single mov. However,
at the time of selection, the G_STORE will have been regbankselected to
a FPR store.
So, as a result, you'll get an unnecessary fmov into the G_STORE.
Storing a constant value in a GPR and a constant value in a FPR are the
same. So, whenever you see a G_FCONSTANT that feeds into only G_STORES,
so might as well make it a G_CONSTANT.
This adds a target-specific combine which changes G_FCONSTANTs feeding
into G_STOREs into G_CONSTANTs.
Differential Revision: https://reviews.llvm.org/D72814
The file was modifiedllvm/lib/Target/AArch64/AArch64PreLegalizerCombiner.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64Combine.td
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/combine-fconstant.mir