Started 1 mo 5 days ago
Took 11 hr on green-dragon-15

Failed Build #6973 (Feb 21, 2020 2:05:54 PM)


Git (git http://labmaster3.local/git/llvm-project.git)

  1. [clangd] Allow renaming class templates in cross-file rename. (detail)
  2. Make unittests include path relative (detail)
  3. [NFC][mlir] Adding more operators to EDSC TemplatedIndexedValue (detail)
  4. test/CodeGen/AMDGPU: Add a test case that shows a miscompilation (detail)
  5. [NFC] Corrected a minor typo in a comment (detail)
  6. Detect and disable openmp tests that require multiple hardware processor to run (detail)
  7. [ConstantFold] fold fsub -0.0, undef to undef rather than NaN (detail)
  8. [DependenceAnalysis] Memory dependence analysis internal caching mechanism is broken in presence of TBAA (PR42733). (detail)
  9. [Hexagon] Introduce noop intrinsic to cast between vector predicate types (detail)
  10. [mlir] Add a signedness semantics bit to IntegerType (detail)
  11. [TargetLowering] SimplifyDemandedBits - use getValidShiftAmountConstant helper. (detail)
  12. [X86] Regenerate hi reg tests (detail)
  13. [Error/unittests] Add a FailedWithMessage gtest matcher (detail)
  14. [PowerPC][NFC] Remove Darwin specific logic in frame finalization. (detail)
  15. [AST][NFC] Update outdated comments in ASTStructuralEquivalence.cpp (detail)
  16. [PowerPC][NFC] Add a test for vrsave usage iinline asm. (detail)
  17. [lldb/DWARF] Add support for type units in dwp files (detail)
  18. Remove unused functions in llvm-ml (detail)
  19. [mlir] Silence error: call to constructor of 'llvm::APInt' is ambiguous (detail)
  20. AMDGPU/GlobalISel: Fix constant bus violation with source modifiers (detail)
  21. AMDGPU/GlobalISel: Select llvm.amdgcn.fmul.legacy (detail)
  22. AMDGPU/GlobalISel: Legalize G_FPOW (detail)
  23. AMDGPU/GlobalISel: Manually select G_BUILD_VECTOR_TRUNC (detail)
  24. [ARM] Correct Formatting. NFC (detail)
  25. AMDGPU/GlobalISel: Precommit xnor matching test (detail)
  26. [ELF] Ignore the maximum of input section alignments for two cases (detail)
  27. [ELF] Warn changed output section address (detail)
  28. [lldb-vscode] Use libOption with tablegen to parse command line options. (detail)
  29. [ELF] Shuffle .init_array/.fini_array with --shuffle-sections= (detail)
  30. [TargetLowering] Apply basic shift combines before recursive SimplifyDemandedBits calls. (detail)
  31. AMDGPU/GlobalISel: Fix xnor matching (detail)
  32. AMDGPU/GlobalISel: Commit test changes I forgot to squash (detail)
  33. GlobalISel: Fix narrowing of (G_ASHR i64:x, 32) (detail)
  34. [AArch64][SVE] Add +fullfp16 to sve-vector-splat.ll (detail)
  35. [DSE,MSSA] Add debug counter. (detail)
  36. [AST matchers] Add basic matchers for googletest EXPECT/ASSERT calls. (detail)
  37. [VectorCombine] refactor matching code to reduce duplication; NFC (detail)
  38. [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations (detail)
  39. AMDGPU: Use default operand for VOP3P clamp (detail)
  40. [SystemZ]  Return scalarized costs for vector instructions on older archs. (detail)
  41. [gn build] Port 23444edf30b (detail)
  42. [SimplifyLibCalls][IRBuilder] Accept any IRBuilder in SimplifyLibCalls (detail)
  43. [X86] Fix SDLoc initialization (detail)
  44. [VectorUtils] Move ToVectorTy to VectorUtils.h (NFC). (detail)
  45. [DSE,MSSA] Dbg counters required assertions. Mark test accordingly. (detail)
  46. [InstCombine] Use replaceOperand() in more places (detail)
  47. [Clang interpreter] Rename Block.{h,cpp} to InterpBlock.{h,cpp} (detail)
  48. [BFI] Fix missed BFI updates in MachineSink. (detail)
  49. [InstCombine] Improve simplify demanded bits worklist management (detail)
  50. [llvm][CodeGen] DAG Combiner folds for vscale. (detail)
  51. [MLIR] Allow Loop dialect IfOp and ForOp to define values (detail)
  52. [XCOFF][AIX] Put undefined symbol name into StringTable when neccessary (detail)
  53. [LoopVectorize][X86] Regenerate tests. NFCI. (detail)
  54. Fix MSVC "not all control paths return a value" warning. NFCI. (detail)
  55. AMDGPU/GlobalISel: Select G_SHUFFLE_VECTOR (detail)
  56. AMDGPU/GlobalISel: Select VOP3P instructions (detail)
  57. AMDGPU/GlobalISel: Select llvm.amdgcn.fdot2 (detail)
  58. AMDGPU: Move dot intrinsic patterns to instruction def (detail)
  59. [lldb/cmake] Enable more verbose find_package output. (detail)
  60. AMDGPU/GlobalISel: Fix SALU mapping for v2s16 min/max (detail)
  61. [ARM] Change ARMAttributeParser::Parse to use support::endianness and simplify (detail)
  62. [libc++] Do not set the `availability=XXX` feature when not testing against a system libc++ (detail)
  63. [AArch64][SVE] Add backend support for splats of immediates (detail)
  64. [CodeGen][RISCV] Fix clang/test/CodeGen/atomic_ops.c for RISC-V (detail)
  65. [mlir][spirv] Add lowering for load/store zero-rank memref from std to SPIR-V. (detail)
  66. [MLIR] Remove constexpr from (detail)
  67. [Hexagon] Simplify intrinsic (vandvrt (vandqrt q b) m) -> q if possible (detail)
  68. Move StandardOps/Ops.h to StandardOps/IR/Ops.h (detail)
  69. [llvm][aarch64] SVE addressing modes. (detail)
  70. [VectorCombine] refactor cost calcs to reduce duplication; NFC (detail)
  71. [llvm][CodeGen][aarch64] Add contiguous prefetch intrinsics for SVE. (detail)
  72. [IR] Update BasicBlock::validateInstrOrdering comments, NFC (detail)
  73. [X86] Add a new format type for instructions that represent named prefix bytes like data16 and rep. Use it to make a simpler version of isPrefix. (detail)
  74. [macho][NFC] Extract all CPU_(SUB_)TYPE logic to BinaryFormat (detail)
  75. Allow customized relative PYTHONHOME (detail)
  76. [gn build] Port 1874dee5662 (detail)
  77. [VectorCombine] refactor to reduce duplicated code; NFC (detail)

Started by upstream project clang-stage2-cmake-RgSan_relay build number 1691
originally caused by:

This run spent:

  • 3 ms waiting;
  • 11 hr build duration;
  • 11 hr total from scheduled to completion.
Revision: e9c79a7aef19b14e68ed50eb9382856e9453c5a0
  • detached
Revision: 3a4296e9c1cdb53e0bf939b244790d257a6d5f26
  • refs/remotes/origin/master
Test Result (1 failure / ±0)

Identified problems

Ninja target failed

Below is a link to the first failed ninja target.
Indication 1

Regression test failed

This build failed because a regression test in the test suite FAILed. See the test report for details.
Indication 2