FailedChanges

Summary

  1. phab doc: Replace or remove references to svn (details)
  2. AMDGPU/GlobalISel: Widen 16-bit shift amount sources (details)
  3. AMDGPU/GlobalISel: Fix argument lowering for vectors of pointers (details)
  4. GlobalISel: Don't assert on MoreElements creating vectors (details)
  5. TableGen/GlobalISel: Address fixme (details)
  6. GlobalISel: Move getLLTForMVT/getMVTForLLT (details)
  7. Add gdb pretty printer for MutableArrayRef, remove ConstArrayRef. (details)
  8. Add builtins for aligning and checking alignment of pointers and (details)
  9. [mlir] mlir-cpu-runner test's cblas_interface should export functions on (details)
  10. [mlir] add a missing dependency for Linalg conversion (details)
  11. [AArch64][GlobalISel] Implement selection of <2 x float> vector splat. (details)
  12. CodeGen: Use LLT instead of EVT in getRegisterByName (details)
  13. GlobalISel: Fix else after return (details)
  14. DAG: Don't use unchecked dyn_cast (details)
  15. GlobalISel: Handle llvm.read_register (details)
  16. TableGen/GlobalISel: Add way for SDNodeXForm to work on timm (details)
  17. TableGen/GlobalISel: Fix pattern matching of immarg literals (details)
  18. [lldb/Lua] Add lua typemaps for INOUT params (details)
  19. [mlir] Use getDenseElementBitwidth instead of (details)
  20. When diagnosing the lack of a viable conversion function, also list (details)
  21. AVR: Update for getRegisterByName change (details)
  22. [lldb] Remove spurious file (details)
  23. [AMDGPU] Fix bundle scheduling (details)
  24. When reading Aux file in chunks, read consecutive byte ranges (details)
  25. [ELF] Fix includeInDynsym() when an undefined weak is merged with a lazy (details)
  26. AMDGPU/GlobalISel: Fix G_EXTRACT_VECTOR_ELT mapping for s-v case (details)
  27. AMDGPU/GlobalISel: Select G_EXTRACT_VECTOR_ELT (details)
  28. Relax opcode checks in test for G_READCYCLECOUNTER to check for only a (details)
  29. CWG2352: Allow qualification conversions during reference binding. (details)
  30. [NFC] Style cleanup (details)
  31. fix a few typos to cycle the bots (details)
  32. fix another typo to cycle bots (details)
  33. [ThinLTO] Pass CodeGenOpts like UnrollLoops/VectorizeLoop/VectorizeSLP (details)
  34. [xray] Remove cl::sub from alias options (details)
  35. clang-tidy doc - remove the widths (details)
  36. [Syntax] Update comment, remove stale FIXME. NFC (details)
  37. [LV] VPValues for memory operation pointers (NFCI) (details)
  38. Restore order in clang-tidy section of release notes (details)
  39. Allow system header to provide their own implementation of some builtin (details)
  40. [NFC] [PowerPC] Add isPredicable for basic instrs (details)
  41. [clangd] Improve type printing in hover (details)
  42. [clangd] Fix markdown rendering in VSCode (details)
  43. Fix several issues with compiler extensions (details)
  44. [SVEV] Recognise hardware-loop intrinsic loop.decrement.reg (details)
  45. Follow up of 67bf9a6154d4b82c, minor fix in test case, removed duplicate (details)
  46. [libcxx] Force-cache LIBCXX_CXX_ABI_LIBRARY_PATH (details)
  47. [CMake] Support running libc++abi tests in CrossWinToARMLinux cache file (details)
  48. XFAIL load_extension.ll test on macOS only (details)
  49. [MIR] Fix cyclic dependency of MIR formatter (details)
  50. [LV] Silence unused variable warning in Release builds. NFC. (details)
  51. Don't use dyn_cast_or_null if we know the pointer is nonnull. (details)
  52. [X86][AVX] Add tests for v8f32/v8i32 089abcde and 0189abcd shuffles (details)
  53. Fix Wdocumentation warning. NFCI. (details)
  54. Fix Wdocumentation warning. NFCI. (details)
  55. Data formatters: Look through array element typedefs (details)
  56. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  57. [ARM,MVE] Make `vqrshrun` generate the right instruction. (details)
  58. [ARM][Thumb2] Fix ADD/SUB invalid writes to SP (details)
  59. [lldb/lua] Make convenience_variables.test compatible with lua-5.1 (details)
  60. [lldb/DWARF] Don't automatically search dwo unit attributes (details)
  61. [CodeComplete] Suggest 'return nullptr' in functions returning pointers (details)
  62. [lldb] Surpress "bitfield too small" gcc warning (details)
  63. [Support] ThreadPoolExecutor fixes for Windows/MinGW (details)
  64. [lldb][tests] Take into account all parent's categories when traverse (details)
  65. [lldb][test] NFC, re-use _getTestPath() function (details)
  66. [FPEnv] Generate constrained FP comparisons from clang (details)
  67. [lldb][tests] Cleanup '.categories' (details)
  68. Reverting, broke some bots. Need further investigation. (details)
  69. Sprinkle some constexpr on default ctors so the compiler can diagnose (details)
  70. ARMLowOverheadLoops: a few more dbg msgs to better trace rejected TP (details)
  71. RangeDataVector: Support custom sorting for D63540 (details)
  72. [ARM][MVE] Tail predicate VMAX,VMAXA,VMIN,VMINA (details)
  73. [FPEnv] Invert sense of MIFlag::FPExcept flag (details)
  74. [lldb][tests][NFC] Unify variable naming convention (details)
  75. [lldb][tests] Make it possible to expect failure for a whole category (details)
  76. AMDGPU/GlobalISel: Clamp G_ZEXT source sizes (details)
  77. [LIBOMPTARGET]Ignore empty target descriptors. (details)
  78. [DebugInfo] Improve error message text (details)
  79. [DebugInfo][NFC] Remove unused variable/fix variable naming (details)
  80. [NFC] format unittest for ExprMutAnalyzer (details)
  81. [PowerPC] Handle constant zero bits in BitPermutationSelector (details)
  82. Add support for __declspec(guard(nocf)) (details)
  83. Add missing nullptr checks. (details)
  84. [analyzer] Add PlacementNewChecker (details)
  85. [mlir][spirv] Fix typos related to (de)serialization. (details)
  86. [InstCombine] add tests for fsub; NFC (details)
  87. [BPF] extend BTF_KIND_FUNC to cover global, static and extern funcs (details)
  88. [clangd] Fix targetDecl() on certain usage of ObjC properties. (details)
  89. [gn build] Port 5e7beb0a414 (details)
  90. [X86][AVX] lowerShuffleAsLanePermuteAndShuffle - consistently normalize (details)
  91. Fix "pointer is null" static analyzer warning. NFCI. (details)
  92. Fix "pointer is null" static analyzer warning. NFCI. (details)
  93. [examples] Add missing dependency in llvm examples (details)
  94. [AIX] Allow vararg calls when all arguments reside in registers (details)
  95. Fix "pointer is null" static analyzer warning. NFCI. (details)
  96. [AArch64] Add function attribute "patchable-function-entry" to add NOPs (details)
  97. [X86] Support function attribute "patchable-function-entry" (details)
  98. Support function attribute patchable_function_entry (details)
  99. [Driver][CodeGen] Add -fpatchable-function-entry=N[,0] (details)
  100. [ELF] Make TargetInfo::writeIgotPlt a no-op (details)
  101. [LegalizeVectorOps] Improve handling of multi-result operations. (details)
  102. [lldb] Remove FieldDecl stealing hack by rerouting indirect imports to (details)
  103. [lldb/Lua] Support loading Lua modules (details)
  104. Update the attribution policy to use the 'Author' property of a git (details)
  105. [analyzer] Move PlacementNewChecker to alpha (details)
  106. [TargetLowering][ARM][X86] Change softenSetCCOperands handling of ONE to (details)
  107. [lld][WebAssembly] Add libcall symbols to the link when LTO is being (details)
  108. [CMake] Fix modules build after DWARFLinker reorganization (details)
  109. [clang] Fix out-of-bounds memory access in ComputeLineNumbers (details)
  110. [Driver][PowerPC] Move powerpcspe logic from cc1 to Driver (details)
  111. [ASTMatchers] Make test more clear about what it is verifying (details)
  112. [Tests] Precommit tests showing default branch padding on skylake (details)
  113. [lldb] Make CompleteTagDeclsScope completion order deterministic (details)
  114. [lldb] Fix TestClangASTContext.TestFunctionTemplateInRecordConstruction (details)
  115. Implement new AST matcher hasAnyCapture to match on LambdaExpr captures. (details)
  116. MakeUniqueCheck.cpp: explicit the fact that there is an autofix for this (details)
  117. clang-tidy doc: Refresh the list of checkers and polish the script (details)
  118. [TargetLowering] Use SelectionDAG::getSetCC and remove a repeated call (details)
  119. clang-tidy doc: unbreak the CI (details)
  120. Summary: update macro for OFF_T so that sanitizer works on AARCH64. (details)
  121. [lldb/Scripts] Remove buildbot.py (details)
  122. [lldb/Scripts] Remove remote-build.py (details)
  123. [lldb/Scripts] Move android script from underneath Python dir (details)
  124. [AArch64] Add isAuthenticated predicate to MCInstDesc (details)
  125. [lldb/Test] Bypass LLDB_TEST_COMMON_ARGS for certain dotest args (NFC) (details)
  126. [lldb/Utils] Remove vim-lldb (details)
  127. lldbutil: Forward ASan launch info to test inferiors (details)
  128. Let targets adjust operand latency of bundles (details)
  129. [lldb/Reproducer] Add SBReproducer::Replay overload (again) (details)
  130. Only destroy static locals if they have non-trivial destructors. (details)
  131. [LockFileManager] Make default waitForUnlock timeout a parameter, NFC (details)
  132. [NFC][InlineCost] Factor cost modeling out of CallAnalyzer traversal. (details)
  133. [mlir] NFC: put C++ code emission classes in their own files (details)
  134. [mlir][ods] Support dialect specific content emission via hooks (details)
  135. Improve precision of documentation comment. (details)
  136. [AArch64] Don't generate libcalls for wide shifts on Darwin (details)
  137. Remove redundant implicit cast creation. (details)
  138. Add a FIXME and corresponding test coverage for some suspicious behavior (details)
  139. Clean up and slightly generalize implementation of composite pointer (details)
  140. driver: Allow -fdebug-compilation-dir=foo in joined form. (details)
  141. [Driver] Fix OptionClass of -fconvergent-functions and -fms-volatile (details)
  142. [Concepts] Fix MarkUsedTemplateParameters for exprs (details)
  143. Remove umask tests (details)
  144. [COFF] Align ARM64 range extension thunks at instruction boundary (details)
  145. [TargetLowering][ARM][Mips][WebAssembly] Remove the ordered FP compare (details)
  146. [SCEV] [NFC] add more test cases for range of addrecexpr with nsw flag (details)
  147. [NFC] [PowerPC] Update mi-peephole-splat test (details)
  148. [AMDGPU] Remove unnecessary v_mov from a register to itself in WQM (details)
  149. Mark the test/Feature/load_extension.ll test as unsupported on Darwin. (details)
  150. [X86] Use ReplaceAllUsesWith instead of ReplaceAllUsesOfValueWith to (details)
  151. [X86][Disassembler] Simplify readPrefixes (details)
  152. [X86] Preserve fpexcept property when turning strict_fp_extend and (details)
  153. [X86] Simplify code by removing an unreachable condition. NFCI (details)
  154. Add test for GDB pretty printers. (details)
  155. [X86] Remove dead code from X86DAGToDAGISel::Select that is no longer (details)
  156. [InstCombine] Preserve nuw on sub of geps (PR44419) (details)
  157. [LoopSimplify] Regenerate test checks; NFC (details)
  158. [LoopRotate] Add tests for rotate with switch; NFC (details)
  159. DSE: fix bug where we would only check libcalls for name rather than (details)
  160. [X86] Add more complex tests for vector masks used with AND/OR/XOR. (details)
  161. [X86][AVX] Add lowerShuffleAsLanePermuteAndSHUFP lowering (details)
  162. Fix copy+paste typo in shuffle test name (details)
  163. [Sema] Improve -Wrange-loop-analysis warnings. (details)
  164. [X86] Fix outdated comment (details)
  165. moveOperands - assert Src/Dst MachineOperands are non-null. (details)
  166. Remove copy ctors identical to the default one. NFC. (details)
  167. Fix uninitialized value clang static analyzer warning. NFC. (details)
  168. Fix "pointer is null" static analyzer warning. NFCI. (details)
  169. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  170. Fix "pointer is null" static analyzer warning. NFCI. (details)
  171. Fix "pointer is null" static analyzer warning. NFCI. (details)
  172. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  173. GlobalModuleIndex - Fix use-after-move clang static analyzer warning. (details)
  174. [X86AsmBackend] Be consistent about placing definitions out of line (details)
  175. [X86AsmBackend] Move static function before sole use [NFC] (details)
  176. [X86] Adjust nop emission by compiler to consider target decode (details)
  177. [mlir] NFC: Remove Value::operator* and Value::operator-> now that Value (details)
  178. [ASTMatchers] extract public matchers from const-analysis into own patch (details)
  179. Revert "[ASTMatchers] extract public matchers from const-analysis into (details)
  180. [ExecutionEngine] Re-enable FastISel for non-iOS arm targets. (details)
  181. Add -Wrange-loop-analysis changes to ReleaseNotes (details)
  182. [X86] Turn FP_ROUND/STRICT_FP_ROUND into (details)
  183. [X86][Disassembler] Simplify and optimize reader functions (details)
  184. [LegalizeVectorOps] Only pass SDNode* instead SDValue to all of the (details)
  185. [LegalizeVectorOps] Remove some of the simpler Expand methods. Pass (details)
  186. [X86][Disassembler] Replace custom logger with LLVM_DEBUG (details)
  187. [Support] Optionally call signal handlers when a function wrapped by the (details)
  188. [ORC] Fix argv handling in runAsMain / lli. (details)
  189. [Disassembler] Delete the VStream parameter of (details)
  190. [X86][Disassembler] Optimize argument passing and immediate reading (details)
  191. [X86][Disassembler] Shrink X86GenDisassemblerTables.inc from 36M to 6.1M (details)
  192. [LegalizeVectorOps] Expand vector MERGE_VALUES immediately. (details)
  193. [TargetLowering][X86] Connect the chain from STRICT_FSETCC in (details)
  194. [LegalizeVectorOps] Parallelize the lo/hi part of STRICT_UINT_TO_FLOAT (details)
  195. [SCEV] more accurate range for addrecexpr with nsw flag. (details)
  196. [X86] Don't call LowerSETCC from LowerSELECT for (details)
  197. [NFC] Refactor memory ops cluster method (details)
  198. [profile] Support merge pool size >= 10 (details)
  199. [X86][Disassembler] Simplify (details)
  200. [X86][Disassembler] Merge X86DisassemblerDecoder.cpp into (details)
  201. [X86][AVX] lowerShuffleAsLanePermuteAndSHUFP - only set the demanded (details)
Commit 0c195ef7c62db1234e3854f8798e1ef413808b18 by sledru
phab doc: Replace or remove references to svn
The file was modifiedllvm/docs/Phabricator.rst
Commit 35ad66fae811c36823b2b91368f142c9d35b8414 by arsenm2
AMDGPU/GlobalISel: Widen 16-bit shift amount sources
This should be legal, but will require future selection work. 16-bit
shift amounts were already removed from being legal, but this didn't
adjust the transformation rules.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
Commit 767aa507a464e46b9a5aaed8cfec0a621f8fc599 by arsenm2
AMDGPU/GlobalISel: Fix argument lowering for vectors of pointers
When these arguments are broken down by the EVT based callbacks, the
pointer information is lost. Hack around this by coercing the register
types to be the expected pointer element type when building the remerge
operations.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
Commit fba1fbb9c7367990a0561a36dbf600fc51847246 by arsenm2
GlobalISel: Don't assert on MoreElements creating vectors
If the original type was a scalar, it should be valid to add elements to
turn it into a vector.
Tests included with following legalization change.
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
Commit f937b43fdb30b67facf616ad394976b08001ee89 by arsenm2
TableGen/GlobalISel: Address fixme
Don't call computeAvailableFunctionFeatures for every instruction.
The file was modifiedllvm/utils/TableGen/GlobalISelEmitter.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
The file was modifiedllvm/test/TableGen/GlobalISelEmitter.td
Commit 595ac8c46ea54c6d5dc96e2f35a5759988a657be by arsenm2
GlobalISel: Move getLLTForMVT/getMVTForLLT
As an intermediate step, some TLI functions can be converted to using
LLT instead of MVT. Move this somewhere out of GlobalISel so DAG
functions can use these.
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/Utils.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/Utils.cpp
The file was modifiedllvm/lib/CodeGen/LowLevelType.cpp
The file was modifiedllvm/include/llvm/CodeGen/LowLevelType.h
Commit 0f5f28d000f73b4d0282c579477a4e31402a863e by csigg
Add gdb pretty printer for MutableArrayRef, remove ConstArrayRef.
Reviewers: dblaikie
Reviewed By: dblaikie
Subscribers: merge_guards_bot, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72136
The file was modifiedllvm/utils/gdb-scripts/prettyprinters.py
Commit 8c387cbea76b169f1f8ecc7693797e96567ed896 by Alexander.Richardson
Add builtins for aligning and checking alignment of pointers and
integers
This change introduces three new builtins (which work on both pointers
and integers) that can be used instead of common bitwise arithmetic:
__builtin_align_up(x, alignment), __builtin_align_down(x, alignment) and
__builtin_is_aligned(x, alignment).
I originally added these builtins to the CHERI fork of LLVM a few years
ago to handle the slightly different C semantics that we use for CHERI
[1]. Until recently these builtins (or sequences of other builtins) were
required to generate correct code. I have since made changes to the
default C semantics so that they are no longer strictly necessary (but
using them does generate slightly more efficient code). However, based
on our experience using them in various projects over the past few
years, I believe that adding these builtins to clang would be useful.
These builtins have the following benefit over bit-manipulation and
casts via uintptr_t:
- The named builtins clearly convey the semantics of the operation.
While
checking alignment using __builtin_is_aligned(x, 16) versus
((x & 15) == 0) is probably not a huge win in readably, I personally
find
__builtin_align_up(x, N) a lot easier to read than (x+(N-1))&~(N-1).
- They preserve the type of the argument (including const qualifiers).
When
using casts via uintptr_t, it is easy to cast to the wrong type or
strip
qualifiers such as const.
- If the alignment argument is a constant value, clang can check that it
is
a power-of-two and within the range of the type. Since the semantics of
these builtins is well defined compared to arbitrary bit-manipulation,
it is possible to add a UBSAN checker that the run-time value is a
valid
power-of-two. I intend to add this as a follow-up to this change.
- The builtins avoids int-to-pointer casts both in C and LLVM IR.
In the future (i.e. once most optimizations handle it), we could use
the new
llvm.ptrmask intrinsic to avoid the ptrtoint instruction that would
normally
be generated.
- They can be used to round up/down to the next aligned value for both
integers and pointers without requiring two separate macros.
- In many projects the alignment operations are already wrapped in
macros (e.g.
roundup2 and rounddown2 in FreeBSD), so by replacing the macro
implementation
with a builtin call, we get improved diagnostics for many call-sites
while
only having to change a few lines.
- Finally, the builtins also emit assume_aligned metadata when used on
pointers.
This can improve code generation compared to the uintptr_t casts.
[1] In our CHERI compiler we have compilation mode where all pointers
are implemented as capabilities (essentially unforgeable 128-bit fat
pointers). In our original model, casts from uintptr_t (which is a
128-bit capability) to an integer value returned the "offset" of the
capability (i.e. the difference between the virtual address and the base
of the allocation). This causes problems for cases such as checking the
alignment: for example, the expression `if ((uintptr_t)ptr & 63) == 0`
is generally used to check if the pointer is aligned to a multiple of 64
bytes. The problem with offsets is that any pointer to the beginning of
an allocation will have an offset of zero, so this check always succeeds
in that case (even if the address is not correctly aligned). The same
issues also exist when aligning up or down. Using the alignment builtins
ensures that the address is used instead of the offset. While I have
since changed the default C semantics to return the address instead of
the offset when casting, this offset compilation mode can still be used
by passing a command-line flag.
Reviewers: rsmith, aaron.ballman, theraven, fhahn, lebedev.ri, nlopes,
aqjune Reviewed By: aaron.ballman, lebedev.ri Differential Revision:
https://reviews.llvm.org/D71499
The file was modifiedclang/docs/LanguageExtensions.rst
The file was modifiedclang/include/clang/Basic/DiagnosticASTKinds.td
The file was modifiedclang/include/clang/Basic/Builtins.def
The file was addedclang/test/CodeGen/builtin-align-assumption.c
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was addedclang/test/CodeGen/builtin-align.c
The file was addedclang/test/CodeGen/builtin-align-array.c
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was addedclang/test/Sema/builtin-align.c
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was addedclang/test/SemaCXX/builtin-align-cxx.cpp
The file was modifiedclang/lib/CodeGen/CodeGenFunction.h
The file was modifiedclang/lib/AST/ExprConstant.cpp
Commit ea67737b166fc6cb5fd98874fbd2b4639b2d7ecd by zinenko
[mlir] mlir-cpu-runner test's cblas_interface should export functions on
Windows
This change fixes the build on Windows, so that cblas_interface.dll
exports functions correctly and an implib is created and installed
correctly.
Currently, LLVM cannot be consumed on Windows after it has been
installed in a location because cblas_interface.lib is not
created/installed, thus failing the import check in `LLVMExports.cmake`.
Differential Revision: https://reviews.llvm.org/D72384
The file was modifiedmlir/test/mlir-cpu-runner/CMakeLists.txt
The file was modifiedmlir/test/mlir-cpu-runner/include/cblas.h
The file was addedmlir/test/mlir-cpu-runner/include/cblas_interface.h
The file was modifiedmlir/test/mlir-cpu-runner/cblas_interface.cpp
The file was modifiedmlir/test/mlir-cpu-runner/include/mlir_runner_utils.h
Commit 016bf03ef6fcd9dce43b0c17971f76323f07a684 by zinenko
[mlir] add a missing dependency for Linalg conversion
We were seeing some occasional build failures that would come and go. It
appeared to be this missing dependence.
Differential Revision: https://reviews.llvm.org/D72419
The file was modifiedmlir/lib/Conversion/LinalgToLLVM/CMakeLists.txt
Commit cc95bb1f57c674c0efdfc134eab8ed8c50f2a6e3 by Amara Emerson
[AArch64][GlobalISel] Implement selection of <2 x float> vector splat.
Also requires making G_IMPLICIT_DEF of v2s32 legal.
Differential Revision: https://reviews.llvm.org/D72422
The file was modifiedllvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-undef.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/opt-shuffle-splat.mir
The file was modifiedllvm/test/CodeGen/AArch64/arm64-rev.ll
Commit 255cc5a7603fef251192daab2a3336acbcd9aa1c by arsenm2
CodeGen: Use LLT instead of EVT in getRegisterByName
Only PPC seems to be using it, and only checks some simple cases and
doesn't distinguish between FP. Just switch to using LLT to simplify use
from GlobalISel.
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLowering.h
The file was modifiedllvm/lib/Target/Lanai/LanaiISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/lib/Target/Lanai/LanaiISelLowering.h
The file was modifiedllvm/lib/Target/Mips/MipsISelLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
The file was modifiedllvm/lib/Target/Mips/MipsISelLowering.h
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.h
The file was modifiedllvm/lib/Target/Sparc/SparcISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Target/Sparc/SparcISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit ac53a5f1dc21916f1072031703e0e1833e963454 by arsenm2
GlobalISel: Fix else after return
The file was modifiedllvm/lib/CodeGen/LowLevelType.cpp
Commit f33f3d98e9e6322846c3b997260faf3e1165e0dd by arsenm2
DAG: Don't use unchecked dyn_cast
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Commit 0ea3c7291fb8d463d9c7ae6aaec7a432ef366a51 by arsenm2
GlobalISel: Handle llvm.read_register
Compared to the attempt in bdcc6d3d2638b3a2c99ab3b9bfaa9c02e584993a,
this uses intermediate generic instructions.
The file was modifiedllvm/include/llvm/Support/TargetOpcodes.def
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/include/llvm/Target/GenericOpcodes.td
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/read_register.ll
Commit b4a647449fa01bd4e29bce5afef51770cddec664 by arsenm2
TableGen/GlobalISel: Add way for SDNodeXForm to work on timm
The current implementation assumes there is an instruction associated
with the transform, but this is not the case for
timm/TargetConstant/immarg values. These transforms should directly
operate on a specific MachineOperand in the source instruction. TableGen
would assert if you attempted to define an equivalent GISDNodeXFormEquiv
using timm when it failed to find the instruction matcher.
Specially recognize SDNodeXForms on timm, and pass the operand index to
the render function.
Ideally this would be a separate render function type that looks like
void renderFoo(MachineInstrBuilder, const MachineOperand&), but this
proved to be somewhat mechanically painful. Add an optional operand
index which will only be passed if the transform should only look at the
one source operand.
Theoretically it would also be possible to only ever pass the
MachineOperand, and the existing renderers would check the parent. I
think that would be somewhat ugly for the standard usage which may want
to inspect other operands, and I also think MachineOperand should
eventually not carry a pointer to the parent instruction.
Use it in one sample pattern. This isn't a great example, since the
transform exists to satisfy DAG type constraints. This could also be
avoided by just changing the MachineInstr's arbitrary choice of operand
type from i16 to i32. Other patterns have nontrivial uses, but this
serves as the simplest example.
One flaw this still has is if you try to use an SDNodeXForm defined for
imm, but the source pattern uses timm, you still see the "Failed to
lookup instruction" assert. However, there is now a way to avoid it.
The file was modifiedllvm/lib/Target/ARM/ARMInstructionSelector.cpp
The file was modifiedllvm/include/llvm/Target/GlobalISel/Target.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was addedllvm/test/TableGen/GlobalISelEmitter-SDNodeXForm-timm.td
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
The file was modifiedllvm/utils/TableGen/GlobalISelEmitter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ds.swizzle.mir
The file was modifiedllvm/test/TableGen/GlobalISelEmitter.td
The file was modifiedllvm/lib/Target/AMDGPU/DSInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.td
Commit 10edb1d0d4a15812a71f8953bba96a4f1fc9d0af by arsenm2
TableGen/GlobalISel: Fix pattern matching of immarg literals
For arguments that are not expected to be materialized with G_CONSTANT,
this was emitting predicates which could never match. It was first
adding a meaningless LLT check, which would always fail due to the
operand not being a register.
Infer the cases where a literal should check for an immediate operand,
instead of a register This avoids needing to invent a special way of
representing timm literal values.
Also handle immediate arguments in GIM_CheckLiteralInt. The comments
stated it handled isImm() and isCImm(), but that wasn't really true.
This unblocks work on the selection of all of the complicated AMDGPU
intrinsics in future commits.
The file was modifiedllvm/utils/TableGen/CodeGenInstruction.h
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
The file was modifiedllvm/utils/TableGen/CodeGenInstruction.cpp
The file was modifiedllvm/utils/TableGen/GlobalISelEmitter.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
The file was addedllvm/test/TableGen/GlobalISelEmitter-immarg-literal-pattern.td
The file was modifiedllvm/test/TableGen/Common/GlobalISelEmitterCommon.td
The file was modifiedllvm/utils/TableGen/CodeGenIntrinsics.h
Commit 58b3dec6c108eb9ae4af2cde5c831743d5605c79 by Jonas Devlieghere
[lldb/Lua] Add lua typemaps for INOUT params
The file was modifiedlldb/bindings/lua.swig
The file was addedlldb/bindings/lua/lua-typemaps.swig
Commit 68c8b6c4cd117cc962155298f0e1d45056ecc001 by riverriddle
[mlir] Use getDenseElementBitwidth instead of
Type::getElementTypeBitWidth.
Summary: Some data values have a different storage width than the
corresponding MLIR type, e.g. bfloat is currently stored as a double.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D72478
The file was modifiedmlir/unittests/IR/AttributeTest.cpp
The file was modifiedmlir/lib/IR/Attributes.cpp
Commit 25195541349b1d6dfc03bf7511483110bda69b29 by richard
When diagnosing the lack of a viable conversion function, also list
explicit functions that are not candidates.
It's not always obvious that the reason a conversion was not possible is
because the function you wanted to call is 'explicit', so explicitly say
if that's the case.
It would be nice to rank the explicit candidates higher in the
diagnostic if an implicit conversion sequence exists for their
arguments, but unfortunately we can't determine that without potentially
triggering non-immediate-context errors that we're not permitted to
produce.
The file was modifiedclang/lib/Sema/SemaInit.cpp
The file was modifiedclang/test/CXX/dcl.decl/dcl.init/dcl.init.ref/p5.cpp
The file was modifiedclang/test/CXX/special/class.inhctor/p3.cpp
The file was modifiedclang/test/SemaCXX/conversion-function.cpp
The file was modifiedclang/test/SemaCXX/explicit.cpp
The file was modifiedclang/test/CXX/dcl.decl/dcl.init/p14-0x.cpp
The file was modifiedclang/include/clang/AST/DeclCXX.h
The file was modifiedclang/test/PCH/cxx-explicit-specifier.cpp
The file was modifiedclang/test/SemaCXX/cxx2a-explicit-bool.cpp
The file was modifiedclang/lib/Sema/SemaOverload.cpp
The file was modifiedclang/test/CXX/over/over.match/over.match.funcs/over.match.copy/p1.cpp
The file was modifiedclang/test/CXX/drs/dr15xx.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/include/clang/Sema/Overload.h
The file was modifiedclang/test/CXX/expr/expr.prim/expr.prim.lambda/p11-1y.cpp
The file was modifiedclang/test/CXX/basic/basic.lookup/basic.lookup.qual/namespace.qual/p2.cpp
The file was modifiedclang/test/SemaCXX/convert-to-bool.cpp
The file was modifiedclang/test/SemaCXX/copy-initialization.cpp
The file was modifiedclang/test/SemaCXX/default1.cpp
The file was modifiedclang/test/CXX/drs/dr1xx.cpp
The file was modifiedclang/test/SemaCXX/converting-constructor.cpp
Commit 5fe4679cc9cfb4941b766db07bf3cd928075d204 by arsenm2
AVR: Update for getRegisterByName change
The file was modifiedllvm/lib/Target/AVR/AVRISelLowering.cpp
The file was modifiedllvm/lib/Target/AVR/AVRISelLowering.h
Commit b81c8c6976b987a25fc54fa2bf3524919759a898 by Jonas Devlieghere
[lldb] Remove spurious file
The file was removedlldb/lldb/cmake/modules/FindPythonInterpAndLibs.cmake
Commit cd69e4c74c174101817c9f6b7c02374ac6a7476f by Stanislav.Mekhanoshin
[AMDGPU] Fix bundle scheduling
Bundles coming to scheduler considered free, i.e. zero latency. Fixed.
Differential Revision: https://reviews.llvm.org/D72487
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/selectcc-opt.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sub.i16.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/packed-op-sel.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/min.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/uint_to_fp.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/setcc-opt.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/scratch-simple.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/misched-killflags.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sint_to_fp.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/zero_extend.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wave32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
Commit 02113918ed6b5e514afd7d1e007131d36ac13f1d by Jason Molenda
When reading Aux file in chunks, read consecutive byte ranges
qemu has a very small maximum packet size (4096) and it actually only
uses half of that buffer for some implementation reason, so when lldb
asks for the register target definitions, the x86_64 definition is
larger than 4096/2 and we need to fetch it in two parts.
This patch and test is fixing a bug in
GDBRemoteCommunicationClient::ReadExtFeature when reading a target file
in multiple parts.  lldb was assuming that it would always get back the
maximum packet size response (4096) instead of using the actual size
received and asking for the next group of bytes.
We now have two tests in gdb_remote_client for unique features of qemu -
TestNestedRegDefinitions.py would test the ability of lldb to follow
multiple levels of xml includes; I opted to create a separate
TestRegDefinitionInParts.py test to test this wrinkle in qemu's gdb
remote serial protocol stub implementation. Instead of combining both
tests into a single test file.
<rdar://problem/49537922>
The file was addedlldb/packages/Python/lldbsuite/test/functionalities/gdb_remote_client/TestRegDefinitionInParts.py
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
Commit 375371cc8bff7ba02d0a2203f80de5e640fcadf1 by maskray
[ELF] Fix includeInDynsym() when an undefined weak is merged with a lazy
definition
An undefined weak does not fetch the lazy definition. A lazy weak symbol
should be considered undefined, and thus preemptible if .dynsym exists.
D71795 is not quite an NFC. It errors on an R_X86_64_PLT32 referencing
an undefined weak symbol. isPreemptible is false (incorrect) => R_PLT_PC
is optimized to R_PC => in isStaticLinkTimeConstant, an error is emitted
when an R_PC is applied on an undefined weak (considered absolute).
The file was modifiedlld/test/ELF/weak-undef-lib.s
The file was modifiedlld/ELF/Symbols.cpp
Commit 5cabb8357aeb3bbecaef4825c3a594f86ef94c8d by arsenm2
AMDGPU/GlobalISel: Fix G_EXTRACT_VECTOR_ELT mapping for s-v case
If an SGPR vector is indexed with a VGPR, the actual indexing will be
done on the SGPR and produce an SGPR. A copy needs to be inserted inside
the waterwall loop to the VGPR result.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
Commit 35c3d101aee240f6c034f25ff6800fda22a89987 by arsenm2
AMDGPU/GlobalISel: Select G_EXTRACT_VECTOR_ELT
Doesn't try to do the fold into the base register of an add of a
constant in the index like the DAG path does.
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
Commit 3727ca313783e23696caeae53c688409555ab0fc by douglas.yung
Relax opcode checks in test for G_READCYCLECOUNTER to check for only a
number instead of a specific number.
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
Commit f041e9ad706aee7987c5299427c33424fcabbd0d by richard
CWG2352: Allow qualification conversions during reference binding.
The language wording change forgot to update overload resolution to rank
implicit conversion sequences based on qualification conversions in
reference bindings. The anticipated resolution for that oversight is
implemented here -- we order candidates based on qualification
conversion, not only on top-level cv-qualifiers, including ranking
reference bindings against non-reference bindings if they differ in
non-top-level qualification conversions.
For OpenCL/C++, this allows reference binding between pointers with
differing (nested) address spaces. This makes the behavior of reference
binding consistent with that of implicit pointer conversions, as is the
purpose of this change, but that pre-existing behavior for pointer
conversions is itself probably not correct. In any case, it's now
consistently the same behavior and implemented in only one place.
This reinstates commit de21704ba96fa80d3e9402f12c6505917a3885f4,
reverted in commit d8018233d1ea4234de68d5b4593abd773db79484, with
workarounds for some overload resolution ordering problems introduced by
CWG2352.
The file was modifiedclang/test/CXX/drs/dr23xx.cpp
The file was modifiedclang/test/SemaCXX/ref-init-ambiguous.cpp
The file was modifiedclang/www/make_cxx_dr_status
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/test/SemaObjCXX/arc-overloading.mm
The file was modifiedclang/test/CXX/drs/dr4xx.cpp
The file was modifiedclang/lib/Sema/SemaOverload.cpp
The file was modifiedclang/test/SemaOpenCL/address-spaces-conversions-cl2.0.cl
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/lib/Sema/SemaInit.cpp
The file was modifiedclang/www/cxx_dr_status.html
The file was modifiedclang/include/clang/Sema/Sema.h
Commit 02c5983310dcd627aecb521e03a16122f42e8a01 by shengchen.kan
[NFC] Style cleanup
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Commit efabe427b27643839849ebb61fe2e5db37dff0de by thakis
fix a few typos to cycle the bots
The file was modifiedlld/docs/NewLLD.rst
The file was modifiedlld/docs/ld.lld.1
The file was modifiedlld/docs/conf.py
The file was modifiedlld/docs/WebAssembly.rst
Commit 01662aeb5d1fcef4f067caec633d0c85bb3062a7 by thakis
fix another typo to cycle bots
The file was modifiedmlir/docs/Dialects/SPIR-V.md
Commit 21a4710c67a97838dd75cf60ed24da11280800f8 by wmi
[ThinLTO] Pass CodeGenOpts like UnrollLoops/VectorizeLoop/VectorizeSLP
down to pass builder in ltobackend.
Currently CodeGenOpts like UnrollLoops/VectorizeLoop/VectorizeSLP in
clang are not passed down to pass builder in ltobackend when new pass
manager is used. This is inconsistent with the behavior when new pass
manager is used and thinlto is not used. Such inconsistency causes slp
vectorization pass not being enabled in ltobackend for O3 + thinlto
right now. This patch fixes that.
Differential Revision: https://reviews.llvm.org/D72386
The file was addedllvm/test/tools/llvm-lto2/X86/slp-vectorize-pm.ll
The file was addedllvm/test/tools/gold/X86/slp-vectorize-pm.ll
The file was modifiedllvm/tools/llvm-lto2/llvm-lto2.cpp
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
The file was modifiedllvm/tools/llvm-lto2/CMakeLists.txt
The file was addedlld/test/ELF/lto/slp-vectorize-pm.ll
The file was modifiedllvm/lib/LTO/LTOBackend.cpp
The file was modifiedlld/ELF/LTO.cpp
The file was modifiedlld/wasm/CMakeLists.txt
The file was modifiedllvm/tools/gold/gold-plugin.cpp
The file was modifiedllvm/test/Other/new-pm-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-defaults.ll
The file was modifiedlld/COFF/CMakeLists.txt
The file was modifiedlld/ELF/CMakeLists.txt
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was modifiedllvm/include/llvm/LTO/Config.h
The file was addedclang/test/CodeGen/thinlto-slp-vectorize-pm.c
Commit 995c18fc5051850782b1c096233867b8e56e0dea by smeenai
[xray] Remove cl::sub from alias options
Currently running the xray tools generates a number of errors:
$ ./bin/llvm-xray
: for the   -k option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -d option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -o option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -f option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -s option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -r option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -p option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
: for the   -m option: cl::alias must not have cl::sub(), aliased
option's cl::sub() will be used!
<snip>
Patch by Ryan Mansfield.
Differential Revision: https://reviews.llvm.org/D69386
The file was modifiedllvm/tools/llvm-xray/xray-extract.cpp
The file was modifiedllvm/tools/llvm-xray/xray-converter.cpp
The file was modifiedllvm/tools/llvm-xray/xray-graph-diff.cpp
The file was modifiedllvm/tools/llvm-xray/xray-stacks.cpp
The file was modifiedllvm/tools/llvm-xray/xray-account.cpp
The file was modifiedllvm/tools/llvm-xray/xray-graph.cpp
Commit b38d0d5bdb353f8496a0fc38b9bbee419b41a321 by sylvestre
clang-tidy doc - remove the widths
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst
Commit 759c90456d418ffe69e1a2b4bcea2792491a6b5a by ibiryukov
[Syntax] Update comment, remove stale FIXME. NFC
The file was modifiedclang/include/clang/Tooling/Syntax/Tokens.h
Commit 8647a72c4a52e0386c0397ce3fbd38121c18b873 by gil.rapaport
[LV] VPValues for memory operation pointers (NFCI)
Memory instruction widening recipes use the pointer operand of their
load/store ingredient for generating the needed GEPs, making it
difficult to feed these recipes with pointers based on other ingredients
or none at all. This patch modifies these recipes to use a VPValue for
the pointer instead, in order to reduce ingredient def-use usage by ILV
as a step towards full VPlan-based def-use relations. The recipes are
constructed with VPValues bound to these ingredients, maintaining
current behavior.
Differential revision: https://reviews.llvm.org/D70865
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
Commit 164da673009ba6c100ce45b6fa9a5dfd3b0b8e38 by hans
Restore order in clang-tidy section of release notes
Major changes are introduction of subsubsections to prevent people
putting new entries in wrong places. I also polished line length and
highlighting.
Patch by Eugene Zelenko!
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst
Commit 921f871ac438175ca8fcfcafdfcfac4d7ddf3905 by sguelton
Allow system header to provide their own implementation of some builtin
If a system header provides an (inline) implementation of some of their
function, clang still matches on the function name and generate the
appropriate llvm builtin, e.g. memcpy. This behavior is in line with
glibc recommendation « users may not provide their own version of
symbols » but doesn't account for the fact that glibc itself can provide
inline version of some functions.
It is the case for the memcpy function when -D_FORTIFY_SOURCE=1 is on.
In that case an inline version of memcpy calls __memcpy_chk, a function
that performs extra runtime checks. Clang currently ignores the inline
version and thus provides no runtime check.
This code fixes the issue by detecting functions whose name is a builtin
name but also have an inline implementation.
Differential Revision: https://reviews.llvm.org/D71082
The file was modifiedclang/lib/AST/Decl.cpp
The file was modifiedclang/lib/CodeGen/CGExpr.cpp
The file was modifiedclang/include/clang/AST/Decl.h
The file was addedclang/test/CodeGen/memcpy-nobuiltin.c
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was addedclang/test/CodeGen/memcpy-nobuiltin.inc
Commit 45c4b08d8228f64b02b8a4df069aa37d5fa70829 by qiucofan
[NFC] [PowerPC] Add isPredicable for basic instrs
PowerPC uses a dedicated method to check if the machine instr is
predicable by opcode. However, there's a bit `isPredicable` in instr
definition. This patch removes the method and set the bit only to
opcodes referenced in it.
Differential Revision: https://reviews.llvm.org/D71921
The file was modifiedllvm/lib/Target/PowerPC/PPCInstr64Bit.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.h
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
Commit ffd0f116754c36146bb21a01b047782ce8a01e2e by kadircet
[clangd] Improve type printing in hover
Summary: Do not include tag keywords when printing types for symbol
names, as it will come from SymbolKind. Also suppress them while
printing definitions to prevent them occuring in template arguments.
Make use of `getAsString`, instead of `print` in all places to have a
consistent style across the file.
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72450
The file was modifiedclang-tools-extra/clangd/unittests/HoverTests.cpp
The file was modifiedclang-tools-extra/clangd/Hover.cpp
Commit abfa27e4f04dd84774bcfe15783942e21be391a5 by kadircet
[clangd] Fix markdown rendering in VSCode
Summary: Eventough it is OK to have a new line without any preceding
spaces in some markdown specifications, VSCode requires two spaces
before a new line to break a line inside a paragraph.
Reviewers: sammccall, ilya-biryukov
Subscribers: MaskRay, jkorous, arphaman, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72462
The file was modifiedclang-tools-extra/clangd/FormattedString.cpp
The file was modifiedclang-tools-extra/clangd/unittests/FormattedStringTests.cpp
Commit 346de9b67228f42eb9b55fa3b426b5dedfdb1d40 by sguelton
Fix several issues with compiler extensions
- Update documentation now that the move to monorepo has been made
- Do not tie compiler extension testing to LLVM_BUILD_EXAMPLES
- No need to specify LLVM libraries for plugins
- Add NO_MODULE option to match Polly specific requirements (i.e.
building the
module *and* linking it statically)
- Issue a warning when building the compiler extension with
LLVM_BYE_LINK_INTO_TOOLS=ON, as it modifies the behavior of clang,
which only
makes sense for testing purpose.
Still mark llvm/test/Feature/load_extension.ll as XFAIL because of a
ManagedStatic dependency that's going to be fixed in a seperate commit.
Differential Revision: https://reviews.llvm.org/D72327
The file was modifiedllvm/cmake/modules/AddLLVM.cmake
The file was modifiedllvm/test/lit.cfg.py
The file was modifiedllvm/examples/Bye/CMakeLists.txt
The file was modifiedpolly/lib/CMakeLists.txt
Commit 67bf9a6154d4b82c6c01aad01141bf08c1bbd0f6 by sjoerd.meijer
[SVEV] Recognise hardware-loop intrinsic loop.decrement.reg
Teach SCEV about the @loop.decrement.reg intrinsic, which has exactly
the same semantics as a sub expression. This allows us to query
hardware-loops, which contain this @loop.decrement.reg intrinsic, so
that we can calculate iteration counts, exit values, etc. of
hardwareloops.
This "int_loop_decrement_reg" intrinsic is defined as "IntrNoDuplicate".
Thus, while hardware-loops and tripcounts now become analysable by SCEV,
this prevents the usual loop transformations from applying
transformations on hardware-loops, which is what we want at this point,
for which I have added test cases for loopunrolling and IndVarSimplify
and LFTR.
Differential Revision: https://reviews.llvm.org/D71563
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/unittests/Analysis/ScalarEvolutionTest.cpp
The file was addedllvm/test/Transforms/LoopUnroll/ARM/dont-unroll-loopdec.ll
The file was modifiedllvm/test/Transforms/IndVarSimplify/lftr.ll
Commit 356685a1d8972180f472c1333e8e89dbcc704c1d by sjoerd.meijer
Follow up of 67bf9a6154d4b82c, minor fix in test case, removed duplicate
option
The file was modifiedllvm/test/Transforms/LoopUnroll/ARM/dont-unroll-loopdec.ll
Commit 41f4dfd63ea0fe995ddfba1838aa5ed972cc1377 by jaskiewiczs
[libcxx] Force-cache LIBCXX_CXX_ABI_LIBRARY_PATH
Summary: The `LIBCXX_CXX_ABI_LIBRARY_PATH` CMake variable is cached once
in libcxx/cmake/Modules/HandleLibCXXABI.cmake in the `setup_abi_lib`
macro, and then cached again in libcxx/test/CMakeLists.txt. There, if it
is not set to a value, it is by default set to `LIBCXX_LIBRARY_DIR`.
However, this new value is not actually cached, because the old (empty)
value has been already cached. Use the `FORCE` CMake flag so that it is
saved to the cache.
This should not break anything, because the code changed here previously
had no effect, when it should have.
Reviewers: jroelofs, bcraig, ldionne, EricWF, mclow.lists, vvereschaka,
eastig
Reviewed By: vvereschaka
Subscribers: mgorny, christof, dexonsmith, libcxx-commits
Tags: #libc
Differential Revision: https://reviews.llvm.org/D69169
The file was modifiedlibcxx/test/CMakeLists.txt
Commit e44dedd3631c20bc4a1e62b68919a11168d39354 by jaskiewiczs
[CMake] Support running libc++abi tests in CrossWinToARMLinux cache file
Summary: Now that D71894 has landed, we're able to run libc++abi tests
remotely.
For that we can use the same CMake command as before. The tests can be
run using `ninja check-cxxabi`.
Reviewers: andreil99, vvereschaka, aorlov
Reviewed By: vvereschaka, aorlov
Subscribers: mgorny, kristof.beyls, ldionne, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72459
The file was modifiedclang/cmake/caches/CrossWinToARMLinux.cmake
Commit a1cc19b581443c84fff4c6e6d4e341351ef3203c by sguelton
XFAIL load_extension.ll test on macOS only
Other setup have been fixed by 346de9b67228f42eb9b55fa3b426b5dedfdb1d40
The file was modifiedllvm/test/Feature/load_extension.ll
Commit cfd849840134c4632c2f4fa498dfb93c47825b24 by benny.kra
[MIR] Fix cyclic dependency of MIR formatter
Summary: Move MIR formatter pointer from TargetMachine to
TargetInstrInfo to avoid cyclic dependency between target & codegen.
Reviewers: dsanders, bkramer, arsenm
Subscribers: wdng, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72485
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetInstrInfo.h
The file was modifiedllvm/lib/Target/TargetMachine.cpp
The file was modifiedllvm/lib/CodeGen/MIRParser/MIParser.cpp
The file was modifiedllvm/include/llvm/Target/TargetMachine.h
The file was modifiedllvm/lib/CodeGen/MachineOperand.cpp
The file was modifiedllvm/include/llvm/CodeGen/MachineMemOperand.h
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
The file was modifiedllvm/lib/CodeGen/MIRPrinter.cpp
Commit 498856fca5b9306f545554aeec93c7c058f03eb3 by benny.kra
[LV] Silence unused variable warning in Release builds. NFC.
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 2e66405d8d8ed818cb9310b6c33419bd8d803d96 by llvm-dev
Don't use dyn_cast_or_null if we know the pointer is nonnull.
Fix clang static analyzer null dereference warning by using dyn_cast
instead.
The file was modifiedllvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Commit 3804ac63d5d8443d0b6826b566e9cbb84d8898f3 by llvm-dev
[X86][AVX] Add tests for v8f32/v8i32 089abcde and 0189abcd shuffles
Mentioned in D66004
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
Commit b2cd273416f82b6c5efeb6138276d9e6b6f8256e by llvm-dev
Fix Wdocumentation warning. NFCI.
The file was modifiedllvm/lib/CodeGen/MachineOutliner.cpp
Commit f3849f739e52510871d11361125f0ef239f11603 by llvm-dev
Fix Wdocumentation warning. NFCI.
The file was modifiedclang/lib/Parse/ParseExpr.cpp
Commit 902974277d507a149e33487d32e4ba58c41451b6 by Raphael Isemann
Data formatters: Look through array element typedefs
Summary: Motivation: When formatting an array of typedefed chars, we
would like to display the array as a string.
The string formatter currently does not trigger because the formatter
lookup does not resolve typedefs for array elements (this behavior is
inconsistent with pointers, for those we do look through pointee
typedefs). This patch tries to make the array formatter lookup somewhat
consistent with the pointer formatter lookup.
Reviewers: teemperor, clayborg
Reviewed By: teemperor, clayborg
Subscribers: clayborg, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72133
The file was addedlldb/packages/Python/lldbsuite/test/functionalities/data-formatter/array_typedef/TestArrayTypedef.py
The file was modifiedlldb/source/DataFormatters/FormatManager.cpp
The file was addedlldb/packages/Python/lldbsuite/test/functionalities/data-formatter/array_typedef/main.cpp
The file was modifiedlldb/source/API/SBType.cpp
The file was addedlldb/packages/Python/lldbsuite/test/functionalities/data-formatter/array_typedef/Makefile
The file was modifiedlldb/source/Symbol/ClangASTContext.cpp
Commit 870f6917936fdb8050be3ca3c67d9259390c4326 by llvm-dev
Fix "pointer is null" static analyzer warnings. NFCI.
Assert that the pointers are non-null before dereferencing them.
The file was modifiedllvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
Commit 1ccee0e86386762bd742fd067391b6c4be089806 by simon.tatham
[ARM,MVE] Make `vqrshrun` generate the right instruction.
Summary: A copy-paste error in `arm_mve.td` meant that the MVE
`vqrshrun` intrinsic family was generating the `vqshrun` machine
instruction, because in the IR intrinsic call, the rounding flag
argument was set to 0 rather than 1.
Reviewers: dmgreen, MarkMurrayARM, miyuki, ostannard
Reviewed By: dmgreen
Subscribers: kristof.beyls, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72496
The file was modifiedclang/include/clang/Basic/arm_mve.td
The file was modifiedclang/test/CodeGen/arm-mve-intrinsics/vector-shift-imm-dyadic.c
Commit 8c12769f3046029e2a9b4e48e1645b1a77d28650 by diogo.sampaio
[ARM][Thumb2] Fix ADD/SUB invalid writes to SP
Summary: This patch fixes pr23772  [ARM] r226200 can emit illegal thumb2
instruction: "sub sp, r12, #80". The violation was that SUB and ADD
(reg, immediate) instructions can only write to SP if the source
register is also SP. So the above instructions was unpredictable. To
enforce that the instruction t2(ADD|SUB)ri does not write to SP we now
enforce the destination register to be rGPR (That exclude PC and SP).
Different than the ARM specification, that defines one instruction that
can read from SP, and one that can't, here we inserted one that can't
write to SP, and other that can only write to SP as to reuse most of the
hard-coded size optimizations. When performing this change, it uncovered
that emitting Thumb2 Reg plus Immediate could not emit all variants of
ADD SP, SP #imm instructions before so it was refactored to be able to.
(see test/CodeGen/Thumb2/mve-stacksplot.mir where we use a subw sp, sp,
Imm12 variant ) It also uncovered a disassembly issue of adr.w
instructions, that were only written as SUBW instructions (see
llvm/test/MC/Disassembler/ARM/thumb2.txt).
Reviewers: eli.friedman, dmgreen, carwil, olista01, efriedma
Reviewed By: efriedma
Subscribers: john.brawn, efriedma, ostannard, kristof.beyls, hiraditya,
dmgreen, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70680
The file was modifiedllvm/test/MC/ARM/thumb-diagnostics.s
The file was addedllvm/test/CodeGen/Thumb2/bug-subw.ll
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-arithmetic-ops.mir
The file was modifiedllvm/test/CodeGen/Thumb2/fp16-stacksplot.mir
The file was modifiedllvm/test/CodeGen/Thumb2/peephole-addsub.mir
The file was modifiedllvm/test/MC/Disassembler/ARM/thumb2-v8.txt
The file was modifiedllvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb2.td
The file was modifiedllvm/test/MC/ARM/register-token-source-loc.s
The file was modifiedllvm/test/MC/Disassembler/ARM/thumb2.txt
The file was modifiedllvm/test/MC/Disassembler/ARM/invalid-thumbv7.txt
The file was modifiedllvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
The file was modifiedllvm/test/MC/ARM/invalid-addsub.s
The file was modifiedllvm/test/MC/ARM/negative-immediates.s
The file was modifiedllvm/test/MC/Disassembler/ARM/thumb-tests.txt
The file was modifiedllvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-stacksplot.mir
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/peephole-cmp.mir
The file was modifiedllvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
The file was modifiedllvm/lib/Target/ARM/Thumb2InstrInfo.cpp
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-load-store.mir
The file was modifiedllvm/lib/Target/ARM/ARMAsmPrinter.cpp
The file was modifiedllvm/test/MC/ARM/basic-thumb2-instructions.s
Commit 5b7612792aeb5b161fdd69997db2a64b08f075b6 by pavel
[lldb/lua] Make convenience_variables.test compatible with lua-5.1
The file was modifiedlldb/test/Shell/ScriptInterpreter/Lua/convenience_variables.test
Commit e65282deca8455d1cc6d83b7016af9aa374f9f89 by pavel
[lldb/DWARF] Don't automatically search dwo unit attributes
This patch removes the code (deep inside DWARFDebugInfoEntry) which
automagically returned the attributes of the dwo unit DIE when asking
for the attributes of the skeleton unit.  This is fairly hacky, and not
consistent with how llvm DWARF parser operates.
Instead, I change the code the explicitly request (via
GetNonSkeletonUnit) the right unit to search (there were just two places
that needed this). If it turns out we need this more often, we can
create a utility function (external to DWARFUnit) for doing this.
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
Commit 57a51b689e7b99c694a028104b0b5a69b80fd002 by ibiryukov
[CodeComplete] Suggest 'return nullptr' in functions returning pointers
Reviewers: kadircet
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72497
The file was modifiedclang/test/CodeCompletion/patterns.cpp
The file was modifiedclang/lib/Sema/SemaCodeComplete.cpp
Commit c88e298b69409e35e35ab601592197f5a2bc1c30 by pavel
[lldb] Surpress "bitfield too small" gcc warning
Gcc produces this (technically correct) warning when storing an
explicitly-sized enum in a bitfield. Surpress that by changing the type
of the bitfield to an integer. The same approach is used elsewhere in
llvm (e.g. 56b5eab12).
The file was modifiedlldb/include/lldb/Symbol/DebugMacros.h
Commit 564481aebe18a723c9cfe9ea9ca5808771f7e9d8 by andrew.ng
[Support] ThreadPoolExecutor fixes for Windows/MinGW
Changed ThreadPoolExecutor to no longer use detached threads and instead
to join threads on destruction. This is to prevent intermittent crashing
on Windows when doing a normal full exit, e.g. via exit().
Changed ThreadPoolExecutor to be a ManagedStatic so that it can be
stopped on llvm_shutdown(). Without this, it would only be stopped in
the destructor when doing a full exit. This is required to avoid
intermittent crashing on Windows due to a race condition between the
ThreadPoolExecutor starting up threads and the process doing a fast
exit, e.g. via _exit().
The Windows crashes appear to only occur with the MSVC static runtimes
and are more frequent with the debug static runtime.
These changes also prevent intermittent deadlocks on exit with the MinGW
runtime.
Differential Revision: https://reviews.llvm.org/D70447
The file was modifiedllvm/lib/Support/Parallel.cpp
The file was modifiedlld/Common/ErrorHandler.cpp
Commit e4d672971030fe26dbb8237038038c3ff9ae7541 by Tatyana Krasnukha
[lldb][tests] Take into account all parent's categories when traverse
folders upwards
This is needed to not re-write parent's categories by categories of a
nested folder, e.g. commands/expression/completion specify "cmdline"
category, however it still belongs to parent's "expression" category.
The sentinel ".categories" in the test-suite root directory is no longer
needed.
Differential Revision: https://reviews.llvm.org/D71905
The file was modifiedlldb/packages/Python/lldbsuite/test/test_result.py
The file was removedlldb/packages/Python/lldbsuite/test/.categories
Commit 9ba151274869c377921a09ba0bd635412da755ef by Tatyana Krasnukha
[lldb][test] NFC, re-use _getTestPath() function
The file was modifiedlldb/packages/Python/lldbsuite/test/test_result.py
Commit 76e9c2a9870e36415eb343d28942a42296f85597 by ulrich.weigand
[FPEnv] Generate constrained FP comparisons from clang
Update the IRBuilder to generate constrained FP comparisons in
CreateFCmp when IsFPConstrained is true, similar to the other places in
the IRBuilder.
Also, add a new CreateFCmpS to emit signaling FP comparisons, and use it
in clang where comparisons are supposed to be signaling
(currently, only when emitting code for the <, <=, >, >= operators).
Note that there is currently no way to add fast-math flags to a
constrained FP comparison, since this is implemented as an intrinsic
call that returns a boolean type, and FMF are only allowed for calls
returning a floating-point type. However, given the discussion around
https://bugs.llvm.org/show_bug.cgi?id=42179, it seems that FCmp itself
really shouldn't have any FMF either, so this is probably OK.
Reviewed by: craig.topper
Differential Revision: https://reviews.llvm.org/D71467
The file was addedclang/test/CodeGen/fpconstrained-cmp-float.c
The file was modifiedclang/lib/CodeGen/CGExprScalar.cpp
The file was modifiedllvm/include/llvm/IR/IRBuilder.h
The file was addedclang/test/CodeGen/fpconstrained-cmp-double.c
Commit b3af8ab7f83c2a825c584ddedf5cc9207ca66b44 by Tatyana Krasnukha
[lldb][tests] Cleanup '.categories'
The file was addedlldb/packages/Python/lldbsuite/test/commands/command/.categories
The file was removedlldb/packages/Python/lldbsuite/test/commands/command/script/.categories
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-objc/.categories
The file was removedlldb/packages/Python/lldbsuite/test/commands/command/script_alias/.categories
The file was removedlldb/packages/Python/lldbsuite/test/commands/command/source/.categories
The file was removedlldb/packages/Python/lldbsuite/test/commands/command/history/.categories
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/no-deadlock/.categories
Commit b1bb5ce96d349689085eab38121c85737de1fcaa by diogo.sampaio
Reverting, broke some bots. Need further investigation.
Summary: This reverts commit 8c12769f3046029e2a9b4e48e1645b1a77d28650.
Reviewers:
Subscribers:
The file was modifiedllvm/test/CodeGen/Thumb2/peephole-cmp.mir
The file was modifiedllvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
The file was modifiedllvm/test/MC/ARM/negative-immediates.s
The file was removedllvm/test/CodeGen/Thumb2/bug-subw.ll
The file was modifiedllvm/lib/Target/ARM/ARMAsmPrinter.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-stacksplot.mir
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-load-store.mir
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-arithmetic-ops.mir
The file was modifiedllvm/lib/Target/ARM/Thumb2InstrInfo.cpp
The file was modifiedllvm/test/MC/ARM/invalid-addsub.s
The file was modifiedllvm/test/MC/ARM/thumb-diagnostics.s
The file was modifiedllvm/test/MC/Disassembler/ARM/thumb2-v8.txt
The file was modifiedllvm/test/MC/Disassembler/ARM/thumb2.txt
The file was modifiedllvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir
The file was modifiedllvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
The file was modifiedllvm/test/MC/ARM/basic-thumb2-instructions.s
The file was modifiedllvm/test/MC/ARM/register-token-source-loc.s
The file was modifiedllvm/test/CodeGen/Thumb2/peephole-addsub.mir
The file was modifiedllvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/fp16-stacksplot.mir
The file was modifiedllvm/test/MC/Disassembler/ARM/invalid-thumbv7.txt
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb2.td
The file was modifiedllvm/test/MC/Disassembler/ARM/thumb-tests.txt
Commit e49c3c8f2ef97bdf256ca76f3d001eeb79361d56 by benny.kra
Sprinkle some constexpr on default ctors so the compiler can diagnose
unused instances. NFCI.
The file was modifiedmlir/include/mlir/IR/Types.h
The file was modifiedmlir/lib/Dialect/VectorOps/VectorOps.cpp
The file was modifiedmlir/include/mlir/IR/Attributes.h
The file was modifiedmlir/include/mlir/IR/Value.h
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVOps.cpp
Commit 4569f63ae1cb520ce28f08f4800dfbcd5f255eed by sjoerd.meijer
ARMLowOverheadLoops: a few more dbg msgs to better trace rejected TP
loops. NFC.
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
Commit 2f2f41e12c5201b600d887d22ce5cb4afd2ff594 by jan.kratochvil
RangeDataVector: Support custom sorting for D63540
As suggested by @labath extended RangeDataVector so that user can
provide custom sorting of the Entry's `data' field for D63540.
       https://reviews.llvm.org/D63540
RangeData functions were used just by RangeDataVector (=after I removed
them LLDB still builds fine) which no longer uses them so I removed
them.
Differential revision: https://reviews.llvm.org/D72460
The file was modifiedlldb/unittests/Utility/RangeMapTest.cpp
The file was modifiedlldb/include/lldb/Utility/RangeMap.h
Commit 3772ea9dd9368cfdc73595854c143bc3f16a5ade by sam.parker
[ARM][MVE] Tail predicate VMAX,VMAXA,VMIN,VMINA
Add the MVE min and max instructions to our tail predication whitelist.
Differential Revision: https://reviews.llvm.org/D72502
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
The file was modifiedllvm/unittests/Target/ARM/MachineInstrTest.cpp
Commit f0fd11df7d5488e2747f26a3bfcf62459fee54ad by ulrich.weigand
[FPEnv] Invert sense of MIFlag::FPExcept flag
In D71841 we inverted the sense of the SDNode-level flag to ensure all
nodes default to potentially raising FP exceptions unless otherwise
specified -- i.e. if we forget to propagate the flag somewhere, the
effect is now only lost performance, not incorrect code.
However, the related flag at the MI level still defaults to nodes not
raising FP exceptions unless otherwise specified. To be fully on the
(conservatively) safe side, we should invert that flag as well.
This patch does so by replacing MIFlag::FPExcept with
MIFlag::NoFPExcept.
(Note that this does also introduce an incompatible change in the MIR
format.)
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D72466
The file was modifiedllvm/test/CodeGen/X86/fp-intrinsics-flags-x86_64.ll
The file was modifiedllvm/test/CodeGen/X86/sqrt-fastmath-mir.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZElimCompare.cpp
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.h
The file was modifiedllvm/test/CodeGen/X86/fp-intrinsics-flags.ll
The file was modifiedllvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-flags.ll
The file was modifiedllvm/include/llvm/CodeGen/MachineInstr.h
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.cpp
The file was modifiedllvm/lib/CodeGen/MIRPrinter.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
The file was modifiedllvm/test/CodeGen/X86/fast-isel-select-sse.ll
The file was modifiedllvm/lib/CodeGen/MIRParser/MIParser.cpp
Commit e20a3b9b6c028ef3fea92ddb19e98db45e3d0509 by Tatyana Krasnukha
[lldb][tests][NFC] Unify variable naming convention
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbtest.py
The file was modifiedlldb/packages/Python/lldbsuite/test/configuration.py
The file was modifiedlldb/packages/Python/lldbsuite/test/dotest.py
The file was modifiedlldb/packages/Python/lldbsuite/test/dotest_args.py
The file was modifiedlldb/packages/Python/lldbsuite/test/test_result.py
Commit 3eea082535e232b35e6b2dab45dd81728b2ae7f4 by Tatyana Krasnukha
[lldb][tests] Make it possible to expect failure for a whole category
There already are decorators and "--excluded" option to mark
test-cases/files as expected to fail. However, when a new test file is
added and it which relates to a feature that a target doesn't support,
this requires either adding decorators to that file or modifying the
file provided as "--excluded" option value.
The purpose of this patch is to avoid any modifications in such cases.
E.g. if a target doesn't support "watchpoints" and passes
"--xfail-category watchpoint" to dotest, a testing job will not fail
after a new watchpoint-related test file is added.
Differential Revision: https://reviews.llvm.org/D71906
The file was modifiedlldb/packages/Python/lldbsuite/test/dotest_args.py
The file was modifiedlldb/packages/Python/lldbsuite/test/configuration.py
The file was modifiedlldb/packages/Python/lldbsuite/test/test_result.py
The file was modifiedlldb/packages/Python/lldbsuite/test/dotest.py
Commit bac995d97896c1e785d709da24c55f0e050eb899 by arsenm2
AMDGPU/GlobalISel: Clamp G_ZEXT source sizes
Also clamps G_SEXT/G_ANYEXT, but the implementation is more limited so
fewer cases actually work.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptrtoint.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
Commit b19c0810e56b552d31247dcff081643799fd97fb by a.bataev
[LIBOMPTARGET]Ignore empty target descriptors.
Summary: If the dynamically loaded module has been compiled with
-fopenmp-targets and has no target regions, it has empty target
descriptor. It leads to a crash at the runtime if another module has at
least one target region and at least one entry in its descriptor. The
runtime library is unable to load the empty binary descriptor and
terminates the execution. Caused by a clang-offload-wrapper.
Reviewers: grokos, jdoerfert
Subscribers: caomhin, kkwli0, openmp-commits
Tags: #openmp
Differential Revision: https://reviews.llvm.org/D72472
The file was addedopenmp/libomptarget/test/offloading/dynamic_module.c
The file was modifiedopenmp/libomptarget/src/rtl.cpp
Commit 6e3ca962fafb3d2a31279c49f0cde60eb626a002 by jh7370
[DebugInfo] Improve error message text
Unlike most of our errors in the debug line parser, the "no end of
sequence" message was missing any reference to which line table it
refererred to. This change adds the offset to this message.
Reviewed by: dblaikie
Differential Revision: https://reviews.llvm.org/D72443
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/debug_line_invalid.test
The file was modifiedlld/test/ELF/undef.s
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
The file was modifiedllvm/unittests/DebugInfo/DWARF/DWARFDebugLineTest.cpp
Commit 7e02406f6cf180a8c89ce64665660e7cc9dbc23e by jh7370
[DebugInfo][NFC] Remove unused variable/fix variable naming
Reviewed by: MaskRay
Differential Revision: https://reviews.llvm.org/D72159
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
Commit cdd05f2aea3b950a4e2c496175117e6b47b2a050 by development
[NFC] format unittest for ExprMutAnalyzer
This formatting is a preparation for review in
https://reviews.llvm.org/D54943 to separate pure formatting changes from
actual testing changes.
The file was modifiedclang/unittests/Analysis/ExprMutationAnalyzerTest.cpp
Commit d864d93496c5fd0cc473953ab825f07e3d4c4e86 by nemanja.i.ibm
[PowerPC] Handle constant zero bits in BitPermutationSelector
We currently crash when analyzing an AssertZExt node that has some bits
that are constant zeros (i.e. as a result of an and with a constant).
This issue was reported in https://bugs.llvm.org/show_bug.cgi?id=41088
and this patch fixes that.
Differential revision: https://reviews.llvm.org/D72038
The file was modifiedllvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
The file was addedllvm/test/CodeGen/PowerPC/pr41088.ll
Commit bdd88b7ed3956534a0a71b1ea2bc88c69d48f9b7 by David.Chisnall
Add support for __declspec(guard(nocf))
Summary: Avoid using the `nocf_check` attribute with Control Flow Guard.
Instead, use a new `"guard_nocf"` function attribute to indicate that
checks should not be added on indirect calls within that function. Add
support for
`__declspec(guard(nocf))` following the same syntax as MSVC.
Reviewers: rnk, dmajor, pcc, hans, aaron.ballman
Reviewed By: aaron.ballman
Subscribers: aaron.ballman, tomrittervg, hiraditya, cfe-commits,
llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D72167
The file was addedclang/test/CodeGenCXX/guard_nocf.cpp
The file was modifiedllvm/test/CodeGen/AArch64/cfguard-checks.ll
The file was modifiedclang/include/clang/Basic/AttrDocs.td
The file was modifiedclang/lib/CodeGen/CGCall.cpp
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was modifiedllvm/lib/Transforms/CFGuard/CFGuard.cpp
The file was modifiedllvm/test/CodeGen/ARM/cfguard-checks.ll
The file was modifiedclang/include/clang/Basic/Attr.td
The file was modifiedllvm/test/CodeGen/X86/cfguard-checks.ll
The file was addedclang/test/CodeGen/guard_nocf.c
The file was addedclang/test/Sema/attr-guard_nocf.c
Commit e9331a56fead1823d528d6412828fb9e16fd62ff by Adrian Prantl
Add missing nullptr checks.
GetPersistentExpressionStateForLanguage() can return a nullptr if it
cannot construct a typesystem. This patch adds missing nullptr checks at
all uses.
Inspired by rdar://problem/58317195
Differential Revision: https://reviews.llvm.org/D72413
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
The file was modifiedlldb/source/Expression/REPL.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ASTResultSynthesizer.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionSourceCode.cpp
The file was modifiedlldb/source/Target/ABI.cpp
The file was modifiedlldb/source/Expression/UserExpression.cpp
Commit 5e7beb0a4146267f1d65c57543e67ca158aca4aa by gabor.marton
[analyzer] Add PlacementNewChecker
Summary: This checker verifies if default placement new is provided with
pointers to sufficient storage capacity.
Noncompliant Code Example:
#include <new>
void f() {
   short s;
   long *lp = ::new (&s) long;
}
Based on SEI CERT rule MEM54-CPP
https://wiki.sei.cmu.edu/confluence/display/cplusplus/MEM54-CPP.+Provide+placement+new+with+properly+aligned+pointe
This patch does not implement checking of the alignment.
Reviewers: NoQ, xazax.hun
Subscribers: mgorny, whisperity, xazax.hun, baloghadamsoftware, szepet,
rnkovacs, a.sidorin, mikhail.ramalho, donat
Tags: #clang
Differential Revision: https://reviews.llvm.org/D71612
The file was modifiedclang/include/clang/StaticAnalyzer/Checkers/Checkers.td
The file was addedclang/lib/StaticAnalyzer/Checkers/CheckPlacementNew.cpp
The file was addedclang/test/Analysis/placement-new.cpp
The file was modifiedclang/docs/analyzer/checkers.rst
The file was modifiedclang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
The file was addedclang/test/Analysis/placement-new-user-defined.cpp
Commit 0b032d7ba7157b62cd0d39f8d2dc0b0efa57a710 by antiagainst
[mlir][spirv] Fix typos related to (de)serialization.
Fix typos related to (de)serialization of spv.selection.
Differential Revision: https://reviews.llvm.org/D72503
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/Serializer.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/Deserializer.cpp
Commit 26cdaeb1f05ba140011a43ef1ea8a37d3cf416d9 by spatel
[InstCombine] add tests for fsub; NFC
Conflicting/missing canonicalizations are visible in PR44509:
https://bugs.llvm.org/show_bug.cgi?id=44509
The file was modifiedllvm/test/Transforms/InstCombine/fsub.ll
Commit fbb64aa69835c8e3e9efe0afc8a73058b5a0fb3c by yhs
[BPF] extend BTF_KIND_FUNC to cover global, static and extern funcs
Previously extern function is added as BTF_KIND_VAR. This does not work
well with existing BTF infrastructure as function expected to use
BTF_KIND_FUNC and BTF_KIND_FUNC_PROTO.
This patch added extern function to BTF_KIND_FUNC. The two bits 0:1 of
btf_type.info are used to indicate what kind of function it is:
0: static
1: global
2: extern
Differential Revision: https://reviews.llvm.org/D71638
The file was addedllvm/test/CodeGen/BPF/BTF/extern-builtin.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-global-var.ll
The file was modifiedllvm/lib/Target/BPF/BTFDebug.cpp
The file was modifiedllvm/lib/Target/BPF/BTF.h
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-multilevel.ll
The file was modifiedllvm/lib/Target/BPF/BTFDebug.h
The file was modifiedllvm/test/CodeGen/BPF/BTF/func-void.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-var-section.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-var-weak-section.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/static-var-readonly.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/local-var.ll
The file was addedllvm/test/CodeGen/BPF/BTF/static-func.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-struct-anonymous.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/static-var-inited-sec.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-var-func-weak.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/func-func-ptr.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/filename.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-basic.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/binary-format.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/static-var-readonly-sec.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/static-var-sec.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/func-source.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/func-typedef.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-var-struct-weak.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/static-var-zerolen-array.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-var-func-weak-section.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/static-var-inited.ll
The file was addedllvm/test/CodeGen/BPF/BTF/extern-func-arg.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-var-func.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/static-var.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/static-var-derived-type.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-struct-array.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/func-non-void.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-union.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/extern-var-struct.ll
The file was modifiedllvm/test/CodeGen/BPF/BTF/func-unused-arg.ll
Commit 4c5a4514d14537cae5459e03d1fea422664b3bc2 by sam.mccall
[clangd] Fix targetDecl() on certain usage of ObjC properties.
Summary: In particular there's a common chain:

OpaqueValueExpr->PseudoObjectExpr->ObjCPropertyRefExpr->ObjCPropertyDecl
and we weren't handling the first two edges
Reviewers: dgoldman, kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, jfb, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72494
The file was modifiedclang-tools-extra/clangd/FindTarget.cpp
The file was modifiedclang-tools-extra/clangd/unittests/FindTargetTests.cpp
Commit 504b3fe5bfed7ea24c7c74f563ef6a8214e24223 by llvmgnsyncbot
[gn build] Port 5e7beb0a414
The file was modifiedllvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Commit a5bdada09defc15d2b009314306f4fcb8fa8458d by llvm-dev
[X86][AVX] lowerShuffleAsLanePermuteAndShuffle - consistently normalize
multi-input shuffle elements
We only use lowerShuffleAsLanePermuteAndShuffle for unary shuffles at
the moment, but we should consistently handle lane index calculations
for multiple inputs in both the AVX1 and AVX2 paths.
Minor (almost NFC) tidyup as I'm hoping to use
lowerShuffleAsLanePermuteAndShuffle for binary shuffles soon.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit cdc9592bf1acb6d8012a4867d2a22458945dcceb by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
Use cast<> instead of dyn_cast<> since we know that the pointer should
be valid (and is dereferenced immediately).
The file was modifiedclang/lib/ARCMigrate/ObjCMT.cpp
Commit cce4676d6d78ba56e929bd37d65c2667390b68c7 by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately below and castAs will perform the null assertion for us.
The file was modifiedclang/lib/ARCMigrate/ObjCMT.cpp
Commit ff92e469caefff9f86e5e812c08b9bba582be5d3 by inouehrs
[examples] Add missing dependency in llvm examples
To fix build failure with BUILD_SHARED_LIBS=ON
The file was modifiedllvm/examples/LLJITExamples/LLJITWithCustomObjectLinkingLayer/CMakeLists.txt
The file was modifiedllvm/examples/Kaleidoscope/BuildingAJIT/Chapter5/Server/CMakeLists.txt
The file was modifiedllvm/examples/Kaleidoscope/BuildingAJIT/Chapter5/CMakeLists.txt
Commit dfed052fb3ecef53bf01612ec3fc7df73c2134b7 by jasonliu
[AIX] Allow vararg calls when all arguments reside in registers
Summary: This patch pushes the AIX vararg unimplemented error diagnostic
later and allows vararg calls so long as all the arguments can be passed
in register. This patch extends the AIX calling convention
implementation to initialize GPR(s) for vararg float arguments. On AIX,
both GPR(s) and FPR are allocated for floating point arguments. The
GPR(s) are only initialized for vararg calls, otherwise the callee is
expected to retrieve the float argument in the FPR.
f64 in AIX PPC32 requires special handling in order to allocated and
initialize 2 GPRs. This is performed with bitcast, SRL, truncation to
initialize one GPR for the MSW and bitcast, truncations to initialize
the other GPR for the LSW.
A future patch will follow to add support for arguments passed on the
stack.
Patch provided by: cebowleratibm
Reviewers: sfertile, ZarkoCA, hubert.reinterpretcast
Differential Revision: https://reviews.llvm.org/D71013
The file was removedllvm/test/CodeGen/PowerPC/aix_cc_abi.ll
The file was addedllvm/test/CodeGen/PowerPC/aix-cc-abi.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was addedllvm/test/CodeGen/PowerPC/aix-cc-altivec.ll
Commit fd8ded99fe6e9fcae2c98ccad25d6562c5fa8a14 by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately below and castAs will perform the null assertion for us.
The file was modifiedclang/lib/CodeGen/CGVTables.cpp
Commit 4d1e23e3b3cd7c72a8b24dc5acb7e13c58a8de37 by maskray
[AArch64] Add function attribute "patchable-function-entry" to add NOPs
at function entry
The Linux kernel uses -fpatchable-function-entry to implement
DYNAMIC_FTRACE_WITH_REGS for arm64 and parisc. GCC 8 implemented
-fpatchable-function-entry, which can be seen as a generalized form of
-mnop-mcount. The N,M form (function entry points before the Mth NOP) is
currently only used by parisc.
This patch adds N,0 support to AArch64 codegen. N is represented as the
function attribute "patchable-function-entry". We will use a different
function attribute for M, if we decide to implement it.
The patch reuses the existing patchable-function pass, and
TargetOpcode::PATCHABLE_FUNCTION_ENTER which is currently used by XRay.
When the integrated assembler is used, __patchable_function_entries will
be created for each text section with the SHF_LINK_ORDER flag to prevent
--gc-sections (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93197) and
COMDAT (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93195) issues.
Retrospectively, __patchable_function_entries should use a PC-relative
relocation type to avoid the SHF_WRITE flag and dynamic relocations.
"patchable-function-entry"'s interaction with Branch Target
Identification is still unclear (see
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92424 for GCC discussions).
Reviewed By: peter.smith
Differential Revision: https://reviews.llvm.org/D72215
The file was modifiedllvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
The file was addedllvm/test/Verifier/invalid-patchable-function-entry.ll
The file was modifiedllvm/include/llvm/CodeGen/AsmPrinter.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/lib/CodeGen/PatchableFunction.cpp
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was addedllvm/test/CodeGen/AArch64/patchable-function-entry.ll
Commit a8fbdc576990653e92ce1d766659005678fd8514 by maskray
[X86] Support function attribute "patchable-function-entry"
For x86-64, we diverge from GCC -fpatchable-function-entry in that we
emit multi-byte NOPs.
Differential Revision: https://reviews.llvm.org/D72220
The file was addedllvm/test/CodeGen/X86/patchable-function-entry.ll
The file was modifiedllvm/lib/Target/X86/X86MCInstLower.cpp
Commit a44c434b68e515ce9f2627367c83ff6b22328261 by maskray
Support function attribute patchable_function_entry
This feature is generic. Make it applicable for AArch64 and X86 because
the backend has only implemented NOP insertion for AArch64 and X86.
Reviewed By: nickdesaulniers, aaron.ballman
Differential Revision: https://reviews.llvm.org/D72221
The file was modifiedclang/lib/CodeGen/CodeGenFunction.cpp
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was addedclang/test/CodeGen/patchable-function-entry.c
The file was modifiedclang/include/clang/Basic/AttrDocs.td
The file was modifiedclang/include/clang/Basic/Attr.td
The file was addedclang/test/Sema/patchable-function-entry-attr.c
The file was modifiedclang/test/Misc/pragma-attribute-supported-attributes-list.test
The file was addedclang/test/Sema/patchable-function-entry-attr.cpp
Commit f17ae668a96eeb69f0664f126cf672e1a05754d2 by maskray
[Driver][CodeGen] Add -fpatchable-function-entry=N[,0]
In the backend, this feature is implemented with the function attribute
"patchable-function-entry". Both the attribute and XRay use
TargetOpcode::PATCHABLE_FUNCTION_ENTER, so the two features are
incompatible.
Reviewed By: ostannard, MaskRay
Differential Revision: https://reviews.llvm.org/D72222
The file was modifiedclang/include/clang/Basic/DiagnosticDriverKinds.td
The file was modifiedclang/include/clang/Basic/CodeGenOptions.def
The file was addedclang/test/Driver/fpatchable-function-entry.c
The file was modifiedclang/lib/Driver/XRayArgs.cpp
The file was modifiedclang/lib/CodeGen/CodeGenFunction.cpp
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/test/CodeGen/patchable-function-entry.c
The file was modifiedclang/include/clang/Driver/Options.td
Commit 2d077d6dfa7909a21293ebdac81488367628e0fa by maskray
[ELF] Make TargetInfo::writeIgotPlt a no-op
RELA targets don't read initial .got.plt entries. REL targets (ARM,
x86-32) write the address of the IFUNC resolver to the entry
(`write32le(buf, s.getVA())`).
The default writeIgotPlt() is not meaningful. Make it a no-op. AArch64
and x86-64 will have 0 as initial .got.plt entries associated with
IFUNC.
Reviewed By: peter.smith
Differential Revision: https://reviews.llvm.org/D72474
The file was modifiedlld/test/ELF/aarch64-gnu-ifunc-plt.s
The file was modifiedlld/test/ELF/gnu-ifunc-plt.s
The file was modifiedlld/ELF/Target.cpp
The file was modifiedlld/ELF/Target.h
Commit f678fc7660b36ce0ad6ce4f05eaa28f3e9fdedb5 by craig.topper
[LegalizeVectorOps] Improve handling of multi-result operations.
This system wasn't very well designed for multi-result nodes. As a
consequence they weren't consistently registered in the LegalizedNodes
map leading to nodes being revisited for different results.
I've removed the "Result" variable from the main LegalizeOp method and
used a SDNode* instead. The result number from the incoming Op SDValue
is only used for deciding which result to return to the caller. When
LegalizeOp is called it should always register a legalized result for
all of its results. Future calls for any other result should be pulled
for the LegalizedNodes map.
Legal nodes will now register all of their results in the map instead of
just the one we were called for.
The Expand and Promote handling to use a vector of results similar to
LegalizeDAG. Each of the new results is then re-legalized and logged in
the LegalizedNodes map for all of the Results for the node being
legalized. None of the handles register their own results now. And none
call ReplaceAllUsesOfValueWith now.
Custom handling now always passes result number 0 to LowerOperation.
This matches what LegalizeDAG does. Since the introduction of STRICT
nodes, I've encountered several issues with X86's custom handling being
called with an SDValue pointing at the chain and our custom handlers
using that to get a VT instead of result 0. This should prevent us from
having any more of those issues. On return we will update the
LegalizedNodes map for all results so we shouldn't call the custom
handler again for each result number.
I want to push SDNode* further into the Expand and Promote handlers, but
I've left that for a follow to keep this patch size down. I've created a
dummy SDValue(Node, 0) to keep the handlers working.
Differential Revision: https://reviews.llvm.org/D72224
The file was modifiedllvm/test/CodeGen/X86/avx512-cmp.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
Commit ef239972614cc3c67006f9c298fcfa841818dc77 by Raphael Isemann
[lldb] Remove FieldDecl stealing hack by rerouting indirect imports to
the original AST
Summary: This is a port of D67803 that was about preventing indirect
importing to our scratch context when evaluating expressions.
D67803 already has a pretty long explanation of how this works, but the
idea is that instead of importing declarations indirectly over the
expression AST (i.e., Debug info AST -> Expression AST -> scratch AST)
we instead directly import the declaration from the debug info AST to
the scratch AST.
The difference from D67803 is that here we have to do this in the
ASTImporterDelegate (which is our ASTImporter subclass we use in LLDB).
It has the same information as the ExternalASTMerger in D67803 as it can
access the ClangASTImporter (which also keeps track of where Decls
originally came from).
With this patch we can also delete the FieldDecl stealing hack in the
ClangASTSource (this was only necessary as the indirect imports caused
the creation of duplicate Record declarations but we needed the fields
in the Record decl we originally found in the scratch ASTContext).
This also fixes the current gmodules failures where we fail to find
std::vector fields after an indirect import over the expression AST
(where it seems even our FieldDecl stealing hack can't save us from).
Reviewers: shafik, aprantl
Reviewed By: shafik
Subscribers: JDevlieghere, lldb-commits, mib, labath, friss
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72507
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp
The file was modifiedlldb/source/Symbol/ClangASTImporter.cpp
Commit 572b9f468ad6844795fec29a7e671ba64d82e8c2 by Jonas Devlieghere
[lldb/Lua] Support loading Lua modules
Implements the command script import command for Lua.
Differential revision: https://reviews.llvm.org/D71825
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Lua/ScriptInterpreterLua.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Lua/ScriptInterpreterLua.h
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp
The file was addedlldb/test/Shell/ScriptInterpreter/Lua/Inputs/testmodule.lua
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Lua/Lua.h
The file was addedlldb/test/Shell/ScriptInterpreter/Lua/command_script_import.test
Commit a5230ac10b0dac9a1981838209b4cbc84870c08c by daniel_l_sanders
Update the attribution policy to use the 'Author' property of a git
commit
Summary: The older method of adding 'Patch by John Doe' is documented in
the
`Attribution of Changes` section to support correct attribution of
commits that pre-date the adoption of git.
Reviewers: hfinkel, aaron.ballman, mehdi_amini
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72468
The file was modifiedllvm/docs/DeveloperPolicy.rst
Commit 13ec473b9d4bd4f7a558272932b7c0806171c666 by gabor.marton
[analyzer] Move PlacementNewChecker to alpha
The file was modifiedclang/include/clang/StaticAnalyzer/Checkers/Checkers.td
The file was modifiedclang/test/Analysis/placement-new-user-defined.cpp
The file was modifiedclang/test/Analysis/placement-new.cpp
Commit b590e0fd810e4caf59ab83b04654d42e18faaafb by craig.topper
[TargetLowering][ARM][X86] Change softenSetCCOperands handling of ONE to
avoid spurious exceptions for QNANs with strict FP quiet compares
ONE is currently softened to OGT | OLT. But the libcalls for OGT and OLT
libcalls will trigger an exception for QNAN. At least for X86 with
libgcc. UEQ on the other hand uses UO | OEQ. The UO and OEQ libcalls
will not trigger an exception for QNAN.
This patch changes ONE to use the inverse of the UEQ lowering. So we now
produce O & UNE. Technically the existing behavior was correct for a
signalling ONE, but since I don't know how to generate one of those from
clang that seemed like something we can deal with later as we would need
to fix other predicates as well. Also removing spurious exceptions
seemed better than missing an exception.
There are also problems with quiet OGT/OLT/OLE/OGE, but those are harder
to fix.
Differential Revision: https://reviews.llvm.org/D72477
The file was modifiedllvm/test/CodeGen/X86/fp128-compare.ll
The file was modifiedllvm/test/CodeGen/X86/fp128-libcalls-strict.ll
The file was modifiedllvm/test/CodeGen/Thumb2/float-cmp.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/fpcmp-soft-fp.ll
Commit 9cd985815abf88bd77bb67f7b9cc80f2032cbbc7 by sbc
[lld][WebAssembly] Add libcall symbols to the link when LTO is being
used.
This code is copied almost verbatim from the equivalent change to the
ELF linker:
- https://reviews.llvm.org/D50017
- https://reviews.llvm.org/D50475
The upshot is that libraries containing libcall (such as compiler-rt and
libc) can be compiled with LTO.
Fixes PR41384
Differential Revision: https://reviews.llvm.org/D71738
The file was addedlld/test/wasm/lto/libcall-archive.ll
The file was modifiedlld/wasm/Driver.cpp
The file was modifiedlld/wasm/InputFiles.h
The file was modifiedlld/wasm/Symbols.h
The file was addedlld/test/wasm/lto/Inputs/libcall-archive.ll
The file was modifiedlld/wasm/Symbols.cpp
Commit 815a3f54331c39f2b400776f448dd29b3b03243b by Jonas Devlieghere
[CMake] Fix modules build after DWARFLinker reorganization
Create a dedicate module for the DWARFLinker and make it depend on
intrinsics gen.
The file was modifiedllvm/lib/DWARFLinker/CMakeLists.txt
The file was modifiedllvm/include/llvm/module.modulemap
Commit f28972facc1fce9589feab9803e3e8cfad01891c by Jan Korous
[clang] Fix out-of-bounds memory access in ComputeLineNumbers
Differential Revision: https://reviews.llvm.org/D72409
The file was modifiedclang/lib/Basic/SourceManager.cpp
The file was modifiedclang/unittests/Basic/SourceManagerTest.cpp
Commit ba91dffafe4d348b469d8ae2b7b1cd00754f72f1 by maskray
[Driver][PowerPC] Move powerpcspe logic from cc1 to Driver
Follow-up of D72014. It is more appropriate to use a target feature
instead of a SubTypeArch to express the difference.
Reviewed By: #powerpc, jhibbits
Differential Revision: https://reviews.llvm.org/D72433
The file was modifiedclang/lib/Driver/ToolChains/Arch/PPC.cpp
The file was modifiedclang/test/Driver/ppc-features.cpp
The file was modifiedclang/test/Preprocessor/init.c
The file was modifiedclang/lib/Basic/Targets/PPC.cpp
Commit 55d7b22277e1c5e710bac7d4d4dc09db3a22dad8 by steveire
[ASTMatchers] Make test more clear about what it is verifying
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
Commit 0c29d3ff2233696f663ae34a8aeda23c750ac68f by listmail
[Tests] Precommit tests showing default branch padding on skylake
A follow up patch will change the default for the compiler, but not the
assembler, just making sure we have testing for each in place.
The file was addedllvm/test/CodeGen/X86/align-branch-boundary-default.s
The file was addedllvm/test/CodeGen/X86/align-branch-boundary-default.ll
Commit 77da826edad0a7b906c734c6bee3489ef495c746 by Raphael Isemann
[lldb] Make CompleteTagDeclsScope completion order deterministic
Summary: We iterate over `m_decls_to_complete` to complete declarations.
As
`m_decls_to_complete` is a set the iteration order can be
non-deterministic. The order is currently only non-deterministic when we
have a large set of decls that need to be completed (i.e. more than 32
decls, as otherwise the SmallPtrSet is just a linear-searched list).
This doesn't really fix any specific bug or has any really observable
change in behavior as the order in which we import should not influence
any semantics. However the order we create decls/types is now always
deterministic which should make debugging easier.
Reviewers: labath, mib, shafik, davide
Reviewed By: shafik, davide
Subscribers: davide, abidh, JDevlieghere, lldb-commits, mgrang
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72495
The file was modifiedlldb/source/Symbol/ClangASTImporter.cpp
Commit 9e13cff44d6b8b9c9c8420870132931c218707cb by Raphael Isemann
[lldb] Fix TestClangASTContext.TestFunctionTemplateInRecordConstruction
in Debug builds
Summary: In Debug builds we call VerifyDecl in
ClangASTContext::CreateFunctionDeclaration which in turn calls
`getAccess` on the created FunctionDecl. As we passed in a RecordDecl as
the DeclContext for the FunctionDecl, we end up hitting the assert in
`getAccess` that checks that we never have a Decl inside a Record
without a valid AccessSpecifier. FunctionDecls are never in RecordDecls
(that would be a CXXMethodDecl) so setting a access specifier would not
be the correct way to fix this.
Instead this patch does the same thing that
DWARFASTParserClang::ParseSubroutine is doing: We pass in the
FunctionDecl with the TranslationUnit as the DeclContext. That's not
ideal but it is how we currently do it when creating our debug info AST,
so the unit test should do the same.
Reviewers: shafik
Reviewed By: shafik
Subscribers: aprantl, JDevlieghere, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72359
The file was modifiedlldb/unittests/Symbol/TestClangASTContext.cpp
Commit 4ffcec40acebae7161ac7426edc68290bbaca2b8 by aaron
Implement new AST matcher hasAnyCapture to match on LambdaExpr captures.
Accepts child matchers cxxThisExpr to match on capture of this and also
on varDecl.
The file was modifiedclang/lib/ASTMatchers/Dynamic/Registry.cpp
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h
The file was modifiedclang/docs/LibASTMatchersReference.html
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
Commit f3db1aad2796c62f0d188a74f2901c18e51843c2 by sylvestre
MakeUniqueCheck.cpp: explicit the fact that there is an autofix for this
checker
The file was modifiedclang-tools-extra/clang-tidy/modernize/MakeUniqueCheck.cpp
Commit faeeb71a17344171f814144213ac4fbc93be28fd by sylvestre
clang-tidy doc: Refresh the list of checkers and polish the script
The file was modifiedclang-tools-extra/clang-tidy/add_new_check.py
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst
Commit 71cee218619033115f5e0c7656efc8cee93180e9 by craig.topper
[TargetLowering] Use SelectionDAG::getSetCC and remove a repeated call
to getSetCCResultType in softenSetCCOperands. NFCI
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit 68cd283f3b074e3b64b9f65e93ceb2de6807c72d by sylvestre
clang-tidy doc: unbreak the CI
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst
Commit a5a6fd3f95a9ecc3ef8732192ce0fd7749135311 by eugenis
Summary: update macro for OFF_T so that sanitizer works on AARCH64.
Reviewers: vitalybuka, eugenis, MaskRay
Reviewed By: eugenis, MaskRay
Subscribers: MaskRay, kristof.beyls, #sanitizers, llvm-commits, jkz, scw
Tags: #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D72367
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_netbsd.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_posix.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_linux_s390.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/symbolizer/sanitizer_wrappers.cpp
Commit 1a8c996a8894a6ae2bf3b98780972bc7bdb6b8e6 by Jonas Devlieghere
[lldb/Scripts] Remove buildbot.py
This file is outdated and still references SVN. Buildbots are configured
through the zorg repository.
The file was removedlldb/scripts/buildbot.py
Commit e6d219122d5a94fa8642c67c391aeb47fc032c89 by Jonas Devlieghere
[lldb/Scripts] Remove remote-build.py
With Xcode gone this is no longer relevant.
The file was removedlldb/scripts/Python/remote-build.py
Commit 7c47a3719a9e587fdf993637dc09d97b5397483b by Jonas Devlieghere
[lldb/Scripts] Move android script from underneath Python dir
The scripts root directory already contains python scripts. No need to
keep this one nested under a dedicated Python directory.
The file was removedlldb/scripts/Python/use_lldb_suite.py
The file was removedlldb/scripts/Python/android/host_art_bt.py
The file was addedlldb/scripts/android/host_art_bt.py
Commit a9052b4dfc1b25bd58480668d221365495fa9101 by Vedant Kumar
[AArch64] Add isAuthenticated predicate to MCInstDesc
Add a predicate to MCInstDesc that allows tools to determine whether an
instruction authenticates a pointer. This can be used by diagnostic
tools to hint at pointer authentication failures.
Differential Revision: https://reviews.llvm.org/D70329
rdar://55089604
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrFormats.td
The file was modifiedllvm/utils/TableGen/InstrInfoEmitter.cpp
The file was modifiedllvm/unittests/Target/AArch64/InstSizes.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/include/llvm/Target/Target.td
The file was modifiedllvm/utils/TableGen/CodeGenInstruction.h
The file was modifiedllvm/utils/TableGen/CodeGenInstruction.cpp
The file was modifiedllvm/utils/TableGen/InstrDocsEmitter.cpp
The file was modifiedllvm/include/llvm/MC/MCInstrDesc.h
Commit 7ce92dc0b4bcc1044052a06df3f07a94eb890823 by Jonas Devlieghere
[lldb/Test] Bypass LLDB_TEST_COMMON_ARGS for certain dotest args (NFC)
Rather than serializing every argument through LLDB_TEST_COMMON_ARGS, we
can pass some of them directly using their CMake variable. Although this
does introduce some code duplication between lit's site config and the
lldb-dotest utility, it also means that it becomes easier to override
these values (WIP).
The file was modifiedlldb/test/API/lit.cfg.py
The file was modifiedlldb/test/API/lit.site.cfg.py.in
The file was modifiedlldb/utils/lldb-dotest/lldb-dotest.in
The file was modifiedlldb/test/API/CMakeLists.txt
Commit c5adcdc5c88a89241b1150824fc44370c62c7132 by Jonas Devlieghere
[lldb/Utils] Remove vim-lldb
The vim-lldb plugin is unmaintained and doesn't work with a recent vim
installation that uses Python 3. This removes it from the LLDB
repository. The code is still available under lldb-tools on GitHub like
we did with for lldb-mi. (https://github.com/lldb-tools/vim-lldb)
Differential revision: https://reviews.llvm.org/D72541
The file was removedlldb/utils/vim-lldb/python-vim-lldb/import_lldb.py
The file was removedlldb/utils/vim-lldb/python-vim-lldb/vim_panes.py
The file was removedlldb/utils/vim-lldb/python-vim-lldb/vim_ui.py
The file was removedlldb/utils/vim-lldb/plugin/lldb.vim
The file was removedlldb/utils/vim-lldb/doc/lldb.txt
The file was removedlldb/utils/vim-lldb/python-vim-lldb/lldb_controller.py
The file was removedlldb/utils/vim-lldb/python-vim-lldb/vim_signs.py
The file was removedlldb/utils/vim-lldb/README
The file was removedlldb/utils/vim-lldb/python-vim-lldb/plugin.py
Commit 4c00dbf22d7f0ad005444b412b450ee4b4779b6a by Vedant Kumar
lldbutil: Forward ASan launch info to test inferiors
This allows an unsanitized test process which loads a sanitized DSO (the
motivating example is a Swift runtime dylib) to launch on Darwin.
rdar://57290132
Differential Revision: https://reviews.llvm.org/D71379
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbutil.py
The file was modifiedlldb/test/API/lit.cfg.py
Commit 987bf8b6c14613da907fa78330415e266b97a036 by Stanislav.Mekhanoshin
Let targets adjust operand latency of bundles
This reverts the AMDGPU DAG mutation implemented in D72487 and gives a
more general way of adjusting BUNDLE operand latency.
It also replaces FixBundleLatencyMutation with adjustSchedDependency
callback in the AMDGPU, fixing not only successor latencies but
predecessors' as well.
Differential Revision: https://reviews.llvm.org/D72535
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
The file was modifiedllvm/lib/CodeGen/ScheduleDAGInstrs.cpp
Commit d3ba1e026dbc44e9097ce6ea1c92d065f1fe33e8 by Jonas Devlieghere
[lldb/Reproducer] Add SBReproducer::Replay overload (again)
I modified the SBAPI under the assumption that nobody was using the old
API yet. However, that turns out to be false. So instead of adding the
deafault argument I've reintroduced the old API and made the new one an
overload.
The file was modifiedlldb/include/lldb/API/SBReproducer.h
The file was modifiedlldb/source/API/SBReproducer.cpp
Commit 7a38468e34eeeb59e80b176b97213d205d8d9b41 by richard
Only destroy static locals if they have non-trivial destructors.
This fixes a regression introduced in
2b4fa5348ee157b6b1a1af44d0137ca8c7a71573 that caused us to emit
shutdown-time destruction for variables with ARC ownership, using
C++-specific functions that don't exist in C implementations.
The file was addedclang/test/CodeGenObjC/initialize-function-static.m
The file was modifiedclang/lib/CodeGen/CGDecl.cpp
Commit e05e219926f90ccab927b7b1af6d14aa6dd52571 by Vedant Kumar
[LockFileManager] Make default waitForUnlock timeout a parameter, NFC
Patch by Xi Ge!
The file was modifiedllvm/lib/Support/LockFileManager.cpp
The file was modifiedllvm/include/llvm/Support/LockFileManager.h
Commit 064087581ab98cca7254b4d0f12ecbed13da2692 by mtrofin
[NFC][InlineCost] Factor cost modeling out of CallAnalyzer traversal.
Summary: The goal is to simplify experimentation on the cost model.
Today, CallAnalyzer decides 2 things: legality, and benefit. The
refactoring keeps legality assessment in CallAnalyzer, and factors
benefit evaluation out, as an extension.
Reviewers: davidxl, eraman
Reviewed By: davidxl
Subscribers: kamleshbhalui, fedor.sergeev, hiraditya,
baloghadamsoftware, haicheng, a.sidorin, Szelethus, donat.nagy, dkrupp,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71733
The file was modifiedllvm/lib/Analysis/InlineCost.cpp
Commit ca4a55fabbbebef1752fd4e2913c28bb8b510621 by antiagainst
[mlir] NFC: put C++ code emission classes in their own files
This exposes thse classes so that they can be used in interfaces.
Differential Revision: https://reviews.llvm.org/D72514
The file was addedmlir/include/mlir/TableGen/OpClass.h
The file was modifiedmlir/lib/TableGen/CMakeLists.txt
The file was addedmlir/lib/TableGen/OpClass.cpp
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Commit 397215cc309df1171a198b11cab3b241db9441db by antiagainst
[mlir][ods] Support dialect specific content emission via hooks
Thus far we can only generate the same set of methods even for
operations in different dialects. This is problematic for dialects that
want to generate additional operation class methods programmatically,
e.g., a special builder method or attribute getter method. Apparently we
cannot update the OpDefinitionsGen backend every time when such a need
arises. So this CL introduces a hook into the OpDefinitionsGen backend
to allow dialects to emit additional methods and traits to operation
classes.
Differential Revision: https://reviews.llvm.org/D72514
The file was modifiedmlir/include/mlir/TableGen/Operator.h
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
The file was addedmlir/include/mlir/TableGen/ODSDialectHook.h
Commit 1b8c84b8dd5a4a294943a6a6f0631d2d3a1f9f27 by richard
Improve precision of documentation comment.
The file was modifiedclang/include/clang/AST/Decl.h
Commit ceb801612a678bdffe7e7bf163bd0eed9c9b73a2 by Jessica Paquette
[AArch64] Don't generate libcalls for wide shifts on Darwin
Similar to cff90f07cb5cc3.
Darwin doesn't always use compiler-rt, and so we can't assume that these
functions are available (at least on arm64).
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/shift_minsize.ll
Commit f4df7f4701d80ce6a2f5674db50f87fbd2dad82f by richard
Remove redundant implicit cast creation.
FindCompositePointerType has already cast the operands to the composite
type for us in the case where it succeeds.
The file was modifiedclang/lib/Sema/SemaExpr.cpp
Commit fbf915f01d46e005146f01553a5d7c6619d19597 by richard
Add a FIXME and corresponding test coverage for some suspicious behavior
forming composite ObjC pointer types in comparisons.
The file was modifiedclang/test/SemaObjCXX/arc-ptr-comparison.mm
The file was modifiedclang/test/SemaObjC/arc.m
The file was modifiedclang/lib/Sema/SemaExpr.cpp
Commit 9a6f4d451ca7aa06b94a407015fbadb456bc09ef by richard
Clean up and slightly generalize implementation of composite pointer
type computation, in preparation for P0388R4, which adds another few
cases here.
We now properly handle forming multi-level composite pointer types
involving nested Objective-C pointer types (as is consistent with
including them as part of the notion of 'similar types' on which this
rule is based). We no longer lose non-CVR qualifiers on nested pointer
types.
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/test/SemaObjCXX/composite-objc-pointertype.mm
The file was addedclang/test/SemaOpenCLCXX/address-space-cond.cl
Commit 44e0daf16e6985eb44ea9a629402852dbff9cb0b by thakis
driver: Allow -fdebug-compilation-dir=foo in joined form.
All 130+ f_Group flags that take an argument allow it after a '=',
except for fdebug-complation-dir. Add a Joined<> alias so that it
behaves consistently with all the other f_Group flags.
(Keep the old Separate flag for backwards compat.)
The file was modifiedclang/test/Driver/clang_f_opts.c
The file was modifiedclang/test/Driver/integrated-as.s
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/test/Driver/fembed-bitcode.c
The file was modifiedclang/test/Driver/cl-options.c
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/test/CodeGen/debug-info-compilation-dir.c
Commit 1d2cd2c0b7d978e22a50e918af708ba67e87c2c1 by maskray
[Driver] Fix OptionClass of -fconvergent-functions and -fms-volatile
(Joined -> Flag)
The file was modifiedclang/include/clang/Driver/Options.td
Commit 9b23407063ca41901e9e272bacf8b33eee8251c4 by saar
[Concepts] Fix MarkUsedTemplateParameters for exprs
D41910 introduced a recursive visitor to MarkUsedTemplateParameters, but
disregarded the 'Depth' parameter, and had incorrect assertions. This
fixes the visitor and removes the assertions.
The file was modifiedclang/lib/Sema/SemaTemplateDeduction.cpp
Commit de0a2247115729eade8249267a47f96f070a7666 by alexandre.ganea
Remove umask tests
These tests were added in 18627115f4d2db5dc73207e0b5312f52536be7dd and
e08b59f81d950bd5c8b8528fcb3ac4230c7b736c for validating a refactoring.
Removing because they break on ACL-controlled folders on Ubuntu, and
their added value is low.
Differential Revision: https://reviews.llvm.org/D70854
The file was removedllvm/test/Other/umask.ll
The file was removedclang/test/Misc/permissions.cpp
Commit 7c816492197aefbaa2ea3ba0e391f7c6905956bc by Tom.Tan
[COFF] Align ARM64 range extension thunks at instruction boundary
RangeExtensionThunkARM64 is created for out-of-range branches on Windows
ARM64 because branch instructions has limited bits to encode target
address. Currently, RangeExtensionThunkARM64 is appended to its
referencing COFF section from object file at link time without any
alignment requirement, so if size of the preceding COFF section is not
aligned to instruction boundary (4 bytes), RangeExtensionThunkARM64 will
emit thunk instructions at unaligned address which is never a valid
branch target on ARM64, and usually triggers invalid instruction
exception when branching to it.
This PR fixes it by requiring such thunks to align at 4 bytes.
Differential revision: https://reviews.llvm.org/D72473
The file was modifiedlld/COFF/Chunks.h
The file was modifiedlld/test/COFF/arm64-thunks.s
Commit bb2553175ac3cc6223ff379b266ee1c23a468d66 by craig.topper
[TargetLowering][ARM][Mips][WebAssembly] Remove the ordered FP compare
from RunttimeLibcalls.def and all associated usages
Summary: This always just used the same libcall as unordered, but the
comparison predicate was different. This change appears to have been
made when targets were given the ability to override the predicates.
Before that they were hardcoded into the type legalizer. At that time we
never inverted predicates and we handled ugt/ult/uge/ule compares by
emitting an unordered check ORed with a ogt/olt/oge/ole checks. So only
ordered needed an inverted predicate. Later ugt/ult/uge/ule were
optimized to only call a single libcall and invert the compare.
This patch removes the ordered entries and just uses the inverting logic
that is now present. This removes some odd things in both the Mips and
WebAssembly code.
Reviewers: efriedma, ABataev, uweigand, cameron.mcinally, kpn
Reviewed By: efriedma
Subscribers: dschuff, sdardis, sbc100, arichardson, jgravelle-google,
kristof.beyls, hiraditya, aheejin, sunfish, atanasyan, Petar.Avramovic,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72536
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedllvm/lib/Target/ARM/ARMLegalizerInfo.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
The file was modifiedllvm/include/llvm/IR/RuntimeLibcalls.def
The file was modifiedllvm/lib/Target/Mips/Mips16ISelLowering.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit a701be8f036accef9a3dab62fa4baa70ea330a80 by czhengsz
[SCEV] [NFC] add more test cases for range of addrecexpr with nsw flag
The file was modifiedllvm/test/Analysis/ScalarEvolution/range_nw_flag.ll
Commit 4134d706d9bc48d1634e0d95a5c1698f5fcfd06e by qiucofan
[NFC] [PowerPC] Update mi-peephole-splat test
Use script to re-generate the test case, for easier comparison with
future patches.
The file was modifiedllvm/test/CodeGen/PowerPC/mi-peephole-splat.ll
Commit 4a32cd11acd7c38f5e0b587d724935ab7a9938a6 by mjbedy
[AMDGPU] Remove unnecessary v_mov from a register to itself in WQM
lowering.
Summary:
- SI Whole Quad Mode phase is replacing WQM pseudo instructions with
v_mov instructions. While this is necessary for the special handling of
moving results out of WWM live ranges, it is not necessary for WQM live
ranges. The result is a v_mov from a register to itself after every WQM
operation. This change uses a COPY psuedo in these cases, which allows
the register allocator to coalesce the moves away.
Reviewers: tpr, dstuttard, foad, nhaehnle
Reviewed By: nhaehnle
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl,
dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71386
The file was modifiedllvm/test/CodeGen/AMDGPU/wqm.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/wqm.ll
Commit 695804508db048fe3403f2b8bc690633a471a40b by Amara Emerson
Mark the test/Feature/load_extension.ll test as unsupported on Darwin.
With plugins and examples enabled, this XPASSes. Mark it as unsupported
until the owner investigates what's going on.
The file was modifiedllvm/test/Feature/load_extension.ll
Commit 69806808b918adc9b24bee05654b1d6dad91ef74 by craig.topper
[X86] Use ReplaceAllUsesWith instead of ReplaceAllUsesOfValueWith to
simplify some code. NFCI
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Commit fcad5b298c7859d7f10908fab7b82983e286bb8d by maskray
[X86][Disassembler] Simplify readPrefixes
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
Commit 5fe5c0a60f9a5f32da4316ba0d1732a1e439703b by craig.topper
[X86] Preserve fpexcept property when turning strict_fp_extend and
strict_fp_round into stack operations.
We use the stack for X87 fp_round and for moving from SSE f32/f64 to X87
f64/f80. Or from X87 f64/f80 to SSE f32/f64.
Note for the SSE<->X87 conversions the conversion always happens in the
X87 domain. The load/store ops in the X87 instructions are able to
signal exceptions.
The file was modifiedllvm/lib/Target/X86/X86InstrFPStack.td
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Commit c2ddfa876fa90008f1b4ff611256ad5dd4b36d96 by craig.topper
[X86] Simplify code by removing an unreachable condition. NFCI
For X87<->SSE conversions, the SSE type is always smaller than the X87
type. So we can always use the smallest type for the memory type.
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Commit 60346bdbd73da9c944d50ea5dcecad71a05105ac by csigg
Add test for GDB pretty printers.
Reviewers: dblaikie, aprantl, davide, JDevlieghere
Reviewed By: aprantl
Subscribers: jmorse, aprantl, merge_guards_bot, mgorny, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72321
The file was modifieddebuginfo-tests/lit.cfg.py
The file was modifieddebuginfo-tests/CMakeLists.txt
The file was addeddebuginfo-tests/llvm-prettyprinters/gdb/prettyprinters.cpp
The file was addeddebuginfo-tests/llvm-prettyprinters/gdb/lit.local.cfg
The file was addeddebuginfo-tests/llvm-prettyprinters/gdb/prettyprinters.gdb
Commit 81a3d987ced0905bef2e3055bf77ec174bb631c7 by craig.topper
[X86] Remove dead code from X86DAGToDAGISel::Select that is no longer
needed now that we don't mutate strict fp nodes. NFC
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Commit 0e322c8a1f20ab04ce4f6bc538846859707f2d69 by nikita.ppv
[InstCombine] Preserve nuw on sub of geps (PR44419)
Fix https://bugs.llvm.org/show_bug.cgi?id=44419 by preserving the nuw on
sub of geps. We only do this if the offset has a multiplication as the
final operation, as we can't be sure the operations is nuw in the other
cases without more thorough analysis.
Differential Revision: https://reviews.llvm.org/D72048
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h
The file was modifiedllvm/test/Transforms/InstCombine/sub-gep.ll
Commit ad36d29eaed62e33eabab8ffd2006b9ff5fbd719 by nikita.ppv
[LoopSimplify] Regenerate test checks; NFC
For D72519.
The file was modifiedllvm/test/Transforms/LoopSimplify/basictest.ll
Commit 142ba7d76af4a66037fd180db371da19f35ef5f3 by nikita.ppv
[LoopRotate] Add tests for rotate with switch; NFC
For D72420.
The file was addedllvm/test/Transforms/LoopRotate/switch.ll
Commit 87407fc03c82d880cc42330a8e230e7a48174e3c by nunoplopes
DSE: fix bug where we would only check libcalls for name rather than
whole decl
The file was modifiedllvm/test/Transforms/DeadStoreElimination/libcalls.ll
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
The file was addedllvm/test/Transforms/DeadStoreElimination/libcalls2.ll
Commit 5d069f4314a0d8b124a563e61d161c3c3d3b0536 by flo
[X86] Add more complex tests for vector masks used with AND/OR/XOR.
Additional test cases for D72524.
The file was modifiedllvm/test/CodeGen/X86/v8i1-masks.ll
Commit ce35010d782cb5a69102ad7785eb747f6d747eb4 by llvm-dev
[X86][AVX] Add lowerShuffleAsLanePermuteAndSHUFP lowering
Add initial support for lowering v4f64 shuffles to SHUFPD(VPERM2F128(V1,
V2), VPERM2F128(V1, V2)), eventually this could be used for v8f32 (and
maybe v8f64/v16f32) but I'm being conservative for the initial
implementation as only v4f64 can always succeed.
This currently is only called from lowerShuffleAsLanePermuteAndShuffle
so only gets used for unary shuffles, and we limit this to cases where
we use upper elements as otherwise concating 2 xmm shuffles is probably
the better case.
Helps with poor shuffles mentioned in D66004.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
Commit 08275a52d83e623f0347fd9396c18f4d21a15c90 by llvm-dev
Fix copy+paste typo in shuffle test name
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
Commit 9c74fb402e1b7aad4a509a49ab4792154b8ba2c8 by koraq
[Sema] Improve -Wrange-loop-analysis warnings.
No longer generate a diagnostic when a small trivially copyable type is
used without a reference. Before the test looked for a POD type and had
no size restriction. Since the range-based for loop is only available in
C++11 and POD types are trivially copyable in C++11 it's not required to
test for a POD type.
Since copying a large object will be expensive its size has been
restricted. 64 bytes is a common size of a cache line and if the object
is aligned the copy will be cheap. No performance impact testing has
been done.
Differential Revision: https://reviews.llvm.org/D72212
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was addedclang/test/SemaCXX/warn-range-loop-analysis-trivially-copyable.cpp
The file was modifiedclang/test/SemaCXX/warn-range-loop-analysis.cpp
Commit 24763734e7f45e3b60118b28987685d42e7a761f by llvm-dev
[X86] Fix outdated comment
The generic saturated math opcodes are no longer widened inside
X86TargetLowering
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit a8ed86b5c705cf1d2f3ca55b0640cf0f2fe01abc by llvm-dev
moveOperands - assert Src/Dst MachineOperands are non-null.
Fixes static-analyzer warnings.
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
Commit 7c7ca515837305f5d14033aee1191c254b86063c by benny.kra
Remove copy ctors identical to the default one. NFC.
Those do nothing but make the type no longer trivial to the compiler.
The file was modifiedmlir/include/mlir/IR/AffineMap.h
The file was modifiedmlir/include/mlir/IR/IntegerSet.h
The file was modifiedmlir/include/mlir/IR/AffineExpr.h
Commit 2740b2d5d5f0f56c87024555bdcae4f91e595ddb by llvm-dev
Fix uninitialized value clang static analyzer warning. NFC.
The file was modifiedllvm/lib/Transforms/Utils/CodeExtractor.cpp
Commit ded237b58d56299f90ef44853ef79b039248b85e by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately below and castAs will perform the null assertion for us.
The file was modifiedclang/lib/Sema/SemaDecl.cpp
Commit 16c53ffcb9d040f0396bf1ab42ca366f7e1f1e4d by llvm-dev
Fix "pointer is null" static analyzer warnings. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately below and castAs will perform the null assertion for us.
The file was modifiedclang/lib/CodeGen/CGExpr.cpp
The file was modifiedclang/lib/CodeGen/CGExprCXX.cpp
The file was modifiedclang/lib/CodeGen/CGExprScalar.cpp
Commit d87a76c9dae38b2a1ef63584aee82e74490dc83b by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
Use castAs<> instead of getAs<> since the pointer is dereferenced
immediately within mangleCallingConvention and castAs will perform the
null assertion for us.
The file was modifiedclang/lib/AST/MicrosoftMangle.cpp
Commit 93431f96a7b14ff03036bae77cc0197fdc98ad52 by llvm-dev
Fix "pointer is null" static analyzer warning. NFCI.
Use cast<> instead of dyn_cast<> since we know that the pointer should
be valid (and is dereferenced immediately).
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp
Commit bf03944d5d9a7e7c8105c69dfa0d7e0d345644df by llvm-dev
Fix "pointer is null" static analyzer warnings. NFCI.
Use castAs<> instead of getAs<> since the pointers are dereferenced
immediately and castAs will perform the null assertion for us.
The file was modifiedclang/lib/Sema/SemaCodeComplete.cpp
Commit fce887beb79780d0e0b19e8ab6176978a3dce9b8 by llvm-dev
GlobalModuleIndex - Fix use-after-move clang static analyzer warning.
Shadow variable names meant we were referencing the Buffer input
argument, not the GlobalModuleIndex member that its std::move()'d it.
The file was modifiedclang/lib/Serialization/GlobalModuleIndex.cpp
Commit 6cb3957730e9085bb7c37d871c790f910efdd6a7 by listmail
[X86AsmBackend] Be consistent about placing definitions out of line
[NFC]
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Commit 563d3e344452c8923db09b043b8db471fc413b1e by listmail
[X86AsmBackend] Move static function before sole use [NFC]
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Commit 1d641daf260308815d014d1bf1b424a1ed1e7277 by listmail
[X86] Adjust nop emission by compiler to consider target decode
limitations
The primary motivation of this change is to bring the code more closely
in sync behavior wise with the assembler's version of nop emission.  I'd
like to eventually factor them into one, but that's hard to do when one
has features the other doesn't.
The longest encodeable nop on x86 is 15 bytes, but many processors - for
instance all intel chips - can't decode the 15 byte form efficiently.
On those processors, it's better to use either a 10 byte or 11 byte
sequence depending.
The file was modifiedllvm/lib/Target/X86/X86MCInstLower.cpp
The file was modifiedllvm/test/MC/X86/stackmap-nops.ll
The file was modifiedllvm/test/CodeGen/X86/align-branch-boundary-suppressions.ll
The file was modifiedllvm/test/CodeGen/X86/stackmap-nops.ll
Commit 2bdf33cc4c733342fc83081bc7410ac5e9a24f55 by riverriddle
[mlir] NFC: Remove Value::operator* and Value::operator-> now that Value
is properly value-typed.
Summary: These were temporary methods used to simplify the transition.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D72548
The file was modifiedmlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp
The file was modifiedmlir/docs/Tutorials/Toy/Ch-4.md
The file was modifiedmlir/include/mlir/IR/OpBase.td
The file was modifiedmlir/lib/Dialect/QuantOps/Transforms/ConvertConst.cpp
The file was modifiedmlir/lib/Dialect/Traits.cpp
The file was modifiedmlir/examples/toy/Ch5/mlir/Dialect.cpp
The file was modifiedmlir/examples/toy/Ch3/mlir/Dialect.cpp
The file was modifiedmlir/lib/Transforms/Utils/Utils.cpp
The file was modifiedmlir/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedmlir/lib/Analysis/Verifier.cpp
The file was modifiedmlir/lib/Transforms/Utils/RegionUtils.cpp
The file was modifiedmlir/docs/OpDefinitions.md
The file was modifiedmlir/include/mlir/Quantizer/Support/ConstraintAnalysisGraph.h
The file was modifiedmlir/lib/IR/PatternMatch.cpp
The file was modifiedmlir/include/mlir/IR/Matchers.h
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/LegalizeStandardForSPIRV.cpp
The file was modifiedmlir/lib/Dialect/LoopOps/LoopOps.cpp
The file was modifiedmlir/examples/toy/Ch5/mlir/ToyCombine.td
The file was modifiedmlir/lib/Analysis/CallGraph.cpp
The file was modifiedmlir/lib/IR/Value.cpp
The file was modifiedmlir/test/lib/Transforms/TestVectorizationUtils.cpp
The file was modifiedmlir/include/mlir/Dialect/VectorOps/VectorOps.td
The file was modifiedmlir/lib/Conversion/GPUToCUDA/ConvertLaunchFuncToCudaCalls.cpp
The file was modifiedmlir/lib/Dialect/VectorOps/VectorTransforms.cpp
The file was modifiedmlir/examples/toy/Ch7/mlir/Dialect.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgTraits.h
The file was modifiedmlir/lib/Transforms/AffineLoopInvariantCodeMotion.cpp
The file was modifiedmlir/lib/Transforms/DialectConversion.cpp
The file was modifiedmlir/lib/Quantizer/Support/ConstraintAnalysisGraph.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
The file was modifiedmlir/lib/Transforms/LoopTiling.cpp
The file was modifiedmlir/docs/DeclarativeRewrites.md
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
The file was modifiedmlir/include/mlir/Dialect/StandardOps/Ops.td
The file was modifiedmlir/lib/IR/Builders.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedmlir/lib/Analysis/VectorAnalysis.cpp
The file was modifiedmlir/lib/Analysis/LoopAnalysis.cpp
The file was modifiedmlir/test/mlir-tblgen/op-result.td
The file was modifiedmlir/lib/Dialect/AffineOps/AffineOps.cpp
The file was modifiedmlir/examples/toy/Ch7/mlir/ToyCombine.td
The file was modifiedmlir/include/mlir/Dialect/AffineOps/AffineOps.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/LinalgTransformPatterns.td
The file was modifiedmlir/lib/Analysis/AffineAnalysis.cpp
The file was modifiedmlir/lib/Transforms/MemRefDataFlowOpt.cpp
The file was modifiedmlir/include/mlir/Dialect/StandardOps/Ops.h
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVOps.cpp
The file was modifiedmlir/lib/Transforms/LoopUnrollAndJam.cpp
The file was modifiedmlir/lib/Transforms/Utils/LoopFusionUtils.cpp
The file was modifiedmlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
The file was modifiedmlir/examples/toy/Ch5/mlir/ToyCombine.cpp
The file was modifiedmlir/examples/toy/Ch2/mlir/Dialect.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Analysis/DependenceAnalysis.cpp
The file was modifiedmlir/include/mlir/EDSC/Intrinsics.h
The file was modifiedmlir/lib/Transforms/Vectorize.cpp
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
The file was modifiedmlir/lib/IR/Function.cpp
The file was modifiedmlir/test/lib/TestDialect/TestOps.td
The file was modifiedmlir/include/mlir/IR/OpDefinition.h
The file was modifiedmlir/examples/toy/Ch4/mlir/Dialect.cpp
The file was modifiedmlir/include/mlir/Transforms/RegionUtils.h
The file was modifiedmlir/lib/Quantizer/Transforms/AddDefaultStatsTestPass.cpp
The file was modifiedmlir/docs/Tutorials/Toy/Ch-3.md
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
The file was modifiedmlir/lib/Dialect/StandardOps/Ops.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/EDSC/Builders.h
The file was modifiedmlir/lib/Analysis/Liveness.cpp
The file was modifiedmlir/tools/mlir-tblgen/LLVMIRConversionGen.cpp
The file was modifiedmlir/examples/toy/Ch4/mlir/ToyCombine.td
The file was modifiedmlir/include/mlir/Analysis/Dominance.h
The file was modifiedmlir/lib/Analysis/Utils.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/LinalgTransforms.cpp
The file was modifiedmlir/lib/Analysis/SliceAnalysis.cpp
The file was modifiedmlir/lib/Dialect/GPU/IR/GPUDialect.cpp
The file was modifiedmlir/lib/Dialect/QuantOps/IR/QuantOps.cpp
The file was modifiedmlir/test/lib/Transforms/TestMemRefStrideCalculation.cpp
The file was modifiedmlir/lib/Conversion/StandardToLLVM/ConvertStandardToLLVM.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp
The file was modifiedmlir/lib/IR/Region.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/Transforms/DecorateSPIRVCompositeTypeLayoutPass.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
The file was modifiedmlir/lib/Analysis/AffineStructures.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
The file was modifiedmlir/include/mlir/IR/Operation.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/lib/Analysis/Dominance.cpp
The file was modifiedmlir/lib/IR/Operation.cpp
The file was modifiedmlir/examples/toy/Ch7/mlir/MLIRGen.cpp
The file was modifiedmlir/examples/toy/Ch4/mlir/ToyCombine.cpp
The file was modifiedmlir/tools/mlir-tblgen/RewriterGen.cpp
The file was modifiedmlir/include/mlir/EDSC/Builders.h
The file was modifiedmlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp
The file was modifiedmlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
The file was modifiedmlir/lib/EDSC/Helpers.cpp
The file was modifiedmlir/lib/Dialect/FxpMathOps/Transforms/UniformKernelUtils.h
The file was modifiedmlir/test/mlir-tblgen/predicate.td
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/Deserializer.cpp
The file was modifiedmlir/lib/EDSC/Builders.cpp
The file was modifiedmlir/lib/Transforms/Utils/InliningUtils.cpp
The file was modifiedmlir/lib/IR/TypeUtilities.cpp
The file was modifiedmlir/lib/Transforms/LoopFusion.cpp
The file was modifiedmlir/lib/Transforms/LoopInvariantCodeMotion.cpp
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/ConvertStandardToSPIRV.cpp
The file was modifiedmlir/test/lib/Transforms/TestInlining.cpp
The file was modifiedmlir/include/mlir/Dialect/AffineOps/AffineOps.h
The file was modifiedmlir/examples/toy/Ch6/mlir/ToyCombine.td
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVDialect.cpp
The file was modifiedmlir/lib/Dialect/FxpMathOps/Transforms/LowerUniformRealMath.cpp
The file was modifiedmlir/test/lib/TestDialect/TestPatterns.cpp
The file was modifiedmlir/lib/Quantizer/Configurations/FxpMathConfig.cpp
The file was modifiedmlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
The file was modifiedmlir/lib/Dialect/VectorOps/VectorOps.cpp
The file was modifiedmlir/lib/Dialect/Linalg/EDSC/Builders.cpp
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/lib/IR/Block.cpp
The file was modifiedmlir/lib/Parser/Parser.cpp
The file was modifiedmlir/test/lib/TestDialect/TestDialect.cpp
The file was modifiedmlir/docs/QuickstartRewrites.md
The file was modifiedmlir/lib/Transforms/Utils/FoldUtils.cpp
The file was modifiedmlir/lib/Quantizer/Transforms/InferQuantizedTypesPass.cpp
The file was modifiedmlir/examples/toy/Ch6/mlir/Dialect.cpp
The file was modifiedmlir/include/mlir/Dialect/VectorOps/VectorTransformPatterns.td
The file was modifiedmlir/examples/toy/Ch3/mlir/ToyCombine.cpp
The file was modifiedmlir/examples/toy/Ch3/mlir/ToyCombine.td
The file was modifiedmlir/include/mlir/IR/Value.h
The file was modifiedmlir/lib/IR/AsmPrinter.cpp
The file was modifiedmlir/examples/toy/Ch7/mlir/ToyCombine.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/Serializer.cpp
The file was modifiedmlir/lib/Transforms/PipelineDataTransfer.cpp
The file was modifiedmlir/include/mlir/Dialect/QuantOps/QuantOps.td
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp
The file was modifiedmlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
The file was modifiedmlir/include/mlir/IR/OpImplementation.h
The file was modifiedmlir/examples/toy/Ch6/mlir/ToyCombine.cpp
The file was modifiedmlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
Commit 4c48ea68e491cb42f1b5d43ffba89f6a7f0dadc4 by development
[ASTMatchers] extract public matchers from const-analysis into own patch
Summary: The analysis for const-ness of local variables required a view
generally useful matchers that are extracted into its own patch.
They are `decompositionDecl` and `forEachArgumentWithParamType`, that
works for calls through function pointers as well.
Reviewers: aaron.ballman
Reviewed By: aaron.ballman
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72505
The file was modifiedclang/docs/LibASTMatchersReference.html
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h
The file was modifiedclang/lib/ASTMatchers/Dynamic/Registry.cpp
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
Commit 23a799adf0abbe9a7be1494d5efd1ab3215ee4fb by development
Revert "[ASTMatchers] extract public matchers from const-analysis into
own patch"
This reverts commit 4c48ea68e491cb42f1b5d43ffba89f6a7f0dadc4. The
powerpc buildbots had an internal compiler error after this patch. This
requires some inspection.
The file was modifiedclang/lib/ASTMatchers/Dynamic/Registry.cpp
The file was modifiedclang/docs/LibASTMatchersReference.html
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
Commit d2751f8fdf6c072045bab62f6035511e028f46ee by Lang Hames
[ExecutionEngine] Re-enable FastISel for non-iOS arm targets.
Patch by Nicolas Capens. Thanks Nicolas!
https://reviews.llvm.org/D65015
The file was modifiedllvm/lib/ExecutionEngine/TargetSelect.cpp
Commit dc422e968e73790178e500f506e8fb7cfa1e62ea by koraq
Add -Wrange-loop-analysis changes to ReleaseNotes
This reflects the recent changes done.
The file was modifiedclang/docs/ReleaseNotes.rst
Commit 9cc9120969fd9f7f6a99321c7d94133a32927a3a by craig.topper
[X86] Turn FP_ROUND/STRICT_FP_ROUND into
X86ISD::VFPROUND/STRICT_VFPROUND during PreprocessISelDAG to remove some
duplicate isel patterns.
The file was modifiedllvm/lib/Target/X86/X86InstrAVX512.td
The file was modifiedllvm/lib/Target/X86/X86InstrSSE.td
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Commit a5994c789a2982a770254ae1607b5b4cb641f73c by maskray
[X86][Disassembler] Simplify and optimize reader functions
llvm-objdump -d on clang is decreased from 8.2s to 7.8s.
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
Commit 9fe6f36c1a909e381275f897b780a9c878fab94a by craig.topper
[LegalizeVectorOps] Only pass SDNode* instead SDValue to all of the
Expand* and Promote* methods.
All the Expand* and Promote* function assume they are being called with
result 0 anyway. Just hardcode result 0 into them.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
Commit 5a9954c02a7d6e60da26b2feec0837695846aeed by craig.topper
[LegalizeVectorOps] Remove some of the simpler Expand methods. Pass
Results vector to a couple. NFCI
Some of the simplest handlers just call TLI and if that fails, they fall
back to unrolling. For those just inline the TLI call and share the
unrolling call with the default case of Expand.
For ExpandFSUB and ExpandBITREVERSE so that its obvious they don't
return results sometimes and want to defer to LegalizeDAG.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
Commit 179abb091d8a1d67115d21b54001d10250756042 by maskray
[X86][Disassembler] Replace custom logger with LLVM_DEBUG
llvm-objdump -d on clang is decreased from 7.8s to 7.4s.
The improvement is likely due to the elimination of logger setup and
dbgprintf(), which has a large overhead.
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
Commit a1f16998f371870ca4da8b3c00a093c607a36ddd by alexandre.ganea
[Support] Optionally call signal handlers when a function wrapped by the
the CrashRecoveryContext fails
This patch allows for handling a failure inside a CrashRecoveryContext
in the same way as the global exception/signal handler. A failure will
have the same side-effect, such as cleanup of temporarty file, printing
callstack, calling relevant signal handlers, and finally returning an
exception code. This is an optional feature, disabled by default. This
is a support patch for D69825.
Differential Revision: https://reviews.llvm.org/D70568
The file was modifiedllvm/include/llvm/Support/CrashRecoveryContext.h
The file was modifiedllvm/lib/Support/Unix/Signals.inc
The file was modifiedllvm/unittests/Support/CrashRecoveryTest.cpp
The file was modifiedllvm/include/llvm/Support/Signals.h
The file was modifiedllvm/lib/Support/Windows/Signals.inc
The file was modifiedllvm/lib/Support/CrashRecoveryContext.cpp
Commit 2cdb18afda841392002feafda21af31854c195b3 by Lang Hames
[ORC] Fix argv handling in runAsMain / lli.
This fixes an off-by-one error in the argc value computed by runAsMain,
and switches lli back to using the input bitcode (rather than the string
"lli") as the effective program name.
Thanks to Stefan Graenitz for spotting the bug.
The file was modifiedllvm/tools/lli/lli.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
The file was addedllvm/test/ExecutionEngine/OrcLazy/printargv.ll
Commit 6fdd6a7b3f696972edc244488f59532d05136a27 by maskray
[Disassembler] Delete the VStream parameter of
MCDisassembler::getInstruction()
The argument is llvm::null() everywhere except llvm::errs() in
llvm-objdump in -DLLVM_ENABLE_ASSERTIONS=On builds. It is used by no
target but X86 in -DLLVM_ENABLE_ASSERTIONS=On builds.
If we ever have the needs to add verbose log to disassemblers, we can
record log with a member function, instead of passing it around as an
argument.
The file was modifiedllvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
The file was modifiedlldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
The file was modifiedllvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
The file was modifiedllvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
The file was modifiedllvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp
The file was modifiedllvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
The file was modifiedllvm/tools/llvm-mc/Disassembler.cpp
The file was modifiedllvm/include/llvm/MC/MCDisassembler/MCDisassembler.h
The file was modifiedllvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
The file was modifiedllvm/tools/llvm-objdump/MachODump.cpp
The file was modifiedllvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.h
The file was modifiedlldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
The file was modifiedllvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp
The file was modifiedllvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldChecker.cpp
The file was modifiedllvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
The file was modifiedllvm/lib/MC/MCDisassembler/Disassembler.cpp
The file was modifiedllvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.h
The file was modifiedllvm/lib/MC/MCDisassembler/MCDisassembler.cpp
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.cpp
The file was modifiedllvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp
The file was modifiedllvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
The file was modifiedllvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
The file was modifiedllvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
The file was modifiedllvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
The file was modifiedllvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp
The file was modifiedllvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
The file was modifiedlldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
The file was modifiedllvm/tools/sancov/sancov.cpp
The file was modifiedllvm/tools/llvm-exegesis/lib/Analysis.cpp
The file was modifiedllvm/lib/Target/MSP430/Disassembler/MSP430Disassembler.cpp
Commit 1e8ce7492e91aa6db269334d12187c7ae854dccb by maskray
[X86][Disassembler] Optimize argument passing and immediate reading
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
Commit f719c540bb09cb5bfe37bc6283ea68e31949b3f4 by maskray
[X86][Disassembler] Shrink X86GenDisassemblerTables.inc from 36M to 6.1M
In x86Disassembler{OneByte,TwoByte,...}Codes,
"/* EmptyTable */" is very common. Omitting it saves lots of space.
Also, there is no need to display a table entry in multiple lines.
It is also common that the whole OpcodeDecision is { MODRM_ONEENTRY, 0}.
Make use of zero-initialization.
The file was modifiedllvm/utils/TableGen/X86DisassemblerTables.cpp
Commit ddfcd82bdc219dd2dc04d6826c417cea3da65d12 by craig.topper
[LegalizeVectorOps] Expand vector MERGE_VALUES immediately.
Custom legalization can produce MERGE_VALUES to return multiple results.
We can expand them immediately instead of leaving them around for DAG
combine to clean up.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
Commit ed679804d5e34dcb1046c5087acaf5d1dbb9b582 by craig.topper
[TargetLowering][X86] Connect the chain from STRICT_FSETCC in
TargetLowering::expandFP_TO_UINT and X86TargetLowering::FP_TO_INTHelper.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit efb674ac2f2b0f06adc3f00df3134dadf1c875df by craig.topper
[LegalizeVectorOps] Parallelize the lo/hi part of STRICT_UINT_TO_FLOAT
legalization.
The lo and hi computation are independent. Give them the same input
chain and TokenFactor the results together.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
Commit 569ccfc384a5434c35c09adba8c44c46014297e6 by czhengsz
[SCEV] more accurate range for addrecexpr with nsw flag.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D72436
The file was modifiedllvm/test/Analysis/ScalarEvolution/range_nw_flag.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit d692f0f6c8c12316d559b9a638a2cb9fbd0c263d by craig.topper
[X86] Don't call LowerSETCC from LowerSELECT for
STRICT_FSETCC/STRICT_FSETCCS nodes.
This causes the STRICT_FSETCC/STRICT_FSETCCS nodes to lowered early
while lowering SELECT, but the output chain doesn't get connected. Then
we visit the node again when it is its turn because we haven't replaced
the use of the chain result. In the case of the fp128 libcall lowering,
after D72341 this will cause the libcall to be emitted twice.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit f33fd43a7c91f1774a9512bbdb78c367cd23d233 by qiucofan
[NFC] Refactor memory ops cluster method
Current implementation of BaseMemOpsClusterMutation is a little bit
obscure. This patch directly uses a map from store chain ID to set of
memory instrs to make it simpler, so that future improvements are easier
to read, update and review.
Reviewed By: evandro
Differential Revision: https://reviews.llvm.org/D72070
The file was modifiedllvm/lib/CodeGen/MachineScheduler.cpp
Commit c5b94ea265133a4a28006929643155fc8fbeafe6 by maskray
[profile] Support merge pool size >= 10
The executable acquires an advisory record lock (`fcntl(fd, F_SETLKW,
*)`) on a profile file. Merge pool size >= 10 may be beneficial when the
concurrency is large.
Also fix a small problem about snprintf. It can cause the filename to be
truncated after %m.
Reviewed By: davidxl
Differential Revision: https://reviews.llvm.org/D71970
The file was modifiedcompiler-rt/lib/profile/InstrProfilingFile.c
The file was modifiedcompiler-rt/test/profile/instrprof-basic.c
Commit 51c1d7c4bec025f70679284060b82c05242759b2 by maskray
[X86][Disassembler] Simplify
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
Commit 60cc095ecc34d72a9ac6947f39c6e2a0cdf5449f by maskray
[X86][Disassembler] Merge X86DisassemblerDecoder.cpp into
X86Disassembler.cpp and refactor
The file was removedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/X86/Disassembler/BUILD.gn
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
The file was modifiedllvm/lib/Target/X86/Disassembler/CMakeLists.txt
The file was modifiedllvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
Commit b375f28b0ec1129a4b94770a9c55ba49222ea1dd by llvm-dev
[X86][AVX] lowerShuffleAsLanePermuteAndSHUFP - only set the demanded
elements of the lane mask.
Fixes an cyclic dependency issue with an upcoming patch where
getVectorShuffle canonicalizes masks with splat build vector sources.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp