FailedChanges

Summary

  1. [CodeGenCXX][test] Use -fno-experimental-new-pass-manager for (details)
  2. [CodeGen] [ExpandReduction] Fix the bug for ExpandReduction() when (details)
  3. Fix uninitialized variable warning. NFCI. (details)
  4. Ensure VPlanPrinter::Depth is initialized to fix static analyzer (details)
  5. Fix line_iterator uninitialized variable warnings. NFCI. (details)
  6. Fix uninitialized variable warnings. NFCI. (details)
  7. SymbolRecord - fix more uninitialized variable warnings. NFCI. (details)
  8. ModuleMap::findHeader - fix null dereference warning. NFCI. (details)
  9. Drop spurious self-include [NFC] (details)
  10. [compiler-rt] Sync NetBSD syscall hooks with 9.99.17 (details)
  11. [compiler-rt] Harmonize __sanitizer_addrinfo with the NetBSD headers (details)
  12. [BPF] fix a bug in __builtin_preserve_field_info() with FIELD_BYTE_SIZE (details)
  13. [DebugInfo] Fix for DW_OP_LLVM_fragment in DIExpression::isImplicit() (details)
  14. [X86] Convert PICStyles::Style to scoped enum class. NFCI. (details)
  15. [X86][SSE] combineX86ShufflesRecursively - don't bother merging shuffles (details)
  16. gn build: (manually) merge 3a399c09 / add76dd3c (details)
  17. [opaque pointer types] Add element type argument to IRBuilder (details)
  18. [SelectionDAG] Fixed null check after dereferencing warning. NFCI. (details)
  19. [BitcodeReader] Fixed null pointer dereferencing warning. NFCI. (details)
  20. [BitcodeReader] Fixed null check after dereferencing warning. NFCI. (details)
  21. [BitcodeReader] Fixed use after move warnings. NFCI. (details)
  22. [LoopUnrollAndJam] Fixed null check after dereferencing warning. NFCI. (details)
  23. [LoopUnrollRuntime] Fixed null check after dereferencing warning. NFCI. (details)
  24. [CHR] Fixed null check after dereferencing warning. NFCI. (details)
  25. [InstructionCombining] Fixed null check after dereferencing warning. (details)
  26. [InstructionCompares] Fixed null check after dereferencing warning. (details)
  27. Revert "[InstructionCompares] Fixed null check after dereferencing (details)
  28. [MemorySSA] Fixed null check after dereferencing warning. NFCI. (details)
  29. [SCEV] Fixed 'Uninitialized variable 'ContainsAddRec' used.' warning. (details)
  30. Revert "[InstructionCombining] Fixed null check after dereferencing (details)
  31. Reland '[InstructionCombining] Fixed null check after dereferencing (details)
  32. [SILoadStoreOptimizer] Fixed typo. NFCI. (details)
  33. [SIMachineScheduler] Fixed ''then' statement is equivalent to the 'else' (details)
  34. [X86][SSE] combineX86ShufflesRecursively - at Depth==0, only resolve (details)
  35. [mips] Add disassembler tests for `sigrie` instruction. NFC (details)
  36. [mips] Add disassembler tests for `octeon` CPU. NFC (details)
  37. [mips] Move test case for Octeon instructions to cnmips sub-folder. NFC (details)
  38. [compiler-rt] [msan] Support POSIX iconv(3) on NetBSD 9.99.17+ (details)
  39. [compiler-rt] [msan] Correct the __libc_thr_keycreate prototype (details)
  40. clang/Modules: Sink CompilerInstance::KnownModules into ModuleMap (details)
  41. Set the floating point status register as reserved (details)
  42. [lldb] Add trailing dots to comments in Value.cpp (details)
  43. [lldb] Provide a getter for m_materializer_up in LLVMUserExpression (details)
  44. [lldb] Also disable de-registration of EHFrames in IRExecutionUnit (details)
  45. [lldb][NFC] Make test/python_api/module_section test smaller (details)
  46. [LV] Apply sink-after & interleave-groups as VPlan transformations (NFC) (details)
  47. [SystemZ]  Improve handling of huge PC relative immediate offsets. (details)
  48. [lldb][NFC] Remove unused ExpressionParser::Parse (details)
  49. [lldb][NFC] Remove Ocaml from TypeSystem::LLVMCastKind (details)
  50. [hwasan] Remove lazy thread-initialisation (details)
  51. [RISCV] Implement the TargetLowering::getRegisterByName hook (details)
  52. [FIX] Removed duplicated v4f16 and v8f16 declarations (details)
  53. [X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle (details)
  54. [llvm-readobj] Change errors to warnings for symbol section name dumping (details)
  55. [InstSimplify] add more tests for fcmp+select; NFC (details)
  56. [SystemZ] Add GHC calling convention (details)
  57. [OpenCL] Fix address space for const method call from nonconst (PR43145) (details)
  58. [InstSimplify] add more tests for fcmp+select; NFC (details)
  59. [InstSimplify] use FMF to improve fcmp+select fold (details)
  60. [ARM] Add vrev32 NEON fp16 patterns (details)
  61. [ARM] More MVE shuffle tests for sequences that can be converted to (details)
  62. Revert "[LV] Apply sink-after & interleave-groups as VPlan (details)
  63. gn build: add deps, see discussion on D69130 (details)
  64. gn build: run "gn format" (details)
  65. gn build: (manually) merge 51b4b17eb (details)
  66. [SystemZ] Fix typo (details)
  67. Fix compilation warning. NFC. (details)
  68. [IR] adjust assert when replacing undef elements in vector constant (details)
  69. [ARM] Use isFMAFasterThanFMulAndFAdd for MVE (details)
  70. [OpenCL] Fix FileCheck pattern (details)
  71. [X86] Regenerate known-signbits-vector.ll tests. (details)
  72. SanitizerMask::bitPosToMask - fix operator precedence warnings. NFCI. (details)
  73. [MachineVerifier]  Improve verification of live-in lists. (details)
  74. [SystemZ]  Use LivePhysRegs instead of isCCLiveOut() in (details)
  75. [test] Use system locale for mri-utf8.test (details)
  76. [Diagnostics] Improve some error messages related to bad use of (details)
  77. AliasSetTracker - fix uninitialized variable warnings. NFCI. (details)
  78. [X86] Convert ShrinkMode to scoped enum class. NFCI. (details)
  79. [SLP]Fix PR43799: Crash on different sizes of GEP indices. (details)
  80. Fix buildbots troubled by b7b170c. (details)
  81. [Sema] Make helper in TreeTransform.h 'inline' instead of 'static'. NFC (details)
  82. [FPEnv][SelectionDAG] Refactor strict FP node construction (details)
  83. ELF: Discard .ARM.exidx sections for empty functions instead of (details)
  84. Recommit "[CodeView] Add option to disable inline line tables." (details)
  85. Lower generic MASSV entries to PowerPC subtarget-specific entries (details)
  86. Fix static analysis warnings in ARM calling convention lowering (details)
  87. gn build: Merge 40d0d4e2335 (details)
  88. MCDwarfFile::DirIndex - fix uninitialized variable warning. NFCI. (details)
  89. createMCObjectStreamer - fix uninitialized variable warning. NFCI. (details)
  90. VirtualFileSystem - fix uninitialized variable warnings. NFCI. (details)
  91. [X86] Fix uninitialized variable warnings. NFCI. (details)
  92. [ms] Fix Microsoft compatibility handling of commas in nested macro (details)
  93. [lit] Better/earlier errors when no tests are executed (details)
  94. [lit] Move measurement of testing time out of Run.execute (details)
  95. [lldb] [Process/NetBSD] Add register info for missing register sets (details)
  96. [DAGCombine][MSP430] use shift amount threshold in DAGCombine (2/2) (details)
  97. [SimplifyCFG] Use a (trivially) dominanting widenable branch to remove (details)
  98. [X86] Add support for -mvzeroupper and -mno-vzeroupper to match gcc (details)
  99. clang/Modules: Bring back optimization lost in 31e14f41a21f (details)
  100. Fix warning: format specifies type 'unsigned long' but the argument has (details)
  101. Remove unused variables, as suggested by @mcgov. (details)
  102. [demangle] NFC: get rid of NodeOrString (details)
  103. [AMDGPU] deduplicate tablegen predicates (details)
  104. [LLDB][Python] remove ArgInfo::count (details)
  105. [OPENMP50]Support for imperfectly nested loops. (details)
  106. Add release notes for commit ccc4d83cda16bea1d9dfd0967dc7d2cfb24b8e75. (details)
  107. [OPENMP][DOCS]Update list of implemented features, NFC. (details)
  108. [AMDGPU] Added assert in SIFoldOperands before ptr use. NFC. (details)
  109. [AST][NFC] Fixes a comment typo (details)
  110. Add more binutils tools to LLVM_INSTALL_TOOLCHAIN_ONLY target (details)
  111. [AArch64] Update for Exynos (details)
  112. Test commit: adds a . to comment. NFC (details)
  113. [CGDebugInfo] Emit subprograms for decls when AT_tail_call is understood (details)
  114. build: explicitly set the linker language for unwind (details)
  115. [cmake] Add an option to skip stripping before install (details)
  116. Optimize std::midpoint for integers (details)
  117. [BPF] Fix CO-RE bugs with bitfields (details)
  118. [CUDA][HIP] Disable emitting llvm.linker.options in device compilation (details)
  119. [analyzer] Add test directory for scan-build. (details)
  120. Fix clone_constant_impl to correctly deal with null pointers (details)
  121. [analyzer] Fixup scan-build tests for non-Darwin platforms. (details)
  122. [analyzer] Require darwin for scan-build tests (details)
  123. [X86] Teach X86MCInstLower to swap operands of commutable instructions (details)
  124. [BPF] fix a use after free bug (details)
  125. [IR] Add Freeze instruction (details)
  126. [X86] Lower the cost of avx512 horizontal bool and/or reductions to (details)
  127. [IR] Remove switch's default block that causes clang 8 raise error (details)
  128. [lldb][NFC] Give some parameters in CommandInterpreter more descriptive (details)
  129. [AArch64] Update test checks on merge-store-dependency.ll. NFC (details)
  130. Recommit "[HardwareLoops] Optimisation remarks" (details)
  131. [mips] Fix `__mips_isa_rev` macros value for Octeon CPU (details)
  132. [mips] Set __OCTEON__ macros (details)
  133. DWARFDebugLoclists: Make it possible to read relocated addresses (details)
  134. [RISCV] Add InstrInfo areMemAccessesTriviallyDisjoint hook (details)
  135. [InstCombine] dropRedundantMaskingOfLeftShiftInput(): truncation (details)
  136. [LoopUnroll] peel-loop-conditions.ll: add some 'is even/odd' peeling (details)
  137. MemoryRegion: Print "don't know" permission values as such (details)
  138. lldb/minidump: Add support for the alternate ARM64 constant (details)
  139. [OpenCL] Add builtin function attribute handling (details)
  140. [OpenCL] Group builtin functions by prototype (details)
  141. Revert and patch "[Python] Remove readline module" (details)
  142. lldb/breakpad: add suppport for the "x86_64h" architecture (details)
  143. [Scheduling][ARM] Consistently enable PostRA Machine scheduling (details)
  144. [ARM] Always enable UseAA in the arm backend (details)
  145. Fix PR40644: miscompile indexed FP constant store (details)
  146. [Clang FE]  Recognize -mnop-mcount CL option (SystemZ only). (details)
  147. [Docs] Add LangRef documentation for freeze instruction (details)
  148. [MachineScheduler] Enable AA in PostRA Machine scheduler (details)
  149. [AtomicExpandPass] Silence static analyzer warnings about operator (details)
  150. [lldb] Fix readline/libedit compat patch for py2 (details)
  151. [InstCombine] add tests for shift-logic-shift; NFC (details)
  152. Add missing GVN =operator. NFCI. (details)
  153. [GVN] Fix uninitialized variable warnings. NFCI. (details)
  154. [JumpThreading] Factor out common code to update the SSA form (NFC) (details)
  155. [NFC][ObjC][ARC] Add tests for OptimizeRetainRVCall (details)
  156. [ObjC][ARC] Ignore lifetime markers between *ReturnValue calls (details)
  157. [OPENMP][DOCS]Fix coloring of the implemented features status, NFC. (details)
  158. [MachineOutliner] Fix uninitialized variable warnings. NFCI. (details)
  159. [MCObjectFileInfo] Fix uninitialized variable warnings. NFCI. (details)
  160. Fix uninitialized variable warning. NFCI. (details)
  161. [LV] Apply sink-after & interleave-groups as VPlan transformations (NFC) (details)
  162. [OPENMP]Improve diagnostics for unsupported unified addressing. (details)
  163. [DFAPacketizer] Allow up to 64 functional units (details)
  164. [lldb] [Python] Build readline override module only on Linux (details)
  165. [ARM] Multi-vector MVE spill test (details)
  166. [llvm-objcopy][ELF] Add OriginalType & OriginalFlags (details)
  167. [llvm-objcopy][ELF] Implement --only-keep-debug (details)
  168. [Object][MachO] Rewrite macho-invalid-fat-arch-size into YAML (details)
  169. [MachineOutliner] Reduce scope of variable and stop duplicate getMF() (details)
  170. Use iterator prefix increment. NFCI. (details)
  171. Remove redundant assignment. NFCI. (details)
  172. Revert "[Object][MachO] Rewrite macho-invalid-fat-arch-size into YAML" (details)
  173. [JumpThreading] Factor out code to merge basic blocks (NFC) (details)
  174. [globalisel][docs] Add KnownBits Analysis documentation (details)
  175. [SLP] - Add couple safety checks to TreeEntry::dump(). NFC (details)
  176. [hip] Enable pointer argument lowering through coercing type. (details)
  177. [lldb] Fix Python 3 incompatibility in API/lit.cfg.py (details)
  178. [clangd] Implement semantic highlightings via findExplicitReferences (details)
  179. [AMDGPU] return Fail instead of SolfFail from addOperand() (details)
  180. [globalisel] Rename G_GEP to G_PTR_ADD (details)
  181. [X86] Specifically limit fmin/fmax commutativity to NoNaNs + (details)
  182. [dexter] Remove lit check for python 3 (details)
  183. [dexter] Fix feature tests on Windows (details)
  184. ValueObject: Upstream early-exit from swift-lldb. (NFC) (details)
  185. [AMDGPU] Removed dead code handling M0CopyReg (details)
  186. [lit] Fix `not` calling internal commands (details)
  187. [llvm-objdump] Fix spurious "The end of the file was unexpectedly (details)
  188. [HIP] Fix visibility for 'extern' device variables. (details)
  189. [X86/Atomics] (Semantically) revert G246098, switch back to the old (details)
  190. [AMDGPU] Removed dead code from R600ISelLowering.cpp (details)
  191. Revert "[lit] Better/earlier errors when no tests are executed" (details)
  192. Modernize add-dsym test Makefile (details)
  193. testsuite: skipIfNoSBHeaders should skip when running remotely (details)
  194. TestBatchMode.py: add missing @skipIfRemote (details)
  195. [X86] Gate select->fmin/fmax transform on NoSignedZeros instead of (details)
  196. [Reproducer] Add test case for expression evaluation (details)
  197. [ValueObject] Upstream initialization from swift-lldb. (details)
  198. [ValueObject] Upstream early exit from swift-lldb. (NFC) (details)
  199. [Sema] Fixes templated friend member assertion (details)
  200. [MIR] Add MIR parsing for heap alloc site instruction markers (details)
  201. [OPENMP50]Simplify processing of context selector scores. (details)
  202. Fix typo so that '-O0' is correctly specified (details)
  203. [X86/Atomics] Correct a few transforms for new atomic lowering (details)
  204. [lldb] Add a install target for lldb python on darwin (details)
  205. [Hexagon] getCompoundCandidateGroup - fix 'false' value is implicitly (details)
  206. [LoopRotationUtils] Check values are newly inserted into maps. (details)
  207. [CMake] Prevent adding lld to test dependency (TEST_DEPS) when lld (details)
  208. [mips] Fix `getRegForInlineAsmConstraint` to do not crash on empty (details)
  209. [IRMover] Use GlobalValue::getAddressSpace instead of directly from its (details)
  210. Revert "[analyzer] Add test directory for scan-build." (details)
  211. [TestMTCSimple] Disable the test if you don't have libMTC (details)
  212. [SLP] add tests for 2-wide reductions; NFC (details)
  213. [AMDGPU] Add missing flags to DS_Real (details)
  214. [globalisel][docs] Add a section about debugging with the block (details)
  215. [Automaton] Make Automaton thread-safe (details)
  216. [globalisel][docs] Rework GMIR documentation and add an early (details)
  217. [globalisel][docs] Rework GMIR documentation and add an early (details)
  218. [IRMover] Set Address Space for moved global values (details)
  219. Fixed a profdata file size detection on Windows system. (details)
  220. Implement `sys::getHostCPUName()` for Darwin ARM (details)
  221. [PowerPC] Fix the incorrect 'RM' flag set on load/store instr (details)
  222. [ADT] Add equality operator for SmallPtrSet (details)
  223. YAML parser robustness improvements (details)
  224. [clang-tidy] Add readability-make-member-function-const (details)
  225. gn build: Merge 24130d661ed (details)
  226. [clang-format] [PR35518] C++17 deduction guides are wrongly formatted (details)
  227. clang-format: Add a fallback style to Emacs mode (details)
  228. [clangd] Implement a function to lex the file to find candidate (details)
  229. [ARM MVE] Remove accidental 64-bit vst2/vld2 intrinsics. (details)
  230. [clang,MveEmitter] Fix sign/zero extension in range limits. (details)
  231. [ARM,MVE] Integer-type nitpicks in MVE intrinsics. (details)
  232. [ARM,MVE] Add intrinsics for gather/scatter load/stores. (details)
  233. [Syntax] Add nodes for most common statements (details)
  234. NeonEmitter: switch to enum for internal Type representation. (details)
  235. [TTI][LV] preferPredicateOverEpilogue (details)
  236. NeonEmitter: remove special 'a' type modifier. (details)
  237. [AMDGPU] Improve code size cost model (part 2) (details)
  238. Silence warning, PyMODINIT_FUNC already contains extern "C" (details)
  239. [libc++][P0202] Marked algorithms copy/copy_n/copy_if/copy_backward (details)
  240. [NFC][LoopUnroll] Update test coverage for peeling w/ inequality (details)
  241. [LoopUnroll] countToEliminateCompares(): fix handling of [in]equality (details)
Commit e0b3a8c991569f8c05a4edb551b8cc2942e37ea1 by maskray
[CodeGenCXX][test] Use -fno-experimental-new-pass-manager for
CodeGenCXX/union-tbaa2.cpp after
D68593/llvmorg-10-init-8907-gcecc0d27ad5
It fails with -DENABLE_EXPERIMENTAL_NEW_PASS_MANAGER=0 builds.
Temporarily use -fno-experimental-new-pass-manager while we are
investigating the root cause.
The file was modifiedclang/test/CodeGenCXX/union-tbaa2.cpp
Commit 4e9778e346f27b09724f39f92b34dd7336c2147a by shkzhang
[CodeGen] [ExpandReduction] Fix the bug for ExpandReduction() when
vector size isn't power of 2
Summary: For below test case, we will get assert error except for
AArch64 and ARM:
declare i8 @llvm.experimental.vector.reduce.and.i8.v3i8(<3 x i8> %a)
define i8 @test_v3i8(<3 x i8> %a) nounwind {
%b = call i8 @llvm.experimental.vector.reduce.and.i8.v3i8(<3 x i8> %a)
ret i8 %b
} In the function getShuffleReduction (), we can see it needs the vector
size must be power of 2.
This patch is fix below error when the number of element is not power of
2 for those llvm.experimental.vector.reduce.* function.
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D68625
The file was modifiedllvm/lib/CodeGen/ExpandReductions.cpp
The file was modifiedllvm/test/CodeGen/Generic/expand-experimental-reductions.ll
Commit 297d96bb603f8a02fa45ef65cec6ca29222e9193 by llvm-dev
Fix uninitialized variable warning. NFCI.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 81ba611e88d9cf31988e84380da98a3bc0b0c138 by llvm-dev
Ensure VPlanPrinter::Depth is initialized to fix static analyzer
warning. NFCI.
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
Commit e81b201d1bc911be8f4635a43b800d5d721d47f8 by llvm-dev
Fix line_iterator uninitialized variable warnings. NFCI.
Allows us to auto define the default constructor as well.
The file was modifiedllvm/include/llvm/Support/LineIterator.h
Commit 604cbd6b12852dd28bf0539d29955a303e242789 by llvm-dev
Fix uninitialized variable warnings. NFCI.
The file was modifiedllvm/include/llvm/CodeGen/TargetSchedule.h
The file was modifiedllvm/include/llvm/CodeGen/MachineScheduler.h
Commit 3823759afbc10b5c08b1f7c0f1086c63a1ffca32 by llvm-dev
SymbolRecord - fix more uninitialized variable warnings. NFCI.
The file was modifiedllvm/include/llvm/DebugInfo/CodeView/SymbolRecord.h
Commit 0b4c2ee3810c047afd415c9fd328798854ef96ae by llvm-dev
ModuleMap::findHeader - fix null dereference warning. NFCI.
We were checking M for a null value after we'd already dereferenced it
multiple times.
The file was modifiedclang/lib/Lex/ModuleMap.cpp
Commit c96428d2184fe2329e625f6a0dc04daa02ee42c9 by aaronpuchert
Drop spurious self-include [NFC]
This was introduced in D61357, probably by accident.
The file was modifiedclang/include/clang/Basic/PartialDiagnostic.h
Commit 01f91c3526efe58aa035c7f27bef817195c7d26c by n54
[compiler-rt] Sync NetBSD syscall hooks with 9.99.17
Document the minimal version supported as 9.0 and add compat code for
renamed syscalls after 9.0.
The file was modifiedcompiler-rt/include/sanitizer/netbsd_syscall_hooks.h
The file was modifiedcompiler-rt/utils/generate_netbsd_syscalls.awk
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_syscalls_netbsd.inc
Commit 983c4dd8edbed9e28b2f4b2f91759f63acee326a by n54
[compiler-rt] Harmonize __sanitizer_addrinfo with the NetBSD headers
Add missing pad for sparc, alpha and a variation of i386.
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_limits_netbsd.h
Commit c4305337716f0f3eb76400f288cd0dee001d744d by yhs
[BPF] fix a bug in __builtin_preserve_field_info() with FIELD_BYTE_SIZE
During deriving proper bitfield access FIELD_BYTE_SIZE, function
Member->getStorageOffsetInBits() is used to get llvm IR type storage
offset in bits so that the byte size can permit aligned loads/stores
with previously derived FIELD_BYTE_OFFSET.
The function should only be used with bitfield members and it will
assert if ASSERT is turned on during cmake build.
Constant *getStorageOffsetInBits() const {
   assert(getTag() == dwarf::DW_TAG_member && isBitField());
   if (auto *C = cast_or_null<ConstantAsMetadata>(getExtraData()))
     return C->getValue();
   return nullptr;
}
This patch fixed the issue by using Member->isBitField() directly and a
test case is added to cover this missing case. This issue is discovered
when running Andrii's linux kernel CO-RE tests.
Differential Revision: https://reviews.llvm.org/D69761
The file was modifiedllvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
The file was addedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-4.ll
Commit e2549a0a2517514f87005a63ce4fddb1877b2307 by bjorn.a.pettersson
[DebugInfo] Fix for DW_OP_LLVM_fragment in DIExpression::isImplicit()
DIExpression::isImplicit() did not handle DW_OP_LLVM_fragment correctly.
It was scanning the elements in the expression by iterating from the
end. But we do not know the position of ops unless we iterate from the
beginning of the expression, since DW_OP:s and their operands are stored
flat in the expression list. The old code also assumed that a
DW_OP_LLVM_fragment only occupied one element in the expression list,
but it actually occupies three elements.
The file was modifiedllvm/lib/IR/DebugInfoMetadata.cpp
The file was addedllvm/test/CodeGen/X86/dbg-value-func-arg.ll
Commit 91661573fdeaf605d7c4e10dbb596be433353739 by llvm-dev
[X86] Convert PICStyles::Style to scoped enum class. NFCI.
Fixes MSVC static analyzer warnings about enum safety, this enum
performs no integer math so it'd be better to fix its scope.
The file was modifiedllvm/lib/Target/X86/X86Subtarget.h
The file was modifiedllvm/lib/Target/X86/X86Subtarget.cpp
Commit 8f29e4407cc609764eeb450dc432297952ec6f49 by llvm-dev
[X86][SSE] combineX86ShufflesRecursively - don't bother merging shuffles
with empty roots. NFCI.
This doesn't affect actual codegen, but is a minor refactor toward
fixing PR43024 where we need to avoid excess changes (folding zeroables
etc.) to the shuffle mask at Depth == 0.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit ce7d5a6bbee89f7bb9696e4894f5280a2d60ccf0 by nicolasweber
gn build: (manually) merge 3a399c09 / add76dd3c
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/Target/X86/BUILD.gn
Commit 910718bd038cdac1671069594a11f6b26bad9c8b by craig.topper
[opaque pointer types] Add element type argument to IRBuilder
CreatePreserveStructAccessIndex and CreatePreserveArrayAccessIndex
Summary: These were the only remaining users of the
GetElementPtrInst::getGEPReturnType method that gets the element type
from the pointer type.
Remove that method since its now dead.
Reviewers: jyknight, t.p.northover, arsenm
Reviewed By: arsenm
Subscribers: wdng, arsenm, arphaman, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D69756
The file was modifiedclang/lib/CodeGen/CGExpr.cpp
The file was modifiedllvm/include/llvm/IR/IRBuilder.h
The file was modifiedllvm/include/llvm/IR/Instructions.h
The file was modifiedclang/lib/CodeGen/CGBuilder.h
Commit a18a8db0d49497086b568120fc393b43ef64c7a6 by Dávid Bolvanský
[SelectionDAG] Fixed null check after dereferencing warning. NFCI.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Commit f39d95ea04b91e76a7f80c2b67bdc7ba2904cfa7 by Dávid Bolvanský
[BitcodeReader] Fixed null pointer dereferencing warning. NFCI.
The file was modifiedllvm/lib/Bitcode/Reader/BitcodeReader.cpp
Commit 46f372a4aa5d26778b56588c04ba95cbc7b3de20 by Dávid Bolvanský
[BitcodeReader] Fixed null check after dereferencing warning. NFCI.
The file was modifiedllvm/lib/Bitcode/Reader/BitcodeReader.cpp
Commit 505a44ae9cf9e9ef47159e1628c094095155d36f by Dávid Bolvanský
[BitcodeReader] Fixed use after move warnings. NFCI.
The file was modifiedllvm/lib/Bitcode/Reader/BitcodeReader.cpp
Commit 60cb193a40f4849dae7ec3106dc219e30843ccdd by Dávid Bolvanský
[LoopUnrollAndJam] Fixed null check after dereferencing warning. NFCI.
The file was modifiedllvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
Commit 914128ab12f3714c0baf79aacfc64cef85c0f72a by Dávid Bolvanský
[LoopUnrollRuntime] Fixed null check after dereferencing warning. NFCI.
The file was modifiedllvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
Commit 8262a5b70163f3136635625a6e15d401009c838d by Dávid Bolvanský
[CHR] Fixed null check after dereferencing warning. NFCI.
The file was modifiedllvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
Commit 8308187fd9bfa08ffad0a636d4dd1d25e7de5a76 by Dávid Bolvanský
[InstructionCombining] Fixed null check after dereferencing warning.
NFCI.
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Commit b8685cf3042f6a2e129061922bd6b18e3c42258e by Dávid Bolvanský
[InstructionCompares] Fixed null check after dereferencing warning.
NFCI.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Commit d825ed24d2f324eb02a3a91fdc64f9576f36f45b by Dávid Bolvanský
Revert "[InstructionCompares] Fixed null check after dereferencing
warning. NFCI."
This reverts commit b8685cf3042f6a2e129061922bd6b18e3c42258e.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Commit 717965ae578040d0a8590eb90b93c9e3168cb995 by Dávid Bolvanský
[MemorySSA] Fixed null check after dereferencing warning. NFCI.
The file was modifiedllvm/lib/Analysis/MemorySSA.cpp
Commit decd8c4844a4310d1018cd7d6b8b34eedb6ed26d by Dávid Bolvanský
[SCEV] Fixed 'Uninitialized variable 'ContainsAddRec' used.' warning.
NFCI.
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit 5b37c018d5c9add833f9a40b870345e2108614e6 by Dávid Bolvanský
Revert "[InstructionCombining] Fixed null check after dereferencing
warning. NFCI."
This reverts commit 8308187fd9bfa08ffad0a636d4dd1d25e7de5a76. This
exposed a bug.
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Commit 058b5028def7fe8b50bec9df33367e80353439a5 by Dávid Bolvanský
Reland '[InstructionCombining] Fixed null check after dereferencing
warning. NFCI.'
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Commit c3d6f0ddeee4dfa80204156f7f4f3f5353fe1090 by Dávid Bolvanský
[SILoadStoreOptimizer] Fixed typo. NFCI.
The file was modifiedllvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
Commit 3fbd1c00b0f300cdd558a924a5cc3d34dae0c209 by Dávid Bolvanský
[SIMachineScheduler] Fixed ''then' statement is equivalent to the 'else'
statement.' warning. NFCI.
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
Commit 3f087e38a2e7b87a5adaaac1c1b61e51220e7ff3 by llvm-dev
[X86][SSE] combineX86ShufflesRecursively - at Depth==0, only resolve
KnownZero if it removes an input.
This stops infinite loops where KnownUndef elements are converted to
Zeroable, resulting in KnownZero elements which are then simplified (via
SimplifyDemandedElts etc.) back to KnownUndef elements........
Prep fix for PR43024 which will allow rL368307 to be re-applied.
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 5257a95426770540f54305b8eb369152d2d0239f by simon
[mips] Add disassembler tests for `sigrie` instruction. NFC
The file was modifiedllvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
The file was modifiedllvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
The file was modifiedllvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
The file was modifiedllvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
Commit cf954e54f751742ffcbe0816a1d836fec3d9bc09 by simon
[mips] Add disassembler tests for `octeon` CPU. NFC
The file was addedllvm/test/MC/Disassembler/Mips/octeon/valid-el.txt
The file was addedllvm/test/MC/Disassembler/Mips/octeon/valid.txt
Commit 52efd673692a863aa1a6195396550e97d0be8917 by simon
[mips] Move test case for Octeon instructions to cnmips sub-folder. NFC
The file was removedllvm/test/MC/Mips/octeon-instructions.s
The file was addedllvm/test/MC/Mips/cnmips/valid.s
Commit e345bc6e65a3a7b8797a0e8322771cf1a3ef1213 by n54
[compiler-rt] [msan] Support POSIX iconv(3) on NetBSD 9.99.17+
Fixes build of test.
The file was modifiedcompiler-rt/test/msan/iconv.cpp
Commit 858b15cb9cf675b33d5c3bf17b3050d98b73ec3f by n54
[compiler-rt] [msan] Correct the __libc_thr_keycreate prototype
Fixes build with GCC8.
The file was modifiedcompiler-rt/lib/msan/msan_interceptors.cpp
Commit 31e14f41a21f9016050a20f07d5da03db2e8c13e by Duncan P. N. Exon Smith
clang/Modules: Sink CompilerInstance::KnownModules into ModuleMap
Avoid use-after-frees when FrontendAction::BeginSourceFile is called
twice on the same CompilerInstance by sinking
CompilerInstance::KnownModules into ModuleMap.  On the way, rename the
map to CachedModuleLoads.  I considered (but rejected) merging this with
ModuleMap::Modules, since that only has top-level modules and this map
includes submodules.
This is an alternative to https://reviews.llvm.org/D58497.  Thanks to
nemanjai for the detailed analysis of the problem!
The file was modifiedclang/lib/Frontend/CompilerInstance.cpp
The file was modifiedclang/include/clang/Lex/ModuleMap.h
The file was modifiedclang/include/clang/Frontend/CompilerInstance.h
Commit 8d7ccb37440e11552cb4a0bb989ddee5031700a4 by pengfei.wang
 Set the floating point status register as reserved
Summary: This patch sets the FPSW (X87 floating-point status register)
as a reserved physical register and fix the test failure caused by [[
https://reviews.llvm.org/D68854| D68854 ]].
Before this patch, some tests will fail because it implicit uses FPSW
without define it. Setting the FPSW as a reserved physical register will
skip liveness analysis because it is always live.
Reviewers: pengfei, craig.topper
Reviewed By: craig.topper
Subscribers: craig.topper, hiraditya, llvm-commits
Patch by LiuChen.
Differential Revision: https://reviews.llvm.org/D69784
The file was modifiedllvm/test/CodeGen/X86/pr34080-2.ll
The file was modifiedllvm/lib/Target/X86/X86RegisterInfo.cpp
Commit 80bf88d8bc892548aa59286306b6a1d9072a9f7a by Raphael Isemann
[lldb] Add trailing dots to comments in Value.cpp
Reviewers: JDevlieghere
Reviewed By: JDevlieghere
Subscribers: JDevlieghere, lldb-commits
Tags: #upstreaming_lldb_s_downstream_patches, #lldb
Differential Revision: https://reviews.llvm.org/D69717
The file was modifiedlldb/source/Core/Value.cpp
Commit ae10661a8121558679463a57dd8661c81895f3ff by Raphael Isemann
[lldb] Provide a getter for m_materializer_up in LLVMUserExpression
instead of relying on it being accessible.
Summary: Motivated by Swift using the materializer in a few places which
requires us to add this getter ourselves. We also need a setter, but
let's keep this minimal to unblock the downstream reverts in Swift.
Reviewers: davide
Reviewed By: davide
Subscribers: abidh, JDevlieghere, lldb-commits
Tags: #upstreaming_lldb_s_downstream_patches, #lldb
Differential Revision: https://reviews.llvm.org/D69714
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.cpp
The file was modifiedlldb/include/lldb/Expression/Expression.h
The file was modifiedlldb/include/lldb/Expression/LLVMUserExpression.h
Commit df12a75a19682cfeee12c38ae5113043dddffda8 by Raphael Isemann
[lldb] Also disable de-registration of EHFrames in IRExecutionUnit
Summary: We disabled registration by providing an empty
`registerEHFrames`, so we should also provide an empty
`deregisterEHFrames` in case that function relies on `registerEHFrames`
being called before. Currently `deregisterEHFrames` is a no-op anyway as
it just iterates over the (empty( list of registered EHFrames and then
clear the empty list.
Reviewers: davide, JDevlieghere
Reviewed By: JDevlieghere
Subscribers: JDevlieghere, lldb-commits
Tags: #upstreaming_lldb_s_downstream_patches, #lldb
Differential Revision: https://reviews.llvm.org/D69713
The file was modifiedlldb/include/lldb/Expression/IRExecutionUnit.h
Commit 848007cfbc7509543c5b8604ae063bb6c8ffa0a9 by Raphael Isemann
[lldb][NFC] Make test/python_api/module_section test smaller
Summary: I don't see why this test needs to compile this rather
complicated file for just testing module sections. This just removes all
this code with a simple
"Hello world!" program which should be faster to compile
Reviewers: labath, davide, JDevlieghere
Reviewed By: JDevlieghere
Subscribers: jfb, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D69705
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/module_section/main.cpp
Commit 2be17087f8c38934b7fc9208ae6cf4e9b4d44f4b by gil.rapaport
[LV] Apply sink-after & interleave-groups as VPlan transformations (NFC)
The sink-after and interleave-group vectorization decisions were so far
applied to VPlan during initial VPlan construction, which complicates
VPlan construction – also because of their inter-dependence. This patch
refactors buildVPlanWithRecipes() to construct a simpler initial VPlan
and later apply both these vectorization decisions, in order, as
VPlan-to-VPlan transformations.
Differential Revision: https://reviews.llvm.org/D68577
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
The file was modifiedllvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Commit 580310ff0c57a62edd0c07aacfa4969809649444 by paulsson
[SystemZ]  Improve handling of huge PC relative immediate offsets.
Demand that an immediate offset to a PC relative address fits in 32
bits, or else load it into a register and perform a separate add.
Verify in the assembler that such immediate offsets fit the bitwidth.
Even though the final address of a Load Address Relative Long may fit in
32 bits even with a >32 bit offset (depending on where the symbol lives
relative to PC), the GNU toolchain demands the offset by itself to be in
range. This patch adapts the same behavior for llvm.
Review: Ulrich Weigand https://reviews.llvm.org/D69749
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.cpp
The file was modifiedllvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
The file was addedllvm/test/CodeGen/SystemZ/la-05.ll
The file was modifiedllvm/test/MC/SystemZ/insn-bad.s
Commit 25b486ac4f335fc51240888d6cfbc9c3c211536a by Raphael Isemann
[lldb][NFC] Remove unused ExpressionParser::Parse
Summary: This function is only used internally by ClangExpressionParser.
By putting it in the ExpressionParser class all languages that implement
ExpressionParser::Parse have to share the same signature (which forces
us in downstream to add swift-specific arguments to
ExpressionParser::Parse which then propagate to ClangExpressionParser
and so on).
Reviewers: davide
Subscribers: JDevlieghere, lldb-commits
Tags: #upstreaming_lldb_s_downstream_patches, #lldb
Differential Revision: https://reviews.llvm.org/D69710
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.h
The file was modifiedlldb/include/lldb/Expression/ExpressionParser.h
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangFunctionCaller.cpp
Commit bc728d584242946ba59d6bea0cf8c749dcf07248 by Raphael Isemann
[lldb][NFC] Remove Ocaml from TypeSystem::LLVMCastKind
Ocaml support was removed.
The file was modifiedlldb/include/lldb/Symbol/TypeSystem.h
Commit 91167e22eca535025f093335acece573bf19c525 by david.spickett
[hwasan] Remove lazy thread-initialisation
This was an experiment made possible by a non-standard feature of the
Android dynamic loader.
It required introducing a flag to tell the compiler which ABI was being
targeted. This flag is no longer needed, since the generated code now
works for both ABI's.
We leave that flag untouched for backwards compatibility. This also
means that if we need to distinguish between targeted ABI's again we can
do that without disturbing any existing workflows.
We leave a comment in the source code and mention in the help text to
explain this for any confused person reading the code in the future.
Patch by Matthew Malcomson
Differential Revision: https://reviews.llvm.org/D69574
The file was modifiedclang/include/clang/Driver/Options.td
The file was removedllvm/test/Instrumentation/HWAddressSanitizer/lazy-thread-init.ll
The file was modifiedcompiler-rt/lib/hwasan/hwasan_linux.cpp
The file was modifiedcompiler-rt/lib/hwasan/hwasan_interceptors.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
Commit 51b4b17eb7e6ee2312e3230c7e097df501006360 by luismarques
[RISCV] Implement the TargetLowering::getRegisterByName hook
Summary: The hook should work for any RISC-V register. Non-allocatable
registers do not need to be reserved, for the remaining the hook will
only succeed if you pass clang the -ffixed-xX flag. This builds upon
D67185, which currently only allows reserving GPRs.
Reviewers: asb, lenary
Reviewed By: lenary
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69130
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was addedllvm/test/CodeGen/RISCV/get-register-invalid.ll
The file was addedllvm/test/CodeGen/RISCV/get-register-reserve.ll
The file was addedllvm/test/CodeGen/RISCV/get-register-noreserve.ll
Commit 3169f0129a682a54cb90996fcb550184af6cdef9 by diogo.sampaio
[FIX] Removed duplicated v4f16 and v8f16 declarations
Reviewers: RKSimon, ostannard
Reviewed By: RKSimon
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69795
The file was modifiedllvm/lib/Target/ARM/ARMCallingConv.td
Commit 31ed36d0447def348af7b1d27daceb57d063382f by llvm-dev
[X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle
using DemandedElts mask (REAPPLIED)
If we don't demand all elements, then attempt to combine to a simpler
shuffle.
At the moment we can only do this if Depth == 0 as
combineX86ShufflesRecursively uses Depth to track whether the shuffle
has really changed or not - we'll need to change this before we can
properly start merging combineX86ShufflesRecursively into
SimplifyDemandedVectorElts (see D66004).
This reapplies rL368307 (reverted at rL369167) after the fix for the
infinite loop reported at PR43024 was applied at
rG3f087e38a2e7b87a5adaaac1c1b61e51220e7ff3
The file was modifiedllvm/test/CodeGen/X86/vec_umulo.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
The file was modifiedllvm/test/CodeGen/X86/vec_smulo.ll
The file was modifiedllvm/test/CodeGen/X86/shrink_vmul.ll
Commit ef85f47595a905475d3e7b8d1441ed69cb226d9c by jh7370
[llvm-readobj] Change errors to warnings for symbol section name dumping
Also only print each such warning once.
LLVM-style output will now print "<?>" for sections it cannot identify,
e.g. because the section index is invalid. GNU output continues to print
the raw index. In both cases where the st_shndx value is SHN_XINDEX and
the index cannot be looked up in the SHT_SYMTAB_SHNDX section (e.g.
because it is missing), the symbol is printed like other symbols with
st_shndx >= SHN_LORESERVE.
Reviewed by: grimar, MaskRay
Differential Revision: https://reviews.llvm.org/D69671
The file was modifiedllvm/test/tools/yaml2obj/dynamic-symbols.yaml
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
The file was addedllvm/test/tools/llvm-readobj/elf-section-symbols.test
The file was modifiedllvm/test/Object/invalid.test
The file was modifiedllvm/test/tools/llvm-readobj/elf-symbol-shndx.test
The file was modifiedllvm/test/tools/yaml2obj/elf-sht-symtab-shndx.yaml
Commit 499c90afe9099ff700ca8c8f44a2cbf94b1dd627 by spatel
[InstSimplify] add more tests for fcmp+select; NFC
The addition of FMF for select allows more folding for these kinds of
patterns.
The file was modifiedllvm/test/Transforms/InstSimplify/fcmp-select.ll
Commit 22f9429149a8faed1f5770aca89e68409ae2cc4f by ulrich.weigand
[SystemZ] Add GHC calling convention
This is a special calling convention to be used by the GHC compiler.
Author: Stefan Schulze Frielinghaus Differential Revision:
https://reviews.llvm.org/D69024
The file was addedllvm/test/CodeGen/SystemZ/ghc-cc-03.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
The file was addedllvm/test/CodeGen/SystemZ/ghc-cc-01.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZCallingConv.h
The file was addedllvm/test/CodeGen/SystemZ/ghc-cc-07.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.cpp
The file was addedllvm/test/CodeGen/SystemZ/ghc-cc-02.ll
The file was addedllvm/test/CodeGen/SystemZ/ghc-cc-06.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZCallingConv.td
The file was addedllvm/test/CodeGen/SystemZ/ghc-cc-04.ll
The file was addedllvm/test/CodeGen/SystemZ/ghc-cc-05.ll
Commit 82888b78d47ed132aee4993e00669ce7cbd963e0 by sven.vanhaastregt
[OpenCL] Fix address space for const method call from nonconst (PR43145)
Patch by Anastasia Stulova and Sven van Haastregt.
Differential Revision: https://reviews.llvm.org/D68781
The file was modifiedclang/lib/Sema/SemaOverload.cpp
The file was modifiedclang/test/CodeGenOpenCLCXX/addrspace-of-this.cl
Commit ad87f244b4228699806e757fedb39f8996c595f9 by spatel
[InstSimplify] add more tests for fcmp+select; NFC
The easy code fix won't catch non-canonical mismatched constant
patterns, so adding extra coverage for those in case we decide that's
important (but seems unlikely).
The file was modifiedllvm/test/Transforms/InstSimplify/fcmp-select.ll
Commit 659bd73d13686948c2b4dbee02df2f82542849dd by spatel
[InstSimplify] use FMF to improve fcmp+select fold
This is part of a series of patches needed to solve PR39535:
https://bugs.llvm.org/show_bug.cgi?id=39535
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
The file was modifiedllvm/test/Transforms/InstSimplify/fcmp-select.ll
Commit 6bae5d16a28662fee78595e827343ce1c575b1de by david.green
[ARM] Add vrev32 NEON fp16 patterns
Fill in the gaps for vrev32.16 f16 patterns, extending the existing i16
patterns.
Differential Revision: https://reviews.llvm.org/D69508
The file was modifiedllvm/test/CodeGen/ARM/vrev.ll
The file was modifiedllvm/lib/Target/ARM/ARMInstrNEON.td
Commit 1c616a9266bd829ea8915617ff83244df45a31c8 by david.green
[ARM] More MVE shuffle tests for sequences that can be converted to
VMOVS. NFC.
The file was addedllvm/test/CodeGen/Thumb2/mve-shufflemov.ll
Commit d3ec06d219788801380af1948c7f7ef9d3c6100b by benny.kra
Revert "[LV] Apply sink-after & interleave-groups as VPlan
transformations (NFC)"
This reverts commit 2be17087f8c38934b7fc9208ae6cf4e9b4d44f4b. Fails
ASAN.
The file was modifiedllvm/unittests/Transforms/Vectorize/VPlanTest.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
Commit a3915ca9f908177c53073549e1b9b19e172a45ec by nicolasweber
gn build: add deps, see discussion on D69130
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
Commit 9cd13deb293a00da797f7a97e31cdade2d115078 by nicolasweber
gn build: run "gn format"
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/Transforms/Utils/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Transforms/Scalar/BUILD.gn
Commit 4168a2e9de35f84abb90fecd03f06a8e131c50fc by nicolasweber
gn build: (manually) merge 51b4b17eb
Also reverts r353980 since that duplicated the GenAsmMatcher target for
AArch64. Instead use visiblity.
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/AArch64/AsmParser/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
Commit d4a7855b68d4d53f121209333d5f2796731ab1f5 by ulrich.weigand
[SystemZ] Fix typo
Typo in comment.  NFC.
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.h
Commit d142ec6fef9a053c9fd9edb5a388203cdb121e65 by michael.hliao
Fix compilation warning. NFC.
The file was modifiedclang/lib/Driver/ToolChains/Darwin.cpp
Commit b556ce3992709e1f6302ca1d4c296f57e83cd6a7 by spatel
[IR] adjust assert when replacing undef elements in vector constant
As noted in follow-up to: rGa1e8ad4f2fa7
It's not safe to assume that an element of the constant is always
non-null. It's definitely not an expected case for the current
instcombine user, but that may not hold if this function is eventually
called from arbitrary places.
The file was modifiedllvm/lib/IR/Constants.cpp
Commit 91b0cad8132997060182146b2734065bc807e9fa by david.green
[ARM] Use isFMAFasterThanFMulAndFAdd for MVE
The Arm backend will usually return false for
isFMAFasterThanFMulAndFAdd, where both the fused VFMA.f32 and a
non-fused VMLA.f32 are usually available for scalar code. For MVE we
don't have the non-fused version though. It makes more sense for
isFMAFasterThanFMulAndFAdd to return true, allowing us to simplify some
of the existing ISel patterns.
The tests here are that non of the existing tests failed, and so we are
still selecting VFMA and VFMS. The one test that changed shows we can
now select from fast math flags, as opposed to just relying on the
isFMADLegalForFAddFSub option.
Differential Revision: https://reviews.llvm.org/D69115
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.h
Commit 6c5827975cf921563315de54ac7c6053d3995f40 by sven.vanhaastregt
[OpenCL] Fix FileCheck pattern
For this test, FileCheck is not run with the CHECK prefix; it seems
COMMON was intended here.
The file was modifiedclang/test/CodeGenOpenCLCXX/addrspace-of-this.cl
Commit 03cde3a7ccd2025baa497cbcf6e825862429f1bd by llvm-dev
[X86] Regenerate known-signbits-vector.ll tests.
Use X86 instead of X32 and add a common CHECK prefix
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll
Commit a0324e911374441151903ed0d828e0fc1994c167 by llvm-dev
SanitizerMask::bitPosToMask - fix operator precedence warnings. NFCI.
Fix static analyzer operator precedence warnings with suitable
bracketing. Pull out the mask generation code so clang-format doesn't
make such a mess of it.
The file was modifiedclang/include/clang/Basic/Sanitizers.h
Commit b7b170c9b46ab4c0a10ecf1d9d5832e70ca992d5 by paulsson
[MachineVerifier]  Improve verification of live-in lists.
MachineVerifier::visitMachineFunctionAfter() is extended to check the
live-through case for live-in lists. This is only done for registers
without aliases and that are neither allocatable or reserved, such as
the SystemZ::CC register.
The MachineVerifier earlier only catched the case of a live-in use
without an entry in the live-in list (as "using an undefined physical
register").
A comment in LivePhysRegs.h has been added stating a guarantee that
addLiveOuts() can be trusted for a full register both before and after
register allocation.
Review: Quentin Colombet https://reviews.llvm.org/D68267
The file was addedllvm/test/MachineVerifier/live-ins-03.mir
The file was addedllvm/test/MachineVerifier/live-ins-01.mir
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
The file was modifiedllvm/include/llvm/CodeGen/LivePhysRegs.h
The file was addedllvm/test/MachineVerifier/live-ins-02.mir
Commit bf6744dfb244dbd2a4abe635f57e45218292743f by paulsson
[SystemZ]  Use LivePhysRegs instead of isCCLiveOut() in
SystemZElimCompare.cpp
Review: Ulrich Weigand https://reviews.llvm.org/D68267
The file was modifiedllvm/lib/Target/SystemZ/SystemZElimCompare.cpp
Commit 0bab0538d8cc0de242ed2936a4766930cfc934d2 by thomasp
[test] Use system locale for mri-utf8.test
Summary: llvm-ar's mri-utf8.test test relies on the en_US.UTF-8 locale
to be installed for its last RUN line to work. If not installed, the
unicode string gets encoded (interpreted) as ascii which fails since the
most significant byte is non zero. This commit changes the test to only
rely on the system being able to encode the pound sign in its default
encoding (e.g. UTF-16 for Microsoft Windows) by always opening the file
via input/output redirection. This avoids forcing a given locale to be
present and supported. A Byte Order Mark is also added to help
recognizing the encoding of the file and its endianness. Finally the
XFAIL on system-darwin is removed since the test actually passes fine on
Mac OS X and XFAIL was only added because it failed before.
Reviewers: gbreynoo, MaskRay, rupprecht, JamesNagurne, jfb
Subscribers: dexonsmith, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68472
The file was addedllvm/test/tools/llvm-ar/mri-nonascii.test
The file was removedllvm/test/tools/llvm-ar/mri-utf8.test
Commit 55507110b988c27cfb9ff4c2231fa38171692545 by Dávid Bolvanský
[Diagnostics] Improve some error messages related to bad use of
dynamic_cast
The file was modifiedclang/test/SemaTemplate/instantiate-cast.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/test/SemaCXX/dynamic-cast.cpp
The file was modifiedclang/lib/Sema/SemaCast.cpp
Commit 1abb2c1a39fb20e12210472fda42a0c942f83be8 by llvm-dev
AliasSetTracker - fix uninitialized variable warnings. NFCI.
The file was modifiedllvm/include/llvm/Analysis/AliasSetTracker.h
Commit 9ad9d1531b96242bedce3e7f101689bc46322fd2 by llvm-dev
[X86] Convert ShrinkMode to scoped enum class. NFCI.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit b80c41cd3c095c8c4fa739130b560b15bda4bbd0 by a.bataev
[SLP]Fix PR43799: Crash on different sizes of GEP indices.
Summary: If the GEP instructions are going to be vectorized, the indices
in those GEP instructions must be of the same type. Otherwise, the
compiler may crash when trying to build the vector constant.
Reviewers: RKSimon, spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69627
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_gep.ll
Commit b14ff0caecbdbb8312e5671047b9b1dff32da1ca by paulsson
Fix buildbots troubled by b7b170c.
Add '# REQUIRES: systemz-registered-target' in the new tests.
The file was modifiedllvm/test/MachineVerifier/live-ins-02.mir
The file was modifiedllvm/test/MachineVerifier/live-ins-03.mir
The file was modifiedllvm/test/MachineVerifier/live-ins-01.mir
Commit 9ba16615fa07c586965b1fa2dc6e88f13fe8031d by ibiryukov
[Sema] Make helper in TreeTransform.h 'inline' instead of 'static'. NFC
Summary: There seems to be no evidence that having internal linkage for
the function was intentional. Since 'static' functions are normally used
only in .cpp files, using 'inline' in the header file is more
appropriate.
Reviewers: Anastasia
Reviewed By: Anastasia
Subscribers: merge_guards_bot, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69242
The file was modifiedclang/lib/Sema/TreeTransform.h
Commit 664f84e246478db82be2871f36fd1a523d9f2731 by ulrich.weigand
[FPEnv][SelectionDAG] Refactor strict FP node construction
Small refactoring in visitConstrainedFPIntrinsic that should make it
easier to create DAG nodes requiring extra arguments.  That is the case
currently only for STRICT_FP_ROUND, but may be the case for additional
nodes (in particular compares) in the future.
Extracted from the patch for D69281.
NFC.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Commit 2c6fae179e6984c7330ff8a284d7a10ce142eef9 by peter
ELF: Discard .ARM.exidx sections for empty functions instead of
misordering them.
The logic added in r372781 caused ARMExidxSyntheticSection::addSection()
to return false for exidx sections without a link order dep that passed
isValidExidxSectionDep(). This included exidx sections for empty
functions. As a result, such exidx sections would end up treated like
ordinary sections and would end up being laid out before the
ARMExidxSyntheticSection, most likely in the wrong order relative to the
exidx entries in the ARMExidxSyntheticSection, breaking the orderedness
invariant relied upon by unwinders. Fix this by simply discarding such
sections.
Differential Revision: https://reviews.llvm.org/D69744
The file was addedlld/test/ELF/arm-exidx-empty-fn.s
The file was modifiedlld/ELF/SyntheticSections.cpp
Commit ab76cfdd200d35177df2042a1c0c7e86868d01bc by akhuang
Recommit "[CodeView] Add option to disable inline line tables."
This reverts commit 004ed2b0d1b86d424643ffc88fce20ad8bab6804. Original
commit hash 6d03890384517919a3ba7fe4c35535425f278f89
Summary: This adds a clang option to disable inline line tables. When it
is used, the inliner uses the call site as the location of the inlined
function instead of marking it as an inline location with the function
location.
https://reviews.llvm.org/D67723
The file was addedllvm/test/Transforms/Inline/no-inline-line-tables.ll
The file was modifiedllvm/lib/Transforms/Utils/InlineFunction.cpp
The file was modifiedclang/include/clang/Basic/CodeGenOptions.def
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedclang/include/clang/Driver/Options.td
The file was addedclang/test/CodeGen/debug-info-no-inline-line-tables.c
The file was modifiedclang/lib/CodeGen/CodeGenFunction.cpp
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedllvm/include/llvm/IR/Attributes.td
Commit 40d0d4e2335d14a3a70a565304fd7e92c25f178b by Jinsong Ji
Lower generic MASSV entries to PowerPC subtarget-specific entries
This patch (second of two patches) lowers the generic PowerPC vector
entries to PowerPC subtarget-specific entries. For instance, the PowerPC
generic entry 'cbrtd2_massv' is lowered to
'cbrtd2_P9' or Power9 subtarget.
The first patch enables the vectorizer to recognize the IBM MASS vector
library routines. This patch specifically adds support for recognizing
the '-vector-library=MASSV' option, and defines mappings from IEEE
standard scalar math functions to generic PowerPC MASS vector
counterparts. For instance, the generic PowerPC MASS vector entry for
double-precision
'cbrt' function is '__cbrtd2_massv'
The overall support for MASS vector library is presented as such in two
patches for ease of review.
Patch by pjeeva01 (Jeeva P.) Differential Revision:
https://reviews.llvm.org/D59883
The file was modifiedllvm/include/llvm/Analysis/VecFuncs.def
The file was modifiedllvm/lib/Target/PowerPC/PPC.h
The file was addedllvm/test/CodeGen/PowerPC/lower-massv-attr.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetMachine.cpp
The file was addedllvm/test/CodeGen/PowerPC/lower-massv.ll
The file was modifiedllvm/lib/Target/PowerPC/CMakeLists.txt
The file was addedllvm/lib/Target/PowerPC/PPCLowerMASSVEntries.cpp
Commit 73c3137a82c96789f4a2b8ec9427d23fa73498d8 by oliver.stannard
Fix static analysis warnings in ARM calling convention lowering
Fixes https://bugs.llvm.org/show_bug.cgi?id=43891
The file was modifiedllvm/lib/Target/ARM/ARMCallingConv.cpp
Commit 667223c3ed609794495ea30aaea6becd330f9459 by llvmgnsyncbot
gn build: Merge 40d0d4e2335
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/PowerPC/BUILD.gn
Commit 692b42fbb0530b41d9575c12e13076d160ab12a5 by llvm-dev
MCDwarfFile::DirIndex - fix uninitialized variable warning. NFCI.
The file was modifiedllvm/include/llvm/MC/MCDwarf.h
Commit 67286c87854adaa5d2826069ce685012e41ce05c by llvm-dev
createMCObjectStreamer - fix uninitialized variable warning. NFCI.
The file was modifiedllvm/include/llvm/Support/TargetRegistry.h
Commit e1000f1d674186c095eac2f252d45ff5b9306db7 by llvm-dev
VirtualFileSystem - fix uninitialized variable warnings. NFCI.
The file was modifiedllvm/lib/Support/VirtualFileSystem.cpp
Commit a8653da4320c5e37fccc54d396f2286a0dce7efe by llvm-dev
[X86] Fix uninitialized variable warnings. NFCI.
The file was modifiedllvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
The file was modifiedllvm/lib/Target/X86/X86FixupLEAs.cpp
The file was modifiedllvm/lib/Target/X86/X86WinEHState.cpp
The file was modifiedllvm/lib/Target/X86/X86IndirectBranchTracking.cpp
The file was modifiedllvm/lib/Target/X86/X86WinAllocaExpander.cpp
The file was modifiedllvm/lib/Target/X86/X86FlagsCopyLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86FixupSetCC.cpp
The file was modifiedllvm/lib/Target/X86/X86OptimizeLEAs.cpp
The file was modifiedllvm/lib/Target/X86/X86RetpolineThunks.cpp
The file was modifiedllvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
Commit be6ac471f613427f3b5b3a306fe033e526d59f76 by epastor
[ms] Fix Microsoft compatibility handling of commas in nested macro
expansions.
In Microsoft-compatibility mode, single commas from nested macro
expansions should not be considered as argument separators; we already
emulated this by marking them to be ignored. However, in MSVC's
preprocessor, subsequent expansions DO treat these commas as argument
separators... so we now ignore each comma at most once.
Includes a small unit test that validates we match MSVC's behavior as
shown in https://gcc.godbolt.org/z/y0twaq
Fixes PR43282
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69626
The file was modifiedclang/lib/Lex/PPMacroExpansion.cpp
The file was modifiedclang/test/Preprocessor/microsoft-ext.c
Commit d8f2bff75126c6dde694ad245f9807fa12ad5630 by julian.lettner
[lit] Better/earlier errors when no tests are executed
Fail early, when we discover no tests at all, or filter out all of them.
The file was modifiedllvm/utils/lit/lit/cl_arguments.py
The file was modifiedllvm/utils/lit/lit/run.py
The file was modifiedllvm/utils/lit/tests/selecting.py
The file was modifiedllvm/utils/lit/lit/main.py
Commit bd14bb42f03a227c7a83db942af4680d2fe0a78d by julian.lettner
[lit] Move measurement of testing time out of Run.execute
The file was modifiedllvm/utils/lit/lit/main.py
The file was modifiedllvm/utils/lit/lit/run.py
Commit 6eca4f46912a8318d7a5888506c3f26c20bdc012 by mgorny
[lldb] [Process/NetBSD] Add register info for missing register sets
Add info for all register sets supported in NetBSD, particularly for all
registers 'expected' by LLDB.  This is necessary in order to fix
python_api/lldbutil/iter/TestRegistersIterator.py test that currently
fails due to missing names of register sets (None).
This copies fpreg descriptions from Linux, and combines Linux' AVX and
MPX registers into a single XState group, to fit NetBSD register group
design.  Technically, we do not support MPX registers at the moment but
gdb-remote insists on passing their errors anyway, and if we do not
include it in any group, they end up in a separate anonymous group that
breaks the test.
While at it, swap the enums for XState and DBRegs to match register set
ordering.
This also adds a few consts to the lldb-x86-register-enums.h to provide
more consistency between user registers and debug registers.
Differential Revision: https://reviews.llvm.org/D69667
The file was modifiedlldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
The file was modifiedlldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.h
The file was modifiedlldb/source/Plugins/Process/Utility/lldb-x86-register-enums.h
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/register/register/register_command/TestRegisters.py
Commit 113181e9bd05353ed562ee7b971bf7f1e58cd5de by spatel
[DAGCombine][MSP430] use shift amount threshold in DAGCombine (2/2)
Continuation of: D69116
Contributes to a fix for PR43559:
https://bugs.llvm.org/show_bug.cgi?id=43559
See also D69099 and D69116
Use the TLI hook in DAGCombine.cpp to guard against creating shift nodes
that are not optimal for a target.
Patch by: @joanlluch (Joan LLuch)
Differential Revision: https://reviews.llvm.org/D69120
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/MSP430/shift-amount-threshold.ll
Commit 6ff439b57f0fc2b1a2193ae37637c531ff652b1c by listmail
[SimplifyCFG] Use a (trivially) dominanting widenable branch to remove
later slow path blocks
This transformation is a variation on the GuardWidening transformation
we have checked in as it's own pass. Instead of focusing on merge (i.e.
hoisting and simplifying) two widenable branches, this transform makes
the observation that simply removing a second slowpath block (by reusing
an existing one) is often a very useful canonicalization. This may lead
to later merging, or may not. This is a useful generalization when the
intermediate block has loads whose dereferenceability is hard to
establish.
As noted in the patch, this can be generalized further, and will be.
Differential Revision: https://reviews.llvm.org/D69689
The file was addedllvm/test/Transforms/SimplifyCFG/wc-widen-block.ll
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit b2b6a54f847f33f821f41e3e82bf3b86e08817a0 by craig.topper
[X86] Add support for -mvzeroupper and -mno-vzeroupper to match gcc
-mvzeroupper will force the vzeroupper insertion pass to run on CPUs
that normally wouldn't. -mno-vzeroupper disables it on CPUs where it
normally runs.
To support this with the default feature handling in clang, we need a
vzeroupper feature flag in X86.td. Since this flag has the opposite
polarity of the fast-partial-ymm-or-zmm-write we used to use to disable
the pass, we now need to add this new flag to every CPU except KNL/KNM
and BTVER2 to keep identical behavior.
Remove -fast-partial-ymm-or-zmm-write which is no longer used.
Differential Revision: https://reviews.llvm.org/D69786
The file was modifiedllvm/lib/Target/X86/X86VZeroUpper.cpp
The file was modifiedllvm/docs/ReleaseNotes.rst
The file was modifiedllvm/lib/Target/X86/X86.td
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedllvm/test/CodeGen/X86/avx-vzeroupper.ll
The file was modifiedclang/test/Driver/x86-target-features.c
The file was modifiedllvm/lib/Target/X86/X86Subtarget.h
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h
Commit 8112a423a8ede9bce64b6553e6451bf10995105c by Duncan P. N. Exon Smith
clang/Modules: Bring back optimization lost in 31e14f41a21f
31e14f41a21f9016050a20f07d5da03db2e8c13e accidentally dropped caching of
failed module loads.  This brings it back by making
ModuleMap::getCachedModuleLoad return an Optional.
The file was modifiedclang/lib/Frontend/CompilerInstance.cpp
The file was modifiedclang/include/clang/Lex/ModuleMap.h
Commit 9cc3ebf8b7630e30bc0eea6dc4a55348edf71091 by alexandre.ganea
Fix warning: format specifies type 'unsigned long' but the argument has
type 'unsigned long long' [-Wformat]
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/sanitizer_bitvector_test.cpp
Commit efad56b2be9b9f7d5b62d1f06541192fa6b537ee by alexandre.ganea
Remove unused variables, as suggested by @mcgov.
Fixes warning: unused variable 'XXX' [-Wunused-const-variable]
The file was modifiedcompiler-rt/lib/asan/asan_malloc_win.cpp
Commit af11f417fc7d2390da4a883c05c098f23891862e by erik.pilkington
[demangle] NFC: get rid of NodeOrString
This class was a bit overengineered, and was triggering some PVS
warnings. Instead, put strings into a NameType and let clients
unconditionally treat it as a Node.
The file was modifiedlibcxxabi/src/cxa_demangle.cpp
The file was modifiedlibcxxabi/src/demangle/ItaniumDemangle.h
The file was modifiedllvm/lib/Support/ItaniumManglingCanonicalizer.cpp
The file was modifiedllvm/include/llvm/Demangle/ItaniumDemangle.h
The file was modifiedllvm/lib/Demangle/ItaniumDemangle.cpp
Commit 4312c4afd43209400df53ca541b4b19919f797af by Stanislav.Mekhanoshin
[AMDGPU] deduplicate tablegen predicates
We are duplicating predicates if several parts of the combined predicate
list contain the same condition. Added code to deduplicate the list.
We have AssemblerPredicates and AssemblerPredicate in the
PredicateControl, but we never use AssemblerPredicates with an actual
list, so this one is dropped.
This addresses the first part of the llvm bug 43886:
https://bugs.llvm.org/show_bug.cgi?id=43886
Differential Revision: https://reviews.llvm.org/D69815
The file was modifiedllvm/lib/Target/AMDGPU/VOP2Instructions.td
The file was modifiedllvm/lib/Target/AMDGPU/SOPInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/VOPCInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/DSInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/VOP1Instructions.td
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.td
The file was modifiedllvm/lib/Target/AMDGPU/SMInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/VOP3Instructions.td
The file was modifiedllvm/lib/Target/AMDGPU/VOP3PInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/MIMGInstructions.td
Commit adbf64ccc9e18278600ebaeadd8f0117eb8e64b1 by lawrence_danna
[LLDB][Python] remove ArgInfo::count
Summary: This patch updates the last user of ArgInfo::count and deletes
it.   I also delete `GetNumInitArguments()` and `GetInitArgInfo()`.
Classess are callables and `GetArgInfo()` should work on them.
On python 3 it already works, of course. `inspect` is good.
On python 2 we have to add yet another special case.   But hey if python
2 wasn't crufty we wouln't need python 3.
I also delete `is_bound_method` becuase it is unused.
This path is tested in `TestStepScripted.py`
Reviewers: labath, mgorny, JDevlieghere
Reviewed By: labath, JDevlieghere
Subscribers: lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D69742
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.h
The file was modifiedlldb/scripts/Python/python-wrapper.swig
The file was modifiedlldb/unittests/ScriptInterpreter/Python/PythonDataObjectsTests.cpp
Commit 8bbf2e37167d9ac08fa9d3c772d48ca7d9a6f8f6 by a.bataev
[OPENMP50]Support for imperfectly nested loops.
Added support for imperfectly nested loops introduced in OpenMP 5.0.
The file was modifiedclang/test/OpenMP/for_collapse_messages.cpp
The file was modifiedclang/include/clang/AST/StmtOpenMP.h
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp
The file was modifiedclang/test/OpenMP/for_codegen.cpp
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp
The file was modifiedclang/test/OpenMP/for_ast_print.cpp
The file was modifiedclang/lib/AST/StmtOpenMP.cpp
Commit d11a9018b773c0359934a7989d886b02468112e4 by jyknight
Add release notes for commit ccc4d83cda16bea1d9dfd0967dc7d2cfb24b8e75.
(Which was "[ObjC] Diagnose implicit type coercion from ObjC 'Class' to
object pointer types.")
The file was modifiedclang/docs/ReleaseNotes.rst
Commit 3eecd601ed803ed3dc15b054cdddee68702ba3dd by a.bataev
[OPENMP][DOCS]Update list of implemented features, NFC.
The file was modifiedclang/docs/OpenMPSupport.rst
Commit 1bfcc60828d6e1fb93d65b53986514c059b1263d by Stanislav.Mekhanoshin
[AMDGPU] Added assert in SIFoldOperands before ptr use. NFC.
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Commit 403739b2fdb64e90118017355bd01f88a0640b3f by koraq
[AST][NFC] Fixes a comment typo
Also a test for commit access.
The file was modifiedclang/lib/AST/DeclCXX.cpp
Commit 1cce82eae84a65fc03402f90a67b5b804d02dd6c by sbc
Add more binutils tools to LLVM_INSTALL_TOOLCHAIN_ONLY target
Also add the aliases for these tools so that
LLVM_INSTALL_BINUTILS_SYMLINKS and LLVM_INSTALL_TOOLCHAIN_ONLY can work
together.
Differential Revision: https://reviews.llvm.org/D69635
The file was modifiedllvm/cmake/modules/AddLLVM.cmake
Commit 4cbe10efc2011641f72357685feff35ca87ed0d5 by e.menezes
[AArch64] Update for Exynos
Fix the costs of integer division.
The file was modifiedllvm/lib/Target/AArch64/AArch64SchedExynosM4.td
Commit dc34b1c94df683eb85df989c1d62c81c588a29f8 by ron.lieberman
Test commit: adds a . to comment. NFC
The file was modifiedopenmp/libomptarget/plugins/cuda/src/rtl.cpp
Commit a5c8ec4baa2c00d8dbca36ffd236a40f9e0c07ed by Vedant Kumar
[CGDebugInfo] Emit subprograms for decls when AT_tail_call is understood
Currently, clang emits subprograms for declared functions when the
target debugger or DWARF standard is known to support entry values
(DW_OP_entry_value & the GNU equivalent).
Treat DW_AT_tail_call the same way to allow debuggers to follow cross-TU
tail calls.
Pre-patch debug session with a cross-TU tail call:
```
* frame #0: 0x0000000100000fa4 main`target at b.c:4:3 [opt]
   frame #1: 0x0000000100000f99 main`main at a.c:8:10 [opt]
```
Post-patch (note that the tail-calling frame, "helper", is visible):
```
* frame #0: 0x0000000100000fa4 main`target at b.c:4:3 [opt]
   frame #1: 0x0000000100000f80 main`helper [opt] [artificial]
   frame #2: 0x0000000100000f99 main`main at a.c:8:10 [opt]
```
rdar://46577651
Differential Revision: https://reviews.llvm.org/D69743
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was modifiedclang/test/CodeGenCXX/dbg-info-all-calls-described.cpp
The file was modifiedllvm/test/DebugInfo/X86/dwarf-callsite-related-attrs.ll
The file was modifiedclang/test/CodeGen/debug-info-extern-call.c
Commit 6db7a5cd7c800a588e94ce5c1ef24ae4d60ecdd3 by Saleem Abdulrasool
build: explicitly set the linker language for unwind
The unwinder should not depend on libc++.  In fact, we do not end up
with a link against libc++ as we do not have a dependency on libc++ at
runtime.  This ensures that we link with `clang` rather than `clang++`.
The file was modifiedlibunwind/src/CMakeLists.txt
Commit 610f80f7baea5e46c0ccd4cbb905a679c7c56a05 by Vedant Kumar
[cmake] Add an option to skip stripping before install
The swift build system has support for cross-compiling, installing, and
generating symbols for lldb. As the swift symbol-generation step occurs
after installation, we need to disable stripping during the install.
The file was modifiedlldb/cmake/modules/LLDBConfig.cmake
The file was modifiedlldb/cmake/modules/AddLLDB.cmake
Commit 586952f4cefd809b7becd16c6d1e751ea923adfd by jorg
Optimize std::midpoint for integers
Same idea as the current algorithm, that is, add (half of the difference
between a and b) to a.
But we use a different technique for computing the difference: we
compute b - a into a pair of integers that are named "sign_bit" and
"diff". We have to use a pair because subtracting two 32-bit integers
produces a 33-bit result.
Computing half of that is a simple matter of shifting diff right by 1,
and adding sign_bit shifted left by 31. llvm knows how to do that with
one instruction: shld.
The only tricky part is that if the difference is odd and negative, then
shifting it by one isn't the same as dividing it by two - shifting a
negative one produces a negative one, for example. So there's one more
adjustment: if the sign bit and the low bit of diff are one, we add one.
For a demonstration of the codegen difference, see
https://godbolt.org/z/7ar3K9 , which also has a built-in test.
Differential Revision: https://reviews.llvm.org/D69459
The file was modifiedlibcxx/include/numeric
Commit fff2721286e1c051c2b1c91210ddc3e6a9b179e1 by yhs
[BPF] Fix CO-RE bugs with bitfields
bitfield handling is not robust with current implementation. I have seen
two issues as described below.
Issue 1:
struct s {
   long long f1;
   char f2;
   char b1:1;
} *p;
The current approach will generate an access bit size
56 (from b1 to the end of structure) which will be
rejected as it is not power of 2.
Issue 2:
struct s {
   char f1;
   char b1:3;
   char b2:5;
   char b3:6:
   char b4:2;
   char f2;
};
The LLVM will group 4 bitfields together with 2 bytes. But
loading 2 bytes is not correct as it violates alignment
requirement. Note that sometimes, LLVM breaks a large
bitfield groups into multiple groups, but not in this case.
To resolve the above two issues, this patch takes a different approach.
The alignment for the structure is used to construct the offset of the
bitfield access. The bitfield incurred memory access is an aligned
memory access with alignment/size equal to the alignment of the
structure. This also simplified the code.
This may not be the optimal memory access in terms of memory access
width. But this should be okay since extracting the bitfield value will
have the same amount of work regardless of what kind of memory access
width.
Differential Revision: https://reviews.llvm.org/D69837
The file was modifiedllvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
The file was addedllvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
The file was addedllvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2.ll
Commit 4264e7bbfdb30ed8fe1e0907bfa25e4d1bb04207 by Yaxun.Liu
[CUDA][HIP] Disable emitting llvm.linker.options in device compilation
The linker options (e.g. pragma detect_mismatch) are intended for host
compilation only, therefore disable it for device compilation.
Differential Revision: https://reviews.llvm.org/D57829
The file was addedclang/test/Driver/hip-autolink.hip
The file was addedclang/test/CodeGenCUDA/ms-linker-options.cu
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
Commit 0aba69eb1a01c44185009f50cc633e3c648e9950 by Devin Coughlin
[analyzer] Add test directory for scan-build.
The static analyzer's scan-build script is critical infrastructure but
is not well tested. To start to address this, add a new test directory
under tests/Analysis for scan-build lit tests and seed it with several
tests. The goal is that future scan-build changes will be accompanied by
corresponding tests.
Differential Revision: https://reviews.llvm.org/D69781
The file was addedclang/test/Analysis/scan-build/exclude_directories.test
The file was addedclang/test/Analysis/scan-build/Inputs/multidirectory_project/directory2/file2.c
The file was addedclang/test/Analysis/scan-build/html_output.test
The file was modifiedllvm/utils/lit/lit/llvm/config.py
The file was addedclang/test/Analysis/scan-build/Inputs/multidirectory_project/directory1/file1.c
The file was addedclang/test/Analysis/scan-build/plist_html_output.test
The file was modifiedclang/test/lit.cfg.py
The file was addedclang/test/Analysis/scan-build/help.test
The file was addedclang/test/Analysis/scan-build/Inputs/single_null_dereference.c
The file was addedclang/test/Analysis/scan-build/plist_output.test
Commit 31be9f3f7dee80c586d3beac9a65663d5628cf96 by aqjune
Fix clone_constant_impl to correctly deal with null pointers
Summary: This patch resolves llvm-c-test's following error
``` LLVM ERROR: LLVMGetValueKind returned incorrect type
```
which arises when the input bitcode contains a null pointer.
Reviewers: jdoerfert, CodaFi, deadalnix
Reviewed By: jdoerfert
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68928
The file was modifiedllvm/tools/llvm-c-test/echo.cpp
The file was modifiedllvm/test/Bindings/llvm-c/echo.ll
Commit 48223d92a98e2eb7da6844d56471953f83da191e by Devin Coughlin
[analyzer] Fixup scan-build tests for non-Darwin platforms.
This is a fix to 0aba69eb1a01c44185009f50cc633e3c648e9950 to address
failing bots.
The file was modifiedclang/test/Analysis/scan-build/plist_output.test
The file was modifiedclang/test/Analysis/scan-build/exclude_directories.test
The file was modifiedclang/test/Analysis/scan-build/plist_html_output.test
The file was modifiedclang/test/Analysis/scan-build/html_output.test
The file was modifiedclang/test/Analysis/scan-build/help.test
Commit abc04ff4012c62c98aa9f0d840114b2f56855dc8 by Devin Coughlin
[analyzer] Require darwin for scan-build tests
Let's at least get some coverage from these tests. We can generalize to
other platforms later.
The file was modifiedclang/test/Analysis/scan-build/plist_output.test
The file was modifiedclang/test/Analysis/scan-build/exclude_directories.test
The file was modifiedclang/test/Analysis/scan-build/html_output.test
The file was modifiedclang/test/Analysis/scan-build/plist_html_output.test
The file was modifiedclang/test/Analysis/scan-build/help.test
Commit f65493a83e3bdb402fb1dfa92bcc25707e961147 by craig.topper
[X86] Teach X86MCInstLower to swap operands of commutable instructions
to enable 2-byte VEX encoding.
Summary: The 2 source operands commutable instructions are encoded in
the VEX.VVVV field and the r/m field of the MODRM byte plus the VEX.B
field.
The VEX.B field is missing from the 2-byte VEX encoding. If the VEX.VVVV
source is 0-7 and the other register is 8-15 we can swap them to avoid
needing the VEX.B field. This works as long as the VEX.W, VEX.mmmmm, and
VEX.X fields are also not needed.
Fixes PR36706.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68550
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-512.ll
The file was modifiedllvm/test/CodeGen/X86/vector-trunc-math.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-512.ll
The file was modifiedllvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-by-select-loop.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-512.ll
The file was modifiedllvm/test/CodeGen/X86/x86-interleaved-access.ll
The file was modifiedllvm/test/CodeGen/X86/midpoint-int-vec-256.ll
The file was modifiedllvm/test/CodeGen/X86/pr29112.ll
The file was modifiedllvm/test/CodeGen/X86/uadd_sat_vec.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-256.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
The file was modifiedllvm/test/CodeGen/X86/vec_umulo.ll
The file was modifiedllvm/test/CodeGen/X86/avx-intel-ocl.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
The file was modifiedllvm/test/CodeGen/X86/vector-trunc-packus.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-512.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
The file was modifiedllvm/test/CodeGen/X86/sad.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-vselect.ll
The file was modifiedllvm/test/CodeGen/X86/masked_compressstore.ll
The file was modifiedllvm/test/CodeGen/X86/masked_expandload.ll
The file was modifiedllvm/test/CodeGen/X86/madd.ll
The file was modifiedllvm/lib/Target/X86/X86MCInstLower.cpp
The file was modifiedllvm/test/CodeGen/X86/avx512-mask-op.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-512.ll
Commit 9f34447f3ff525029ec889bf3a82b04678a9d7c0 by yhs
[BPF] fix a use after free bug
Commit fff2721286e1 ("[BPF] Fix CO-RE bugs with bitfields") fixed CO-RE
handling bitfield issues. But the implementation introduced a use after
free bug. The "Base" of the intrinsic might be freed so later on
accessing the Type of "Base" might access the freed memory. The failed
test case,
CodeGen/BPF/CORE/offset-reloc-middle-chain.ll is exactly used to test
such a case.
Similarly to previous attempt to remember Metadata etc, remember "Base"
pointee Alignment in advance to avoid such use after free bug.
The file was modifiedllvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
Commit 58acbce3def63a207b8f5a69318a99666a4aac53 by aqjune
[IR] Add Freeze instruction
Summary:
- Define Instruction::Freeze, let it be UnaryOperator
- Add support for freeze to LLLexer/LLParser/BitcodeReader/BitcodeWriter
The format is `%x = freeze <ty> %v`
- Add support for freeze instruction to llvm-c interface.
- Add m_Freeze in PatternMatch.
- Erase freeze when lowering IR to SelDag.
Reviewers: deadalnix, hfinkel, efriedma, lebedev.ri, nlopes, jdoerfert,
regehr, filcab, delcypher, whitequark
Reviewed By: lebedev.ri, jdoerfert
Subscribers: jfb, kristof.beyls, hiraditya, lebedev.ri, steven_wu,
dexonsmith, xbolva00, delcypher, spatel, regehr, trentxintong, vsk,
filcab, nlopes, mehdi_amini, deadalnix, llvm-commits
Differential Revision: https://reviews.llvm.org/D29011
The file was modifiedllvm/lib/IR/Core.cpp
The file was modifiedllvm/include/llvm/IR/Operator.h
The file was modifiedllvm/lib/Bitcode/Reader/BitcodeReader.cpp
The file was modifiedllvm/test/Transforms/MergeFunc/inline-asm.ll
The file was modifiedllvm/include/llvm/IR/IRBuilder.h
The file was modifiedllvm/lib/IR/Instruction.cpp
The file was addedllvm/test/Bindings/llvm-c/freeze.ll
The file was modifiedllvm/test/Bitcode/compatibility.ll
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedllvm/lib/IR/ConstantFold.cpp
The file was modifiedllvm/lib/AsmParser/LLToken.h
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
The file was modifiedllvm/lib/AsmParser/LLLexer.cpp
The file was modifiedllvm/include/llvm/IR/Instruction.def
The file was modifiedllvm/include/llvm-c/Core.h
The file was modifiedllvm/include/llvm/Bitcode/LLVMBitCodes.h
The file was modifiedllvm/lib/AsmParser/LLParser.cpp
The file was modifiedllvm/lib/IR/Instructions.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
The file was modifiedllvm/tools/llvm-c-test/echo.cpp
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/include/llvm/IR/PatternMatch.h
The file was modifiedllvm/test/Bindings/OCaml/core.ml
Commit 103968d147b135ebfcee69d6d7a1428163e66aaa by craig.topper
[X86] Lower the cost of avx512 horizontal bool and/or reductions to
2*log2(bitwidth)+1 for legal types.
This better represents the kshift+binop we'd get for each stage before
the final extract. Its likely we'll do even better by doing a kmov and a
cmp with a GPR, but this is a good start.
The default handling was costing a worst case single source permute
shuffle of the vector before the binop. This worst case assumes the
shuffle might have to be emulated with extracts and inserts. But since
we know we're doing a reduction we can assume we'll get kshift lowering.
There's still some room for improvement here, but this is much better
than it was.
The file was modifiedllvm/test/Analysis/CostModel/X86/reduce-or.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/reduce-and.ll
Commit 92ef101da91d39525043034694b3088d0a08f43f by aqjune
[IR] Remove switch's default block that causes clang 8 raise error
The file was modifiedllvm/lib/IR/ConstantFold.cpp
Commit db5074dc10222a8202adcd7c1da1acd2828fbecb by Raphael Isemann
[lldb][NFC] Give some parameters in CommandInterpreter more descriptive
names
The file was modifiedlldb/source/Interpreter/CommandInterpreter.cpp
The file was modifiedlldb/include/lldb/Interpreter/CommandInterpreter.h
Commit edfb8eea575582f5a4f485368d84b7c5e9853780 by david.green
[AArch64] Update test checks on merge-store-dependency.ll. NFC
The file was modifiedllvm/test/CodeGen/AArch64/merge-store-dependency.ll
Commit 92164cf25d513d44fdb5d727a33d02ad4c87384e by sjoerd.meijer
Recommit "[HardwareLoops] Optimisation remarks"
With a few things fixed:
- initialisaiton of the optimisation remark pass (this was causing the
buildbot
failures on PPC),
- a test case.
Differential Revision: https://reviews.llvm.org/D69660
The file was modifiedllvm/test/Transforms/HardwareLoops/ARM/structure.ll
The file was modifiedllvm/lib/CodeGen/HardwareLoops.cpp
The file was modifiedllvm/test/CodeGen/ARM/O3-pipeline.ll
Commit e578d0fd295a67bce1e1fc922237f459deb49c7e by simon
[mips] Fix `__mips_isa_rev` macros value for Octeon CPU
The file was modifiedclang/lib/Basic/Targets/Mips.cpp
The file was modifiedclang/test/Preprocessor/init.c
Commit 0d14656b9d8ca38b8ea321c7047eaeec43c5b2ef by simon
[mips] Set __OCTEON__ macros
The file was modifiedclang/test/Preprocessor/init.c
The file was modifiedclang/lib/Basic/Targets/Mips.cpp
Commit b4c5b8f3f51206bac2282a8b483e76ad59a5aed5 by pavel
DWARFDebugLoclists: Make it possible to read relocated addresses
Summary: Handling relocations was not needed when the loclists section
was a DWO-only thing. But since DWARF5, it is possible to use it in
regular objects too, and the standard permits embedding addresses into
the section directly. These addresses need to be relocated in unlinked
files.
Reviewers: JDevlieghere, dblaikie, probinson
Subscribers: aprantl, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68271
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFContext.cpp
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp
The file was addedllvm/test/tools/llvm-dwarfdump/X86/debug_loclists.s
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFDebugLoc.h
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Commit 0d47c7aba364962d14e4e25249d75da7bdf29b78 by luismarques
[RISCV] Add InstrInfo areMemAccessesTriviallyDisjoint hook
Summary: Introduces the `InstrInfo::areMemAccessesTriviallyDisjoint`
hook. The test could check for instruction reorderings, but to avoid
being brittle it just checks instruction dependencies.
Reviewers: asb, lenary Reviewed By: lenary Tags: #llvm Differential
Revision: https://reviews.llvm.org/D67046
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.h
The file was addedllvm/test/CodeGen/RISCV/disjoint.ll
Commit ccf1a5f4bbe680f20e26c29774d62bec6cb226da by lebedev.ri
[InstCombine] dropRedundantMaskingOfLeftShiftInput(): truncation
(PR42563)
Summary: That fold keeps growing and growing :( I think this may be one
of the last pieces for it.
Since D67677/D67725, the fold knowns the general form of the pattern -
where some masking is needed: https://rise4fun.com/Alive/F5R
https://rise4fun.com/Alive/gslRa
But there is one more huge piece missing - if you are extracting some
bits, it is not impossible that the origin is wider than the extraction,
i.e. there may be a truncation. And we don't deal with that yet.
But we can, and the generalization remains fully identical:
https://rise4fun.com/Alive/Uar https://rise4fun.com/Alive/5SW
After a preparatory cleanup i think the diff looks rather clean.
One missing piece is that in some patterns (especially pat. b),
`-1` only needs to be `-1` in final type, but that is for later..
https://bugs.llvm.org/show_bug.cgi?id=42563
Reviewers: spatel, nikic
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69125
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-a.ll
The file was modifiedllvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-a.ll
The file was modifiedllvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-c.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-e.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-f.ll
The file was modifiedllvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-b.ll
The file was modifiedllvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-d.ll
The file was modifiedllvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-e.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-d.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-b.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-c.ll
Commit 12c4a71ca9dc19dc364cd6ad4cfc2a3787141c24 by lebedev.ri
[LoopUnroll] peel-loop-conditions.ll: add some 'is even/odd' peeling
tests
The file was modifiedllvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll
Commit 28cf9698abd39221001ace885a7d1c1f488b967c by pavel
MemoryRegion: Print "don't know" permission values as such
Summary: The permissions in a memory region have ternary states (yes,
no, don't know), but the memory region command only prints in binary,
treating
"don't know" as "yes", which is particularly confusing as for instance
the unwinder will treat an unknown value as "no".
This patch makes is so that we distinguish all three states when
printing the values, using "?" to indicate the lack of information. It
is implemented via a special argument to the format provider for the
OptionalBool enumeration.
Reviewers: clayborg, jingham
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D69106
The file was modifiedlldb/test/Shell/Minidump/memory-region-from-module.yaml
The file was modifiedlldb/source/Target/MemoryRegionInfo.cpp
The file was modifiedlldb/include/lldb/Target/MemoryRegionInfo.h
The file was modifiedlldb/source/Commands/CommandObjectMemory.cpp
Commit 4ecff91ed1df05edbdb55cb2ccdf58466f1333b0 by pavel
lldb/minidump: Add support for the alternate ARM64 constant
The file was modifiedlldb/source/Plugins/Process/minidump/MinidumpParser.cpp
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/postmortem/minidump-new/regions-linux-map.yaml
Commit 9a8d477a0e00c15d6d33a52486fa931483b7f2ea by sven.vanhaastregt
[OpenCL] Add builtin function attribute handling
Add handling for the "pure", "const" and "convergent" function
attributes for OpenCL builtin functions.
Patch by Pierre Gondois and Sven van Haastregt.
Differential Revision: https://reviews.llvm.org/D64319
The file was modifiedclang/lib/Sema/SemaLookup.cpp
The file was addedclang/test/CodeGenOpenCL/fdeclare-opencl-builtins.cl
The file was modifiedclang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
The file was modifiedclang/lib/Sema/OpenCLBuiltins.td
Commit 0e56b0f94bfc683c5a95e96784cfc9229a730bc8 by sven.vanhaastregt
[OpenCL] Group builtin functions by prototype
The TableGen-generated file containing the function definitions can be
reorganized to save some memory in the Clang binary.  Functions having
the same prototype(s) will point to a shared list of prototype(s).
Patch by Pierre Gondois and Sven van Haastregt.
Differential Revision: https://reviews.llvm.org/D63557
The file was modifiedclang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
Commit 9357b5d08497326a1895cab6c1d712bf12a34519 by sguelton
Revert and patch "[Python] Remove readline module"
Fix https://bugs.llvm.org/show_bug.cgi?id=43830 while avoiding polluting
the global Python namespace.
This both reverts r357277 to rebundle a version of Python's readline
module based on libedit.
However, this patch also provides two improvements over the previous
implementation:
1. use PyMem_RawMalloc instead of PyMem_Malloc, as expected by
PyOS_Readline
  (prevents to segfault upon exit of interactive session) 2. patch the
readline module upon embedded interpreter loading, instead of
  patching it globally, which should prevent any side effect on other
  modules/packages 3. only activate the patched module if libedit is
actually linked in lldb
Differential Revision: https://reviews.llvm.org/D69793
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
The file was addedlldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.h
The file was addedlldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
Commit f71e35dc1f3ea9b368b1d4626ee9bf7993839084 by pavel
lldb/breakpad: add suppport for the "x86_64h" architecture
The file was modifiedlldb/source/Plugins/ObjectFile/Breakpad/BreakpadRecords.cpp
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/Inputs/line-table-edgecases.syms
Commit 7d9af03ff7a0d4fb6ae3ec224a0d8d7398bdbd84 by david.green
[Scheduling][ARM] Consistently enable PostRA Machine scheduling
In the ARM backend, for historical reasons we have only some targets
using Machine Scheduling. The rest use the old list scheduler as they
are using itinaries and the list scheduler seems to produce better code
(and not crash running out of register on v6m codes). So whether to use
the MIScheduler or not is checked at runtime from the subtarget
features.
This is fine, except for post-ra scheduling. Whether to use the old
post-ra list scheduler or the post-ra machine schedule is decided as the
pass manager is set up, in arms case from a newly constructed subtarget.
Under some situations, like LTO, this won't include the correct cpu so
can pick the wrong option. This can have a surprising effect on
performance.
To fix that, this patch overrides targetSchedulesPostRAScheduling and
addPreSched2 in the ARM backend, adding _both_ post-ra schedulers and
picking at runtime which to execute. To pick between the two I've had to
add a enablePostRAMachineScheduler() method that normally returns
enableMachineScheduler() && enablePostRAScheduler(), which can be
overridden to enable just one of PostRAMachineScheduler vs
PostRAScheduler.
Thanks to David Penry for the identifying this problem.
Differential Revision: https://reviews.llvm.org/D69775
The file was addedllvm/test/CodeGen/ARM/postrasched.ll
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-vstm-wrback.ll
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-vstm.ll
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-vldm-wrback.ll
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-ldm-wrback.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetMachine.h
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-ldm.ll
The file was modifiedllvm/lib/CodeGen/MachineScheduler.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetSubtargetInfo.h
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-stm-wrback.ll
The file was modifiedllvm/lib/Target/ARM/ARMSubtarget.h
The file was modifiedllvm/lib/CodeGen/TargetSubtargetInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMSubtarget.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-vldm.ll
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-stm.ll
The file was modifiedllvm/test/CodeGen/ARM/O3-pipeline.ll
Commit cf581d7977c5c80e9f6cb6e304d7eb3d0792f360 by david.green
[ARM] Always enable UseAA in the arm backend
This feature controls whether AA is used into the backend, and was
previously turned on for certain subtargets to help create less
constrained scheduling graphs. This patch turns it on for all
subtargets, so that they can all make use of the extra information to
produce better code.
Differential Revision: https://reviews.llvm.org/D69796
The file was modifiedllvm/lib/Target/ARM/ARM.td
The file was modifiedllvm/lib/Target/ARM/ARMSubtarget.h
The file was modifiedllvm/test/CodeGen/ARM/thumb1_return_sequence.ll
The file was modifiedllvm/test/CodeGen/ARM/va_arg.ll
The file was modifiedllvm/test/CodeGen/ARM/memcpy-ldm-stm.ll
The file was modifiedllvm/test/CodeGen/ARM/useaa.ll
Commit 646896a442249380f74ff404e6dd26687f3dc6d9 by thomasp
Fix PR40644: miscompile indexed FP constant store
Summary: Functions replaceStoreOfFPConstant() and OptimizeFloatStore()
both replace store of float by a store of an integer unconditionally.
However this generates wrong code when the store that is replaced is an
indexed or truncating store. This commit solves this issue by adding an
early return in these functions when the store being considered is not a
normal store.
Bug was only observed on out of tree targets, hence the lack of testcase
in this commit.
Reviewers: efriedma
Subscribers: hiraditya, arphaman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68420
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Commit 93767143147b7d765c6ce8123a4226d449228649 by paulsson
[Clang FE]  Recognize -mnop-mcount CL option (SystemZ only).
Recognize -mnop-mcount from the command line and add a function
attribute
"mnop-mcount"="true" when passed.
When this option is used, a nop is added instead of a call to fentry.
This is used when building the Linux Kernel.
If this option is passed for any other target than SystemZ, an error is
generated.
Review: Ulrich Weigand https://reviews.llvm.org/D67763
The file was modifiedclang/include/clang/Basic/CodeGenOptions.def
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was addedclang/test/CodeGen/mnop-mcount.c
The file was modifiedclang/include/clang/Basic/DiagnosticCommonKinds.td
The file was modifiedclang/lib/CodeGen/CodeGenFunction.cpp
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/include/clang/Driver/Options.td
Commit 2d21068d9fa05df9e986020353224ec7449fbe68 by nunoplopes
[Docs] Add LangRef documentation for freeze instruction
Summary:
- Describe the new freeze instruction
- Make it explicit that branch on undef/poison is UB
Reviewers: chandlerc, majnemer, efriedma, nikic, reames, jdoerfert,
lebedev.ri, regehr
Subscribers: fhahn, bollu, lebedev.ri, delcypher, spatel, filcab,
llvm-commits, aqjune
Differential Revision: https://reviews.llvm.org/D29121
The file was modifiedllvm/docs/LangRef.rst
Commit f01b9aa89e8cd5d3cca0e13835302f69c1f879d2 by david.green
[MachineScheduler] Enable AA in PostRA Machine scheduler
This adds AA to Post-RA Machine Scheduling, allowing the pass more
freedom when handling memory operations.
My understanding is that this was just never done, not that it is
inherently incorrect to do so. The older PostRA List scheduler already
makes use of AA, it's just that the MI PostRA Scheduler was never taught
to use it.
Differential Revision: https://reviews.llvm.org/D69814
The file was modifiedllvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
The file was modifiedllvm/test/CodeGen/PowerPC/f128-aggregates.ll
The file was modifiedllvm/test/CodeGen/PowerPC/extract-and-store.ll
The file was modifiedllvm/test/CodeGen/AArch64/merge-store-dependency.ll
The file was modifiedllvm/lib/CodeGen/MachineScheduler.cpp
Commit 9f294fc4977b361158107c389ce66d29a8f3b7ee by Dávid Bolvanský
[AtomicExpandPass] Silence static analyzer warnings about operator
priority. NFCI.
The file was modifiedllvm/lib/CodeGen/AtomicExpandPass.cpp
Commit d590498829d8c0d4f4f673569949fa3850485c9c by sguelton
[lldb] Fix readline/libedit compat patch for py2
This is a follow-up to https://reviews.llvm.org/D69793
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.cpp
Commit 3ce0c78501813e7a278573d78a0be47755ed0518 by spatel
[InstCombine] add tests for shift-logic-shift; NFC
This is based on existing CodeGen test files for x86 and AArch64. The
corresponding potential transform is shown in: rL370617
The file was addedllvm/test/Transforms/InstCombine/shift-logic.ll
Commit 1842fe6be3c341642965233a9ec7c30da277f42b by llvm-dev
Add missing GVN =operator. NFCI.
Fixes PVS Studio warning that the 'ValueTable' class implements a copy
constructor, but lacks the '=' operator.
The file was modifiedllvm/lib/Transforms/Scalar/GVN.cpp
The file was modifiedllvm/include/llvm/Transforms/Scalar/GVN.h
Commit 77debf51aba273a8d02597f90046c1f849a49add by llvm-dev
[GVN] Fix uninitialized variable warnings. NFCI.
The file was modifiedllvm/lib/Transforms/Scalar/NewGVN.cpp
The file was modifiedllvm/include/llvm/Transforms/Scalar/GVN.h
The file was modifiedllvm/lib/Transforms/Scalar/GVN.cpp
Commit 0016c1f40043e67068230208fd8f34657ad44b99 by kazu
[JumpThreading] Factor out common code to update the SSA form (NFC)
Summary: This patch factors out common code to update the SSA form in
JumpThreading.cpp -- partly for readability and partly to facilitate an
coming patch of my own.
Reviewers: wmi
Subscribers: hiraditya, jfb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69811
The file was modifiedllvm/include/llvm/Transforms/Scalar/JumpThreading.h
The file was modifiedllvm/lib/Transforms/Scalar/JumpThreading.cpp
Commit 68f39de042ef34ef17d93c18e80d42f2e1a970ab by francisvm
[NFC][ObjC][ARC] Add tests for OptimizeRetainRVCall
Add tests for bitcasts + zero GEPs, and pre-commit tests for lifetime
markers.
The file was modifiedllvm/test/Transforms/ObjCARC/post-inlining.ll
Commit 47d1029788b6744596bb1ab6791450eb32f2a488 by francisvm
[ObjC][ARC] Ignore lifetime markers between *ReturnValue calls
When eliminating a pair of
`llvm.objc.autoreleaseReturnValue`
followed by
`llvm.objc.retainAutoreleasedReturnValue`
we need to make sure that the instructions in between are safe to
ignore.
Other than bitcasts and useless GEPs, it's also safe to ignore lifetime
markers for both static allocas (lifetime.start/lifetime.end) and
dynamic allocas (stacksave/stackrestore).
These get added by the inliner as part of the return sequence and can
prevent the transformation from happening in practice.
Differential Revision: https://reviews.llvm.org/D69833
The file was modifiedllvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
The file was modifiedllvm/test/Transforms/ObjCARC/post-inlining.ll
Commit 642916adc97e54810aa597512ca7012b3c8697c5 by a.bataev
[OPENMP][DOCS]Fix coloring of the implemented features status, NFC.
The file was modifiedclang/docs/OpenMPSupport.rst
Commit c7f127d93f4bc694737081501c65ffa37fd1da50 by llvm-dev
[MachineOutliner] Fix uninitialized variable warnings. NFCI.
The file was modifiedllvm/lib/CodeGen/MachineOutliner.cpp
The file was modifiedllvm/include/llvm/CodeGen/MachineOutliner.h
Commit dec21e445142c26a68441b7c75fb75a7e03db754 by llvm-dev
[MCObjectFileInfo] Fix uninitialized variable warnings. NFCI.
The file was modifiedllvm/include/llvm/MC/MCObjectFileInfo.h
Commit 95a25d8883365c26999496400a75df83e577e0de by llvm-dev
Fix uninitialized variable warning. NFCI.
The file was modifiedllvm/include/llvm/ProfileData/InstrProf.h
Commit 100e797adb433724a17c9b42b6533cd634cb796b by gil.rapaport
[LV] Apply sink-after & interleave-groups as VPlan transformations (NFC)
This recommits 2be17087f8c38934b7fc9208ae6cf4e9b4d44f4b (reverted in
d3ec06d219788801380af1948c7f7ef9d3c6100b for heap-use-after-free) with a
fix in IAI's reset() which was not clearing the set of interleave groups
after deleting them.
The file was modifiedllvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
The file was modifiedllvm/unittests/Transforms/Vectorize/VPlanTest.cpp
The file was modifiedllvm/include/llvm/Analysis/VectorUtils.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
Commit 7b710a4294c1baed0157d86d3e2dabac78c306ce by a.bataev
[OPENMP]Improve diagnostics for unsupported unified addressing.
Improved diagnostics for better user experience.
The file was modifiedclang/test/OpenMP/requires_codegen.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp
Commit 39525a6723854e9920b2560aadaa399cfbbd006a by James Molloy jmolloy
[DFAPacketizer] Allow up to 64 functional units
Summary: To drive the automaton we used a uint64_t as an action type.
This contained the transition's resource requirements as a conjunction:
  (a OR b) AND (b OR c)
We encoded this conjunction as a sequence of four 16-bit bitmasks. This
limited the number of addressable functional units to 16, which is quite
low and has bitten many people in the past.
Instead, the DFAEmitter now generates a lookup table from InstrItinerary
class (index of the ItinData inside the ProcItineraries) to an internal
action index which is essentially a dense embedding of the conjunctive
form. Because we never materialize the conjunctive form, we no longer
have the 16 FU restriction.
In this patch we limit to 64 functional units due to using a uint64_t
bitmask in the DFAEmitter. Now that we've decoupled these
representations we can increase this in future.
Reviewers: ThomasRaoux, kparzysz, majnemer
Reviewed By: ThomasRaoux
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69110
The file was modifiedllvm/utils/TableGen/DFAPacketizerEmitter.cpp
The file was modifiedllvm/lib/CodeGen/DFAPacketizer.cpp
The file was modifiedllvm/include/llvm/CodeGen/DFAPacketizer.h
Commit df3ae1eb296d5193232649b5f282dfc4f01ba61f by mgorny
[lldb] [Python] Build readline override module only on Linux
Restrict building the readline override to Linux only.  It both does not
build on *BSD systems, and is largely irrelevant since they default to
using libedit over readline anyway.  This restores the behavior of the
old readline override that also was built only on Linux.
Differential Revision: https://reviews.llvm.org/D69846
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.h
Commit 03bf229bd44df4bbbc02c3512a095f5ed075f9da by david.green
[ARM] Multi-vector MVE spill test
This is a test from D67169, that can now be added after the vld2
intrinsics were committed upstream.
The file was addedllvm/test/CodeGen/Thumb2/mve-multivec-spill.ll
Commit ade55d07871040d0e75b94e3d3a1eaecbd704d36 by maskray
[llvm-objcopy][ELF] Add OriginalType & OriginalFlags
`llvm::objcopy::elf::*Section::classof` matches Type and Flags, yet Type
and Flags are mutable (by setSectionFlagsAndTypes and upcoming
--only-keep-debug feature). Add OriginalType & OriginalFlags to be used
in classof, to prevent classof results from changing.
Reviewed By: jakehehrlich, jhenderson, alexshap
Differential Revision: https://reviews.llvm.org/D69739
The file was modifiedllvm/tools/llvm-objcopy/ELF/Object.h
The file was modifiedllvm/tools/llvm-objcopy/ELF/Object.cpp
Commit 5ad0103d8a04cb066dfae4fc20b0dfcd9413f4d4 by maskray
[llvm-objcopy][ELF] Implement --only-keep-debug
--only-keep-debug produces a debug file as the output that only
preserves contents of sections useful for debugging purposes (the
binutils implementation preserves SHT_NOTE and non-SHF_ALLOC sections),
by changing their section types to SHT_NOBITS and rewritting file
offsets.
See https://sourceware.org/gdb/onlinedocs/gdb/Separate-Debug-Files.html
The intended use case is:
``` llvm-objcopy --only-keep-debug a a.dbg llvm-objcopy --strip-debug a
b llvm-objcopy --add-gnu-debuglink=a.dbg b
```
The current layout algorithm is incapable of deleting contents and
shrinking segments, so it is not suitable for implementing the
functionality.
This patch adds a new algorithm which assigns sh_offset to sections
first, then modifies p_offset/p_filesz of program headers. It bears a
resemblance to lld/ELF/Writer.cpp.
Reviewed By: jhenderson, jakehehrlich
Differential Revision: https://reviews.llvm.org/D67137
The file was modifiedllvm/docs/CommandGuide/llvm-objcopy.rst
The file was modifiedllvm/tools/llvm-objcopy/ELF/Object.cpp
The file was removedllvm/test/tools/llvm-objcopy/ELF/basic-only-keep-debug.test
The file was modifiedllvm/tools/llvm-objcopy/ELF/Object.h
The file was modifiedllvm/tools/llvm-objcopy/CommonOpts.td
The file was modifiedllvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp
The file was addedllvm/test/tools/llvm-objcopy/ELF/only-keep-debug.test
Commit bc496677d0ecc24e4372b714849b5ecc8636b3a8 by Steven Wu
[Object][MachO] Rewrite macho-invalid-fat-arch-size into YAML
Rewrite one of the invalid macho test input file with YAML file. The
original invalid macho is breaking our internal test infrastusture
because it is too broken to be copy around.
rdar://problem/56879982
The file was modifiedllvm/test/Object/macho-invalid.test
The file was addedllvm/test/Object/Inputs/macho-invalid-fat-arch-size.yaml
The file was removedllvm/test/Object/Inputs/macho-invalid-fat-arch-size
Commit 7ad258361357e4b49c33ff39ce8abdcdf747c702 by llvm-dev
[MachineOutliner] Reduce scope of variable and stop duplicate getMF()
calls. NFCI.
The file was modifiedllvm/lib/CodeGen/MachineOutliner.cpp
Commit 76166a1ac7140bb1b577f198c95cb7e9dd67a10b by llvm-dev
Use iterator prefix increment. NFCI.
The file was modifiedllvm/lib/CodeGen/MachineOutliner.cpp
Commit 117e6dd6cc2d566f012221fce48a9c21cecdac8f by llvm-dev
Remove redundant assignment. NFCI.
Fixes cppcheck warning.
The file was modifiedllvm/lib/CodeGen/MachineOutliner.cpp
Commit e64f7bfefe4f1e8b1d4fb4af8a1633f06b56640a by Steven Wu
Revert "[Object][MachO] Rewrite macho-invalid-fat-arch-size into YAML"
The invalid binary trying to construct triggers an assertion.
The file was addedllvm/test/Object/Inputs/macho-invalid-fat-arch-size
The file was modifiedllvm/test/Object/macho-invalid.test
The file was removedllvm/test/Object/Inputs/macho-invalid-fat-arch-size.yaml
Commit 893afb9ca148e41404679e1755b31129107ba5e8 by kazu
[JumpThreading] Factor out code to merge basic blocks (NFC)
Summary: This patch factors out code to merge a basic block with its
sole successor -- partly for readability and partly to facilitate an
upcoming patch of my own.
Reviewers: wmi
Subscribers: hiraditya, jfb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69852
The file was modifiedllvm/include/llvm/Transforms/Scalar/JumpThreading.h
The file was modifiedllvm/lib/Transforms/Scalar/JumpThreading.cpp
Commit 312932a33463c6636e2217556400351bdec9d8cf by daniel_l_sanders
[globalisel][docs] Add KnownBits Analysis documentation
Summary: This is largely based off of the slides from the keynote
Depends on D69545
Reviewers: volkan, rovka, arsenm
Subscribers: wdng, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69644
The file was addedllvm/docs/GlobalISel/KnownBits.rst
The file was modifiedllvm/docs/GlobalISel/index.rst
Commit 82588e05cc32bb30807e480abd4e689b0dee132a by serguei.n.dmitriev
[SLP] - Add couple safety checks to TreeEntry::dump(). NFC
Summary: Check for MainOp and AltOp for NULL before dereferencing or
issue NULL.
Reviewers: Vasilis, dtemirbulatov, RKSimon, ABataev
Reviewed By: ABataev
Subscribers: mehdi_amini, hiraditya, dexonsmith, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69812
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 15140e4bacf94fbc509e5a139909aefcd1cc3363 by michael.hliao
[hip] Enable pointer argument lowering through coercing type.
Reviewers: tra, rjmccall, yaxunl
Subscribers: jvesely, nhaehnle, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69826
The file was modifiedclang/lib/CodeGen/CGCall.cpp
The file was addedclang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
Commit a9970036d43b4fb8622d7179603722b539756457 by Jonas Devlieghere
[lldb] Fix Python 3 incompatibility in API/lit.cfg.py
This code path is only taken on the sanitized bot, where it caused a
TypeError: "Can't mix strings and bytes in path components".
The file was modifiedlldb/test/API/lit.cfg.py
Commit 87e0cb4f1ad299c87c3e26676a9b31b3caf58921 by ibiryukov
[clangd] Implement semantic highlightings via findExplicitReferences
Summary: To keep the logic of finding locations of interesting AST nodes
in one place.
The advantage is better coverage of various AST nodes, both now and in
the future: as new nodes get added to `findExplicitReferences`, semantic
highlighting will automatically pick them up.
The drawback of this change is that we have to traverse declarations
inside our file twice in order to highlight dependent names, 'auto' and
'decltype'. Hopefully, this should not affect the actual latency too
much, most time should be spent in building the AST and not traversing
it.
Reviewers: hokein
Reviewed By: hokein
Subscribers: nridge, merge_guards_bot, MaskRay, jkorous, arphaman,
kadircet, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69673
The file was modifiedclang-tools-extra/clangd/FindTarget.cpp
The file was modifiedclang-tools-extra/clangd/FindTarget.h
The file was modifiedclang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp
The file was modifiedclang-tools-extra/clangd/SemanticHighlighting.cpp
Commit de56a890725713dffc4ab5bf5fb2f434df27ed4d by Stanislav.Mekhanoshin
[AMDGPU] return Fail instead of SolfFail from addOperand()
addOperand() method of AMDGPU disassembler returns SoftFail on error.
All instances which may lead to that place are an impossible encdoing,
not something which is possible to encode, but semantically incorrect as
described for SoftFail.
Then tablegen generates a check of the following form:
if (Decode...(..) == MCDisassembler::Fail) { return
MCDisassembler::Fail; }
Since we can only return Success and SoftFail that is dead code as
detected by the static code analyzer.
Solution: return Fail as it should be.
See https://bugs.llvm.org/show_bug.cgi?id=43886
Differential Revision: https://reviews.llvm.org/D69819
The file was addedllvm/test/MC/Disassembler/AMDGPU/decode-err.txt
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
Commit e74c5b96610dfb03825d31035f50813af58beac5 by daniel_l_sanders
[globalisel] Rename G_GEP to G_PTR_ADD
Summary: G_GEP is rather poorly named. It's a simple pointer+scalar
addition and doesn't support any of the complexities of getelementptr. I
therefore propose that we rename it. There's a G_PTR_MASK so let's
follow that convention and go with G_PTR_ADD
Reviewers: volkan, aditya_nandakumar, bogner, rovka, arsenm
Subscribers: sdardis, jvesely, wdng, nhaehnle, hiraditya, jrtc27,
atanasyan, arphaman, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69734
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/arm-legalize-vfp4.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant-32bit.mir
The file was modifiedllvm/lib/Target/Mips/MipsLegalizerInfo.cpp
The file was addedllvm/test/CodeGen/X86/GlobalISel/ptr-add.ll
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/irtranslator/sret_pointer.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/combiner-load-store-indexing.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/load-addressing-modes.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomic-cmpxchg-local.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
The file was removedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-gep.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s32.mir
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
The file was modifiedllvm/include/llvm/Target/GenericOpcodes.td
The file was modifiedllvm/lib/Target/ARM/ARMCallLowering.cpp
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll
The file was addedllvm/test/CodeGen/X86/GlobalISel/select-ptr-add.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/irtranslator/var_arg.ll
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/legalize-undef.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/call-translator-cse.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/instruction-select/stack_args.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-private.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-flat.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/store-addressing-modes.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/instruction-select/var_arg.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/regbankselect/load.mir
The file was removedllvm/test/CodeGen/AArch64/GlobalISel/legalize-gep.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64CallLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-load.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-store.mir
The file was modifiedllvm/lib/Target/X86/X86LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/dyn_stackalloc.mir
The file was modifiedllvm/lib/Target/ARM/ARMLegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-private.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-fadd-local.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
The file was modifiedllvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/select-memop-scalar.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
The file was addedllvm/test/MachineVerifier/test_g_ptr_add.mir
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/irtranslator-varargs-lowering.ll
The file was removedllvm/test/CodeGen/X86/GlobalISel/legalize-gep.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-xchg-local.mir
The file was removedllvm/test/CodeGen/X86/GlobalISel/select-gep.mir
The file was removedllvm/test/CodeGen/X86/GlobalISel/gep.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
The file was modifiedllvm/lib/Target/X86/X86CallLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
The file was removedllvm/test/MachineVerifier/test_g_gep.mir
The file was removedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-gep.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-add.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/call-translator-ios.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/irtranslator/stack_args.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/translate-gep.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-gep.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/legalize-ptr-add.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/regbankselect/stack_args.mir
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s64.mir
The file was modifiedllvm/lib/Target/ARM/ARMInstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
The file was modifiedllvm/lib/Target/Mips/MipsInstructionSelector.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/thumb-select-load-store.mir
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir
The file was modifiedllvm/lib/Target/Mips/MipsCallLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-local.mir
The file was removedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-gep.mir
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/select-memop-scalar-unordered.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/inline-memset.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/inline-small-memcpy.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/var_arg.mir
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-32.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/irtranslator/extend_args.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptr-add.mir
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/arm-legalize-load-store.mir
The file was modifiedllvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/irtranslator/aggregate_struct_return.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptr-add.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
The file was modifiedllvm/lib/Target/ARM/ARMRegisterBankInfo.cpp
The file was modifiedllvm/include/llvm/Support/TargetOpcodes.def
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-global.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/instruction-select/load_store_fold.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/legalizer/stack_args.mir
The file was addedllvm/test/CodeGen/X86/GlobalISel/legalize-ptr-add.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/regbankselect/var_arg.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was modifiedllvm/lib/Target/X86/X86InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/regbankselect/store.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-flat.mir
Commit 00e53d912dd768047a4fdc6e0e9b3ac7f0bcc5e5 by benny.kra
[X86] Specifically limit fmin/fmax commutativity to NoNaNs +
NoSignedZeros
The backend UnsafeFPMath flag is not a superset of all the others, so
limit it to the exact bits needed.
The file was modifiedllvm/test/CodeGen/X86/stack-folding-fp-avx512.ll
The file was modifiedllvm/test/CodeGen/X86/sse-minmax.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/machine-combiner.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-unsafe-fp-math.ll
Commit 7035ea6e3e4371fff223a3a8f660ec149a954876 by rnk
[dexter] Remove lit check for python 3
This is checking the version of Python used to run lit, which is not
necessarily the same as the version used to run the dexter tests.  If
the tests are run via the build/bin/llvm-lit[.py] helper script, then
that is likely to pick up whatever version of Python is on PATH.
Conventionally, this will find Python 2. CMake already checks that
Python 3 is in use and puts the path to it in the lit site config, so
this check is redundant, and Python 3 will ultimately be used to run
dexter.
Reviewers: jmorse
Differential Revision: https://reviews.llvm.org/D69724
The file was modifieddebuginfo-tests/dexter/feature_tests/lit.local.cfg
Commit 63f49465c3268e59ce2dc02345da187393adabd7 by rnk
[dexter] Fix feature tests on Windows
First, add LLD as a dependency on Windows. The windows batch scripts
pass -fuse-ld=lld, so they need it.
Second, decode builder stdout/stderr even if the command fails.
Otherwise it gets printed as b'line 1\n\rline 2\n\r'.
Last, make the batch script one line less noisy. We might want to try to
do more here, though. It would be nice if we could get as close to
possible as lit, where you can literally copy & paste the failing
command to re-run it.
With the two changes above, now the feature tests that use clang++.bat
pass for me. The clang-cl_vs2015 ones still fail, and I'll fix them
separately.
Reviewers: jmorse
Differential Revision: https://reviews.llvm.org/D69725
The file was modifieddebuginfo-tests/dexter/dex/builder/Builder.py
The file was modifieddebuginfo-tests/CMakeLists.txt
The file was modifieddebuginfo-tests/dexter/dex/builder/scripts/windows/clang.bat
Commit 3606b567849a935ef6bf627dec2e6100a8f25c4b by Adrian Prantl
ValueObject: Upstream early-exit from swift-lldb. (NFC)
The file was modifiedlldb/source/Core/Value.cpp
Commit 4f12ba50bb28a1bf5c5131dcdf84121f04b0e584 by Stanislav.Mekhanoshin
[AMDGPU] Removed dead code handling M0CopyReg
Static analyzer complains about always false condition. See
https://bugs.llvm.org/show_bug.cgi?id=43886
Differential Revision: https://reviews.llvm.org/D69860
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
Commit f1b4c4bfd0b55c3c0abbc73e1159117f8533aca3 by jdenny.ornl
[lit] Fix `not` calling internal commands
Without this patch, when using lit's internal shell, if `not` on a lit
RUN line calls `env`, `diff`, or any of the other in-process shell
builtins that lit implements, lit accidentally searches for the latter
as an external executable.  What's worse is that works fine when a
developer is testing on a platform where those executables are available
and behave as expected, but it then breaks on other platforms.
`not` seems useful for some builtins, such as `diff`, so this patch
supports such uses.  `not --crash` does not seem useful for builtins, so
this patch diagnoses such uses.  In all cases, this patch ensures shell
builtins are found behind any sequence of `env` and `not` commands.
`not` calling `env` calling an external command appears useful when the
`env` and external command are part of a lit substitution, as in D65156.
This patch supports that by looking through any sequence of
`env` and `not` commands, building the environment from the `env`s, and
storing the `not`s.  The `not`s are then added back to the command line
without the `env`s to execute externally.  This avoids the need to
replicate the `not` implementation, in particular the `--crash` option,
in lit.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D66531
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/not-calls-external.txt
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/not-calls-diff.txt
The file was modifiedllvm/utils/lit/lit/TestRunner.py
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/fail.py
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/not-calls-diff-with-crash.txt
The file was modifiedllvm/utils/lit/tests/shtest-env.py
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/not-calls-colon.txt
The file was addedllvm/utils/lit/tests/Inputs/shtest-env/env-calls-not-builtin.txt
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/not-args-none.txt
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/lit.cfg
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/print_environment.py
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/not-args-nested-none.txt
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/not-args-last-is-crash.txt
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/not-calls-env-builtin.txt
The file was addedllvm/utils/lit/tests/shtest-not.py
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/not-calls-cd.txt
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/pass.py
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/not-calls-rm.txt
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/not-calls-echo.txt
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/not-calls-export.txt
The file was addedllvm/utils/lit/tests/Inputs/shtest-not/not-calls-mkdir.txt
Commit 6cd47f9dd7dd664ff855fb0d1ed26bf5e4bb77fc by maskray
[llvm-objdump] Fix spurious "The end of the file was unexpectedly
encountered" if a SHT_NOBITS sh_offset is larger than the file size
llvm-objdump -D this file:
  int a[100000];
int main() { return 0; }
Will produce an error: "The end of the file was unexpectedly
encountered".
This happens because of a check in Binary.h checkOffset.  (Addr + Size >
M.getBufferEnd()).
The sh_offset and sh_size fields can be ignored for SHT_NOBITS sections.
Fix the error by changing ELFObjectFile<ELFT>::getSectionContents to use
the file base for SHT_NOBITS sections.
Reviewed By: grimar, MaskRay
Differential Revision: https://reviews.llvm.org/D69192
The file was addedllvm/test/tools/llvm-objdump/X86/elf-disassemble-bss.test
The file was modifiedllvm/include/llvm/Object/ELFObjectFile.h
Commit 0a220de9e9ca3e6786df6c03fd37668815805c62 by michael.hliao
[HIP] Fix visibility for 'extern' device variables.
Summary:
- Fix a bug which misses the change for a variable to be set with
target-specific attributes.
Reviewers: yaxunl
Subscribers: jvesely, nhaehnle, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63020
The file was modifiedclang/test/CodeGenCUDA/amdgpu-visibility.cu
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
Commit 027aa27d95c165cb4afa2c0b43b22b729d989755 by listmail
[X86/Atomics] (Semantically) revert G246098, switch back to the old
atomic example
When writing an email for a follow up proposal, I realized one of the
diffs in the committed change was incorrect.  Digging into it revealed
that the fix is complicated enough to require some thought, so reverting
in the meantime.
The problem is visible in this diff (from the revert):
; X64-SSE-LABEL: store_fp128:
; X64-SSE:       # %bb.0:
-; X64-SSE-NEXT:    movaps %xmm0, (%rdi)
+; X64-SSE-NEXT:    subq $24, %rsp
+; X64-SSE-NEXT:    .cfi_def_cfa_offset 32
+; X64-SSE-NEXT:    movaps %xmm0, (%rsp)
+; X64-SSE-NEXT:    movq (%rsp), %rsi
+; X64-SSE-NEXT:    movq {{[0-9]+}}(%rsp), %rdx
+; X64-SSE-NEXT:    callq __sync_lock_test_and_set_16
+; X64-SSE-NEXT:    addq $24, %rsp
+; X64-SSE-NEXT:    .cfi_def_cfa_offset 8
; X64-SSE-NEXT:    retq
  store atomic fp128 %v, fp128* %fptr unordered, align 16
  ret void
The problem here is three fold: 1) x86-64 doesn't guarantee atomicity of
anything larger than 8 bytes.  Some platforms observably break this
guarantee, others don't, but the codegen isn't considering this, so it's
wrong on at least some platforms. 2) When I started to track down the
problem, I discovered that DAGCombiner had stripped the atomicity off
the store entirely.  This comes down to idiomatic usage of DAG.getStore
passing all MMO components separately as opposed to just passing the
MMO. 3) On x86 (not -64), there are cases where 8 byte atomiciy is
supported, but only for floating point operations.  This would seem to
imply that operation typing matters for correctness, and DAGCombine
happily folds away bitcasts.  I'm not 100% sure there's a problem here,
but I'm not entirely sure there isn't either.
I plan on returning to each issue in turn;  sorry for the churn here.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/atomic-non-integer-fp128.ll
The file was modifiedllvm/test/CodeGen/X86/combineIncDecVector-crash.ll
The file was modifiedllvm/test/CodeGen/X86/atomic-non-integer.ll
Commit f2e7679d0f0b21d08356a8eb7e3b346443f0db9d by Stanislav.Mekhanoshin
[AMDGPU] Removed dead code from R600ISelLowering.cpp
This was added to inhibit a warning from gcc 7.3 according to the
comment. However, it triggers warning from PVS. In addition I cannot
reproduce it with gcc 7.4 and I also cannot reproduce it with gcc 7.3
using compiler explorer.
Differential Revision: https://reviews.llvm.org/D69863
The file was modifiedllvm/lib/Target/AMDGPU/R600ISelLowering.cpp
Commit d77ef856fc240fcdba03315eaff8fd19b32bf2ca by julian.lettner
Revert "[lit] Better/earlier errors when no tests are executed"
This reverts commit d8f2bff75126c6dde694ad245f9807fa12ad5630.
The file was modifiedllvm/utils/lit/lit/cl_arguments.py
The file was modifiedllvm/utils/lit/lit/main.py
The file was modifiedllvm/utils/lit/lit/run.py
The file was modifiedllvm/utils/lit/tests/selecting.py
Commit 2ff545e76d11bc4fdd7663945d6ac343575530fe by Fred Riss
Modernize add-dsym test Makefile
The file was modifiedlldb/packages/Python/lldbsuite/test/macosx/add-dsym/Makefile
Commit 270fe47aae4ac0bf72251161ad3320de56055c3a by Fred Riss
testsuite: skipIfNoSBHeaders should skip when running remotely
The LLDB dylib/framework will not be available on the remote host, it
makes no sense to try to run those tests in a remote scenario.
The file was modifiedlldb/packages/Python/lldbsuite/test/decorators.py
Commit 42beb8ed792d2dbe71b8d25031a53215090631d2 by Fred Riss
TestBatchMode.py: add missing @skipIfRemote
All the tests in this file were already marked as skipped for remote
tests except for this one.
The file was modifiedlldb/packages/Python/lldbsuite/test/driver/batch_mode/TestBatchMode.py
Commit 5f158d8e21bed00a6d7377742660397bd4765456 by benny.kra
[X86] Gate select->fmin/fmax transform on NoSignedZeros instead of
UnsafeFPMath
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/exedepsfix-broadcast.ll
Commit 2abcf44f4c91a326d1f4513fb5c25fec51c6ca66 by Jonas Devlieghere
[Reproducer] Add test case for expression evaluation
The file was addedlldb/test/Shell/Reproducer/Functionalities/Inputs/ExpressionEvaluation.in
The file was addedlldb/test/Shell/Reproducer/Functionalities/TestExpressionEvaluation.test
Commit de5417f81d4e0ca732810e3b5565253b73b9e339 by Adrian Prantl
[ValueObject] Upstream initialization from swift-lldb.
This is a non-Swift-specific change in swift-lldb that seems to be
useful for remote debugging. If does in fact turn out to be redundant we
can remove it from llvm.org and then it will disappear in swift-lldb,
too.
The file was modifiedlldb/source/Core/ValueObject.cpp
Commit 3ac6863efbbfa27175588670e3b3715b0351ff4e by Adrian Prantl
[ValueObject] Upstream early exit from swift-lldb. (NFC)
The file was modifiedlldb/source/Core/ValueObject.cpp
Commit 743461090a2027058cd438ed643ed5ed939cf1ca by koraq
[Sema] Fixes templated friend member assertion
Fixes PR41792: Clang assertion failure on templated friend member
function
Differential Revision: https://reviews.llvm.org/D69481
The file was modifiedclang/lib/Sema/SemaTemplate.cpp
The file was modifiedclang/test/CXX/temp/temp.spec/temp.expl.spec/p20.cpp
Commit a078c77d72082bf6a06486849735cdeaab1374bc by akhuang
[MIR] Add MIR parsing for heap alloc site instruction markers
Summary: This patch adds MIR parsing and printing for heap alloc
markers, which were added in D69136. They are printed as an operand
similar to pre-/post-instr symbols, with a heap-alloc-marker token and a
metadata node.
Reviewers: rnk
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69864
The file was modifiedllvm/lib/CodeGen/MIRParser/MIParser.cpp
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.cpp
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
The file was modifiedllvm/lib/CodeGen/MIRPrinter.cpp
The file was modifiedllvm/lib/CodeGen/MIRParser/MILexer.h
The file was addedllvm/test/CodeGen/MIR/X86/instr-heap-alloc-operands.mir
The file was addedllvm/test/CodeGen/X86/heap-alloc-markers.mir
Commit dcec2ac4f353c3813f45392dbd0b4d3c5ee66e06 by a.bataev
[OPENMP50]Simplify processing of context selector scores.
If the context selector score was not specified, its value must be set
to 0. Simplify the processing of unspecified scores + save memory in
attribute representation.
The file was modifiedclang/test/OpenMP/declare_variant_ast_print.c
The file was modifiedclang/lib/Parse/ParseOpenMP.cpp
The file was modifiedclang/test/OpenMP/declare_variant_ast_print.cpp
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedclang/include/clang/Basic/Attr.td
Commit ee10d934dddd49eccfd3b6e6ae8f02551b1a03a4 by morbo
Fix typo so that '-O0' is correctly specified
The file was modifiedclang/test/CodeGen/asm-goto.c
Commit db036ee0a424374ae53e9ade2c1c4aa9424ef492 by listmail
[X86/Atomics] Correct a few transforms for new atomic lowering
This is a partial fix for the issues described in commit message of
027aa27 (the revert of G24609).  Unfortunately, I can't provide test
coverage for it on it's own as the only (known) wrong example is still
wrong, but due to a separate issue.
These fixes are cases where when performing unrelated DAG combines, we
were dropping the atomicity flags entirely.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit 6a79e083a0d131e741ac8f48badbb0481491e47f by hhb
[lldb] Add a install target for lldb python on darwin
Summary: Similar to D68370 but for darwin framework build.
Reviewers: aadsm
Subscribers: mgorny, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D69834
The file was modifiedlldb/CMakeLists.txt
Commit 91ff598680e2530aa79c2e1a24d0dcea414cd5b2 by llvm-dev
[Hexagon] getCompoundCandidateGroup - fix 'false' value is implicitly
cast to unsigned warning. NFCI.
Consistently return HexagonII::HCG_None.
The file was modifiedllvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCompound.cpp
Commit 4b698645d307d1821a0e805de51d14f71d12856f by asbirlea
[LoopRotationUtils] Check values are newly inserted into maps.
This is a cleanup that came up in D63680. All values added to the
ValueMaps should be newly added.
The file was modifiedllvm/lib/Transforms/Utils/LoopRotationUtils.cpp
Commit 1e1ae46595b1844e73b128d09739bbc57ea36f16 by kli
[CMake] Prevent adding lld to test dependency (TEST_DEPS) when lld
project is not built
D69405 causes failure if running LIT when the compiler was built without
lld.
Patch by Anh Tuyen Tran (anhtuyen)
Differential Revision: https://reviews.llvm.org/D69685
The file was modifiedcompiler-rt/cmake/Modules/AddCompilerRT.cmake
Commit 37f4955c9baba9f981100b3137cb9486c0d75ce8 by simon
[mips] Fix `getRegForInlineAsmConstraint` to do not crash on empty
Constraint
The file was addedllvm/test/CodeGen/Mips/constraint-empty.ll
The file was modifiedllvm/lib/Target/Mips/MipsISelLowering.cpp
Commit dce53d71987d9c44360d8a8d995ca2ad042f990f by tejohnson
[IRMover] Use GlobalValue::getAddressSpace instead of directly from its
type [NFC]
Summary: Change the old form of G->getType()->getAddressSpace() to the
new G->getAddressSpace() (underneath does the same).
Patch by Ehud Katz <ehudkatz@gmail.com>
Reviewers: tejohnson, chandlerc
Reviewed By: tejohnson
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69550
The file was modifiedllvm/lib/Linker/IRMover.cpp
Commit 39573daa76f23b93bda1437157cf78fb3d1003e2 by vsapsai
Revert "[analyzer] Add test directory for scan-build."
This reverts commit 0aba69eb1a01c44185009f50cc633e3c648e9950 with
subsequent changes to test files.
It caused test failures on GreenDragon, e.g.,
http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental/
The file was removedclang/test/Analysis/scan-build/plist_output.test
The file was removedclang/test/Analysis/scan-build/Inputs/single_null_dereference.c
The file was removedclang/test/Analysis/scan-build/html_output.test
The file was modifiedllvm/utils/lit/lit/llvm/config.py
The file was removedclang/test/Analysis/scan-build/help.test
The file was modifiedclang/test/lit.cfg.py
The file was removedclang/test/Analysis/scan-build/Inputs/multidirectory_project/directory1/file1.c
The file was removedclang/test/Analysis/scan-build/Inputs/multidirectory_project/directory2/file2.c
The file was removedclang/test/Analysis/scan-build/exclude_directories.test
The file was removedclang/test/Analysis/scan-build/plist_html_output.test
Commit 40f3d1307cfd66e6dc1a921eec42559a6691b393 by apl
[TestMTCSimple] Disable the test if you don't have libMTC
If you are running on macOS and have the CommandLineTools installed of
Xcode, this test will fail because CommandLineTools doesn't ship with
libMainThreadChecker. Skip the test if you don't have it installed.
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/mtc/simple/TestMTCSimple.py
Commit 7effd37b00d0bf1c660ae7d02c2068b93e37de18 by spatel
[SLP] add tests for 2-wide reductions; NFC
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
Commit 521fc5e620b1ac92abe96d98569a9197b5291240 by Stanislav.Mekhanoshin
[AMDGPU] Add missing flags to DS_Real
Differential Revision: https://reviews.llvm.org/D69867
The file was modifiedllvm/lib/Target/AMDGPU/DSInstructions.td
Commit 7060840bc9cc99912b74fe525d47b430cc1e0b89 by daniel_l_sanders
[globalisel][docs] Add a section about debugging with the block
extractor
Summary: Depends on D69644
Reviewers: rovka, volkan, arsenm
Subscribers: wdng, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69645
The file was addedllvm/docs/GlobalISel/block-extract.png
The file was modifiedllvm/docs/GlobalISel/Pipeline.rst
Commit 041f35c468088d315bae6c2a71ec901a12cca1b5 by James Molloy jmolloy
[Automaton] Make Automaton thread-safe
In an optimization to improve performance (rL375240) we added a
std::shared_ptr around the main table map. This is safe, but we also
ended up making the transcriber object a std::shared_ptr too. This has
mutable state, so must be copied when we copy the Automaton object. This
is very cheap; the main optimization was about the map `M` only.
Reported by Dan Palermo. No test as triggering this is rather hard from
a unit test.
The file was modifiedllvm/include/llvm/Support/Automaton.h
Commit ad0dfb0a25344027948a675ec15a6793e44b6463 by daniel_l_sanders
[globalisel][docs] Rework GMIR documentation and add an early
GenericOpcode reference
Summary: Rework the GMIR documentation to focus more on the end user
than the implementation and tie it in to the MIR document. There was
also some out-of-date information which has been removed.
The quality of the GenericOpcode reference is highly variable and drops
sharply as I worked through them all but we've got to start somewhere
:-). It would be great if others could expand on this too as there is an
awful lot to get through.
Also fix a typo in the definition of G_FLOG. Previously, the comments
said we had two base-2's (G_FLOG and G_FLOG2).
Reviewers: aemerson, volkan, rovka, arsenm
Reviewed By: rovka
Subscribers: wdng, arphaman, jfb, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69545
The file was addedllvm/docs/GlobalISel/GenericOpcode.rst
The file was modifiedllvm/docs/MIRLangRef.rst
The file was modifiedllvm/docs/GlobalISel/GMIR.rst
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/docs/GlobalISel/index.rst
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
The file was modifiedllvm/include/llvm/Target/GenericOpcodes.td
Commit e0dd8f36ce49f47099e56e317207de5304a1ccbb by daniel_l_sanders
[globalisel][docs] Rework GMIR documentation and add an early
GenericOpcode reference
It looks like I pushed an older version of this commit without the
review fixups earlier. This applies the review changes
Differential Revision: https://reviews.llvm.org/D69545
The file was modifiedllvm/docs/GlobalISel/GMIR.rst
The file was modifiedllvm/docs/GlobalISel/GenericOpcode.rst
Commit b36e3a8bac3ee95a5a67ab0acb6ef2a2602226a7 by tejohnson
[IRMover] Set Address Space for moved global values
Summary: Set Address Space when creating a new function (from another).
Fix PR41154.
Patch by Ehud Katz <ehudkatz@gmail.com>
Reviewers: tejohnson, chandlerc
Reviewed By: tejohnson
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69361
The file was addedllvm/test/Linker/addrspace.ll
The file was modifiedllvm/lib/Linker/IRMover.cpp
Commit bcbb121ff6c8440382abfce8f2911a095f14602b by vvereschaka
Fixed a profdata file size detection on Windows system.
The space symbols are allowed in the group names on Windows system (as
example: Domain Users). In that case the test extracts a wrong field
from the output to get a size of the profdata file.
This patch avoids a printing of the group names in the test output and
extracts a proper field as a file size.
Differential Revision: https://reviews.llvm.org/D69317
The file was modifiedllvm/test/tools/llvm-profdata/show-prof-size.test
Commit 34688fafea813f826b71f814edd6389adbf98ca7 by chris.bieneman
Implement `sys::getHostCPUName()` for Darwin ARM
Summary: Currently there is no implementation of `sys::getHostCPUName()`
for Darwin ARM targets. This patch makes it so that LLVM running on ARM
makes reasonable guesses about the CPU features of the host CPU.
Reviewers: t.p.northover, lhames, efriedma
Reviewed By: efriedma
Subscribers: rjmccall, efriedma, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69597
The file was modifiedllvm/lib/Support/Host.cpp
Commit 529bb8a98048302686b7c58e2a62a4223a18e5c2 by 48825004
[PowerPC] Fix the incorrect 'RM' flag set on load/store instr
The 'RM' flag model the "Rounding Mode" and it has nothing to do with
the load/store instructions.
Differential Revision: https://reviews.llvm.org/D69551
The file was addedllvm/test/CodeGen/PowerPC/instr-properties.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrVSX.td
Commit a7716a3c3c9cc2f1d511d93688de5cb9f163d4c2 by yrouban
[ADT] Add equality operator for SmallPtrSet
Reviewed By: tellenbach Differential Revision:
https://reviews.llvm.org/D69429
The file was modifiedllvm/unittests/ADT/SmallPtrSetTest.cpp
The file was modifiedllvm/include/llvm/ADT/SmallPtrSet.h
Commit 092452d402d793c731c3861ba920a85c5c4e1fff by hintonda
YAML parser robustness improvements
Summary: This patch fixes a number of bugs found in the YAML parser
through fuzzing. In general, this makes the parser more robust against
malformed inputs.
The fixes are mostly improved null checking and returning errors in more
cases. In some cases, asserts were changed to regular errors, this
provides the same robustness but also protects release builds from the
triggering conditions. This also improves the fuzzability of the YAML
parser since asserts can act as a roadblock to further fuzzing once
they're hit.
Each fix has a corresponding test case:
- TestAnchorMapError - Added proper null pointer handling in
   `Stream::printError` if N is null and `KeyValueNode::getValue` if
   getKey returns null, `Input::createHNodes` `dyn_casts` changed to
   `dyn_cast_or_null` so the null pointer checks are actually able to
   fail
- TestFlowSequenceTokenErrors - Added case in
   `Document::parseBlockNode` for FlowMappingEnd, FlowSequenceEnd, or
   FlowEntry tokens outside of mappings or sequences
- TestDirectiveMappingNoValue - Changed assert to regular error
   return in `Scanner::scanValue`
- TestUnescapeInfiniteLoop - Fixed infinite loop in
   `ScalarNode::unescapeDoubleQuoted` by returning an error for
   unrecognized escape codes
- TestScannerUnexpectedCharacter - Changed asserts to regular error
   returns in `Scanner::consume`
- TestUnknownDirective - For both of the inputs the stream doesn't
   fail and correctly returns TK_Error, but there is no valid root
   node for the document. There's no reasonable way to make the
   scanner fail for unknown directives without breaking the YAML spec
   (see spec-07-01.test). I think the assert is unnecessary given
   that an error is still generated for this case.
The `SimpleKeys.clear()` line fixes a bug found by AddressSanitizer
triggered by multiple test cases - when TokenQueue is cleared SimpleKeys
is still holding dangling pointers into it, so SimpleKeys should be
cleared as well.
Patch by Thomas Finch!
Reviewers: chandlerc, Bigcheese, hintonda
Reviewed By: Bigcheese, hintonda
Subscribers: hintonda, kristina, beanz, dexonsmith, hiraditya,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D61608
The file was modifiedllvm/lib/Support/YAMLParser.cpp
The file was modifiedllvm/unittests/Support/YAMLIOTest.cpp
The file was modifiedllvm/lib/Support/YAMLTraits.cpp
Commit 24130d661ed42c30f009b695d3c9ce57d2208b5e by gehre.matthias
[clang-tidy] Add readability-make-member-function-const
Summary: Finds non-static member functions that can be made ``const``
because the functions don't use ``this`` in a non-const way.
The check conservatively tries to preserve logical costness in favor of
physical costness. See readability-make-member-function-const.rst for
more details.
Reviewers: aaron.ballman, gribozavr, hokein, alexfh
Subscribers: mgorny, xazax.hun, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D68074
The file was modifiedclang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst
The file was addedclang-tools-extra/clang-tidy/readability/MakeMemberFunctionConstCheck.h
The file was addedclang-tools-extra/clang-tidy/readability/MakeMemberFunctionConstCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/readability/CMakeLists.txt
The file was addedclang-tools-extra/docs/clang-tidy/checks/readability-make-member-function-const.rst
The file was addedclang-tools-extra/test/clang-tidy/readability-make-member-function-const.cpp
Commit 1a6903bdfeca5facfc0c595e7cf9a14f0e87fb0e by llvmgnsyncbot
gn build: Merge 24130d661ed
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clang-tidy/readability/BUILD.gn
Commit 76ec6b1ef69fcbd27cb0d587a5eb2d51a135a6bb by paulhoad
[clang-format] [PR35518] C++17 deduction guides are wrongly formatted
Summary: see https://bugs.llvm.org/show_bug.cgi?id=35518
clang-format removes spaces around deduction guides but not trailing
return types, make the consistent
``` template <typename T> S(T)->S<T>; auto f(int, int) -> double;
```
becomes
``` template <typename T> S(T) -> S<T>; auto f(int, int) -> double;
```
Reviewers: klimek, mitchell-stellar, owenpan, sammccall, lichray,
curdeius, KyrBoh
Reviewed By: curdeius
Subscribers: merge_guards_bot, hans, lichray, cfe-commits
Tags: #clang-format, #clang-tools-extra, #clang
Differential Revision: https://reviews.llvm.org/D69577
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
The file was modifiedclang/unittests/Format/FormatTest.cpp
Commit f349cc37cc485fd5fc7b34cb84053af459337ecc by paulhoad
clang-format: Add a fallback style to Emacs mode
Summary: This allows one to enable `clang-format-buffer` on file save
and avoid reformatting files that are outside of any project with
.clang-format style.
Reviewers: djasper, klimek, sammccall, owenpan, mitchell-stellar,
MyDeveloperDay
Reviewed By: MyDeveloperDay
Subscribers: cfe-commits
Patch By: dottedmag
Tags: #clang, #clang-format
Differential Revision: https://reviews.llvm.org/D69752
The file was modifiedclang/tools/clang-format/clang-format.el
Commit 7ea4c6fa5121b2417875dc1b547162e18be7dbe2 by hokein.wu
[clangd] Implement a function to lex the file to find candidate
occurrences.
Summary: This will be used for incoming cross-file rename (to detect
index staleness issue).
Reviewers: ilya-biryukov
Subscribers: MaskRay, jkorous, arphaman, kadircet, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69615
The file was modifiedclang-tools-extra/clangd/SourceCode.h
The file was modifiedclang-tools-extra/clangd/unittests/SourceCodeTests.cpp
The file was modifiedclang-tools-extra/clangd/SourceCode.cpp
Commit 38f016520f6edbfa7d059b60ac54e80dd955ada5 by simon.tatham
[ARM MVE] Remove accidental 64-bit vst2/vld2 intrinsics.
ACLE defines no such intrinsic as vst2q_u64, and the MVE instruction set
has no corresponding instruction. But I had accidentally added them to
the fledgling <arm_mve.h> anyway, and if you used them, you'd get a
compiler crash.
Reviewers: dmgreen
Subscribers: kristof.beyls, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69788
The file was modifiedclang/include/clang/Basic/arm_mve.td
Commit 26bc7cb05edd6bea4b9a1593baf0fbe9e45f54e4 by simon.tatham
[clang,MveEmitter] Fix sign/zero extension in range limits.
In the code that generates Sema range checks on constant arguments, I
had a piece of code that checks the bounds specified in the Tablegen
intrinsic description against the range of the integer type being
tested. If the bounds are large enough to permit any value of the
integer type, you can omit the compile-time range check. (This case is
expected to come up in some of the bitwise operation intrinsics.)
But somehow I got my signed/unsigned check backwards (asking for the
signed min/max of an unsigned type and vice versa), and also made a sign
extension error in which a signed negative value gets zero-extended. Now
rewritten more sensibly, and it should get its first sensible test from
the next batch of intrinsics I'm planning to add in D69791.
Reviewers: dmgreen
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69789
The file was modifiedclang/utils/TableGen/MveEmitter.cpp
Commit f0c6890f32c0d5ee7f3973181eb83fcb0a50dc1a by simon.tatham
[ARM,MVE] Integer-type nitpicks in MVE intrinsics.
A few integer types in the ACLE definitions of MVE intrinsics are given
as 'int' or 'unsigned' instead of <stdint.h> fixed-size types like
uint32_t. Usually these are the ones where the size isn't that
important, such as immediate offsets in loads (which have a range
limited by the instruction encoding) or the carry flag in vadcq which
can only be 0 or 1 anyway.
With this change, <arm_mve.h> follows that exact type naming, so that
the function prototypes look identical to the ones in ACLE, instead of
replacing int and unsigned with int32_t and uint32_t.
Reviewers: dmgreen
Subscribers: kristof.beyls, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69790
The file was modifiedclang/utils/TableGen/MveEmitter.cpp
The file was modifiedclang/include/clang/Basic/arm_mve.td
The file was modifiedclang/include/clang/Basic/arm_mve_defs.td
Commit 6c3fee47a6492b472be2d48cee0a85773f160df0 by simon.tatham
[ARM,MVE] Add intrinsics for gather/scatter load/stores.
This patch adds two new families of intrinsics, both of which are memory
accesses taking a vector of locations to load from / store to.
The vldrq_gather_base / vstrq_scatter_base intrinsics take a vector of
base addresses, and an immediate offset to be added consistently to each
one. vldrq_gather_offset / vstrq_scatter_offset take a scalar base
address, and a vector of offsets to add to it. The
'shifted_offset' variants also multiply each offset by the element size
type, so that the vector is effectively of array indices.
At the IR level, these operations are represented by a single set of
four IR intrinsics: {gather,scatter} × {base,offset}. The other details
(signed/unsigned, shift, and memory element size as opposed to vector
element size) are all specified by IR intrinsic polymorphism and
immediate operands, because that made the selection job easier than
making a huge family of similarly named intrinsics.
I considered using the standard IR representations such as
llvm.masked.gather, but they're not a good fit. In order to use
llvm.masked.gather to represent a gather_offset load with element size
smaller than a pointer, you'd have to expand the <8 x i16> vector of
offsets into an <8 x i16*> vector of pointers, which would be split up
during legalization, so you'd spend most of your time undoing the mess
it had made. Also, ISel support for llvm.masked.gather would be easy
enough in a trivial way (you can expand it into a gather-base load with
a zero immediate offset), but instruction-selecting lots of fiddly
idioms back into all the _other_ MVE load instructions would be much
more work. So I think dedicated IR intrinsics are the more sensible
approach, at least for the moment.
On the clang tablegen side, I've added two new features to the Tablegen
source accepted by MveEmitter: a 'CopyKind' type node for defining a
type that varies with the parameter type (it lets you ask for an
unsigned integer type of the same width as the parameter), and an
'unsignedflag' value node for passing an immediate IR operand which is 0
for a signed integer type or 1 for an unsigned one. That lets me write
each kind of intrinsic just once and get all its subtypes and immediate
arguments generated automatically.
Also I've tweaked the handling of pointer-typed values in the code
generation part of MveEmitter: they're generated as Address rather than
Value (i.e. including an alignment) so that they can be given to the
ordinary IR load and store operations, but I'd omitted the code to
convert them back to Value when they're going to be used as an argument
to an IR intrinsic.
On the MC side, I've enhanced MVEVectorVTInfo so that it can tell you
not only the full assembly-language suffix for a given vector type
(like 's32' or 'u16') but also the numeric-only one used by store
instructions (just '32' or '16').
Reviewers: dmgreen
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D69791
The file was modifiedclang/include/clang/Basic/arm_mve_defs.td
The file was modifiedclang/include/clang/Basic/arm_mve.td
The file was addedclang/test/Sema/arm-mve-immediates.c
The file was modifiedclang/utils/TableGen/MveEmitter.cpp
The file was addedllvm/test/CodeGen/Thumb2/mve-intrinsics/scatter-gather.ll
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
The file was addedclang/test/CodeGen/arm-mve-intrinsics/scatter-gather.c
The file was modifiedllvm/include/llvm/IR/IntrinsicsARM.td
Commit 58fa50f43701097640a4ee5547aee1e4a4eea454 by ibiryukov
[Syntax] Add nodes for most common statements
Summary: Most of the statements mirror the ones provided by clang AST.
Major differences are:
- expressions are wrapped into 'ExpressionStatement' instead of being
   a subclass of statement,
- semicolons are always consumed by the leaf expressions (return,
   expression satement, etc),
- some clang statements are not handled yet, we wrap those into an
   UnknownStatement class, which is not present in clang.
We also define an 'Expression' and 'UnknownExpression' classes in order
to produce 'ExpressionStatement' where needed. The actual implementation
of expressions is not yet ready, it will follow later.
Reviewers: sammccall
Reviewed By: sammccall
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63835
The file was modifiedclang/unittests/Tooling/Syntax/TreeTest.cpp
The file was modifiedclang/lib/Tooling/Syntax/Nodes.cpp
The file was modifiedclang/lib/Tooling/Syntax/Tree.cpp
The file was modifiedclang/lib/Tooling/Syntax/BuildTree.cpp
The file was modifiedclang/include/clang/Tooling/Syntax/Nodes.h
Commit 9577ee84e638530be7a310c9d50526a36e3c212e by Tim Northover
NeonEmitter: switch to enum for internal Type representation.
Previously we had a handful of bools (Signed, Floating, ...) that could
easily end up in an inconsistent state. This adds an enum Kind which
holds the mutually exclusive states a type might be in, retaining some
of the bools that modified an underlying type.
https://reviews.llvm.org/D69715
The file was modifiedclang/utils/TableGen/NeonEmitter.cpp
Commit 6c2a4f5ff93e16c3b86c18543e02a193ced2d956 by sjoerd.meijer
[TTI][LV] preferPredicateOverEpilogue
We have two ways to steer creating a predicated vector body over
creating a scalar epilogue. To force this, we have 1) a command line
option and 2) a pragma available. This adds a third: a target hook to
TargetTransformInfo that can be queried whether predication is preferred
or not, which allows the vectoriser to make the decision without forcing
it.
While this change behaves as a non-functional change for now, it shows
the required TTI plumbing, usage of this new hook in the vectoriser, and
the beginning of an ARM MVE implementation. I will follow up on this
with:
- a complete MVE implementation, see D69845.
- a patch to disable this, i.e. we should respect
"vector_predicate(disable)"
and its corresponding loophint.
Differential Revision: https://reviews.llvm.org/D69040
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was addedllvm/test/Transforms/LoopVectorize/ARM/prefer-tail-loop-folding.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/test/Transforms/LoopVectorize/ARM/tail-loop-folding.ll
Commit 59f063b89c518ae81467f6015d1c428c61583f71 by Tim Northover
NeonEmitter: remove special 'a' type modifier.
'a' used to implement a splat in C++ code in NeonEmitter.cpp, but this
can be done directly from .td expansions now (and most ops already did).
So removing it simplifies the overall code.
https://reviews.llvm.org/D69716
The file was modifiedclang/utils/TableGen/NeonEmitter.cpp
The file was modifiedclang/test/CodeGen/aarch64-neon-2velem.c
The file was modifiedclang/include/clang/Basic/arm_neon.td
The file was modifiedclang/test/CodeGen/arm_neon_intrinsics.c
The file was modifiedclang/include/clang/Basic/arm_neon_incl.td
Commit 47a5c36b37f033496de01b48cef0b2f1903c33cc by dfukalov
[AMDGPU] Improve code size cost model (part 2)
Summary: Added estimations for ShuffleVector, some cast and arithmetic
instructions
Reviewers: rampitec
Reviewed By: rampitec
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl,
dstuttard, tpr, t-tye, hiraditya, zzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69629
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/shufflevector.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/addrspacecast.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/shifts.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fdiv.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fsub.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fadd.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/bit-ops.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/add-sub.ll
The file was modifiedllvm/test/Transforms/LoopUnroll/AMDGPU/unroll-for-private.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fmul.ll
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/mul.ll
Commit eb12b3b8a3e5f41a6ab84f94dfc85551f92bc2ea by benny.kra
Silence warning, PyMODINIT_FUNC already contains extern "C"
PythonReadline.h:22:12: warning: duplicate 'extern' declaration
specifier [-Wduplicate-decl-specifier]
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.h
Commit 13c90a57165be999c505cfcfaf38755ed518b103 by Louis Dionne
[libc++][P0202] Marked algorithms copy/copy_n/copy_if/copy_backward
constexpr
Thanks to Michael Park for the patch.
Differential Revision: https://reviews.llvm.org/D68837
The file was modifiedlibcxx/include/iterator
The file was modifiedlibcxx/test/std/algorithms/alg.modifying.operations/alg.copy/copy_if.pass.cpp
The file was modifiedlibcxx/test/support/user_defined_integral.h
The file was modifiedlibcxx/test/std/algorithms/alg.modifying.operations/alg.copy/copy.pass.cpp
The file was modifiedlibcxx/test/std/algorithms/alg.modifying.operations/alg.copy/copy_backward.pass.cpp
The file was modifiedlibcxx/test/support/test_iterators.h
The file was modifiedlibcxx/test/std/algorithms/alg.modifying.operations/alg.copy/copy_n.pass.cpp
The file was modifiedlibcxx/test/support/test_macros.h
The file was modifiedlibcxx/include/algorithm
Commit 432a12c8037293bd1ff919a82f1d4412772ac534 by lebedev.ri
[NFC][LoopUnroll] Update test coverage for peeling w/ inequality
predicates
The file was modifiedllvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll
Commit 4fe94d033120da2000f1f31f0c54f3d95a159a53 by lebedev.ri
[LoopUnroll] countToEliminateCompares(): fix handling of [in]equality
predicates (PR43840)
Summary: I believe this bisects to https://reviews.llvm.org/D44983
(`[LoopUnroll] Only peel if a predicate becomes known in the loop
body.`)
While that revision did contain tests that showed arguably-subpar
peeling for [in]equality predicates that [not] happen in the middle of
the loop, it also disabled peeling for the *first* loop iteration,
because latch would be canonicalized to [in]equality comparison..
That was intentional as per https://reviews.llvm.org/D44983#1059583. I'm
not 100% sure that i'm using correct checks here, but this fix appears
to be going in the right direction..
Let me know if i'm missing some checks here..
Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=43840 | PR43840 ]].
Reviewers: fhahn, mkazantsev, efriedma
Reviewed By: fhahn
Subscribers: xbolva00, hiraditya, zzheng, llvm-commits, fhahn
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69617
The file was modifiedllvm/lib/Transforms/Utils/LoopUnrollPeel.cpp
The file was modifiedllvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll