1. [ARM][MVE] MVE-I should not be disabled by -mfpu=none (details)
  2. [InstSimplify] select Cond, true, false --> Cond (details)
  3. [Concepts] Fix failing test on Windows (details)
  4. [DAGCombiner] reduce extract subvector of concat (details)
Commit 173b711e83d7b61a46f55eb44f03ea98f69a1dd6 by momchil.velikov
[ARM][MVE] MVE-I should not be disabled by -mfpu=none
Architecturally, it's allowed to have MVE-I without an FPU, thus
-mfpu=none should not disable MVE-I, or moves to/from FP-registers.
This patch removes `+/-fpregs` from features unconditionally added to
target feature list, depending on FPU and moves the logic to Clang
driver, where the negative form (`-fpregs`) is conditionally added to
the target features list for the cases of `-mfloat-abi=soft`, or
`-mfpu=none` without either `+mve` or `+mve.fp`. Only the negative form
is added by the driver, the positive one is derived from other features
in the backend.
Differential Revision:
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update2.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update3.mir
The file was modifiedllvm/test/Transforms/LoopVectorize/ARM/mve-vldn.ll
The file was modifiedllvm/test/CodeGen/ARM/softfp-constant-comparison.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-float-loops.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/ARM/mve-shiftcost.ll
The file was modifiedclang/lib/Driver/ToolChains/Arch/ARM.cpp
The file was modifiedllvm/lib/Support/ARMTargetParser.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update.mir
The file was modifiedclang/test/CodeGen/arm-target-features.c
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
The file was modifiedclang/test/Driver/arm-mfpu.c
Commit f53b38d12a7b9c6754d5bc91483efab935b5c012 by spatel
[InstSimplify] select Cond, true, false --> Cond
This is step 1 of damage control assuming that we need to remove several
over-reaching folds for select-of-booleans because they can cause
miscompiles as shown in D72396.
The scalar case seems obviously safe:
And I don't think there's any danger for vectors either - if the
condition is poisoned, then the select must be poisoned too, so undef
elements don't make any difference.
Differential Revision:
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
The file was modifiedllvm/test/Transforms/InstSimplify/select.ll
Commit 84ce46269cfda8800346706251ac3587b2d1c9f5 by saar
[Concepts] Fix failing test on Windows
Fix test failed by D43357 on Windows.
The file was modifiedclang/test/CXX/over/over.match/
Commit cb5612e2df893728887bedd41aa2293f454c7845 by spatel
[DAGCombiner] reduce extract subvector of concat
If we are extracting a chunk of a vector that's a fraction of an operand
of the concatenated vector operand, we can extract directly from one of
those original operands.
This is another suggestion from PR42024:
But I'm not sure yet if it will make any difference on those patterns.
It seems to help a few existing AVX512 tests though.
Differential Revision:
The file was modifiedllvm/test/CodeGen/X86/x86-interleaved-access.ll
The file was modifiedllvm/test/CodeGen/X86/avg.ll
The file was modifiedllvm/test/CodeGen/X86/pr34657.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp