Started 1 mo 4 days ago
Took 5 hr 14 min on green-dragon-02

Success Build #14558 (Aug 18, 2019 10:39:47 PM)

  • : 369228
  • : 369217
  • : 369180
  • : 369178
  • : 368916
  • : 369229
  1. [clangd] Update features table in the docs with links to LSP extension proposals

    Also update the semantic coloring entry to reflect it being supported in
    clangd now.

    Reviewers: sammccall

    Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits

    Tags: #clang

    Differential Revision: (detail)
    by nridge
  2. [X86] Fix the lower1BitShuffle code added in r369215 to correctly pass the widened vector to the KSHIFT node.

    Not sure how to test this as we have tests that exercise this code,
    but nothing failed for the types not matching. Since all the k-registers
    use equivalent register classes everything just ends up working. (detail)
    by ctopper
  3. [X86] Teach lower1BitShuffle to match KSHIFTR that doesn't use Zeroable and only relies on undef.

    This allows us to widen the type when the KSHIFTR instruction
    doesn't exist for the type. If we need to shift in zeroes into
    the upper elements we would need more work to guarantee zeroes
    when widening. (detail)
    by ctopper
  4. [X86] Teach lower1BitShuffle to recognize padding a subvector with zeros with V2 as the source and V1 as the zero vector.

    Shuffle canonicalization can swap the sources so the zero vector
    might be V1 and the subvector that's being padded can be V2. (detail)
    by ctopper
  5. [X86] Add test case for missed opportunity to recognize a vXi1 shuffle as an insert into a zero vector.

    We are currently missing this because shuffle canonicalization
    puts the zero vector as V1 and the subvector as V2. Our current
    code doesn't recognize this case. (detail)
    by ctopper

Started by timer (5 times)

This run spent:

  • 4 hr 28 min waiting;
  • 5 hr 14 min build duration;
  • 9 hr 43 min total from scheduled to completion.
Test Result (no failures)