Started 3 mo 26 days ago
Took 5 hr 14 min

Success Build #1704 (May 31, 2020 4:11:16 AM)

Changes
  1. [ScheduleDAG] Avoid unnecessary recomputation of topological order. (details)
  2. [X86][AVX] Pad small shuffle inputs in combineX86ShufflesRecursively (details)
  3. [X86][AVX] getFauxShuffleMask - don't widen shuffle inputs from INSERT_SUBVECTOR(X,SHUFFLE(Y,Z)) (details)
  4. [PhaseOrdering] add scalarization test for PR42174; NFC (details)
  5. [X86][AVX] Add test case described in D79987 (details)
  6. [X86] getFauxShuffleMask/getTargetShuffleInputs - make SelectionDAG const (PR45974). (details)
  7. [VectorCombine] add tests for scalarizing binop-with-constant; NFC (details)
  8. [X86][AVX] Add SimplifyMultipleUseDemandedBits VBROADCAST handling to SimplifyDemandedVectorElts. (details)
  9. [PhaseOrdering] add test for hoisting/CSE (PR46115); NFC (details)
  10. [utils] change update_test_checks.py use of 'TMP' value names (details)
  11. AArch64/GlobalISel: Fix incorrect ptrmask usage for alignment (details)
  12. clang-tidy and clang-query wont crash with invalid command line options (details)
  13. [utils] update expected strings in tests; NFC (details)

Started by upstream project LLDB Incremental build number 19993
originally caused by:

  • Started by timer

Started by upstream project LLDB Incremental build number 19994
originally caused by:

  • Started by timer

Started by upstream project LLDB Incremental build number 19995
originally caused by:

  • Started by timer

This run spent:

  • 8 hr 42 min waiting;
  • 5 hr 14 min build duration;
  • 9 hr 32 min total from scheduled to completion.
Revision: 32a881a12e43a709ffa19d161f6559cc58e94abe
  • refs/remotes/origin/master
Revision: dfbfdc96f9e15be40c938cde9b159afd028bf4a2
  • refs/remotes/origin/master
Revision: 32a881a12e43a709ffa19d161f6559cc58e94abe
  • refs/remotes/origin/master