Coverage Report

Created: 2022-07-16 07:03

/Users/buildslave/jenkins/workspace/coverage/llvm-project/clang/lib/Basic/Targets/NVPTX.h
Line
Count
Source (jump to first uncovered line)
1
//===--- NVPTX.h - Declare NVPTX target feature support ---------*- C++ -*-===//
2
//
3
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4
// See https://llvm.org/LICENSE.txt for license information.
5
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6
//
7
//===----------------------------------------------------------------------===//
8
//
9
// This file declares NVPTX TargetInfo objects.
10
//
11
//===----------------------------------------------------------------------===//
12
13
#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_NVPTX_H
14
#define LLVM_CLANG_LIB_BASIC_TARGETS_NVPTX_H
15
16
#include "clang/Basic/Cuda.h"
17
#include "clang/Basic/TargetInfo.h"
18
#include "clang/Basic/TargetOptions.h"
19
#include "llvm/ADT/Triple.h"
20
#include "llvm/Support/Compiler.h"
21
22
namespace clang {
23
namespace targets {
24
25
static const unsigned NVPTXAddrSpaceMap[] = {
26
    0, // Default
27
    1, // opencl_global
28
    3, // opencl_local
29
    4, // opencl_constant
30
    0, // opencl_private
31
    // FIXME: generic has to be added to the target
32
    0, // opencl_generic
33
    1, // opencl_global_device
34
    1, // opencl_global_host
35
    1, // cuda_device
36
    4, // cuda_constant
37
    3, // cuda_shared
38
    1, // sycl_global
39
    1, // sycl_global_device
40
    1, // sycl_global_host
41
    3, // sycl_local
42
    0, // sycl_private
43
    0, // ptr32_sptr
44
    0, // ptr32_uptr
45
    0  // ptr64
46
};
47
48
/// The DWARF address class. Taken from
49
/// https://docs.nvidia.com/cuda/archive/10.0/ptx-writers-guide-to-interoperability/index.html#cuda-specific-dwarf
50
static const int NVPTXDWARFAddrSpaceMap[] = {
51
    -1, // Default, opencl_private or opencl_generic - not defined
52
    5,  // opencl_global
53
    -1,
54
    8,  // opencl_local or cuda_shared
55
    4,  // opencl_constant or cuda_constant
56
};
57
58
class LLVM_LIBRARY_VISIBILITY NVPTXTargetInfo : public TargetInfo {
59
  static const char *const GCCRegNames[];
60
  static const Builtin::Info BuiltinInfo[];
61
  CudaArch GPU;
62
  uint32_t PTXVersion;
63
  std::unique_ptr<TargetInfo> HostTarget;
64
65
public:
66
  NVPTXTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts,
67
                  unsigned TargetPointerWidth);
68
69
  void getTargetDefines(const LangOptions &Opts,
70
                        MacroBuilder &Builder) const override;
71
72
  ArrayRef<Builtin::Info> getTargetBuiltins() const override;
73
74
  bool
75
  initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
76
                 StringRef CPU,
77
342
                 const std::vector<std::string> &FeaturesVec) const override {
78
342
    Features[CudaArchToString(GPU)] = true;
79
342
    Features["ptx" + std::to_string(PTXVersion)] = true;
80
342
    return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
81
342
  }
82
83
  bool hasFeature(StringRef Feature) const override;
84
85
  ArrayRef<const char *> getGCCRegNames() const override;
86
87
0
  ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
88
    // No aliases.
89
0
    return None;
90
0
  }
91
92
  bool validateAsmConstraint(const char *&Name,
93
71
                             TargetInfo::ConstraintInfo &Info) const override {
94
71
    switch (*Name) {
95
2
    default:
96
2
      return false;
97
16
    case 'c':
98
34
    case 'h':
99
34
    case 'r':
100
51
    case 'l':
101
60
    case 'f':
102
69
    case 'd':
103
69
      Info.setAllowsRegister();
104
69
      return true;
105
71
    }
106
71
  }
107
108
22
  const char *getClobbers() const override {
109
    // FIXME: Is this really right?
110
22
    return "";
111
22
  }
112
113
279
  BuiltinVaListKind getBuiltinVaListKind() const override {
114
    // FIXME: implement
115
279
    return TargetInfo::CharPtrBuiltinVaList;
116
279
  }
117
118
0
  bool isValidCPUName(StringRef Name) const override {
119
0
    return StringToCudaArch(Name) != CudaArch::UNKNOWN;
120
0
  }
121
122
1
  void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override {
123
1
    for (int i = static_cast<int>(CudaArch::SM_20);
124
56
         i < static_cast<int>(CudaArch::Generic); 
++i55
)
125
55
      Values.emplace_back(CudaArchToString(static_cast<CudaArch>(i)));
126
1
  }
127
128
53
  bool setCPU(const std::string &Name) override {
129
53
    GPU = StringToCudaArch(Name);
130
53
    return GPU != CudaArch::UNKNOWN;
131
53
  }
132
133
314
  void setSupportedOpenCLOpts() override {
134
314
    auto &Opts = getSupportedOpenCLOpts();
135
314
    Opts["cl_clang_storage_class_specifiers"] = true;
136
314
    Opts["__cl_clang_function_pointers"] = true;
137
314
    Opts["__cl_clang_variadic_functions"] = true;
138
314
    Opts["__cl_clang_non_portable_kernel_param_types"] = true;
139
314
    Opts["__cl_clang_bitfields"] = true;
140
141
314
    Opts["cl_khr_fp64"] = true;
142
314
    Opts["__opencl_c_fp64"] = true;
143
314
    Opts["cl_khr_byte_addressable_store"] = true;
144
314
    Opts["cl_khr_global_int32_base_atomics"] = true;
145
314
    Opts["cl_khr_global_int32_extended_atomics"] = true;
146
314
    Opts["cl_khr_local_int32_base_atomics"] = true;
147
314
    Opts["cl_khr_local_int32_extended_atomics"] = true;
148
314
  }
149
150
975
  const llvm::omp::GV &getGridValue() const override {
151
975
    return llvm::omp::NVPTXGridValues;
152
975
  }
153
154
  /// \returns If a target requires an address within a target specific address
155
  /// space \p AddressSpace to be converted in order to be used, then return the
156
  /// corresponding target specific DWARF address space.
157
  ///
158
  /// \returns Otherwise return None and no conversion will be emitted in the
159
  /// DWARF.
160
  Optional<unsigned>
161
311
  getDWARFAddressSpace(unsigned AddressSpace) const override {
162
311
    if (AddressSpace >= llvm::array_lengthof(NVPTXDWARFAddrSpaceMap) ||
163
311
        
NVPTXDWARFAddrSpaceMap[AddressSpace] < 0253
)
164
298
      return llvm::None;
165
13
    return NVPTXDWARFAddrSpaceMap[AddressSpace];
166
311
  }
167
168
288
  CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
169
    // CUDA compilations support all of the host's calling conventions.
170
    //
171
    // TODO: We should warn if you apply a non-default CC to anything other than
172
    // a host function.
173
288
    if (HostTarget)
174
12
      return HostTarget->checkCallingConvention(CC);
175
276
    return CCCR_Warning;
176
288
  }
177
178
26
  bool hasBitIntType() const override { return true; }
179
};
180
} // namespace targets
181
} // namespace clang
182
#endif // LLVM_CLANG_LIB_BASIC_TARGETS_NVPTX_H