/Users/buildslave/jenkins/workspace/coverage/llvm-project/clang/lib/Basic/Targets/RISCV.h
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1 | | //===--- RISCV.h - Declare RISCV target feature support ---------*- C++ -*-===// |
2 | | // |
3 | | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | | // See https://llvm.org/LICENSE.txt for license information. |
5 | | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | | // |
7 | | //===----------------------------------------------------------------------===// |
8 | | // |
9 | | // This file declares RISCV TargetInfo objects. |
10 | | // |
11 | | //===----------------------------------------------------------------------===// |
12 | | |
13 | | #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_RISCV_H |
14 | | #define LLVM_CLANG_LIB_BASIC_TARGETS_RISCV_H |
15 | | |
16 | | #include "clang/Basic/TargetInfo.h" |
17 | | #include "clang/Basic/TargetOptions.h" |
18 | | #include "llvm/ADT/Triple.h" |
19 | | #include "llvm/Support/Compiler.h" |
20 | | #include "llvm/Support/RISCVISAInfo.h" |
21 | | |
22 | | namespace clang { |
23 | | namespace targets { |
24 | | |
25 | | // RISC-V Target |
26 | | class RISCVTargetInfo : public TargetInfo { |
27 | | protected: |
28 | | std::string ABI, CPU; |
29 | | std::unique_ptr<llvm::RISCVISAInfo> ISAInfo; |
30 | | static const Builtin::Info BuiltinInfo[]; |
31 | | |
32 | | public: |
33 | | RISCVTargetInfo(const llvm::Triple &Triple, const TargetOptions &) |
34 | 255 | : TargetInfo(Triple) { |
35 | 255 | LongDoubleWidth = 128; |
36 | 255 | LongDoubleAlign = 128; |
37 | 255 | LongDoubleFormat = &llvm::APFloat::IEEEquad(); |
38 | 255 | SuitableAlign = 128; |
39 | 255 | WCharType = SignedInt; |
40 | 255 | WIntType = UnsignedInt; |
41 | 255 | HasRISCVVTypes = true; |
42 | 255 | MCountName = "_mcount"; |
43 | 255 | HasFloat16 = true; |
44 | 255 | } |
45 | | |
46 | 4 | bool setCPU(const std::string &Name) override { |
47 | 4 | if (!isValidCPUName(Name)) |
48 | 2 | return false; |
49 | 2 | CPU = Name; |
50 | 2 | return true; |
51 | 4 | } |
52 | | |
53 | 736 | StringRef getABI() const override { return ABI; } |
54 | | void getTargetDefines(const LangOptions &Opts, |
55 | | MacroBuilder &Builder) const override; |
56 | | |
57 | | ArrayRef<Builtin::Info> getTargetBuiltins() const override; |
58 | | |
59 | 142 | BuiltinVaListKind getBuiltinVaListKind() const override { |
60 | 142 | return TargetInfo::VoidPtrBuiltinVaList; |
61 | 142 | } |
62 | | |
63 | 18 | const char *getClobbers() const override { return ""; } |
64 | | |
65 | | StringRef getConstraintRegister(StringRef Constraint, |
66 | 26 | StringRef Expression) const override { |
67 | 26 | return Expression; |
68 | 26 | } |
69 | | |
70 | | ArrayRef<const char *> getGCCRegNames() const override; |
71 | | |
72 | 8 | int getEHDataRegisterNumber(unsigned RegNo) const override { |
73 | 8 | if (RegNo == 0) |
74 | 4 | return 10; |
75 | 4 | else if (RegNo == 1) |
76 | 4 | return 11; |
77 | 0 | else |
78 | 0 | return -1; |
79 | 8 | } |
80 | | |
81 | | ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override; |
82 | | |
83 | | bool validateAsmConstraint(const char *&Name, |
84 | | TargetInfo::ConstraintInfo &Info) const override; |
85 | | |
86 | | std::string convertConstraint(const char *&Constraint) const override; |
87 | | |
88 | | bool |
89 | | initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, |
90 | | StringRef CPU, |
91 | | const std::vector<std::string> &FeaturesVec) const override; |
92 | | |
93 | | bool hasFeature(StringRef Feature) const override; |
94 | | |
95 | | bool handleTargetFeatures(std::vector<std::string> &Features, |
96 | | DiagnosticsEngine &Diags) override; |
97 | | |
98 | 20 | bool hasBitIntType() const override { return true; } |
99 | | |
100 | 136 | bool useFP16ConversionIntrinsics() const override { |
101 | 136 | return false; |
102 | 136 | } |
103 | | }; |
104 | | class LLVM_LIBRARY_VISIBILITY RISCV32TargetInfo : public RISCVTargetInfo { |
105 | | public: |
106 | | RISCV32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts) |
107 | 107 | : RISCVTargetInfo(Triple, Opts) { |
108 | 107 | IntPtrType = SignedInt; |
109 | 107 | PtrDiffType = SignedInt; |
110 | 107 | SizeType = UnsignedInt; |
111 | 107 | resetDataLayout("e-m:e-p:32:32-i64:64-n32-S128"); |
112 | 107 | } clang::targets::RISCV32TargetInfo::RISCV32TargetInfo(llvm::Triple const&, clang::TargetOptions const&) Line | Count | Source | 107 | 65 | : RISCVTargetInfo(Triple, Opts) { | 108 | 65 | IntPtrType = SignedInt; | 109 | 65 | PtrDiffType = SignedInt; | 110 | 65 | SizeType = UnsignedInt; | 111 | 65 | resetDataLayout("e-m:e-p:32:32-i64:64-n32-S128"); | 112 | 65 | } |
clang::targets::RISCV32TargetInfo::RISCV32TargetInfo(llvm::Triple const&, clang::TargetOptions const&) Line | Count | Source | 107 | 42 | : RISCVTargetInfo(Triple, Opts) { | 108 | 42 | IntPtrType = SignedInt; | 109 | 42 | PtrDiffType = SignedInt; | 110 | 42 | SizeType = UnsignedInt; | 111 | 42 | resetDataLayout("e-m:e-p:32:32-i64:64-n32-S128"); | 112 | 42 | } |
|
113 | | |
114 | 60 | bool setABI(const std::string &Name) override { |
115 | 60 | if (Name == "ilp32" || Name == "ilp32f"18 || Name == "ilp32d"12 ) { |
116 | 59 | ABI = Name; |
117 | 59 | return true; |
118 | 59 | } |
119 | 1 | return false; |
120 | 60 | } |
121 | | |
122 | | bool isValidCPUName(StringRef Name) const override; |
123 | | void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override; |
124 | | bool isValidTuneCPUName(StringRef Name) const override; |
125 | | void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values) const override; |
126 | | |
127 | 104 | void setMaxAtomicWidth() override { |
128 | 104 | MaxAtomicPromoteWidth = 128; |
129 | | |
130 | 104 | if (ISAInfo->hasExtension("a")) |
131 | 13 | MaxAtomicInlineWidth = 32; |
132 | 104 | } |
133 | | }; |
134 | | class LLVM_LIBRARY_VISIBILITY RISCV64TargetInfo : public RISCVTargetInfo { |
135 | | public: |
136 | | RISCV64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts) |
137 | 148 | : RISCVTargetInfo(Triple, Opts) { |
138 | 148 | LongWidth = LongAlign = PointerWidth = PointerAlign = 64; |
139 | 148 | IntMaxType = Int64Type = SignedLong; |
140 | 148 | resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n64-S128"); |
141 | 148 | } clang::targets::RISCV64TargetInfo::RISCV64TargetInfo(llvm::Triple const&, clang::TargetOptions const&) Line | Count | Source | 137 | 69 | : RISCVTargetInfo(Triple, Opts) { | 138 | 69 | LongWidth = LongAlign = PointerWidth = PointerAlign = 64; | 139 | 69 | IntMaxType = Int64Type = SignedLong; | 140 | 69 | resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n64-S128"); | 141 | 69 | } |
clang::targets::RISCV64TargetInfo::RISCV64TargetInfo(llvm::Triple const&, clang::TargetOptions const&) Line | Count | Source | 137 | 79 | : RISCVTargetInfo(Triple, Opts) { | 138 | 79 | LongWidth = LongAlign = PointerWidth = PointerAlign = 64; | 139 | 79 | IntMaxType = Int64Type = SignedLong; | 140 | 79 | resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n64-S128"); | 141 | 79 | } |
|
142 | | |
143 | 92 | bool setABI(const std::string &Name) override { |
144 | 92 | if (Name == "lp64" || Name == "lp64f"33 || Name == "lp64d"28 ) { |
145 | 91 | ABI = Name; |
146 | 91 | return true; |
147 | 91 | } |
148 | 1 | return false; |
149 | 92 | } |
150 | | |
151 | | bool isValidCPUName(StringRef Name) const override; |
152 | | void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override; |
153 | | bool isValidTuneCPUName(StringRef Name) const override; |
154 | | void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values) const override; |
155 | | |
156 | 144 | void setMaxAtomicWidth() override { |
157 | 144 | MaxAtomicPromoteWidth = 128; |
158 | | |
159 | 144 | if (ISAInfo->hasExtension("a")) |
160 | 21 | MaxAtomicInlineWidth = 64; |
161 | 144 | } |
162 | | }; |
163 | | } // namespace targets |
164 | | } // namespace clang |
165 | | |
166 | | #endif // LLVM_CLANG_LIB_BASIC_TARGETS_RISCV_H |